rt2x00queue.c 24 KB

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  1. /*
  2. Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
  3. Copyright (C) 2004 - 2009 Gertjan van Wingerde <gwingerde@gmail.com>
  4. <http://rt2x00.serialmonkey.com>
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the
  15. Free Software Foundation, Inc.,
  16. 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  17. */
  18. /*
  19. Module: rt2x00lib
  20. Abstract: rt2x00 queue specific routines.
  21. */
  22. #include <linux/slab.h>
  23. #include <linux/kernel.h>
  24. #include <linux/module.h>
  25. #include <linux/dma-mapping.h>
  26. #include "rt2x00.h"
  27. #include "rt2x00lib.h"
  28. struct sk_buff *rt2x00queue_alloc_rxskb(struct rt2x00_dev *rt2x00dev,
  29. struct queue_entry *entry)
  30. {
  31. struct sk_buff *skb;
  32. struct skb_frame_desc *skbdesc;
  33. unsigned int frame_size;
  34. unsigned int head_size = 0;
  35. unsigned int tail_size = 0;
  36. /*
  37. * The frame size includes descriptor size, because the
  38. * hardware directly receive the frame into the skbuffer.
  39. */
  40. frame_size = entry->queue->data_size + entry->queue->desc_size;
  41. /*
  42. * The payload should be aligned to a 4-byte boundary,
  43. * this means we need at least 3 bytes for moving the frame
  44. * into the correct offset.
  45. */
  46. head_size = 4;
  47. /*
  48. * For IV/EIV/ICV assembly we must make sure there is
  49. * at least 8 bytes bytes available in headroom for IV/EIV
  50. * and 8 bytes for ICV data as tailroon.
  51. */
  52. if (test_bit(CONFIG_SUPPORT_HW_CRYPTO, &rt2x00dev->flags)) {
  53. head_size += 8;
  54. tail_size += 8;
  55. }
  56. /*
  57. * Allocate skbuffer.
  58. */
  59. skb = dev_alloc_skb(frame_size + head_size + tail_size);
  60. if (!skb)
  61. return NULL;
  62. /*
  63. * Make sure we not have a frame with the requested bytes
  64. * available in the head and tail.
  65. */
  66. skb_reserve(skb, head_size);
  67. skb_put(skb, frame_size);
  68. /*
  69. * Populate skbdesc.
  70. */
  71. skbdesc = get_skb_frame_desc(skb);
  72. memset(skbdesc, 0, sizeof(*skbdesc));
  73. skbdesc->entry = entry;
  74. if (test_bit(DRIVER_REQUIRE_DMA, &rt2x00dev->flags)) {
  75. skbdesc->skb_dma = dma_map_single(rt2x00dev->dev,
  76. skb->data,
  77. skb->len,
  78. DMA_FROM_DEVICE);
  79. skbdesc->flags |= SKBDESC_DMA_MAPPED_RX;
  80. }
  81. return skb;
  82. }
  83. void rt2x00queue_map_txskb(struct rt2x00_dev *rt2x00dev, struct sk_buff *skb)
  84. {
  85. struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb);
  86. /*
  87. * If device has requested headroom, we should make sure that
  88. * is also mapped to the DMA so it can be used for transfering
  89. * additional descriptor information to the hardware.
  90. */
  91. skb_push(skb, rt2x00dev->ops->extra_tx_headroom);
  92. skbdesc->skb_dma =
  93. dma_map_single(rt2x00dev->dev, skb->data, skb->len, DMA_TO_DEVICE);
  94. /*
  95. * Restore data pointer to original location again.
  96. */
  97. skb_pull(skb, rt2x00dev->ops->extra_tx_headroom);
  98. skbdesc->flags |= SKBDESC_DMA_MAPPED_TX;
  99. }
  100. EXPORT_SYMBOL_GPL(rt2x00queue_map_txskb);
  101. void rt2x00queue_unmap_skb(struct rt2x00_dev *rt2x00dev, struct sk_buff *skb)
  102. {
  103. struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb);
  104. if (skbdesc->flags & SKBDESC_DMA_MAPPED_RX) {
  105. dma_unmap_single(rt2x00dev->dev, skbdesc->skb_dma, skb->len,
  106. DMA_FROM_DEVICE);
  107. skbdesc->flags &= ~SKBDESC_DMA_MAPPED_RX;
  108. }
  109. if (skbdesc->flags & SKBDESC_DMA_MAPPED_TX) {
  110. /*
  111. * Add headroom to the skb length, it has been removed
  112. * by the driver, but it was actually mapped to DMA.
  113. */
  114. dma_unmap_single(rt2x00dev->dev, skbdesc->skb_dma,
  115. skb->len + rt2x00dev->ops->extra_tx_headroom,
  116. DMA_TO_DEVICE);
  117. skbdesc->flags &= ~SKBDESC_DMA_MAPPED_TX;
  118. }
  119. }
  120. void rt2x00queue_free_skb(struct rt2x00_dev *rt2x00dev, struct sk_buff *skb)
  121. {
  122. if (!skb)
  123. return;
  124. rt2x00queue_unmap_skb(rt2x00dev, skb);
  125. dev_kfree_skb_any(skb);
  126. }
  127. void rt2x00queue_align_frame(struct sk_buff *skb)
  128. {
  129. unsigned int frame_length = skb->len;
  130. unsigned int align = ALIGN_SIZE(skb, 0);
  131. if (!align)
  132. return;
  133. skb_push(skb, align);
  134. memmove(skb->data, skb->data + align, frame_length);
  135. skb_trim(skb, frame_length);
  136. }
  137. void rt2x00queue_align_payload(struct sk_buff *skb, unsigned int header_length)
  138. {
  139. unsigned int frame_length = skb->len;
  140. unsigned int align = ALIGN_SIZE(skb, header_length);
  141. if (!align)
  142. return;
  143. skb_push(skb, align);
  144. memmove(skb->data, skb->data + align, frame_length);
  145. skb_trim(skb, frame_length);
  146. }
  147. void rt2x00queue_insert_l2pad(struct sk_buff *skb, unsigned int header_length)
  148. {
  149. unsigned int payload_length = skb->len - header_length;
  150. unsigned int header_align = ALIGN_SIZE(skb, 0);
  151. unsigned int payload_align = ALIGN_SIZE(skb, header_length);
  152. unsigned int l2pad = payload_length ? L2PAD_SIZE(header_length) : 0;
  153. /*
  154. * Adjust the header alignment if the payload needs to be moved more
  155. * than the header.
  156. */
  157. if (payload_align > header_align)
  158. header_align += 4;
  159. /* There is nothing to do if no alignment is needed */
  160. if (!header_align)
  161. return;
  162. /* Reserve the amount of space needed in front of the frame */
  163. skb_push(skb, header_align);
  164. /*
  165. * Move the header.
  166. */
  167. memmove(skb->data, skb->data + header_align, header_length);
  168. /* Move the payload, if present and if required */
  169. if (payload_length && payload_align)
  170. memmove(skb->data + header_length + l2pad,
  171. skb->data + header_length + l2pad + payload_align,
  172. payload_length);
  173. /* Trim the skb to the correct size */
  174. skb_trim(skb, header_length + l2pad + payload_length);
  175. }
  176. void rt2x00queue_remove_l2pad(struct sk_buff *skb, unsigned int header_length)
  177. {
  178. unsigned int l2pad = L2PAD_SIZE(header_length);
  179. if (!l2pad)
  180. return;
  181. memmove(skb->data + l2pad, skb->data, header_length);
  182. skb_pull(skb, l2pad);
  183. }
  184. static void rt2x00queue_create_tx_descriptor_seq(struct queue_entry *entry,
  185. struct txentry_desc *txdesc)
  186. {
  187. struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(entry->skb);
  188. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)entry->skb->data;
  189. struct rt2x00_intf *intf = vif_to_intf(tx_info->control.vif);
  190. unsigned long irqflags;
  191. if (!(tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) ||
  192. unlikely(!tx_info->control.vif))
  193. return;
  194. /*
  195. * Hardware should insert sequence counter.
  196. * FIXME: We insert a software sequence counter first for
  197. * hardware that doesn't support hardware sequence counting.
  198. *
  199. * This is wrong because beacons are not getting sequence
  200. * numbers assigned properly.
  201. *
  202. * A secondary problem exists for drivers that cannot toggle
  203. * sequence counting per-frame, since those will override the
  204. * sequence counter given by mac80211.
  205. */
  206. spin_lock_irqsave(&intf->seqlock, irqflags);
  207. if (test_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags))
  208. intf->seqno += 0x10;
  209. hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
  210. hdr->seq_ctrl |= cpu_to_le16(intf->seqno);
  211. spin_unlock_irqrestore(&intf->seqlock, irqflags);
  212. __set_bit(ENTRY_TXD_GENERATE_SEQ, &txdesc->flags);
  213. }
  214. static void rt2x00queue_create_tx_descriptor_plcp(struct queue_entry *entry,
  215. struct txentry_desc *txdesc,
  216. const struct rt2x00_rate *hwrate)
  217. {
  218. struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
  219. struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(entry->skb);
  220. struct ieee80211_tx_rate *txrate = &tx_info->control.rates[0];
  221. unsigned int data_length;
  222. unsigned int duration;
  223. unsigned int residual;
  224. /* Data length + CRC + Crypto overhead (IV/EIV/ICV/MIC) */
  225. data_length = entry->skb->len + 4;
  226. data_length += rt2x00crypto_tx_overhead(rt2x00dev, entry->skb);
  227. /*
  228. * PLCP setup
  229. * Length calculation depends on OFDM/CCK rate.
  230. */
  231. txdesc->signal = hwrate->plcp;
  232. txdesc->service = 0x04;
  233. if (hwrate->flags & DEV_RATE_OFDM) {
  234. txdesc->length_high = (data_length >> 6) & 0x3f;
  235. txdesc->length_low = data_length & 0x3f;
  236. } else {
  237. /*
  238. * Convert length to microseconds.
  239. */
  240. residual = GET_DURATION_RES(data_length, hwrate->bitrate);
  241. duration = GET_DURATION(data_length, hwrate->bitrate);
  242. if (residual != 0) {
  243. duration++;
  244. /*
  245. * Check if we need to set the Length Extension
  246. */
  247. if (hwrate->bitrate == 110 && residual <= 30)
  248. txdesc->service |= 0x80;
  249. }
  250. txdesc->length_high = (duration >> 8) & 0xff;
  251. txdesc->length_low = duration & 0xff;
  252. /*
  253. * When preamble is enabled we should set the
  254. * preamble bit for the signal.
  255. */
  256. if (txrate->flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE)
  257. txdesc->signal |= 0x08;
  258. }
  259. }
  260. static void rt2x00queue_create_tx_descriptor(struct queue_entry *entry,
  261. struct txentry_desc *txdesc)
  262. {
  263. struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
  264. struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(entry->skb);
  265. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)entry->skb->data;
  266. struct ieee80211_rate *rate =
  267. ieee80211_get_tx_rate(rt2x00dev->hw, tx_info);
  268. const struct rt2x00_rate *hwrate;
  269. memset(txdesc, 0, sizeof(*txdesc));
  270. /*
  271. * Initialize information from queue
  272. */
  273. txdesc->queue = entry->queue->qid;
  274. txdesc->cw_min = entry->queue->cw_min;
  275. txdesc->cw_max = entry->queue->cw_max;
  276. txdesc->aifs = entry->queue->aifs;
  277. /*
  278. * Header and alignment information.
  279. */
  280. txdesc->header_length = ieee80211_get_hdrlen_from_skb(entry->skb);
  281. if (test_bit(DRIVER_REQUIRE_L2PAD, &rt2x00dev->flags) &&
  282. (entry->skb->len > txdesc->header_length))
  283. txdesc->l2pad = L2PAD_SIZE(txdesc->header_length);
  284. /*
  285. * Check whether this frame is to be acked.
  286. */
  287. if (!(tx_info->flags & IEEE80211_TX_CTL_NO_ACK))
  288. __set_bit(ENTRY_TXD_ACK, &txdesc->flags);
  289. /*
  290. * Check if this is a RTS/CTS frame
  291. */
  292. if (ieee80211_is_rts(hdr->frame_control) ||
  293. ieee80211_is_cts(hdr->frame_control)) {
  294. __set_bit(ENTRY_TXD_BURST, &txdesc->flags);
  295. if (ieee80211_is_rts(hdr->frame_control))
  296. __set_bit(ENTRY_TXD_RTS_FRAME, &txdesc->flags);
  297. else
  298. __set_bit(ENTRY_TXD_CTS_FRAME, &txdesc->flags);
  299. if (tx_info->control.rts_cts_rate_idx >= 0)
  300. rate =
  301. ieee80211_get_rts_cts_rate(rt2x00dev->hw, tx_info);
  302. }
  303. /*
  304. * Determine retry information.
  305. */
  306. txdesc->retry_limit = tx_info->control.rates[0].count - 1;
  307. if (txdesc->retry_limit >= rt2x00dev->long_retry)
  308. __set_bit(ENTRY_TXD_RETRY_MODE, &txdesc->flags);
  309. /*
  310. * Check if more fragments are pending
  311. */
  312. if (ieee80211_has_morefrags(hdr->frame_control) ||
  313. (tx_info->flags & IEEE80211_TX_CTL_MORE_FRAMES)) {
  314. __set_bit(ENTRY_TXD_BURST, &txdesc->flags);
  315. __set_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags);
  316. }
  317. /*
  318. * Beacons and probe responses require the tsf timestamp
  319. * to be inserted into the frame, except for a frame that has been injected
  320. * through a monitor interface. This latter is needed for testing a
  321. * monitor interface.
  322. */
  323. if ((ieee80211_is_beacon(hdr->frame_control) ||
  324. ieee80211_is_probe_resp(hdr->frame_control)) &&
  325. (!(tx_info->flags & IEEE80211_TX_CTL_INJECTED)))
  326. __set_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags);
  327. /*
  328. * Determine with what IFS priority this frame should be send.
  329. * Set ifs to IFS_SIFS when the this is not the first fragment,
  330. * or this fragment came after RTS/CTS.
  331. */
  332. if ((tx_info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT) &&
  333. !test_bit(ENTRY_TXD_RTS_FRAME, &txdesc->flags)) {
  334. __set_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags);
  335. txdesc->ifs = IFS_BACKOFF;
  336. } else
  337. txdesc->ifs = IFS_SIFS;
  338. /*
  339. * Determine rate modulation.
  340. */
  341. hwrate = rt2x00_get_rate(rate->hw_value);
  342. txdesc->rate_mode = RATE_MODE_CCK;
  343. if (hwrate->flags & DEV_RATE_OFDM)
  344. txdesc->rate_mode = RATE_MODE_OFDM;
  345. /*
  346. * Apply TX descriptor handling by components
  347. */
  348. rt2x00crypto_create_tx_descriptor(entry, txdesc);
  349. rt2x00ht_create_tx_descriptor(entry, txdesc, hwrate);
  350. rt2x00queue_create_tx_descriptor_seq(entry, txdesc);
  351. rt2x00queue_create_tx_descriptor_plcp(entry, txdesc, hwrate);
  352. }
  353. static void rt2x00queue_write_tx_descriptor(struct queue_entry *entry,
  354. struct txentry_desc *txdesc)
  355. {
  356. struct data_queue *queue = entry->queue;
  357. struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;
  358. rt2x00dev->ops->lib->write_tx_desc(rt2x00dev, entry->skb, txdesc);
  359. /*
  360. * All processing on the frame has been completed, this means
  361. * it is now ready to be dumped to userspace through debugfs.
  362. */
  363. rt2x00debug_dump_frame(rt2x00dev, DUMP_FRAME_TX, entry->skb);
  364. /*
  365. * Check if we need to kick the queue, there are however a few rules
  366. * 1) Don't kick beacon queue
  367. * 2) Don't kick unless this is the last in frame in a burst.
  368. * When the burst flag is set, this frame is always followed
  369. * by another frame which in some way are related to eachother.
  370. * This is true for fragments, RTS or CTS-to-self frames.
  371. * 3) Rule 2 can be broken when the available entries
  372. * in the queue are less then a certain threshold.
  373. */
  374. if (entry->queue->qid == QID_BEACON)
  375. return;
  376. if (rt2x00queue_threshold(queue) ||
  377. !test_bit(ENTRY_TXD_BURST, &txdesc->flags))
  378. rt2x00dev->ops->lib->kick_tx_queue(rt2x00dev, queue->qid);
  379. }
  380. int rt2x00queue_write_tx_frame(struct data_queue *queue, struct sk_buff *skb,
  381. bool local)
  382. {
  383. struct ieee80211_tx_info *tx_info;
  384. struct queue_entry *entry = rt2x00queue_get_entry(queue, Q_INDEX);
  385. struct txentry_desc txdesc;
  386. struct skb_frame_desc *skbdesc;
  387. u8 rate_idx, rate_flags;
  388. if (unlikely(rt2x00queue_full(queue)))
  389. return -ENOBUFS;
  390. if (test_and_set_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags)) {
  391. ERROR(queue->rt2x00dev,
  392. "Arrived at non-free entry in the non-full queue %d.\n"
  393. "Please file bug report to %s.\n",
  394. queue->qid, DRV_PROJECT);
  395. return -EINVAL;
  396. }
  397. /*
  398. * Copy all TX descriptor information into txdesc,
  399. * after that we are free to use the skb->cb array
  400. * for our information.
  401. */
  402. entry->skb = skb;
  403. rt2x00queue_create_tx_descriptor(entry, &txdesc);
  404. /*
  405. * All information is retrieved from the skb->cb array,
  406. * now we should claim ownership of the driver part of that
  407. * array, preserving the bitrate index and flags.
  408. */
  409. tx_info = IEEE80211_SKB_CB(skb);
  410. rate_idx = tx_info->control.rates[0].idx;
  411. rate_flags = tx_info->control.rates[0].flags;
  412. skbdesc = get_skb_frame_desc(skb);
  413. memset(skbdesc, 0, sizeof(*skbdesc));
  414. skbdesc->entry = entry;
  415. skbdesc->tx_rate_idx = rate_idx;
  416. skbdesc->tx_rate_flags = rate_flags;
  417. if (local)
  418. skbdesc->flags |= SKBDESC_NOT_MAC80211;
  419. /*
  420. * When hardware encryption is supported, and this frame
  421. * is to be encrypted, we should strip the IV/EIV data from
  422. * the frame so we can provide it to the driver separately.
  423. */
  424. if (test_bit(ENTRY_TXD_ENCRYPT, &txdesc.flags) &&
  425. !test_bit(ENTRY_TXD_ENCRYPT_IV, &txdesc.flags)) {
  426. if (test_bit(DRIVER_REQUIRE_COPY_IV, &queue->rt2x00dev->flags))
  427. rt2x00crypto_tx_copy_iv(skb, &txdesc);
  428. else
  429. rt2x00crypto_tx_remove_iv(skb, &txdesc);
  430. }
  431. /*
  432. * When DMA allocation is required we should guarentee to the
  433. * driver that the DMA is aligned to a 4-byte boundary.
  434. * However some drivers require L2 padding to pad the payload
  435. * rather then the header. This could be a requirement for
  436. * PCI and USB devices, while header alignment only is valid
  437. * for PCI devices.
  438. */
  439. if (test_bit(DRIVER_REQUIRE_L2PAD, &queue->rt2x00dev->flags))
  440. rt2x00queue_insert_l2pad(entry->skb, txdesc.header_length);
  441. else if (test_bit(DRIVER_REQUIRE_DMA, &queue->rt2x00dev->flags))
  442. rt2x00queue_align_frame(entry->skb);
  443. /*
  444. * It could be possible that the queue was corrupted and this
  445. * call failed. Since we always return NETDEV_TX_OK to mac80211,
  446. * this frame will simply be dropped.
  447. */
  448. if (unlikely(queue->rt2x00dev->ops->lib->write_tx_data(entry))) {
  449. clear_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags);
  450. entry->skb = NULL;
  451. return -EIO;
  452. }
  453. if (test_bit(DRIVER_REQUIRE_DMA, &queue->rt2x00dev->flags))
  454. rt2x00queue_map_txskb(queue->rt2x00dev, skb);
  455. set_bit(ENTRY_DATA_PENDING, &entry->flags);
  456. rt2x00queue_index_inc(queue, Q_INDEX);
  457. rt2x00queue_write_tx_descriptor(entry, &txdesc);
  458. return 0;
  459. }
  460. int rt2x00queue_update_beacon(struct rt2x00_dev *rt2x00dev,
  461. struct ieee80211_vif *vif,
  462. const bool enable_beacon)
  463. {
  464. struct rt2x00_intf *intf = vif_to_intf(vif);
  465. struct skb_frame_desc *skbdesc;
  466. struct txentry_desc txdesc;
  467. __le32 desc[16];
  468. if (unlikely(!intf->beacon))
  469. return -ENOBUFS;
  470. mutex_lock(&intf->beacon_skb_mutex);
  471. /*
  472. * Clean up the beacon skb.
  473. */
  474. rt2x00queue_free_skb(rt2x00dev, intf->beacon->skb);
  475. intf->beacon->skb = NULL;
  476. if (!enable_beacon) {
  477. rt2x00dev->ops->lib->kill_tx_queue(rt2x00dev, QID_BEACON);
  478. mutex_unlock(&intf->beacon_skb_mutex);
  479. return 0;
  480. }
  481. intf->beacon->skb = ieee80211_beacon_get(rt2x00dev->hw, vif);
  482. if (!intf->beacon->skb) {
  483. mutex_unlock(&intf->beacon_skb_mutex);
  484. return -ENOMEM;
  485. }
  486. /*
  487. * Copy all TX descriptor information into txdesc,
  488. * after that we are free to use the skb->cb array
  489. * for our information.
  490. */
  491. rt2x00queue_create_tx_descriptor(intf->beacon, &txdesc);
  492. /*
  493. * For the descriptor we use a local array from where the
  494. * driver can move it to the correct location required for
  495. * the hardware.
  496. */
  497. memset(desc, 0, sizeof(desc));
  498. /*
  499. * Fill in skb descriptor
  500. */
  501. skbdesc = get_skb_frame_desc(intf->beacon->skb);
  502. memset(skbdesc, 0, sizeof(*skbdesc));
  503. skbdesc->desc = desc;
  504. skbdesc->desc_len = intf->beacon->queue->desc_size;
  505. skbdesc->entry = intf->beacon;
  506. /*
  507. * Write TX descriptor into reserved room in front of the beacon.
  508. */
  509. rt2x00queue_write_tx_descriptor(intf->beacon, &txdesc);
  510. /*
  511. * Send beacon to hardware.
  512. * Also enable beacon generation, which might have been disabled
  513. * by the driver during the config_beacon() callback function.
  514. */
  515. rt2x00dev->ops->lib->write_beacon(intf->beacon);
  516. rt2x00dev->ops->lib->kick_tx_queue(rt2x00dev, QID_BEACON);
  517. mutex_unlock(&intf->beacon_skb_mutex);
  518. return 0;
  519. }
  520. struct data_queue *rt2x00queue_get_queue(struct rt2x00_dev *rt2x00dev,
  521. const enum data_queue_qid queue)
  522. {
  523. int atim = test_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags);
  524. if (queue == QID_RX)
  525. return rt2x00dev->rx;
  526. if (queue < rt2x00dev->ops->tx_queues && rt2x00dev->tx)
  527. return &rt2x00dev->tx[queue];
  528. if (!rt2x00dev->bcn)
  529. return NULL;
  530. if (queue == QID_BEACON)
  531. return &rt2x00dev->bcn[0];
  532. else if (queue == QID_ATIM && atim)
  533. return &rt2x00dev->bcn[1];
  534. return NULL;
  535. }
  536. EXPORT_SYMBOL_GPL(rt2x00queue_get_queue);
  537. struct queue_entry *rt2x00queue_get_entry(struct data_queue *queue,
  538. enum queue_index index)
  539. {
  540. struct queue_entry *entry;
  541. unsigned long irqflags;
  542. if (unlikely(index >= Q_INDEX_MAX)) {
  543. ERROR(queue->rt2x00dev,
  544. "Entry requested from invalid index type (%d)\n", index);
  545. return NULL;
  546. }
  547. spin_lock_irqsave(&queue->lock, irqflags);
  548. entry = &queue->entries[queue->index[index]];
  549. spin_unlock_irqrestore(&queue->lock, irqflags);
  550. return entry;
  551. }
  552. EXPORT_SYMBOL_GPL(rt2x00queue_get_entry);
  553. void rt2x00queue_index_inc(struct data_queue *queue, enum queue_index index)
  554. {
  555. unsigned long irqflags;
  556. if (unlikely(index >= Q_INDEX_MAX)) {
  557. ERROR(queue->rt2x00dev,
  558. "Index change on invalid index type (%d)\n", index);
  559. return;
  560. }
  561. spin_lock_irqsave(&queue->lock, irqflags);
  562. queue->index[index]++;
  563. if (queue->index[index] >= queue->limit)
  564. queue->index[index] = 0;
  565. if (index == Q_INDEX) {
  566. queue->length++;
  567. } else if (index == Q_INDEX_DONE) {
  568. queue->length--;
  569. queue->count++;
  570. }
  571. spin_unlock_irqrestore(&queue->lock, irqflags);
  572. }
  573. static void rt2x00queue_reset(struct data_queue *queue)
  574. {
  575. unsigned long irqflags;
  576. spin_lock_irqsave(&queue->lock, irqflags);
  577. queue->count = 0;
  578. queue->length = 0;
  579. memset(queue->index, 0, sizeof(queue->index));
  580. spin_unlock_irqrestore(&queue->lock, irqflags);
  581. }
  582. void rt2x00queue_stop_queues(struct rt2x00_dev *rt2x00dev)
  583. {
  584. struct data_queue *queue;
  585. txall_queue_for_each(rt2x00dev, queue)
  586. rt2x00dev->ops->lib->kill_tx_queue(rt2x00dev, queue->qid);
  587. }
  588. void rt2x00queue_init_queues(struct rt2x00_dev *rt2x00dev)
  589. {
  590. struct data_queue *queue;
  591. unsigned int i;
  592. queue_for_each(rt2x00dev, queue) {
  593. rt2x00queue_reset(queue);
  594. for (i = 0; i < queue->limit; i++) {
  595. queue->entries[i].flags = 0;
  596. rt2x00dev->ops->lib->clear_entry(&queue->entries[i]);
  597. }
  598. }
  599. }
  600. static int rt2x00queue_alloc_entries(struct data_queue *queue,
  601. const struct data_queue_desc *qdesc)
  602. {
  603. struct queue_entry *entries;
  604. unsigned int entry_size;
  605. unsigned int i;
  606. rt2x00queue_reset(queue);
  607. queue->limit = qdesc->entry_num;
  608. queue->threshold = DIV_ROUND_UP(qdesc->entry_num, 10);
  609. queue->data_size = qdesc->data_size;
  610. queue->desc_size = qdesc->desc_size;
  611. /*
  612. * Allocate all queue entries.
  613. */
  614. entry_size = sizeof(*entries) + qdesc->priv_size;
  615. entries = kzalloc(queue->limit * entry_size, GFP_KERNEL);
  616. if (!entries)
  617. return -ENOMEM;
  618. #define QUEUE_ENTRY_PRIV_OFFSET(__base, __index, __limit, __esize, __psize) \
  619. ( ((char *)(__base)) + ((__limit) * (__esize)) + \
  620. ((__index) * (__psize)) )
  621. for (i = 0; i < queue->limit; i++) {
  622. entries[i].flags = 0;
  623. entries[i].queue = queue;
  624. entries[i].skb = NULL;
  625. entries[i].entry_idx = i;
  626. entries[i].priv_data =
  627. QUEUE_ENTRY_PRIV_OFFSET(entries, i, queue->limit,
  628. sizeof(*entries), qdesc->priv_size);
  629. }
  630. #undef QUEUE_ENTRY_PRIV_OFFSET
  631. queue->entries = entries;
  632. return 0;
  633. }
  634. static void rt2x00queue_free_skbs(struct rt2x00_dev *rt2x00dev,
  635. struct data_queue *queue)
  636. {
  637. unsigned int i;
  638. if (!queue->entries)
  639. return;
  640. for (i = 0; i < queue->limit; i++) {
  641. if (queue->entries[i].skb)
  642. rt2x00queue_free_skb(rt2x00dev, queue->entries[i].skb);
  643. }
  644. }
  645. static int rt2x00queue_alloc_rxskbs(struct rt2x00_dev *rt2x00dev,
  646. struct data_queue *queue)
  647. {
  648. unsigned int i;
  649. struct sk_buff *skb;
  650. for (i = 0; i < queue->limit; i++) {
  651. skb = rt2x00queue_alloc_rxskb(rt2x00dev, &queue->entries[i]);
  652. if (!skb)
  653. return -ENOMEM;
  654. queue->entries[i].skb = skb;
  655. }
  656. return 0;
  657. }
  658. int rt2x00queue_initialize(struct rt2x00_dev *rt2x00dev)
  659. {
  660. struct data_queue *queue;
  661. int status;
  662. status = rt2x00queue_alloc_entries(rt2x00dev->rx, rt2x00dev->ops->rx);
  663. if (status)
  664. goto exit;
  665. tx_queue_for_each(rt2x00dev, queue) {
  666. status = rt2x00queue_alloc_entries(queue, rt2x00dev->ops->tx);
  667. if (status)
  668. goto exit;
  669. }
  670. status = rt2x00queue_alloc_entries(rt2x00dev->bcn, rt2x00dev->ops->bcn);
  671. if (status)
  672. goto exit;
  673. if (test_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags)) {
  674. status = rt2x00queue_alloc_entries(&rt2x00dev->bcn[1],
  675. rt2x00dev->ops->atim);
  676. if (status)
  677. goto exit;
  678. }
  679. status = rt2x00queue_alloc_rxskbs(rt2x00dev, rt2x00dev->rx);
  680. if (status)
  681. goto exit;
  682. return 0;
  683. exit:
  684. ERROR(rt2x00dev, "Queue entries allocation failed.\n");
  685. rt2x00queue_uninitialize(rt2x00dev);
  686. return status;
  687. }
  688. void rt2x00queue_uninitialize(struct rt2x00_dev *rt2x00dev)
  689. {
  690. struct data_queue *queue;
  691. rt2x00queue_free_skbs(rt2x00dev, rt2x00dev->rx);
  692. queue_for_each(rt2x00dev, queue) {
  693. kfree(queue->entries);
  694. queue->entries = NULL;
  695. }
  696. }
  697. static void rt2x00queue_init(struct rt2x00_dev *rt2x00dev,
  698. struct data_queue *queue, enum data_queue_qid qid)
  699. {
  700. spin_lock_init(&queue->lock);
  701. queue->rt2x00dev = rt2x00dev;
  702. queue->qid = qid;
  703. queue->txop = 0;
  704. queue->aifs = 2;
  705. queue->cw_min = 5;
  706. queue->cw_max = 10;
  707. }
  708. int rt2x00queue_allocate(struct rt2x00_dev *rt2x00dev)
  709. {
  710. struct data_queue *queue;
  711. enum data_queue_qid qid;
  712. unsigned int req_atim =
  713. !!test_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags);
  714. /*
  715. * We need the following queues:
  716. * RX: 1
  717. * TX: ops->tx_queues
  718. * Beacon: 1
  719. * Atim: 1 (if required)
  720. */
  721. rt2x00dev->data_queues = 2 + rt2x00dev->ops->tx_queues + req_atim;
  722. queue = kzalloc(rt2x00dev->data_queues * sizeof(*queue), GFP_KERNEL);
  723. if (!queue) {
  724. ERROR(rt2x00dev, "Queue allocation failed.\n");
  725. return -ENOMEM;
  726. }
  727. /*
  728. * Initialize pointers
  729. */
  730. rt2x00dev->rx = queue;
  731. rt2x00dev->tx = &queue[1];
  732. rt2x00dev->bcn = &queue[1 + rt2x00dev->ops->tx_queues];
  733. /*
  734. * Initialize queue parameters.
  735. * RX: qid = QID_RX
  736. * TX: qid = QID_AC_BE + index
  737. * TX: cw_min: 2^5 = 32.
  738. * TX: cw_max: 2^10 = 1024.
  739. * BCN: qid = QID_BEACON
  740. * ATIM: qid = QID_ATIM
  741. */
  742. rt2x00queue_init(rt2x00dev, rt2x00dev->rx, QID_RX);
  743. qid = QID_AC_BE;
  744. tx_queue_for_each(rt2x00dev, queue)
  745. rt2x00queue_init(rt2x00dev, queue, qid++);
  746. rt2x00queue_init(rt2x00dev, &rt2x00dev->bcn[0], QID_BEACON);
  747. if (req_atim)
  748. rt2x00queue_init(rt2x00dev, &rt2x00dev->bcn[1], QID_ATIM);
  749. return 0;
  750. }
  751. void rt2x00queue_free(struct rt2x00_dev *rt2x00dev)
  752. {
  753. kfree(rt2x00dev->rx);
  754. rt2x00dev->rx = NULL;
  755. rt2x00dev->tx = NULL;
  756. rt2x00dev->bcn = NULL;
  757. }