rt2x00pci.c 9.1 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408
  1. /*
  2. Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
  3. <http://rt2x00.serialmonkey.com>
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the
  14. Free Software Foundation, Inc.,
  15. 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  16. */
  17. /*
  18. Module: rt2x00pci
  19. Abstract: rt2x00 generic pci device routines.
  20. */
  21. #include <linux/dma-mapping.h>
  22. #include <linux/kernel.h>
  23. #include <linux/module.h>
  24. #include <linux/pci.h>
  25. #include <linux/slab.h>
  26. #include "rt2x00.h"
  27. #include "rt2x00pci.h"
  28. /*
  29. * Register access.
  30. */
  31. int rt2x00pci_regbusy_read(struct rt2x00_dev *rt2x00dev,
  32. const unsigned int offset,
  33. const struct rt2x00_field32 field,
  34. u32 *reg)
  35. {
  36. unsigned int i;
  37. if (!test_bit(DEVICE_STATE_PRESENT, &rt2x00dev->flags))
  38. return 0;
  39. for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
  40. rt2x00pci_register_read(rt2x00dev, offset, reg);
  41. if (!rt2x00_get_field32(*reg, field))
  42. return 1;
  43. udelay(REGISTER_BUSY_DELAY);
  44. }
  45. ERROR(rt2x00dev, "Indirect register access failed: "
  46. "offset=0x%.08x, value=0x%.08x\n", offset, *reg);
  47. *reg = ~0;
  48. return 0;
  49. }
  50. EXPORT_SYMBOL_GPL(rt2x00pci_regbusy_read);
  51. /*
  52. * TX data handlers.
  53. */
  54. int rt2x00pci_write_tx_data(struct queue_entry *entry)
  55. {
  56. struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
  57. struct queue_entry_priv_pci *entry_priv = entry->priv_data;
  58. struct skb_frame_desc *skbdesc;
  59. /*
  60. * This should not happen, we already checked the entry
  61. * was ours. When the hardware disagrees there has been
  62. * a queue corruption!
  63. */
  64. if (unlikely(rt2x00dev->ops->lib->get_entry_state(entry))) {
  65. ERROR(rt2x00dev,
  66. "Corrupt queue %d, accessing entry which is not ours.\n"
  67. "Please file bug report to %s.\n",
  68. entry->queue->qid, DRV_PROJECT);
  69. return -EINVAL;
  70. }
  71. /*
  72. * Fill in skb descriptor
  73. */
  74. skbdesc = get_skb_frame_desc(entry->skb);
  75. skbdesc->desc = entry_priv->desc;
  76. skbdesc->desc_len = entry->queue->desc_size;
  77. return 0;
  78. }
  79. EXPORT_SYMBOL_GPL(rt2x00pci_write_tx_data);
  80. /*
  81. * TX/RX data handlers.
  82. */
  83. void rt2x00pci_rxdone(struct rt2x00_dev *rt2x00dev)
  84. {
  85. struct data_queue *queue = rt2x00dev->rx;
  86. struct queue_entry *entry;
  87. struct queue_entry_priv_pci *entry_priv;
  88. struct skb_frame_desc *skbdesc;
  89. while (1) {
  90. entry = rt2x00queue_get_entry(queue, Q_INDEX);
  91. entry_priv = entry->priv_data;
  92. if (rt2x00dev->ops->lib->get_entry_state(entry))
  93. break;
  94. /*
  95. * Fill in desc fields of the skb descriptor
  96. */
  97. skbdesc = get_skb_frame_desc(entry->skb);
  98. skbdesc->desc = entry_priv->desc;
  99. skbdesc->desc_len = entry->queue->desc_size;
  100. /*
  101. * Send the frame to rt2x00lib for further processing.
  102. */
  103. rt2x00lib_rxdone(rt2x00dev, entry);
  104. }
  105. }
  106. EXPORT_SYMBOL_GPL(rt2x00pci_rxdone);
  107. /*
  108. * Device initialization handlers.
  109. */
  110. static int rt2x00pci_alloc_queue_dma(struct rt2x00_dev *rt2x00dev,
  111. struct data_queue *queue)
  112. {
  113. struct queue_entry_priv_pci *entry_priv;
  114. void *addr;
  115. dma_addr_t dma;
  116. unsigned int i;
  117. /*
  118. * Allocate DMA memory for descriptor and buffer.
  119. */
  120. addr = dma_alloc_coherent(rt2x00dev->dev,
  121. queue->limit * queue->desc_size,
  122. &dma, GFP_KERNEL | GFP_DMA);
  123. if (!addr)
  124. return -ENOMEM;
  125. memset(addr, 0, queue->limit * queue->desc_size);
  126. /*
  127. * Initialize all queue entries to contain valid addresses.
  128. */
  129. for (i = 0; i < queue->limit; i++) {
  130. entry_priv = queue->entries[i].priv_data;
  131. entry_priv->desc = addr + i * queue->desc_size;
  132. entry_priv->desc_dma = dma + i * queue->desc_size;
  133. }
  134. return 0;
  135. }
  136. static void rt2x00pci_free_queue_dma(struct rt2x00_dev *rt2x00dev,
  137. struct data_queue *queue)
  138. {
  139. struct queue_entry_priv_pci *entry_priv =
  140. queue->entries[0].priv_data;
  141. if (entry_priv->desc)
  142. dma_free_coherent(rt2x00dev->dev,
  143. queue->limit * queue->desc_size,
  144. entry_priv->desc, entry_priv->desc_dma);
  145. entry_priv->desc = NULL;
  146. }
  147. int rt2x00pci_initialize(struct rt2x00_dev *rt2x00dev)
  148. {
  149. struct data_queue *queue;
  150. int status;
  151. /*
  152. * Allocate DMA
  153. */
  154. queue_for_each(rt2x00dev, queue) {
  155. status = rt2x00pci_alloc_queue_dma(rt2x00dev, queue);
  156. if (status)
  157. goto exit;
  158. }
  159. /*
  160. * Register interrupt handler.
  161. */
  162. status = request_irq(rt2x00dev->irq, rt2x00dev->ops->lib->irq_handler,
  163. IRQF_SHARED, rt2x00dev->name, rt2x00dev);
  164. if (status) {
  165. ERROR(rt2x00dev, "IRQ %d allocation failed (error %d).\n",
  166. rt2x00dev->irq, status);
  167. goto exit;
  168. }
  169. return 0;
  170. exit:
  171. queue_for_each(rt2x00dev, queue)
  172. rt2x00pci_free_queue_dma(rt2x00dev, queue);
  173. return status;
  174. }
  175. EXPORT_SYMBOL_GPL(rt2x00pci_initialize);
  176. void rt2x00pci_uninitialize(struct rt2x00_dev *rt2x00dev)
  177. {
  178. struct data_queue *queue;
  179. /*
  180. * Free irq line.
  181. */
  182. free_irq(to_pci_dev(rt2x00dev->dev)->irq, rt2x00dev);
  183. /*
  184. * Free DMA
  185. */
  186. queue_for_each(rt2x00dev, queue)
  187. rt2x00pci_free_queue_dma(rt2x00dev, queue);
  188. }
  189. EXPORT_SYMBOL_GPL(rt2x00pci_uninitialize);
  190. /*
  191. * PCI driver handlers.
  192. */
  193. static void rt2x00pci_free_reg(struct rt2x00_dev *rt2x00dev)
  194. {
  195. kfree(rt2x00dev->rf);
  196. rt2x00dev->rf = NULL;
  197. kfree(rt2x00dev->eeprom);
  198. rt2x00dev->eeprom = NULL;
  199. if (rt2x00dev->csr.base) {
  200. iounmap(rt2x00dev->csr.base);
  201. rt2x00dev->csr.base = NULL;
  202. }
  203. }
  204. static int rt2x00pci_alloc_reg(struct rt2x00_dev *rt2x00dev)
  205. {
  206. struct pci_dev *pci_dev = to_pci_dev(rt2x00dev->dev);
  207. rt2x00dev->csr.base = pci_ioremap_bar(pci_dev, 0);
  208. if (!rt2x00dev->csr.base)
  209. goto exit;
  210. rt2x00dev->eeprom = kzalloc(rt2x00dev->ops->eeprom_size, GFP_KERNEL);
  211. if (!rt2x00dev->eeprom)
  212. goto exit;
  213. rt2x00dev->rf = kzalloc(rt2x00dev->ops->rf_size, GFP_KERNEL);
  214. if (!rt2x00dev->rf)
  215. goto exit;
  216. return 0;
  217. exit:
  218. ERROR_PROBE("Failed to allocate registers.\n");
  219. rt2x00pci_free_reg(rt2x00dev);
  220. return -ENOMEM;
  221. }
  222. int rt2x00pci_probe(struct pci_dev *pci_dev, const struct pci_device_id *id)
  223. {
  224. struct rt2x00_ops *ops = (struct rt2x00_ops *)id->driver_data;
  225. struct ieee80211_hw *hw;
  226. struct rt2x00_dev *rt2x00dev;
  227. int retval;
  228. retval = pci_request_regions(pci_dev, pci_name(pci_dev));
  229. if (retval) {
  230. ERROR_PROBE("PCI request regions failed.\n");
  231. return retval;
  232. }
  233. retval = pci_enable_device(pci_dev);
  234. if (retval) {
  235. ERROR_PROBE("Enable device failed.\n");
  236. goto exit_release_regions;
  237. }
  238. pci_set_master(pci_dev);
  239. if (pci_set_mwi(pci_dev))
  240. ERROR_PROBE("MWI not available.\n");
  241. if (dma_set_mask(&pci_dev->dev, DMA_BIT_MASK(32))) {
  242. ERROR_PROBE("PCI DMA not supported.\n");
  243. retval = -EIO;
  244. goto exit_disable_device;
  245. }
  246. hw = ieee80211_alloc_hw(sizeof(struct rt2x00_dev), ops->hw);
  247. if (!hw) {
  248. ERROR_PROBE("Failed to allocate hardware.\n");
  249. retval = -ENOMEM;
  250. goto exit_disable_device;
  251. }
  252. pci_set_drvdata(pci_dev, hw);
  253. rt2x00dev = hw->priv;
  254. rt2x00dev->dev = &pci_dev->dev;
  255. rt2x00dev->ops = ops;
  256. rt2x00dev->hw = hw;
  257. rt2x00dev->irq = pci_dev->irq;
  258. rt2x00dev->name = pci_name(pci_dev);
  259. rt2x00_set_chip_intf(rt2x00dev, RT2X00_CHIP_INTF_PCI);
  260. retval = rt2x00pci_alloc_reg(rt2x00dev);
  261. if (retval)
  262. goto exit_free_device;
  263. retval = rt2x00lib_probe_dev(rt2x00dev);
  264. if (retval)
  265. goto exit_free_reg;
  266. return 0;
  267. exit_free_reg:
  268. rt2x00pci_free_reg(rt2x00dev);
  269. exit_free_device:
  270. ieee80211_free_hw(hw);
  271. exit_disable_device:
  272. if (retval != -EBUSY)
  273. pci_disable_device(pci_dev);
  274. exit_release_regions:
  275. pci_release_regions(pci_dev);
  276. pci_set_drvdata(pci_dev, NULL);
  277. return retval;
  278. }
  279. EXPORT_SYMBOL_GPL(rt2x00pci_probe);
  280. void rt2x00pci_remove(struct pci_dev *pci_dev)
  281. {
  282. struct ieee80211_hw *hw = pci_get_drvdata(pci_dev);
  283. struct rt2x00_dev *rt2x00dev = hw->priv;
  284. /*
  285. * Free all allocated data.
  286. */
  287. rt2x00lib_remove_dev(rt2x00dev);
  288. rt2x00pci_free_reg(rt2x00dev);
  289. ieee80211_free_hw(hw);
  290. /*
  291. * Free the PCI device data.
  292. */
  293. pci_set_drvdata(pci_dev, NULL);
  294. pci_disable_device(pci_dev);
  295. pci_release_regions(pci_dev);
  296. }
  297. EXPORT_SYMBOL_GPL(rt2x00pci_remove);
  298. #ifdef CONFIG_PM
  299. int rt2x00pci_suspend(struct pci_dev *pci_dev, pm_message_t state)
  300. {
  301. struct ieee80211_hw *hw = pci_get_drvdata(pci_dev);
  302. struct rt2x00_dev *rt2x00dev = hw->priv;
  303. int retval;
  304. retval = rt2x00lib_suspend(rt2x00dev, state);
  305. if (retval)
  306. return retval;
  307. pci_save_state(pci_dev);
  308. pci_disable_device(pci_dev);
  309. return pci_set_power_state(pci_dev, pci_choose_state(pci_dev, state));
  310. }
  311. EXPORT_SYMBOL_GPL(rt2x00pci_suspend);
  312. int rt2x00pci_resume(struct pci_dev *pci_dev)
  313. {
  314. struct ieee80211_hw *hw = pci_get_drvdata(pci_dev);
  315. struct rt2x00_dev *rt2x00dev = hw->priv;
  316. if (pci_set_power_state(pci_dev, PCI_D0) ||
  317. pci_enable_device(pci_dev) ||
  318. pci_restore_state(pci_dev)) {
  319. ERROR(rt2x00dev, "Failed to resume device.\n");
  320. return -EIO;
  321. }
  322. return rt2x00lib_resume(rt2x00dev);
  323. }
  324. EXPORT_SYMBOL_GPL(rt2x00pci_resume);
  325. #endif /* CONFIG_PM */
  326. /*
  327. * rt2x00pci module information.
  328. */
  329. MODULE_AUTHOR(DRV_PROJECT);
  330. MODULE_VERSION(DRV_VERSION);
  331. MODULE_DESCRIPTION("rt2x00 pci library");
  332. MODULE_LICENSE("GPL");