iwl3945-base.c 121 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved.
  4. *
  5. * Portions of this file are derived from the ipw3945 project, as well
  6. * as portions of the ieee80211 subsystem header files.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of version 2 of the GNU General Public License as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20. *
  21. * The full GNU General Public License is included in this distribution in the
  22. * file called LICENSE.
  23. *
  24. * Contact Information:
  25. * Intel Linux Wireless <ilw@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *
  28. *****************************************************************************/
  29. #include <linux/kernel.h>
  30. #include <linux/module.h>
  31. #include <linux/init.h>
  32. #include <linux/pci.h>
  33. #include <linux/slab.h>
  34. #include <linux/dma-mapping.h>
  35. #include <linux/delay.h>
  36. #include <linux/sched.h>
  37. #include <linux/skbuff.h>
  38. #include <linux/netdevice.h>
  39. #include <linux/wireless.h>
  40. #include <linux/firmware.h>
  41. #include <linux/etherdevice.h>
  42. #include <linux/if_arp.h>
  43. #include <net/ieee80211_radiotap.h>
  44. #include <net/mac80211.h>
  45. #include <asm/div64.h>
  46. #define DRV_NAME "iwl3945"
  47. #include "iwl-fh.h"
  48. #include "iwl-3945-fh.h"
  49. #include "iwl-commands.h"
  50. #include "iwl-sta.h"
  51. #include "iwl-3945.h"
  52. #include "iwl-core.h"
  53. #include "iwl-helpers.h"
  54. #include "iwl-dev.h"
  55. #include "iwl-spectrum.h"
  56. /*
  57. * module name, copyright, version, etc.
  58. */
  59. #define DRV_DESCRIPTION \
  60. "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
  61. #ifdef CONFIG_IWLWIFI_DEBUG
  62. #define VD "d"
  63. #else
  64. #define VD
  65. #endif
  66. /*
  67. * add "s" to indicate spectrum measurement included.
  68. * we add it here to be consistent with previous releases in which
  69. * this was configurable.
  70. */
  71. #define DRV_VERSION IWLWIFI_VERSION VD "s"
  72. #define DRV_COPYRIGHT "Copyright(c) 2003-2010 Intel Corporation"
  73. #define DRV_AUTHOR "<ilw@linux.intel.com>"
  74. MODULE_DESCRIPTION(DRV_DESCRIPTION);
  75. MODULE_VERSION(DRV_VERSION);
  76. MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  77. MODULE_LICENSE("GPL");
  78. /* module parameters */
  79. struct iwl_mod_params iwl3945_mod_params = {
  80. .sw_crypto = 1,
  81. .restart_fw = 1,
  82. /* the rest are 0 by default */
  83. };
  84. /**
  85. * iwl3945_get_antenna_flags - Get antenna flags for RXON command
  86. * @priv: eeprom and antenna fields are used to determine antenna flags
  87. *
  88. * priv->eeprom39 is used to determine if antenna AUX/MAIN are reversed
  89. * iwl3945_mod_params.antenna specifies the antenna diversity mode:
  90. *
  91. * IWL_ANTENNA_DIVERSITY - NIC selects best antenna by itself
  92. * IWL_ANTENNA_MAIN - Force MAIN antenna
  93. * IWL_ANTENNA_AUX - Force AUX antenna
  94. */
  95. __le32 iwl3945_get_antenna_flags(const struct iwl_priv *priv)
  96. {
  97. struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
  98. switch (iwl3945_mod_params.antenna) {
  99. case IWL_ANTENNA_DIVERSITY:
  100. return 0;
  101. case IWL_ANTENNA_MAIN:
  102. if (eeprom->antenna_switch_type)
  103. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
  104. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
  105. case IWL_ANTENNA_AUX:
  106. if (eeprom->antenna_switch_type)
  107. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
  108. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
  109. }
  110. /* bad antenna selector value */
  111. IWL_ERR(priv, "Bad antenna selector value (0x%x)\n",
  112. iwl3945_mod_params.antenna);
  113. return 0; /* "diversity" is default if error */
  114. }
  115. static int iwl3945_set_ccmp_dynamic_key_info(struct iwl_priv *priv,
  116. struct ieee80211_key_conf *keyconf,
  117. u8 sta_id)
  118. {
  119. unsigned long flags;
  120. __le16 key_flags = 0;
  121. int ret;
  122. key_flags |= (STA_KEY_FLG_CCMP | STA_KEY_FLG_MAP_KEY_MSK);
  123. key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
  124. if (sta_id == priv->hw_params.bcast_sta_id)
  125. key_flags |= STA_KEY_MULTICAST_MSK;
  126. keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  127. keyconf->hw_key_idx = keyconf->keyidx;
  128. key_flags &= ~STA_KEY_FLG_INVALID;
  129. spin_lock_irqsave(&priv->sta_lock, flags);
  130. priv->stations[sta_id].keyinfo.alg = keyconf->alg;
  131. priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
  132. memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
  133. keyconf->keylen);
  134. memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
  135. keyconf->keylen);
  136. if ((priv->stations[sta_id].sta.key.key_flags & STA_KEY_FLG_ENCRYPT_MSK)
  137. == STA_KEY_FLG_NO_ENC)
  138. priv->stations[sta_id].sta.key.key_offset =
  139. iwl_get_free_ucode_key_index(priv);
  140. /* else, we are overriding an existing key => no need to allocated room
  141. * in uCode. */
  142. WARN(priv->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET,
  143. "no space for a new key");
  144. priv->stations[sta_id].sta.key.key_flags = key_flags;
  145. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  146. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  147. IWL_DEBUG_INFO(priv, "hwcrypto: modify ucode station key info\n");
  148. ret = iwl_send_add_sta(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
  149. spin_unlock_irqrestore(&priv->sta_lock, flags);
  150. return ret;
  151. }
  152. static int iwl3945_set_tkip_dynamic_key_info(struct iwl_priv *priv,
  153. struct ieee80211_key_conf *keyconf,
  154. u8 sta_id)
  155. {
  156. return -EOPNOTSUPP;
  157. }
  158. static int iwl3945_set_wep_dynamic_key_info(struct iwl_priv *priv,
  159. struct ieee80211_key_conf *keyconf,
  160. u8 sta_id)
  161. {
  162. return -EOPNOTSUPP;
  163. }
  164. static int iwl3945_clear_sta_key_info(struct iwl_priv *priv, u8 sta_id)
  165. {
  166. unsigned long flags;
  167. spin_lock_irqsave(&priv->sta_lock, flags);
  168. memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl_hw_key));
  169. memset(&priv->stations[sta_id].sta.key, 0,
  170. sizeof(struct iwl4965_keyinfo));
  171. priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
  172. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  173. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  174. spin_unlock_irqrestore(&priv->sta_lock, flags);
  175. IWL_DEBUG_INFO(priv, "hwcrypto: clear ucode station key info\n");
  176. iwl_send_add_sta(priv, &priv->stations[sta_id].sta, 0);
  177. return 0;
  178. }
  179. static int iwl3945_set_dynamic_key(struct iwl_priv *priv,
  180. struct ieee80211_key_conf *keyconf, u8 sta_id)
  181. {
  182. int ret = 0;
  183. keyconf->hw_key_idx = HW_KEY_DYNAMIC;
  184. switch (keyconf->alg) {
  185. case ALG_CCMP:
  186. ret = iwl3945_set_ccmp_dynamic_key_info(priv, keyconf, sta_id);
  187. break;
  188. case ALG_TKIP:
  189. ret = iwl3945_set_tkip_dynamic_key_info(priv, keyconf, sta_id);
  190. break;
  191. case ALG_WEP:
  192. ret = iwl3945_set_wep_dynamic_key_info(priv, keyconf, sta_id);
  193. break;
  194. default:
  195. IWL_ERR(priv, "Unknown alg: %s alg = %d\n", __func__, keyconf->alg);
  196. ret = -EINVAL;
  197. }
  198. IWL_DEBUG_WEP(priv, "Set dynamic key: alg= %d len=%d idx=%d sta=%d ret=%d\n",
  199. keyconf->alg, keyconf->keylen, keyconf->keyidx,
  200. sta_id, ret);
  201. return ret;
  202. }
  203. static int iwl3945_remove_static_key(struct iwl_priv *priv)
  204. {
  205. int ret = -EOPNOTSUPP;
  206. return ret;
  207. }
  208. static int iwl3945_set_static_key(struct iwl_priv *priv,
  209. struct ieee80211_key_conf *key)
  210. {
  211. if (key->alg == ALG_WEP)
  212. return -EOPNOTSUPP;
  213. IWL_ERR(priv, "Static key invalid: alg %d\n", key->alg);
  214. return -EINVAL;
  215. }
  216. static void iwl3945_clear_free_frames(struct iwl_priv *priv)
  217. {
  218. struct list_head *element;
  219. IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
  220. priv->frames_count);
  221. while (!list_empty(&priv->free_frames)) {
  222. element = priv->free_frames.next;
  223. list_del(element);
  224. kfree(list_entry(element, struct iwl3945_frame, list));
  225. priv->frames_count--;
  226. }
  227. if (priv->frames_count) {
  228. IWL_WARN(priv, "%d frames still in use. Did we lose one?\n",
  229. priv->frames_count);
  230. priv->frames_count = 0;
  231. }
  232. }
  233. static struct iwl3945_frame *iwl3945_get_free_frame(struct iwl_priv *priv)
  234. {
  235. struct iwl3945_frame *frame;
  236. struct list_head *element;
  237. if (list_empty(&priv->free_frames)) {
  238. frame = kzalloc(sizeof(*frame), GFP_KERNEL);
  239. if (!frame) {
  240. IWL_ERR(priv, "Could not allocate frame!\n");
  241. return NULL;
  242. }
  243. priv->frames_count++;
  244. return frame;
  245. }
  246. element = priv->free_frames.next;
  247. list_del(element);
  248. return list_entry(element, struct iwl3945_frame, list);
  249. }
  250. static void iwl3945_free_frame(struct iwl_priv *priv, struct iwl3945_frame *frame)
  251. {
  252. memset(frame, 0, sizeof(*frame));
  253. list_add(&frame->list, &priv->free_frames);
  254. }
  255. unsigned int iwl3945_fill_beacon_frame(struct iwl_priv *priv,
  256. struct ieee80211_hdr *hdr,
  257. int left)
  258. {
  259. if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
  260. ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
  261. (priv->iw_mode != NL80211_IFTYPE_AP)))
  262. return 0;
  263. if (priv->ibss_beacon->len > left)
  264. return 0;
  265. memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
  266. return priv->ibss_beacon->len;
  267. }
  268. static int iwl3945_send_beacon_cmd(struct iwl_priv *priv)
  269. {
  270. struct iwl3945_frame *frame;
  271. unsigned int frame_size;
  272. int rc;
  273. u8 rate;
  274. frame = iwl3945_get_free_frame(priv);
  275. if (!frame) {
  276. IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
  277. "command.\n");
  278. return -ENOMEM;
  279. }
  280. rate = iwl_rate_get_lowest_plcp(priv);
  281. frame_size = iwl3945_hw_get_beacon_cmd(priv, frame, rate);
  282. rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
  283. &frame->u.cmd[0]);
  284. iwl3945_free_frame(priv, frame);
  285. return rc;
  286. }
  287. static void iwl3945_unset_hw_params(struct iwl_priv *priv)
  288. {
  289. if (priv->shared_virt)
  290. dma_free_coherent(&priv->pci_dev->dev,
  291. sizeof(struct iwl3945_shared),
  292. priv->shared_virt,
  293. priv->shared_phys);
  294. }
  295. static void iwl3945_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
  296. struct ieee80211_tx_info *info,
  297. struct iwl_device_cmd *cmd,
  298. struct sk_buff *skb_frag,
  299. int sta_id)
  300. {
  301. struct iwl3945_tx_cmd *tx_cmd = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
  302. struct iwl_hw_key *keyinfo = &priv->stations[sta_id].keyinfo;
  303. switch (keyinfo->alg) {
  304. case ALG_CCMP:
  305. tx_cmd->sec_ctl = TX_CMD_SEC_CCM;
  306. memcpy(tx_cmd->key, keyinfo->key, keyinfo->keylen);
  307. IWL_DEBUG_TX(priv, "tx_cmd with AES hwcrypto\n");
  308. break;
  309. case ALG_TKIP:
  310. break;
  311. case ALG_WEP:
  312. tx_cmd->sec_ctl = TX_CMD_SEC_WEP |
  313. (info->control.hw_key->hw_key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
  314. if (keyinfo->keylen == 13)
  315. tx_cmd->sec_ctl |= TX_CMD_SEC_KEY128;
  316. memcpy(&tx_cmd->key[3], keyinfo->key, keyinfo->keylen);
  317. IWL_DEBUG_TX(priv, "Configuring packet for WEP encryption "
  318. "with key %d\n", info->control.hw_key->hw_key_idx);
  319. break;
  320. default:
  321. IWL_ERR(priv, "Unknown encode alg %d\n", keyinfo->alg);
  322. break;
  323. }
  324. }
  325. /*
  326. * handle build REPLY_TX command notification.
  327. */
  328. static void iwl3945_build_tx_cmd_basic(struct iwl_priv *priv,
  329. struct iwl_device_cmd *cmd,
  330. struct ieee80211_tx_info *info,
  331. struct ieee80211_hdr *hdr, u8 std_id)
  332. {
  333. struct iwl3945_tx_cmd *tx_cmd = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
  334. __le32 tx_flags = tx_cmd->tx_flags;
  335. __le16 fc = hdr->frame_control;
  336. tx_cmd->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  337. if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
  338. tx_flags |= TX_CMD_FLG_ACK_MSK;
  339. if (ieee80211_is_mgmt(fc))
  340. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  341. if (ieee80211_is_probe_resp(fc) &&
  342. !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
  343. tx_flags |= TX_CMD_FLG_TSF_MSK;
  344. } else {
  345. tx_flags &= (~TX_CMD_FLG_ACK_MSK);
  346. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  347. }
  348. tx_cmd->sta_id = std_id;
  349. if (ieee80211_has_morefrags(fc))
  350. tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
  351. if (ieee80211_is_data_qos(fc)) {
  352. u8 *qc = ieee80211_get_qos_ctl(hdr);
  353. tx_cmd->tid_tspec = qc[0] & 0xf;
  354. tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
  355. } else {
  356. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  357. }
  358. priv->cfg->ops->utils->rts_tx_cmd_flag(info, &tx_flags);
  359. if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
  360. tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
  361. tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
  362. if (ieee80211_is_mgmt(fc)) {
  363. if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
  364. tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(3);
  365. else
  366. tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(2);
  367. } else {
  368. tx_cmd->timeout.pm_frame_timeout = 0;
  369. }
  370. tx_cmd->driver_txop = 0;
  371. tx_cmd->tx_flags = tx_flags;
  372. tx_cmd->next_frame_len = 0;
  373. }
  374. /*
  375. * start REPLY_TX command process
  376. */
  377. static int iwl3945_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
  378. {
  379. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  380. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  381. struct iwl3945_tx_cmd *tx_cmd;
  382. struct iwl_tx_queue *txq = NULL;
  383. struct iwl_queue *q = NULL;
  384. struct iwl_device_cmd *out_cmd;
  385. struct iwl_cmd_meta *out_meta;
  386. dma_addr_t phys_addr;
  387. dma_addr_t txcmd_phys;
  388. int txq_id = skb_get_queue_mapping(skb);
  389. u16 len, idx, len_org, hdr_len; /* TODO: len_org is not used */
  390. u8 id;
  391. u8 unicast;
  392. u8 sta_id;
  393. u8 tid = 0;
  394. u16 seq_number = 0;
  395. __le16 fc;
  396. u8 wait_write_ptr = 0;
  397. u8 *qc = NULL;
  398. unsigned long flags;
  399. spin_lock_irqsave(&priv->lock, flags);
  400. if (iwl_is_rfkill(priv)) {
  401. IWL_DEBUG_DROP(priv, "Dropping - RF KILL\n");
  402. goto drop_unlock;
  403. }
  404. if ((ieee80211_get_tx_rate(priv->hw, info)->hw_value & 0xFF) == IWL_INVALID_RATE) {
  405. IWL_ERR(priv, "ERROR: No TX rate available.\n");
  406. goto drop_unlock;
  407. }
  408. unicast = !is_multicast_ether_addr(hdr->addr1);
  409. id = 0;
  410. fc = hdr->frame_control;
  411. #ifdef CONFIG_IWLWIFI_DEBUG
  412. if (ieee80211_is_auth(fc))
  413. IWL_DEBUG_TX(priv, "Sending AUTH frame\n");
  414. else if (ieee80211_is_assoc_req(fc))
  415. IWL_DEBUG_TX(priv, "Sending ASSOC frame\n");
  416. else if (ieee80211_is_reassoc_req(fc))
  417. IWL_DEBUG_TX(priv, "Sending REASSOC frame\n");
  418. #endif
  419. /* drop all non-injected data frame if we are not associated */
  420. if (ieee80211_is_data(fc) &&
  421. !(info->flags & IEEE80211_TX_CTL_INJECTED) &&
  422. (!iwl_is_associated(priv) ||
  423. ((priv->iw_mode == NL80211_IFTYPE_STATION) && !priv->assoc_id))) {
  424. IWL_DEBUG_DROP(priv, "Dropping - !iwl_is_associated\n");
  425. goto drop_unlock;
  426. }
  427. spin_unlock_irqrestore(&priv->lock, flags);
  428. hdr_len = ieee80211_hdrlen(fc);
  429. /* Find (or create) index into station table for destination station */
  430. if (info->flags & IEEE80211_TX_CTL_INJECTED)
  431. sta_id = priv->hw_params.bcast_sta_id;
  432. else
  433. sta_id = iwl_get_sta_id(priv, hdr);
  434. if (sta_id == IWL_INVALID_STATION) {
  435. IWL_DEBUG_DROP(priv, "Dropping - INVALID STATION: %pM\n",
  436. hdr->addr1);
  437. goto drop;
  438. }
  439. IWL_DEBUG_RATE(priv, "station Id %d\n", sta_id);
  440. if (ieee80211_is_data_qos(fc)) {
  441. qc = ieee80211_get_qos_ctl(hdr);
  442. tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
  443. if (unlikely(tid >= MAX_TID_COUNT))
  444. goto drop;
  445. seq_number = priv->stations[sta_id].tid[tid].seq_number &
  446. IEEE80211_SCTL_SEQ;
  447. hdr->seq_ctrl = cpu_to_le16(seq_number) |
  448. (hdr->seq_ctrl &
  449. cpu_to_le16(IEEE80211_SCTL_FRAG));
  450. seq_number += 0x10;
  451. }
  452. /* Descriptor for chosen Tx queue */
  453. txq = &priv->txq[txq_id];
  454. q = &txq->q;
  455. if ((iwl_queue_space(q) < q->high_mark))
  456. goto drop;
  457. spin_lock_irqsave(&priv->lock, flags);
  458. idx = get_cmd_index(q, q->write_ptr, 0);
  459. /* Set up driver data for this TFD */
  460. memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl_tx_info));
  461. txq->txb[q->write_ptr].skb[0] = skb;
  462. /* Init first empty entry in queue's array of Tx/cmd buffers */
  463. out_cmd = txq->cmd[idx];
  464. out_meta = &txq->meta[idx];
  465. tx_cmd = (struct iwl3945_tx_cmd *)out_cmd->cmd.payload;
  466. memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
  467. memset(tx_cmd, 0, sizeof(*tx_cmd));
  468. /*
  469. * Set up the Tx-command (not MAC!) header.
  470. * Store the chosen Tx queue and TFD index within the sequence field;
  471. * after Tx, uCode's Tx response will return this value so driver can
  472. * locate the frame within the tx queue and do post-tx processing.
  473. */
  474. out_cmd->hdr.cmd = REPLY_TX;
  475. out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
  476. INDEX_TO_SEQ(q->write_ptr)));
  477. /* Copy MAC header from skb into command buffer */
  478. memcpy(tx_cmd->hdr, hdr, hdr_len);
  479. if (info->control.hw_key)
  480. iwl3945_build_tx_cmd_hwcrypto(priv, info, out_cmd, skb, sta_id);
  481. /* TODO need this for burst mode later on */
  482. iwl3945_build_tx_cmd_basic(priv, out_cmd, info, hdr, sta_id);
  483. /* set is_hcca to 0; it probably will never be implemented */
  484. iwl3945_hw_build_tx_cmd_rate(priv, out_cmd, info, hdr, sta_id, 0);
  485. /* Total # bytes to be transmitted */
  486. len = (u16)skb->len;
  487. tx_cmd->len = cpu_to_le16(len);
  488. iwl_dbg_log_tx_data_frame(priv, len, hdr);
  489. iwl_update_stats(priv, true, fc, len);
  490. tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
  491. tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
  492. if (!ieee80211_has_morefrags(hdr->frame_control)) {
  493. txq->need_update = 1;
  494. if (qc)
  495. priv->stations[sta_id].tid[tid].seq_number = seq_number;
  496. } else {
  497. wait_write_ptr = 1;
  498. txq->need_update = 0;
  499. }
  500. IWL_DEBUG_TX(priv, "sequence nr = 0X%x \n",
  501. le16_to_cpu(out_cmd->hdr.sequence));
  502. IWL_DEBUG_TX(priv, "tx_flags = 0X%x \n", le32_to_cpu(tx_cmd->tx_flags));
  503. iwl_print_hex_dump(priv, IWL_DL_TX, tx_cmd, sizeof(*tx_cmd));
  504. iwl_print_hex_dump(priv, IWL_DL_TX, (u8 *)tx_cmd->hdr,
  505. ieee80211_hdrlen(fc));
  506. /*
  507. * Use the first empty entry in this queue's command buffer array
  508. * to contain the Tx command and MAC header concatenated together
  509. * (payload data will be in another buffer).
  510. * Size of this varies, due to varying MAC header length.
  511. * If end is not dword aligned, we'll have 2 extra bytes at the end
  512. * of the MAC header (device reads on dword boundaries).
  513. * We'll tell device about this padding later.
  514. */
  515. len = sizeof(struct iwl3945_tx_cmd) +
  516. sizeof(struct iwl_cmd_header) + hdr_len;
  517. len_org = len;
  518. len = (len + 3) & ~3;
  519. if (len_org != len)
  520. len_org = 1;
  521. else
  522. len_org = 0;
  523. /* Physical address of this Tx command's header (not MAC header!),
  524. * within command buffer array. */
  525. txcmd_phys = pci_map_single(priv->pci_dev, &out_cmd->hdr,
  526. len, PCI_DMA_TODEVICE);
  527. /* we do not map meta data ... so we can safely access address to
  528. * provide to unmap command*/
  529. pci_unmap_addr_set(out_meta, mapping, txcmd_phys);
  530. pci_unmap_len_set(out_meta, len, len);
  531. /* Add buffer containing Tx command and MAC(!) header to TFD's
  532. * first entry */
  533. priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
  534. txcmd_phys, len, 1, 0);
  535. /* Set up TFD's 2nd entry to point directly to remainder of skb,
  536. * if any (802.11 null frames have no payload). */
  537. len = skb->len - hdr_len;
  538. if (len) {
  539. phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
  540. len, PCI_DMA_TODEVICE);
  541. priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
  542. phys_addr, len,
  543. 0, U32_PAD(len));
  544. }
  545. /* Tell device the write index *just past* this latest filled TFD */
  546. q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
  547. iwl_txq_update_write_ptr(priv, txq);
  548. spin_unlock_irqrestore(&priv->lock, flags);
  549. if ((iwl_queue_space(q) < q->high_mark)
  550. && priv->mac80211_registered) {
  551. if (wait_write_ptr) {
  552. spin_lock_irqsave(&priv->lock, flags);
  553. txq->need_update = 1;
  554. iwl_txq_update_write_ptr(priv, txq);
  555. spin_unlock_irqrestore(&priv->lock, flags);
  556. }
  557. iwl_stop_queue(priv, skb_get_queue_mapping(skb));
  558. }
  559. return 0;
  560. drop_unlock:
  561. spin_unlock_irqrestore(&priv->lock, flags);
  562. drop:
  563. return -1;
  564. }
  565. #define BEACON_TIME_MASK_LOW 0x00FFFFFF
  566. #define BEACON_TIME_MASK_HIGH 0xFF000000
  567. #define TIME_UNIT 1024
  568. /*
  569. * extended beacon time format
  570. * time in usec will be changed into a 32-bit value in 8:24 format
  571. * the high 1 byte is the beacon counts
  572. * the lower 3 bytes is the time in usec within one beacon interval
  573. */
  574. static u32 iwl3945_usecs_to_beacons(u32 usec, u32 beacon_interval)
  575. {
  576. u32 quot;
  577. u32 rem;
  578. u32 interval = beacon_interval * 1024;
  579. if (!interval || !usec)
  580. return 0;
  581. quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
  582. rem = (usec % interval) & BEACON_TIME_MASK_LOW;
  583. return (quot << 24) + rem;
  584. }
  585. /* base is usually what we get from ucode with each received frame,
  586. * the same as HW timer counter counting down
  587. */
  588. static __le32 iwl3945_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
  589. {
  590. u32 base_low = base & BEACON_TIME_MASK_LOW;
  591. u32 addon_low = addon & BEACON_TIME_MASK_LOW;
  592. u32 interval = beacon_interval * TIME_UNIT;
  593. u32 res = (base & BEACON_TIME_MASK_HIGH) +
  594. (addon & BEACON_TIME_MASK_HIGH);
  595. if (base_low > addon_low)
  596. res += base_low - addon_low;
  597. else if (base_low < addon_low) {
  598. res += interval + base_low - addon_low;
  599. res += (1 << 24);
  600. } else
  601. res += (1 << 24);
  602. return cpu_to_le32(res);
  603. }
  604. static int iwl3945_get_measurement(struct iwl_priv *priv,
  605. struct ieee80211_measurement_params *params,
  606. u8 type)
  607. {
  608. struct iwl_spectrum_cmd spectrum;
  609. struct iwl_rx_packet *pkt;
  610. struct iwl_host_cmd cmd = {
  611. .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
  612. .data = (void *)&spectrum,
  613. .flags = CMD_WANT_SKB,
  614. };
  615. u32 add_time = le64_to_cpu(params->start_time);
  616. int rc;
  617. int spectrum_resp_status;
  618. int duration = le16_to_cpu(params->duration);
  619. if (iwl_is_associated(priv))
  620. add_time =
  621. iwl3945_usecs_to_beacons(
  622. le64_to_cpu(params->start_time) - priv->last_tsf,
  623. le16_to_cpu(priv->rxon_timing.beacon_interval));
  624. memset(&spectrum, 0, sizeof(spectrum));
  625. spectrum.channel_count = cpu_to_le16(1);
  626. spectrum.flags =
  627. RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
  628. spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
  629. cmd.len = sizeof(spectrum);
  630. spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
  631. if (iwl_is_associated(priv))
  632. spectrum.start_time =
  633. iwl3945_add_beacon_time(priv->last_beacon_time,
  634. add_time,
  635. le16_to_cpu(priv->rxon_timing.beacon_interval));
  636. else
  637. spectrum.start_time = 0;
  638. spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
  639. spectrum.channels[0].channel = params->channel;
  640. spectrum.channels[0].type = type;
  641. if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
  642. spectrum.flags |= RXON_FLG_BAND_24G_MSK |
  643. RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
  644. rc = iwl_send_cmd_sync(priv, &cmd);
  645. if (rc)
  646. return rc;
  647. pkt = (struct iwl_rx_packet *)cmd.reply_page;
  648. if (pkt->hdr.flags & IWL_CMD_FAILED_MSK) {
  649. IWL_ERR(priv, "Bad return from REPLY_RX_ON_ASSOC command\n");
  650. rc = -EIO;
  651. }
  652. spectrum_resp_status = le16_to_cpu(pkt->u.spectrum.status);
  653. switch (spectrum_resp_status) {
  654. case 0: /* Command will be handled */
  655. if (pkt->u.spectrum.id != 0xff) {
  656. IWL_DEBUG_INFO(priv, "Replaced existing measurement: %d\n",
  657. pkt->u.spectrum.id);
  658. priv->measurement_status &= ~MEASUREMENT_READY;
  659. }
  660. priv->measurement_status |= MEASUREMENT_ACTIVE;
  661. rc = 0;
  662. break;
  663. case 1: /* Command will not be handled */
  664. rc = -EAGAIN;
  665. break;
  666. }
  667. iwl_free_pages(priv, cmd.reply_page);
  668. return rc;
  669. }
  670. static void iwl3945_rx_reply_alive(struct iwl_priv *priv,
  671. struct iwl_rx_mem_buffer *rxb)
  672. {
  673. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  674. struct iwl_alive_resp *palive;
  675. struct delayed_work *pwork;
  676. palive = &pkt->u.alive_frame;
  677. IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
  678. "0x%01X 0x%01X\n",
  679. palive->is_valid, palive->ver_type,
  680. palive->ver_subtype);
  681. if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
  682. IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
  683. memcpy(&priv->card_alive_init, &pkt->u.alive_frame,
  684. sizeof(struct iwl_alive_resp));
  685. pwork = &priv->init_alive_start;
  686. } else {
  687. IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
  688. memcpy(&priv->card_alive, &pkt->u.alive_frame,
  689. sizeof(struct iwl_alive_resp));
  690. pwork = &priv->alive_start;
  691. iwl3945_disable_events(priv);
  692. }
  693. /* We delay the ALIVE response by 5ms to
  694. * give the HW RF Kill time to activate... */
  695. if (palive->is_valid == UCODE_VALID_OK)
  696. queue_delayed_work(priv->workqueue, pwork,
  697. msecs_to_jiffies(5));
  698. else
  699. IWL_WARN(priv, "uCode did not respond OK.\n");
  700. }
  701. static void iwl3945_rx_reply_add_sta(struct iwl_priv *priv,
  702. struct iwl_rx_mem_buffer *rxb)
  703. {
  704. #ifdef CONFIG_IWLWIFI_DEBUG
  705. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  706. #endif
  707. IWL_DEBUG_RX(priv, "Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
  708. return;
  709. }
  710. static void iwl3945_bg_beacon_update(struct work_struct *work)
  711. {
  712. struct iwl_priv *priv =
  713. container_of(work, struct iwl_priv, beacon_update);
  714. struct sk_buff *beacon;
  715. /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
  716. beacon = ieee80211_beacon_get(priv->hw, priv->vif);
  717. if (!beacon) {
  718. IWL_ERR(priv, "update beacon failed\n");
  719. return;
  720. }
  721. mutex_lock(&priv->mutex);
  722. /* new beacon skb is allocated every time; dispose previous.*/
  723. if (priv->ibss_beacon)
  724. dev_kfree_skb(priv->ibss_beacon);
  725. priv->ibss_beacon = beacon;
  726. mutex_unlock(&priv->mutex);
  727. iwl3945_send_beacon_cmd(priv);
  728. }
  729. static void iwl3945_rx_beacon_notif(struct iwl_priv *priv,
  730. struct iwl_rx_mem_buffer *rxb)
  731. {
  732. #ifdef CONFIG_IWLWIFI_DEBUG
  733. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  734. struct iwl3945_beacon_notif *beacon = &(pkt->u.beacon_status);
  735. u8 rate = beacon->beacon_notify_hdr.rate;
  736. IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
  737. "tsf %d %d rate %d\n",
  738. le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
  739. beacon->beacon_notify_hdr.failure_frame,
  740. le32_to_cpu(beacon->ibss_mgr_status),
  741. le32_to_cpu(beacon->high_tsf),
  742. le32_to_cpu(beacon->low_tsf), rate);
  743. #endif
  744. if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
  745. (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
  746. queue_work(priv->workqueue, &priv->beacon_update);
  747. }
  748. /* Handle notification from uCode that card's power state is changing
  749. * due to software, hardware, or critical temperature RFKILL */
  750. static void iwl3945_rx_card_state_notif(struct iwl_priv *priv,
  751. struct iwl_rx_mem_buffer *rxb)
  752. {
  753. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  754. u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
  755. unsigned long status = priv->status;
  756. IWL_WARN(priv, "Card state received: HW:%s SW:%s\n",
  757. (flags & HW_CARD_DISABLED) ? "Kill" : "On",
  758. (flags & SW_CARD_DISABLED) ? "Kill" : "On");
  759. iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
  760. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  761. if (flags & HW_CARD_DISABLED)
  762. set_bit(STATUS_RF_KILL_HW, &priv->status);
  763. else
  764. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  765. iwl_scan_cancel(priv);
  766. if ((test_bit(STATUS_RF_KILL_HW, &status) !=
  767. test_bit(STATUS_RF_KILL_HW, &priv->status)))
  768. wiphy_rfkill_set_hw_state(priv->hw->wiphy,
  769. test_bit(STATUS_RF_KILL_HW, &priv->status));
  770. else
  771. wake_up_interruptible(&priv->wait_command_queue);
  772. }
  773. /**
  774. * iwl3945_setup_rx_handlers - Initialize Rx handler callbacks
  775. *
  776. * Setup the RX handlers for each of the reply types sent from the uCode
  777. * to the host.
  778. *
  779. * This function chains into the hardware specific files for them to setup
  780. * any hardware specific handlers as well.
  781. */
  782. static void iwl3945_setup_rx_handlers(struct iwl_priv *priv)
  783. {
  784. priv->rx_handlers[REPLY_ALIVE] = iwl3945_rx_reply_alive;
  785. priv->rx_handlers[REPLY_ADD_STA] = iwl3945_rx_reply_add_sta;
  786. priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
  787. priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
  788. priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
  789. iwl_rx_spectrum_measure_notif;
  790. priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
  791. priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
  792. iwl_rx_pm_debug_statistics_notif;
  793. priv->rx_handlers[BEACON_NOTIFICATION] = iwl3945_rx_beacon_notif;
  794. /*
  795. * The same handler is used for both the REPLY to a discrete
  796. * statistics request from the host as well as for the periodic
  797. * statistics notifications (after received beacons) from the uCode.
  798. */
  799. priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl3945_hw_rx_statistics;
  800. priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl3945_hw_rx_statistics;
  801. iwl_setup_rx_scan_handlers(priv);
  802. priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl3945_rx_card_state_notif;
  803. /* Set up hardware specific Rx handlers */
  804. iwl3945_hw_rx_handler_setup(priv);
  805. }
  806. /************************** RX-FUNCTIONS ****************************/
  807. /*
  808. * Rx theory of operation
  809. *
  810. * The host allocates 32 DMA target addresses and passes the host address
  811. * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
  812. * 0 to 31
  813. *
  814. * Rx Queue Indexes
  815. * The host/firmware share two index registers for managing the Rx buffers.
  816. *
  817. * The READ index maps to the first position that the firmware may be writing
  818. * to -- the driver can read up to (but not including) this position and get
  819. * good data.
  820. * The READ index is managed by the firmware once the card is enabled.
  821. *
  822. * The WRITE index maps to the last position the driver has read from -- the
  823. * position preceding WRITE is the last slot the firmware can place a packet.
  824. *
  825. * The queue is empty (no good data) if WRITE = READ - 1, and is full if
  826. * WRITE = READ.
  827. *
  828. * During initialization, the host sets up the READ queue position to the first
  829. * INDEX position, and WRITE to the last (READ - 1 wrapped)
  830. *
  831. * When the firmware places a packet in a buffer, it will advance the READ index
  832. * and fire the RX interrupt. The driver can then query the READ index and
  833. * process as many packets as possible, moving the WRITE index forward as it
  834. * resets the Rx queue buffers with new memory.
  835. *
  836. * The management in the driver is as follows:
  837. * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
  838. * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
  839. * to replenish the iwl->rxq->rx_free.
  840. * + In iwl3945_rx_replenish (scheduled) if 'processed' != 'read' then the
  841. * iwl->rxq is replenished and the READ INDEX is updated (updating the
  842. * 'processed' and 'read' driver indexes as well)
  843. * + A received packet is processed and handed to the kernel network stack,
  844. * detached from the iwl->rxq. The driver 'processed' index is updated.
  845. * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
  846. * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
  847. * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
  848. * were enough free buffers and RX_STALLED is set it is cleared.
  849. *
  850. *
  851. * Driver sequence:
  852. *
  853. * iwl3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
  854. * iwl3945_rx_queue_restock
  855. * iwl3945_rx_queue_restock() Moves available buffers from rx_free into Rx
  856. * queue, updates firmware pointers, and updates
  857. * the WRITE index. If insufficient rx_free buffers
  858. * are available, schedules iwl3945_rx_replenish
  859. *
  860. * -- enable interrupts --
  861. * ISR - iwl3945_rx() Detach iwl_rx_mem_buffers from pool up to the
  862. * READ INDEX, detaching the SKB from the pool.
  863. * Moves the packet buffer from queue to rx_used.
  864. * Calls iwl3945_rx_queue_restock to refill any empty
  865. * slots.
  866. * ...
  867. *
  868. */
  869. /**
  870. * iwl3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
  871. */
  872. static inline __le32 iwl3945_dma_addr2rbd_ptr(struct iwl_priv *priv,
  873. dma_addr_t dma_addr)
  874. {
  875. return cpu_to_le32((u32)dma_addr);
  876. }
  877. /**
  878. * iwl3945_rx_queue_restock - refill RX queue from pre-allocated pool
  879. *
  880. * If there are slots in the RX queue that need to be restocked,
  881. * and we have free pre-allocated buffers, fill the ranks as much
  882. * as we can, pulling from rx_free.
  883. *
  884. * This moves the 'write' index forward to catch up with 'processed', and
  885. * also updates the memory address in the firmware to reference the new
  886. * target buffer.
  887. */
  888. static void iwl3945_rx_queue_restock(struct iwl_priv *priv)
  889. {
  890. struct iwl_rx_queue *rxq = &priv->rxq;
  891. struct list_head *element;
  892. struct iwl_rx_mem_buffer *rxb;
  893. unsigned long flags;
  894. int write;
  895. spin_lock_irqsave(&rxq->lock, flags);
  896. write = rxq->write & ~0x7;
  897. while ((iwl_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
  898. /* Get next free Rx buffer, remove from free list */
  899. element = rxq->rx_free.next;
  900. rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
  901. list_del(element);
  902. /* Point to Rx buffer via next RBD in circular buffer */
  903. rxq->bd[rxq->write] = iwl3945_dma_addr2rbd_ptr(priv, rxb->page_dma);
  904. rxq->queue[rxq->write] = rxb;
  905. rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
  906. rxq->free_count--;
  907. }
  908. spin_unlock_irqrestore(&rxq->lock, flags);
  909. /* If the pre-allocated buffer pool is dropping low, schedule to
  910. * refill it */
  911. if (rxq->free_count <= RX_LOW_WATERMARK)
  912. queue_work(priv->workqueue, &priv->rx_replenish);
  913. /* If we've added more space for the firmware to place data, tell it.
  914. * Increment device's write pointer in multiples of 8. */
  915. if ((rxq->write_actual != (rxq->write & ~0x7))
  916. || (abs(rxq->write - rxq->read) > 7)) {
  917. spin_lock_irqsave(&rxq->lock, flags);
  918. rxq->need_update = 1;
  919. spin_unlock_irqrestore(&rxq->lock, flags);
  920. iwl_rx_queue_update_write_ptr(priv, rxq);
  921. }
  922. }
  923. /**
  924. * iwl3945_rx_replenish - Move all used packet from rx_used to rx_free
  925. *
  926. * When moving to rx_free an SKB is allocated for the slot.
  927. *
  928. * Also restock the Rx queue via iwl3945_rx_queue_restock.
  929. * This is called as a scheduled work item (except for during initialization)
  930. */
  931. static void iwl3945_rx_allocate(struct iwl_priv *priv, gfp_t priority)
  932. {
  933. struct iwl_rx_queue *rxq = &priv->rxq;
  934. struct list_head *element;
  935. struct iwl_rx_mem_buffer *rxb;
  936. struct page *page;
  937. unsigned long flags;
  938. gfp_t gfp_mask = priority;
  939. while (1) {
  940. spin_lock_irqsave(&rxq->lock, flags);
  941. if (list_empty(&rxq->rx_used)) {
  942. spin_unlock_irqrestore(&rxq->lock, flags);
  943. return;
  944. }
  945. spin_unlock_irqrestore(&rxq->lock, flags);
  946. if (rxq->free_count > RX_LOW_WATERMARK)
  947. gfp_mask |= __GFP_NOWARN;
  948. if (priv->hw_params.rx_page_order > 0)
  949. gfp_mask |= __GFP_COMP;
  950. /* Alloc a new receive buffer */
  951. page = alloc_pages(gfp_mask, priv->hw_params.rx_page_order);
  952. if (!page) {
  953. if (net_ratelimit())
  954. IWL_DEBUG_INFO(priv, "Failed to allocate SKB buffer.\n");
  955. if ((rxq->free_count <= RX_LOW_WATERMARK) &&
  956. net_ratelimit())
  957. IWL_CRIT(priv, "Failed to allocate SKB buffer with %s. Only %u free buffers remaining.\n",
  958. priority == GFP_ATOMIC ? "GFP_ATOMIC" : "GFP_KERNEL",
  959. rxq->free_count);
  960. /* We don't reschedule replenish work here -- we will
  961. * call the restock method and if it still needs
  962. * more buffers it will schedule replenish */
  963. break;
  964. }
  965. spin_lock_irqsave(&rxq->lock, flags);
  966. if (list_empty(&rxq->rx_used)) {
  967. spin_unlock_irqrestore(&rxq->lock, flags);
  968. __free_pages(page, priv->hw_params.rx_page_order);
  969. return;
  970. }
  971. element = rxq->rx_used.next;
  972. rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
  973. list_del(element);
  974. spin_unlock_irqrestore(&rxq->lock, flags);
  975. rxb->page = page;
  976. /* Get physical address of RB/SKB */
  977. rxb->page_dma = pci_map_page(priv->pci_dev, page, 0,
  978. PAGE_SIZE << priv->hw_params.rx_page_order,
  979. PCI_DMA_FROMDEVICE);
  980. spin_lock_irqsave(&rxq->lock, flags);
  981. list_add_tail(&rxb->list, &rxq->rx_free);
  982. rxq->free_count++;
  983. priv->alloc_rxb_page++;
  984. spin_unlock_irqrestore(&rxq->lock, flags);
  985. }
  986. }
  987. void iwl3945_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
  988. {
  989. unsigned long flags;
  990. int i;
  991. spin_lock_irqsave(&rxq->lock, flags);
  992. INIT_LIST_HEAD(&rxq->rx_free);
  993. INIT_LIST_HEAD(&rxq->rx_used);
  994. /* Fill the rx_used queue with _all_ of the Rx buffers */
  995. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
  996. /* In the reset function, these buffers may have been allocated
  997. * to an SKB, so we need to unmap and free potential storage */
  998. if (rxq->pool[i].page != NULL) {
  999. pci_unmap_page(priv->pci_dev, rxq->pool[i].page_dma,
  1000. PAGE_SIZE << priv->hw_params.rx_page_order,
  1001. PCI_DMA_FROMDEVICE);
  1002. __iwl_free_pages(priv, rxq->pool[i].page);
  1003. rxq->pool[i].page = NULL;
  1004. }
  1005. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  1006. }
  1007. /* Set us so that we have processed and used all buffers, but have
  1008. * not restocked the Rx queue with fresh buffers */
  1009. rxq->read = rxq->write = 0;
  1010. rxq->write_actual = 0;
  1011. rxq->free_count = 0;
  1012. spin_unlock_irqrestore(&rxq->lock, flags);
  1013. }
  1014. void iwl3945_rx_replenish(void *data)
  1015. {
  1016. struct iwl_priv *priv = data;
  1017. unsigned long flags;
  1018. iwl3945_rx_allocate(priv, GFP_KERNEL);
  1019. spin_lock_irqsave(&priv->lock, flags);
  1020. iwl3945_rx_queue_restock(priv);
  1021. spin_unlock_irqrestore(&priv->lock, flags);
  1022. }
  1023. static void iwl3945_rx_replenish_now(struct iwl_priv *priv)
  1024. {
  1025. iwl3945_rx_allocate(priv, GFP_ATOMIC);
  1026. iwl3945_rx_queue_restock(priv);
  1027. }
  1028. /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
  1029. * If an SKB has been detached, the POOL needs to have its SKB set to NULL
  1030. * This free routine walks the list of POOL entries and if SKB is set to
  1031. * non NULL it is unmapped and freed
  1032. */
  1033. static void iwl3945_rx_queue_free(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
  1034. {
  1035. int i;
  1036. for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
  1037. if (rxq->pool[i].page != NULL) {
  1038. pci_unmap_page(priv->pci_dev, rxq->pool[i].page_dma,
  1039. PAGE_SIZE << priv->hw_params.rx_page_order,
  1040. PCI_DMA_FROMDEVICE);
  1041. __iwl_free_pages(priv, rxq->pool[i].page);
  1042. rxq->pool[i].page = NULL;
  1043. }
  1044. }
  1045. dma_free_coherent(&priv->pci_dev->dev, 4 * RX_QUEUE_SIZE, rxq->bd,
  1046. rxq->dma_addr);
  1047. dma_free_coherent(&priv->pci_dev->dev, sizeof(struct iwl_rb_status),
  1048. rxq->rb_stts, rxq->rb_stts_dma);
  1049. rxq->bd = NULL;
  1050. rxq->rb_stts = NULL;
  1051. }
  1052. /* Convert linear signal-to-noise ratio into dB */
  1053. static u8 ratio2dB[100] = {
  1054. /* 0 1 2 3 4 5 6 7 8 9 */
  1055. 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
  1056. 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
  1057. 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
  1058. 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
  1059. 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
  1060. 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
  1061. 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
  1062. 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
  1063. 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
  1064. 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
  1065. };
  1066. /* Calculates a relative dB value from a ratio of linear
  1067. * (i.e. not dB) signal levels.
  1068. * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
  1069. int iwl3945_calc_db_from_ratio(int sig_ratio)
  1070. {
  1071. /* 1000:1 or higher just report as 60 dB */
  1072. if (sig_ratio >= 1000)
  1073. return 60;
  1074. /* 100:1 or higher, divide by 10 and use table,
  1075. * add 20 dB to make up for divide by 10 */
  1076. if (sig_ratio >= 100)
  1077. return 20 + (int)ratio2dB[sig_ratio/10];
  1078. /* We shouldn't see this */
  1079. if (sig_ratio < 1)
  1080. return 0;
  1081. /* Use table for ratios 1:1 - 99:1 */
  1082. return (int)ratio2dB[sig_ratio];
  1083. }
  1084. /**
  1085. * iwl3945_rx_handle - Main entry function for receiving responses from uCode
  1086. *
  1087. * Uses the priv->rx_handlers callback function array to invoke
  1088. * the appropriate handlers, including command responses,
  1089. * frame-received notifications, and other notifications.
  1090. */
  1091. static void iwl3945_rx_handle(struct iwl_priv *priv)
  1092. {
  1093. struct iwl_rx_mem_buffer *rxb;
  1094. struct iwl_rx_packet *pkt;
  1095. struct iwl_rx_queue *rxq = &priv->rxq;
  1096. u32 r, i;
  1097. int reclaim;
  1098. unsigned long flags;
  1099. u8 fill_rx = 0;
  1100. u32 count = 8;
  1101. int total_empty = 0;
  1102. /* uCode's read index (stored in shared DRAM) indicates the last Rx
  1103. * buffer that the driver may process (last buffer filled by ucode). */
  1104. r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
  1105. i = rxq->read;
  1106. /* calculate total frames need to be restock after handling RX */
  1107. total_empty = r - rxq->write_actual;
  1108. if (total_empty < 0)
  1109. total_empty += RX_QUEUE_SIZE;
  1110. if (total_empty > (RX_QUEUE_SIZE / 2))
  1111. fill_rx = 1;
  1112. /* Rx interrupt, but nothing sent from uCode */
  1113. if (i == r)
  1114. IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
  1115. while (i != r) {
  1116. rxb = rxq->queue[i];
  1117. /* If an RXB doesn't have a Rx queue slot associated with it,
  1118. * then a bug has been introduced in the queue refilling
  1119. * routines -- catch it here */
  1120. BUG_ON(rxb == NULL);
  1121. rxq->queue[i] = NULL;
  1122. pci_unmap_page(priv->pci_dev, rxb->page_dma,
  1123. PAGE_SIZE << priv->hw_params.rx_page_order,
  1124. PCI_DMA_FROMDEVICE);
  1125. pkt = rxb_addr(rxb);
  1126. trace_iwlwifi_dev_rx(priv, pkt,
  1127. le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK);
  1128. /* Reclaim a command buffer only if this packet is a response
  1129. * to a (driver-originated) command.
  1130. * If the packet (e.g. Rx frame) originated from uCode,
  1131. * there is no command buffer to reclaim.
  1132. * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
  1133. * but apparently a few don't get set; catch them here. */
  1134. reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
  1135. (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
  1136. (pkt->hdr.cmd != REPLY_TX);
  1137. /* Based on type of command response or notification,
  1138. * handle those that need handling via function in
  1139. * rx_handlers table. See iwl3945_setup_rx_handlers() */
  1140. if (priv->rx_handlers[pkt->hdr.cmd]) {
  1141. IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r, i,
  1142. get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
  1143. priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
  1144. priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
  1145. } else {
  1146. /* No handling needed */
  1147. IWL_DEBUG_RX(priv,
  1148. "r %d i %d No handler needed for %s, 0x%02x\n",
  1149. r, i, get_cmd_string(pkt->hdr.cmd),
  1150. pkt->hdr.cmd);
  1151. }
  1152. /*
  1153. * XXX: After here, we should always check rxb->page
  1154. * against NULL before touching it or its virtual
  1155. * memory (pkt). Because some rx_handler might have
  1156. * already taken or freed the pages.
  1157. */
  1158. if (reclaim) {
  1159. /* Invoke any callbacks, transfer the buffer to caller,
  1160. * and fire off the (possibly) blocking iwl_send_cmd()
  1161. * as we reclaim the driver command queue */
  1162. if (rxb->page)
  1163. iwl_tx_cmd_complete(priv, rxb);
  1164. else
  1165. IWL_WARN(priv, "Claim null rxb?\n");
  1166. }
  1167. /* Reuse the page if possible. For notification packets and
  1168. * SKBs that fail to Rx correctly, add them back into the
  1169. * rx_free list for reuse later. */
  1170. spin_lock_irqsave(&rxq->lock, flags);
  1171. if (rxb->page != NULL) {
  1172. rxb->page_dma = pci_map_page(priv->pci_dev, rxb->page,
  1173. 0, PAGE_SIZE << priv->hw_params.rx_page_order,
  1174. PCI_DMA_FROMDEVICE);
  1175. list_add_tail(&rxb->list, &rxq->rx_free);
  1176. rxq->free_count++;
  1177. } else
  1178. list_add_tail(&rxb->list, &rxq->rx_used);
  1179. spin_unlock_irqrestore(&rxq->lock, flags);
  1180. i = (i + 1) & RX_QUEUE_MASK;
  1181. /* If there are a lot of unused frames,
  1182. * restock the Rx queue so ucode won't assert. */
  1183. if (fill_rx) {
  1184. count++;
  1185. if (count >= 8) {
  1186. rxq->read = i;
  1187. iwl3945_rx_replenish_now(priv);
  1188. count = 0;
  1189. }
  1190. }
  1191. }
  1192. /* Backtrack one entry */
  1193. rxq->read = i;
  1194. if (fill_rx)
  1195. iwl3945_rx_replenish_now(priv);
  1196. else
  1197. iwl3945_rx_queue_restock(priv);
  1198. }
  1199. /* call this function to flush any scheduled tasklet */
  1200. static inline void iwl_synchronize_irq(struct iwl_priv *priv)
  1201. {
  1202. /* wait to make sure we flush pending tasklet*/
  1203. synchronize_irq(priv->pci_dev->irq);
  1204. tasklet_kill(&priv->irq_tasklet);
  1205. }
  1206. static const char *desc_lookup(int i)
  1207. {
  1208. switch (i) {
  1209. case 1:
  1210. return "FAIL";
  1211. case 2:
  1212. return "BAD_PARAM";
  1213. case 3:
  1214. return "BAD_CHECKSUM";
  1215. case 4:
  1216. return "NMI_INTERRUPT";
  1217. case 5:
  1218. return "SYSASSERT";
  1219. case 6:
  1220. return "FATAL_ERROR";
  1221. }
  1222. return "UNKNOWN";
  1223. }
  1224. #define ERROR_START_OFFSET (1 * sizeof(u32))
  1225. #define ERROR_ELEM_SIZE (7 * sizeof(u32))
  1226. void iwl3945_dump_nic_error_log(struct iwl_priv *priv)
  1227. {
  1228. u32 i;
  1229. u32 desc, time, count, base, data1;
  1230. u32 blink1, blink2, ilink1, ilink2;
  1231. base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
  1232. if (!iwl3945_hw_valid_rtc_data_addr(base)) {
  1233. IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base);
  1234. return;
  1235. }
  1236. count = iwl_read_targ_mem(priv, base);
  1237. if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
  1238. IWL_ERR(priv, "Start IWL Error Log Dump:\n");
  1239. IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
  1240. priv->status, count);
  1241. }
  1242. IWL_ERR(priv, "Desc Time asrtPC blink2 "
  1243. "ilink1 nmiPC Line\n");
  1244. for (i = ERROR_START_OFFSET;
  1245. i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
  1246. i += ERROR_ELEM_SIZE) {
  1247. desc = iwl_read_targ_mem(priv, base + i);
  1248. time =
  1249. iwl_read_targ_mem(priv, base + i + 1 * sizeof(u32));
  1250. blink1 =
  1251. iwl_read_targ_mem(priv, base + i + 2 * sizeof(u32));
  1252. blink2 =
  1253. iwl_read_targ_mem(priv, base + i + 3 * sizeof(u32));
  1254. ilink1 =
  1255. iwl_read_targ_mem(priv, base + i + 4 * sizeof(u32));
  1256. ilink2 =
  1257. iwl_read_targ_mem(priv, base + i + 5 * sizeof(u32));
  1258. data1 =
  1259. iwl_read_targ_mem(priv, base + i + 6 * sizeof(u32));
  1260. IWL_ERR(priv,
  1261. "%-13s (#%d) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
  1262. desc_lookup(desc), desc, time, blink1, blink2,
  1263. ilink1, ilink2, data1);
  1264. trace_iwlwifi_dev_ucode_error(priv, desc, time, data1, 0,
  1265. 0, blink1, blink2, ilink1, ilink2);
  1266. }
  1267. }
  1268. #define EVENT_START_OFFSET (6 * sizeof(u32))
  1269. /**
  1270. * iwl3945_print_event_log - Dump error event log to syslog
  1271. *
  1272. */
  1273. static int iwl3945_print_event_log(struct iwl_priv *priv, u32 start_idx,
  1274. u32 num_events, u32 mode,
  1275. int pos, char **buf, size_t bufsz)
  1276. {
  1277. u32 i;
  1278. u32 base; /* SRAM byte address of event log header */
  1279. u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
  1280. u32 ptr; /* SRAM byte address of log data */
  1281. u32 ev, time, data; /* event log data */
  1282. unsigned long reg_flags;
  1283. if (num_events == 0)
  1284. return pos;
  1285. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  1286. if (mode == 0)
  1287. event_size = 2 * sizeof(u32);
  1288. else
  1289. event_size = 3 * sizeof(u32);
  1290. ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
  1291. /* Make sure device is powered up for SRAM reads */
  1292. spin_lock_irqsave(&priv->reg_lock, reg_flags);
  1293. iwl_grab_nic_access(priv);
  1294. /* Set starting address; reads will auto-increment */
  1295. _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr);
  1296. rmb();
  1297. /* "time" is actually "data" for mode 0 (no timestamp).
  1298. * place event id # at far right for easier visual parsing. */
  1299. for (i = 0; i < num_events; i++) {
  1300. ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1301. time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1302. if (mode == 0) {
  1303. /* data, ev */
  1304. if (bufsz) {
  1305. pos += scnprintf(*buf + pos, bufsz - pos,
  1306. "0x%08x:%04u\n",
  1307. time, ev);
  1308. } else {
  1309. IWL_ERR(priv, "0x%08x\t%04u\n", time, ev);
  1310. trace_iwlwifi_dev_ucode_event(priv, 0,
  1311. time, ev);
  1312. }
  1313. } else {
  1314. data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1315. if (bufsz) {
  1316. pos += scnprintf(*buf + pos, bufsz - pos,
  1317. "%010u:0x%08x:%04u\n",
  1318. time, data, ev);
  1319. } else {
  1320. IWL_ERR(priv, "%010u\t0x%08x\t%04u\n",
  1321. time, data, ev);
  1322. trace_iwlwifi_dev_ucode_event(priv, time,
  1323. data, ev);
  1324. }
  1325. }
  1326. }
  1327. /* Allow device to power down */
  1328. iwl_release_nic_access(priv);
  1329. spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
  1330. return pos;
  1331. }
  1332. /**
  1333. * iwl3945_print_last_event_logs - Dump the newest # of event log to syslog
  1334. */
  1335. static int iwl3945_print_last_event_logs(struct iwl_priv *priv, u32 capacity,
  1336. u32 num_wraps, u32 next_entry,
  1337. u32 size, u32 mode,
  1338. int pos, char **buf, size_t bufsz)
  1339. {
  1340. /*
  1341. * display the newest DEFAULT_LOG_ENTRIES entries
  1342. * i.e the entries just before the next ont that uCode would fill.
  1343. */
  1344. if (num_wraps) {
  1345. if (next_entry < size) {
  1346. pos = iwl3945_print_event_log(priv,
  1347. capacity - (size - next_entry),
  1348. size - next_entry, mode,
  1349. pos, buf, bufsz);
  1350. pos = iwl3945_print_event_log(priv, 0,
  1351. next_entry, mode,
  1352. pos, buf, bufsz);
  1353. } else
  1354. pos = iwl3945_print_event_log(priv, next_entry - size,
  1355. size, mode,
  1356. pos, buf, bufsz);
  1357. } else {
  1358. if (next_entry < size)
  1359. pos = iwl3945_print_event_log(priv, 0,
  1360. next_entry, mode,
  1361. pos, buf, bufsz);
  1362. else
  1363. pos = iwl3945_print_event_log(priv, next_entry - size,
  1364. size, mode,
  1365. pos, buf, bufsz);
  1366. }
  1367. return pos;
  1368. }
  1369. /* For sanity check only. Actual size is determined by uCode, typ. 512 */
  1370. #define IWL3945_MAX_EVENT_LOG_SIZE (512)
  1371. #define DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES (20)
  1372. int iwl3945_dump_nic_event_log(struct iwl_priv *priv, bool full_log,
  1373. char **buf, bool display)
  1374. {
  1375. u32 base; /* SRAM byte address of event log header */
  1376. u32 capacity; /* event log capacity in # entries */
  1377. u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
  1378. u32 num_wraps; /* # times uCode wrapped to top of log */
  1379. u32 next_entry; /* index of next entry to be written by uCode */
  1380. u32 size; /* # entries that we'll print */
  1381. int pos = 0;
  1382. size_t bufsz = 0;
  1383. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  1384. if (!iwl3945_hw_valid_rtc_data_addr(base)) {
  1385. IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base);
  1386. return -EINVAL;
  1387. }
  1388. /* event log header */
  1389. capacity = iwl_read_targ_mem(priv, base);
  1390. mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
  1391. num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
  1392. next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
  1393. if (capacity > IWL3945_MAX_EVENT_LOG_SIZE) {
  1394. IWL_ERR(priv, "Log capacity %d is bogus, limit to %d entries\n",
  1395. capacity, IWL3945_MAX_EVENT_LOG_SIZE);
  1396. capacity = IWL3945_MAX_EVENT_LOG_SIZE;
  1397. }
  1398. if (next_entry > IWL3945_MAX_EVENT_LOG_SIZE) {
  1399. IWL_ERR(priv, "Log write index %d is bogus, limit to %d\n",
  1400. next_entry, IWL3945_MAX_EVENT_LOG_SIZE);
  1401. next_entry = IWL3945_MAX_EVENT_LOG_SIZE;
  1402. }
  1403. size = num_wraps ? capacity : next_entry;
  1404. /* bail out if nothing in log */
  1405. if (size == 0) {
  1406. IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
  1407. return pos;
  1408. }
  1409. #ifdef CONFIG_IWLWIFI_DEBUG
  1410. if (!(iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) && !full_log)
  1411. size = (size > DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES)
  1412. ? DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES : size;
  1413. #else
  1414. size = (size > DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES)
  1415. ? DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES : size;
  1416. #endif
  1417. IWL_ERR(priv, "Start IWL Event Log Dump: display last %d count\n",
  1418. size);
  1419. #ifdef CONFIG_IWLWIFI_DEBUG
  1420. if (display) {
  1421. if (full_log)
  1422. bufsz = capacity * 48;
  1423. else
  1424. bufsz = size * 48;
  1425. *buf = kmalloc(bufsz, GFP_KERNEL);
  1426. if (!*buf)
  1427. return -ENOMEM;
  1428. }
  1429. if ((iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) || full_log) {
  1430. /* if uCode has wrapped back to top of log,
  1431. * start at the oldest entry,
  1432. * i.e the next one that uCode would fill.
  1433. */
  1434. if (num_wraps)
  1435. pos = iwl3945_print_event_log(priv, next_entry,
  1436. capacity - next_entry, mode,
  1437. pos, buf, bufsz);
  1438. /* (then/else) start at top of log */
  1439. pos = iwl3945_print_event_log(priv, 0, next_entry, mode,
  1440. pos, buf, bufsz);
  1441. } else
  1442. pos = iwl3945_print_last_event_logs(priv, capacity, num_wraps,
  1443. next_entry, size, mode,
  1444. pos, buf, bufsz);
  1445. #else
  1446. pos = iwl3945_print_last_event_logs(priv, capacity, num_wraps,
  1447. next_entry, size, mode,
  1448. pos, buf, bufsz);
  1449. #endif
  1450. return pos;
  1451. }
  1452. static void iwl3945_irq_tasklet(struct iwl_priv *priv)
  1453. {
  1454. u32 inta, handled = 0;
  1455. u32 inta_fh;
  1456. unsigned long flags;
  1457. #ifdef CONFIG_IWLWIFI_DEBUG
  1458. u32 inta_mask;
  1459. #endif
  1460. spin_lock_irqsave(&priv->lock, flags);
  1461. /* Ack/clear/reset pending uCode interrupts.
  1462. * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
  1463. * and will clear only when CSR_FH_INT_STATUS gets cleared. */
  1464. inta = iwl_read32(priv, CSR_INT);
  1465. iwl_write32(priv, CSR_INT, inta);
  1466. /* Ack/clear/reset pending flow-handler (DMA) interrupts.
  1467. * Any new interrupts that happen after this, either while we're
  1468. * in this tasklet, or later, will show up in next ISR/tasklet. */
  1469. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  1470. iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
  1471. #ifdef CONFIG_IWLWIFI_DEBUG
  1472. if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
  1473. /* just for debug */
  1474. inta_mask = iwl_read32(priv, CSR_INT_MASK);
  1475. IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  1476. inta, inta_mask, inta_fh);
  1477. }
  1478. #endif
  1479. spin_unlock_irqrestore(&priv->lock, flags);
  1480. /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
  1481. * atomic, make sure that inta covers all the interrupts that
  1482. * we've discovered, even if FH interrupt came in just after
  1483. * reading CSR_INT. */
  1484. if (inta_fh & CSR39_FH_INT_RX_MASK)
  1485. inta |= CSR_INT_BIT_FH_RX;
  1486. if (inta_fh & CSR39_FH_INT_TX_MASK)
  1487. inta |= CSR_INT_BIT_FH_TX;
  1488. /* Now service all interrupt bits discovered above. */
  1489. if (inta & CSR_INT_BIT_HW_ERR) {
  1490. IWL_ERR(priv, "Hardware error detected. Restarting.\n");
  1491. /* Tell the device to stop sending interrupts */
  1492. iwl_disable_interrupts(priv);
  1493. priv->isr_stats.hw++;
  1494. iwl_irq_handle_error(priv);
  1495. handled |= CSR_INT_BIT_HW_ERR;
  1496. return;
  1497. }
  1498. #ifdef CONFIG_IWLWIFI_DEBUG
  1499. if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
  1500. /* NIC fires this, but we don't use it, redundant with WAKEUP */
  1501. if (inta & CSR_INT_BIT_SCD) {
  1502. IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
  1503. "the frame/frames.\n");
  1504. priv->isr_stats.sch++;
  1505. }
  1506. /* Alive notification via Rx interrupt will do the real work */
  1507. if (inta & CSR_INT_BIT_ALIVE) {
  1508. IWL_DEBUG_ISR(priv, "Alive interrupt\n");
  1509. priv->isr_stats.alive++;
  1510. }
  1511. }
  1512. #endif
  1513. /* Safely ignore these bits for debug checks below */
  1514. inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
  1515. /* Error detected by uCode */
  1516. if (inta & CSR_INT_BIT_SW_ERR) {
  1517. IWL_ERR(priv, "Microcode SW error detected. "
  1518. "Restarting 0x%X.\n", inta);
  1519. priv->isr_stats.sw++;
  1520. priv->isr_stats.sw_err = inta;
  1521. iwl_irq_handle_error(priv);
  1522. handled |= CSR_INT_BIT_SW_ERR;
  1523. }
  1524. /* uCode wakes up after power-down sleep */
  1525. if (inta & CSR_INT_BIT_WAKEUP) {
  1526. IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
  1527. iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
  1528. iwl_txq_update_write_ptr(priv, &priv->txq[0]);
  1529. iwl_txq_update_write_ptr(priv, &priv->txq[1]);
  1530. iwl_txq_update_write_ptr(priv, &priv->txq[2]);
  1531. iwl_txq_update_write_ptr(priv, &priv->txq[3]);
  1532. iwl_txq_update_write_ptr(priv, &priv->txq[4]);
  1533. iwl_txq_update_write_ptr(priv, &priv->txq[5]);
  1534. priv->isr_stats.wakeup++;
  1535. handled |= CSR_INT_BIT_WAKEUP;
  1536. }
  1537. /* All uCode command responses, including Tx command responses,
  1538. * Rx "responses" (frame-received notification), and other
  1539. * notifications from uCode come through here*/
  1540. if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
  1541. iwl3945_rx_handle(priv);
  1542. priv->isr_stats.rx++;
  1543. handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
  1544. }
  1545. if (inta & CSR_INT_BIT_FH_TX) {
  1546. IWL_DEBUG_ISR(priv, "Tx interrupt\n");
  1547. priv->isr_stats.tx++;
  1548. iwl_write32(priv, CSR_FH_INT_STATUS, (1 << 6));
  1549. iwl_write_direct32(priv, FH39_TCSR_CREDIT
  1550. (FH39_SRVC_CHNL), 0x0);
  1551. handled |= CSR_INT_BIT_FH_TX;
  1552. }
  1553. if (inta & ~handled) {
  1554. IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
  1555. priv->isr_stats.unhandled++;
  1556. }
  1557. if (inta & ~priv->inta_mask) {
  1558. IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
  1559. inta & ~priv->inta_mask);
  1560. IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh);
  1561. }
  1562. /* Re-enable all interrupts */
  1563. /* only Re-enable if disabled by irq */
  1564. if (test_bit(STATUS_INT_ENABLED, &priv->status))
  1565. iwl_enable_interrupts(priv);
  1566. #ifdef CONFIG_IWLWIFI_DEBUG
  1567. if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
  1568. inta = iwl_read32(priv, CSR_INT);
  1569. inta_mask = iwl_read32(priv, CSR_INT_MASK);
  1570. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  1571. IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
  1572. "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
  1573. }
  1574. #endif
  1575. }
  1576. static int iwl3945_get_channels_for_scan(struct iwl_priv *priv,
  1577. enum ieee80211_band band,
  1578. u8 is_active, u8 n_probes,
  1579. struct iwl3945_scan_channel *scan_ch)
  1580. {
  1581. struct ieee80211_channel *chan;
  1582. const struct ieee80211_supported_band *sband;
  1583. const struct iwl_channel_info *ch_info;
  1584. u16 passive_dwell = 0;
  1585. u16 active_dwell = 0;
  1586. int added, i;
  1587. sband = iwl_get_hw_mode(priv, band);
  1588. if (!sband)
  1589. return 0;
  1590. active_dwell = iwl_get_active_dwell_time(priv, band, n_probes);
  1591. passive_dwell = iwl_get_passive_dwell_time(priv, band);
  1592. if (passive_dwell <= active_dwell)
  1593. passive_dwell = active_dwell + 1;
  1594. for (i = 0, added = 0; i < priv->scan_request->n_channels; i++) {
  1595. chan = priv->scan_request->channels[i];
  1596. if (chan->band != band)
  1597. continue;
  1598. scan_ch->channel = chan->hw_value;
  1599. ch_info = iwl_get_channel_info(priv, band, scan_ch->channel);
  1600. if (!is_channel_valid(ch_info)) {
  1601. IWL_DEBUG_SCAN(priv, "Channel %d is INVALID for this band.\n",
  1602. scan_ch->channel);
  1603. continue;
  1604. }
  1605. scan_ch->active_dwell = cpu_to_le16(active_dwell);
  1606. scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
  1607. /* If passive , set up for auto-switch
  1608. * and use long active_dwell time.
  1609. */
  1610. if (!is_active || is_channel_passive(ch_info) ||
  1611. (chan->flags & IEEE80211_CHAN_PASSIVE_SCAN)) {
  1612. scan_ch->type = 0; /* passive */
  1613. if (IWL_UCODE_API(priv->ucode_ver) == 1)
  1614. scan_ch->active_dwell = cpu_to_le16(passive_dwell - 1);
  1615. } else {
  1616. scan_ch->type = 1; /* active */
  1617. }
  1618. /* Set direct probe bits. These may be used both for active
  1619. * scan channels (probes gets sent right away),
  1620. * or for passive channels (probes get se sent only after
  1621. * hearing clear Rx packet).*/
  1622. if (IWL_UCODE_API(priv->ucode_ver) >= 2) {
  1623. if (n_probes)
  1624. scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
  1625. } else {
  1626. /* uCode v1 does not allow setting direct probe bits on
  1627. * passive channel. */
  1628. if ((scan_ch->type & 1) && n_probes)
  1629. scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
  1630. }
  1631. /* Set txpower levels to defaults */
  1632. scan_ch->tpc.dsp_atten = 110;
  1633. /* scan_pwr_info->tpc.dsp_atten; */
  1634. /*scan_pwr_info->tpc.tx_gain; */
  1635. if (band == IEEE80211_BAND_5GHZ)
  1636. scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
  1637. else {
  1638. scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
  1639. /* NOTE: if we were doing 6Mb OFDM for scans we'd use
  1640. * power level:
  1641. * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
  1642. */
  1643. }
  1644. IWL_DEBUG_SCAN(priv, "Scanning %d [%s %d]\n",
  1645. scan_ch->channel,
  1646. (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
  1647. (scan_ch->type & 1) ?
  1648. active_dwell : passive_dwell);
  1649. scan_ch++;
  1650. added++;
  1651. }
  1652. IWL_DEBUG_SCAN(priv, "total channels to scan %d \n", added);
  1653. return added;
  1654. }
  1655. static void iwl3945_init_hw_rates(struct iwl_priv *priv,
  1656. struct ieee80211_rate *rates)
  1657. {
  1658. int i;
  1659. for (i = 0; i < IWL_RATE_COUNT_LEGACY; i++) {
  1660. rates[i].bitrate = iwl3945_rates[i].ieee * 5;
  1661. rates[i].hw_value = i; /* Rate scaling will work on indexes */
  1662. rates[i].hw_value_short = i;
  1663. rates[i].flags = 0;
  1664. if ((i > IWL39_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
  1665. /*
  1666. * If CCK != 1M then set short preamble rate flag.
  1667. */
  1668. rates[i].flags |= (iwl3945_rates[i].plcp == 10) ?
  1669. 0 : IEEE80211_RATE_SHORT_PREAMBLE;
  1670. }
  1671. }
  1672. }
  1673. /******************************************************************************
  1674. *
  1675. * uCode download functions
  1676. *
  1677. ******************************************************************************/
  1678. static void iwl3945_dealloc_ucode_pci(struct iwl_priv *priv)
  1679. {
  1680. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
  1681. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
  1682. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  1683. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
  1684. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  1685. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
  1686. }
  1687. /**
  1688. * iwl3945_verify_inst_full - verify runtime uCode image in card vs. host,
  1689. * looking at all data.
  1690. */
  1691. static int iwl3945_verify_inst_full(struct iwl_priv *priv, __le32 *image, u32 len)
  1692. {
  1693. u32 val;
  1694. u32 save_len = len;
  1695. int rc = 0;
  1696. u32 errcnt;
  1697. IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
  1698. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  1699. IWL39_RTC_INST_LOWER_BOUND);
  1700. errcnt = 0;
  1701. for (; len > 0; len -= sizeof(u32), image++) {
  1702. /* read data comes through single port, auto-incr addr */
  1703. /* NOTE: Use the debugless read so we don't flood kernel log
  1704. * if IWL_DL_IO is set */
  1705. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1706. if (val != le32_to_cpu(*image)) {
  1707. IWL_ERR(priv, "uCode INST section is invalid at "
  1708. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  1709. save_len - len, val, le32_to_cpu(*image));
  1710. rc = -EIO;
  1711. errcnt++;
  1712. if (errcnt >= 20)
  1713. break;
  1714. }
  1715. }
  1716. if (!errcnt)
  1717. IWL_DEBUG_INFO(priv,
  1718. "ucode image in INSTRUCTION memory is good\n");
  1719. return rc;
  1720. }
  1721. /**
  1722. * iwl3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
  1723. * using sample data 100 bytes apart. If these sample points are good,
  1724. * it's a pretty good bet that everything between them is good, too.
  1725. */
  1726. static int iwl3945_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
  1727. {
  1728. u32 val;
  1729. int rc = 0;
  1730. u32 errcnt = 0;
  1731. u32 i;
  1732. IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
  1733. for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
  1734. /* read data comes through single port, auto-incr addr */
  1735. /* NOTE: Use the debugless read so we don't flood kernel log
  1736. * if IWL_DL_IO is set */
  1737. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  1738. i + IWL39_RTC_INST_LOWER_BOUND);
  1739. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1740. if (val != le32_to_cpu(*image)) {
  1741. #if 0 /* Enable this if you want to see details */
  1742. IWL_ERR(priv, "uCode INST section is invalid at "
  1743. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  1744. i, val, *image);
  1745. #endif
  1746. rc = -EIO;
  1747. errcnt++;
  1748. if (errcnt >= 3)
  1749. break;
  1750. }
  1751. }
  1752. return rc;
  1753. }
  1754. /**
  1755. * iwl3945_verify_ucode - determine which instruction image is in SRAM,
  1756. * and verify its contents
  1757. */
  1758. static int iwl3945_verify_ucode(struct iwl_priv *priv)
  1759. {
  1760. __le32 *image;
  1761. u32 len;
  1762. int rc = 0;
  1763. /* Try bootstrap */
  1764. image = (__le32 *)priv->ucode_boot.v_addr;
  1765. len = priv->ucode_boot.len;
  1766. rc = iwl3945_verify_inst_sparse(priv, image, len);
  1767. if (rc == 0) {
  1768. IWL_DEBUG_INFO(priv, "Bootstrap uCode is good in inst SRAM\n");
  1769. return 0;
  1770. }
  1771. /* Try initialize */
  1772. image = (__le32 *)priv->ucode_init.v_addr;
  1773. len = priv->ucode_init.len;
  1774. rc = iwl3945_verify_inst_sparse(priv, image, len);
  1775. if (rc == 0) {
  1776. IWL_DEBUG_INFO(priv, "Initialize uCode is good in inst SRAM\n");
  1777. return 0;
  1778. }
  1779. /* Try runtime/protocol */
  1780. image = (__le32 *)priv->ucode_code.v_addr;
  1781. len = priv->ucode_code.len;
  1782. rc = iwl3945_verify_inst_sparse(priv, image, len);
  1783. if (rc == 0) {
  1784. IWL_DEBUG_INFO(priv, "Runtime uCode is good in inst SRAM\n");
  1785. return 0;
  1786. }
  1787. IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
  1788. /* Since nothing seems to match, show first several data entries in
  1789. * instruction SRAM, so maybe visual inspection will give a clue.
  1790. * Selection of bootstrap image (vs. other images) is arbitrary. */
  1791. image = (__le32 *)priv->ucode_boot.v_addr;
  1792. len = priv->ucode_boot.len;
  1793. rc = iwl3945_verify_inst_full(priv, image, len);
  1794. return rc;
  1795. }
  1796. static void iwl3945_nic_start(struct iwl_priv *priv)
  1797. {
  1798. /* Remove all resets to allow NIC to operate */
  1799. iwl_write32(priv, CSR_RESET, 0);
  1800. }
  1801. /**
  1802. * iwl3945_read_ucode - Read uCode images from disk file.
  1803. *
  1804. * Copy into buffers for card to fetch via bus-mastering
  1805. */
  1806. static int iwl3945_read_ucode(struct iwl_priv *priv)
  1807. {
  1808. const struct iwl_ucode_header *ucode;
  1809. int ret = -EINVAL, index;
  1810. const struct firmware *ucode_raw;
  1811. /* firmware file name contains uCode/driver compatibility version */
  1812. const char *name_pre = priv->cfg->fw_name_pre;
  1813. const unsigned int api_max = priv->cfg->ucode_api_max;
  1814. const unsigned int api_min = priv->cfg->ucode_api_min;
  1815. char buf[25];
  1816. u8 *src;
  1817. size_t len;
  1818. u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
  1819. /* Ask kernel firmware_class module to get the boot firmware off disk.
  1820. * request_firmware() is synchronous, file is in memory on return. */
  1821. for (index = api_max; index >= api_min; index--) {
  1822. sprintf(buf, "%s%u%s", name_pre, index, ".ucode");
  1823. ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
  1824. if (ret < 0) {
  1825. IWL_ERR(priv, "%s firmware file req failed: %d\n",
  1826. buf, ret);
  1827. if (ret == -ENOENT)
  1828. continue;
  1829. else
  1830. goto error;
  1831. } else {
  1832. if (index < api_max)
  1833. IWL_ERR(priv, "Loaded firmware %s, "
  1834. "which is deprecated. "
  1835. " Please use API v%u instead.\n",
  1836. buf, api_max);
  1837. IWL_DEBUG_INFO(priv, "Got firmware '%s' file "
  1838. "(%zd bytes) from disk\n",
  1839. buf, ucode_raw->size);
  1840. break;
  1841. }
  1842. }
  1843. if (ret < 0)
  1844. goto error;
  1845. /* Make sure that we got at least our header! */
  1846. if (ucode_raw->size < priv->cfg->ops->ucode->get_header_size(1)) {
  1847. IWL_ERR(priv, "File size way too small!\n");
  1848. ret = -EINVAL;
  1849. goto err_release;
  1850. }
  1851. /* Data from ucode file: header followed by uCode images */
  1852. ucode = (struct iwl_ucode_header *)ucode_raw->data;
  1853. priv->ucode_ver = le32_to_cpu(ucode->ver);
  1854. api_ver = IWL_UCODE_API(priv->ucode_ver);
  1855. inst_size = priv->cfg->ops->ucode->get_inst_size(ucode, api_ver);
  1856. data_size = priv->cfg->ops->ucode->get_data_size(ucode, api_ver);
  1857. init_size = priv->cfg->ops->ucode->get_init_size(ucode, api_ver);
  1858. init_data_size =
  1859. priv->cfg->ops->ucode->get_init_data_size(ucode, api_ver);
  1860. boot_size = priv->cfg->ops->ucode->get_boot_size(ucode, api_ver);
  1861. src = priv->cfg->ops->ucode->get_data(ucode, api_ver);
  1862. /* api_ver should match the api version forming part of the
  1863. * firmware filename ... but we don't check for that and only rely
  1864. * on the API version read from firmware header from here on forward */
  1865. if (api_ver < api_min || api_ver > api_max) {
  1866. IWL_ERR(priv, "Driver unable to support your firmware API. "
  1867. "Driver supports v%u, firmware is v%u.\n",
  1868. api_max, api_ver);
  1869. priv->ucode_ver = 0;
  1870. ret = -EINVAL;
  1871. goto err_release;
  1872. }
  1873. if (api_ver != api_max)
  1874. IWL_ERR(priv, "Firmware has old API version. Expected %u, "
  1875. "got %u. New firmware can be obtained "
  1876. "from http://www.intellinuxwireless.org.\n",
  1877. api_max, api_ver);
  1878. IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
  1879. IWL_UCODE_MAJOR(priv->ucode_ver),
  1880. IWL_UCODE_MINOR(priv->ucode_ver),
  1881. IWL_UCODE_API(priv->ucode_ver),
  1882. IWL_UCODE_SERIAL(priv->ucode_ver));
  1883. snprintf(priv->hw->wiphy->fw_version,
  1884. sizeof(priv->hw->wiphy->fw_version),
  1885. "%u.%u.%u.%u",
  1886. IWL_UCODE_MAJOR(priv->ucode_ver),
  1887. IWL_UCODE_MINOR(priv->ucode_ver),
  1888. IWL_UCODE_API(priv->ucode_ver),
  1889. IWL_UCODE_SERIAL(priv->ucode_ver));
  1890. IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
  1891. priv->ucode_ver);
  1892. IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %u\n",
  1893. inst_size);
  1894. IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %u\n",
  1895. data_size);
  1896. IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %u\n",
  1897. init_size);
  1898. IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %u\n",
  1899. init_data_size);
  1900. IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %u\n",
  1901. boot_size);
  1902. /* Verify size of file vs. image size info in file's header */
  1903. if (ucode_raw->size != priv->cfg->ops->ucode->get_header_size(api_ver) +
  1904. inst_size + data_size + init_size +
  1905. init_data_size + boot_size) {
  1906. IWL_DEBUG_INFO(priv,
  1907. "uCode file size %zd does not match expected size\n",
  1908. ucode_raw->size);
  1909. ret = -EINVAL;
  1910. goto err_release;
  1911. }
  1912. /* Verify that uCode images will fit in card's SRAM */
  1913. if (inst_size > IWL39_MAX_INST_SIZE) {
  1914. IWL_DEBUG_INFO(priv, "uCode instr len %d too large to fit in\n",
  1915. inst_size);
  1916. ret = -EINVAL;
  1917. goto err_release;
  1918. }
  1919. if (data_size > IWL39_MAX_DATA_SIZE) {
  1920. IWL_DEBUG_INFO(priv, "uCode data len %d too large to fit in\n",
  1921. data_size);
  1922. ret = -EINVAL;
  1923. goto err_release;
  1924. }
  1925. if (init_size > IWL39_MAX_INST_SIZE) {
  1926. IWL_DEBUG_INFO(priv,
  1927. "uCode init instr len %d too large to fit in\n",
  1928. init_size);
  1929. ret = -EINVAL;
  1930. goto err_release;
  1931. }
  1932. if (init_data_size > IWL39_MAX_DATA_SIZE) {
  1933. IWL_DEBUG_INFO(priv,
  1934. "uCode init data len %d too large to fit in\n",
  1935. init_data_size);
  1936. ret = -EINVAL;
  1937. goto err_release;
  1938. }
  1939. if (boot_size > IWL39_MAX_BSM_SIZE) {
  1940. IWL_DEBUG_INFO(priv,
  1941. "uCode boot instr len %d too large to fit in\n",
  1942. boot_size);
  1943. ret = -EINVAL;
  1944. goto err_release;
  1945. }
  1946. /* Allocate ucode buffers for card's bus-master loading ... */
  1947. /* Runtime instructions and 2 copies of data:
  1948. * 1) unmodified from disk
  1949. * 2) backup cache for save/restore during power-downs */
  1950. priv->ucode_code.len = inst_size;
  1951. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
  1952. priv->ucode_data.len = data_size;
  1953. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
  1954. priv->ucode_data_backup.len = data_size;
  1955. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  1956. if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
  1957. !priv->ucode_data_backup.v_addr)
  1958. goto err_pci_alloc;
  1959. /* Initialization instructions and data */
  1960. if (init_size && init_data_size) {
  1961. priv->ucode_init.len = init_size;
  1962. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
  1963. priv->ucode_init_data.len = init_data_size;
  1964. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  1965. if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
  1966. goto err_pci_alloc;
  1967. }
  1968. /* Bootstrap (instructions only, no data) */
  1969. if (boot_size) {
  1970. priv->ucode_boot.len = boot_size;
  1971. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
  1972. if (!priv->ucode_boot.v_addr)
  1973. goto err_pci_alloc;
  1974. }
  1975. /* Copy images into buffers for card's bus-master reads ... */
  1976. /* Runtime instructions (first block of data in file) */
  1977. len = inst_size;
  1978. IWL_DEBUG_INFO(priv,
  1979. "Copying (but not loading) uCode instr len %zd\n", len);
  1980. memcpy(priv->ucode_code.v_addr, src, len);
  1981. src += len;
  1982. IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
  1983. priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
  1984. /* Runtime data (2nd block)
  1985. * NOTE: Copy into backup buffer will be done in iwl3945_up() */
  1986. len = data_size;
  1987. IWL_DEBUG_INFO(priv,
  1988. "Copying (but not loading) uCode data len %zd\n", len);
  1989. memcpy(priv->ucode_data.v_addr, src, len);
  1990. memcpy(priv->ucode_data_backup.v_addr, src, len);
  1991. src += len;
  1992. /* Initialization instructions (3rd block) */
  1993. if (init_size) {
  1994. len = init_size;
  1995. IWL_DEBUG_INFO(priv,
  1996. "Copying (but not loading) init instr len %zd\n", len);
  1997. memcpy(priv->ucode_init.v_addr, src, len);
  1998. src += len;
  1999. }
  2000. /* Initialization data (4th block) */
  2001. if (init_data_size) {
  2002. len = init_data_size;
  2003. IWL_DEBUG_INFO(priv,
  2004. "Copying (but not loading) init data len %zd\n", len);
  2005. memcpy(priv->ucode_init_data.v_addr, src, len);
  2006. src += len;
  2007. }
  2008. /* Bootstrap instructions (5th block) */
  2009. len = boot_size;
  2010. IWL_DEBUG_INFO(priv,
  2011. "Copying (but not loading) boot instr len %zd\n", len);
  2012. memcpy(priv->ucode_boot.v_addr, src, len);
  2013. /* We have our copies now, allow OS release its copies */
  2014. release_firmware(ucode_raw);
  2015. return 0;
  2016. err_pci_alloc:
  2017. IWL_ERR(priv, "failed to allocate pci memory\n");
  2018. ret = -ENOMEM;
  2019. iwl3945_dealloc_ucode_pci(priv);
  2020. err_release:
  2021. release_firmware(ucode_raw);
  2022. error:
  2023. return ret;
  2024. }
  2025. /**
  2026. * iwl3945_set_ucode_ptrs - Set uCode address location
  2027. *
  2028. * Tell initialization uCode where to find runtime uCode.
  2029. *
  2030. * BSM registers initially contain pointers to initialization uCode.
  2031. * We need to replace them to load runtime uCode inst and data,
  2032. * and to save runtime data when powering down.
  2033. */
  2034. static int iwl3945_set_ucode_ptrs(struct iwl_priv *priv)
  2035. {
  2036. dma_addr_t pinst;
  2037. dma_addr_t pdata;
  2038. /* bits 31:0 for 3945 */
  2039. pinst = priv->ucode_code.p_addr;
  2040. pdata = priv->ucode_data_backup.p_addr;
  2041. /* Tell bootstrap uCode where to find image to load */
  2042. iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
  2043. iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  2044. iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
  2045. priv->ucode_data.len);
  2046. /* Inst byte count must be last to set up, bit 31 signals uCode
  2047. * that all new ptr/size info is in place */
  2048. iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
  2049. priv->ucode_code.len | BSM_DRAM_INST_LOAD);
  2050. IWL_DEBUG_INFO(priv, "Runtime uCode pointers are set.\n");
  2051. return 0;
  2052. }
  2053. /**
  2054. * iwl3945_init_alive_start - Called after REPLY_ALIVE notification received
  2055. *
  2056. * Called after REPLY_ALIVE notification received from "initialize" uCode.
  2057. *
  2058. * Tell "initialize" uCode to go ahead and load the runtime uCode.
  2059. */
  2060. static void iwl3945_init_alive_start(struct iwl_priv *priv)
  2061. {
  2062. /* Check alive response for "valid" sign from uCode */
  2063. if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
  2064. /* We had an error bringing up the hardware, so take it
  2065. * all the way back down so we can try again */
  2066. IWL_DEBUG_INFO(priv, "Initialize Alive failed.\n");
  2067. goto restart;
  2068. }
  2069. /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
  2070. * This is a paranoid check, because we would not have gotten the
  2071. * "initialize" alive if code weren't properly loaded. */
  2072. if (iwl3945_verify_ucode(priv)) {
  2073. /* Runtime instruction load was bad;
  2074. * take it all the way back down so we can try again */
  2075. IWL_DEBUG_INFO(priv, "Bad \"initialize\" uCode load.\n");
  2076. goto restart;
  2077. }
  2078. /* Send pointers to protocol/runtime uCode image ... init code will
  2079. * load and launch runtime uCode, which will send us another "Alive"
  2080. * notification. */
  2081. IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
  2082. if (iwl3945_set_ucode_ptrs(priv)) {
  2083. /* Runtime instruction load won't happen;
  2084. * take it all the way back down so we can try again */
  2085. IWL_DEBUG_INFO(priv, "Couldn't set up uCode pointers.\n");
  2086. goto restart;
  2087. }
  2088. return;
  2089. restart:
  2090. queue_work(priv->workqueue, &priv->restart);
  2091. }
  2092. /**
  2093. * iwl3945_alive_start - called after REPLY_ALIVE notification received
  2094. * from protocol/runtime uCode (initialization uCode's
  2095. * Alive gets handled by iwl3945_init_alive_start()).
  2096. */
  2097. static void iwl3945_alive_start(struct iwl_priv *priv)
  2098. {
  2099. int thermal_spin = 0;
  2100. u32 rfkill;
  2101. IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
  2102. if (priv->card_alive.is_valid != UCODE_VALID_OK) {
  2103. /* We had an error bringing up the hardware, so take it
  2104. * all the way back down so we can try again */
  2105. IWL_DEBUG_INFO(priv, "Alive failed.\n");
  2106. goto restart;
  2107. }
  2108. /* Initialize uCode has loaded Runtime uCode ... verify inst image.
  2109. * This is a paranoid check, because we would not have gotten the
  2110. * "runtime" alive if code weren't properly loaded. */
  2111. if (iwl3945_verify_ucode(priv)) {
  2112. /* Runtime instruction load was bad;
  2113. * take it all the way back down so we can try again */
  2114. IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
  2115. goto restart;
  2116. }
  2117. iwl_clear_stations_table(priv);
  2118. rfkill = iwl_read_prph(priv, APMG_RFKILL_REG);
  2119. IWL_DEBUG_INFO(priv, "RFKILL status: 0x%x\n", rfkill);
  2120. if (rfkill & 0x1) {
  2121. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  2122. /* if RFKILL is not on, then wait for thermal
  2123. * sensor in adapter to kick in */
  2124. while (iwl3945_hw_get_temperature(priv) == 0) {
  2125. thermal_spin++;
  2126. udelay(10);
  2127. }
  2128. if (thermal_spin)
  2129. IWL_DEBUG_INFO(priv, "Thermal calibration took %dus\n",
  2130. thermal_spin * 10);
  2131. } else
  2132. set_bit(STATUS_RF_KILL_HW, &priv->status);
  2133. /* After the ALIVE response, we can send commands to 3945 uCode */
  2134. set_bit(STATUS_ALIVE, &priv->status);
  2135. if (iwl_is_rfkill(priv))
  2136. return;
  2137. ieee80211_wake_queues(priv->hw);
  2138. priv->active_rate = priv->rates_mask;
  2139. priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
  2140. iwl_power_update_mode(priv, true);
  2141. if (iwl_is_associated(priv)) {
  2142. struct iwl3945_rxon_cmd *active_rxon =
  2143. (struct iwl3945_rxon_cmd *)(&priv->active_rxon);
  2144. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  2145. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2146. } else {
  2147. /* Initialize our rx_config data */
  2148. iwl_connection_init_rx_config(priv, priv->iw_mode);
  2149. }
  2150. /* Configure Bluetooth device coexistence support */
  2151. iwl_send_bt_config(priv);
  2152. /* Configure the adapter for unassociated operation */
  2153. iwlcore_commit_rxon(priv);
  2154. iwl3945_reg_txpower_periodic(priv);
  2155. iwl_leds_init(priv);
  2156. IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
  2157. set_bit(STATUS_READY, &priv->status);
  2158. wake_up_interruptible(&priv->wait_command_queue);
  2159. /* reassociate for ADHOC mode */
  2160. if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) {
  2161. struct sk_buff *beacon = ieee80211_beacon_get(priv->hw,
  2162. priv->vif);
  2163. if (beacon)
  2164. iwl_mac_beacon_update(priv->hw, beacon);
  2165. }
  2166. if (test_and_clear_bit(STATUS_MODE_PENDING, &priv->status))
  2167. iwl_set_mode(priv, priv->iw_mode);
  2168. return;
  2169. restart:
  2170. queue_work(priv->workqueue, &priv->restart);
  2171. }
  2172. static void iwl3945_cancel_deferred_work(struct iwl_priv *priv);
  2173. static void __iwl3945_down(struct iwl_priv *priv)
  2174. {
  2175. unsigned long flags;
  2176. int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
  2177. struct ieee80211_conf *conf = NULL;
  2178. IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
  2179. conf = ieee80211_get_hw_conf(priv->hw);
  2180. if (!exit_pending)
  2181. set_bit(STATUS_EXIT_PENDING, &priv->status);
  2182. iwl_clear_stations_table(priv);
  2183. /* Unblock any waiting calls */
  2184. wake_up_interruptible_all(&priv->wait_command_queue);
  2185. /* Wipe out the EXIT_PENDING status bit if we are not actually
  2186. * exiting the module */
  2187. if (!exit_pending)
  2188. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  2189. /* stop and reset the on-board processor */
  2190. iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  2191. /* tell the device to stop sending interrupts */
  2192. spin_lock_irqsave(&priv->lock, flags);
  2193. iwl_disable_interrupts(priv);
  2194. spin_unlock_irqrestore(&priv->lock, flags);
  2195. iwl_synchronize_irq(priv);
  2196. if (priv->mac80211_registered)
  2197. ieee80211_stop_queues(priv->hw);
  2198. /* If we have not previously called iwl3945_init() then
  2199. * clear all bits but the RF Kill bits and return */
  2200. if (!iwl_is_init(priv)) {
  2201. priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  2202. STATUS_RF_KILL_HW |
  2203. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  2204. STATUS_GEO_CONFIGURED |
  2205. test_bit(STATUS_EXIT_PENDING, &priv->status) <<
  2206. STATUS_EXIT_PENDING;
  2207. goto exit;
  2208. }
  2209. /* ...otherwise clear out all the status bits but the RF Kill
  2210. * bit and continue taking the NIC down. */
  2211. priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  2212. STATUS_RF_KILL_HW |
  2213. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  2214. STATUS_GEO_CONFIGURED |
  2215. test_bit(STATUS_FW_ERROR, &priv->status) <<
  2216. STATUS_FW_ERROR |
  2217. test_bit(STATUS_EXIT_PENDING, &priv->status) <<
  2218. STATUS_EXIT_PENDING;
  2219. iwl3945_hw_txq_ctx_stop(priv);
  2220. iwl3945_hw_rxq_stop(priv);
  2221. /* Power-down device's busmaster DMA clocks */
  2222. iwl_write_prph(priv, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT);
  2223. udelay(5);
  2224. /* Stop the device, and put it in low power state */
  2225. priv->cfg->ops->lib->apm_ops.stop(priv);
  2226. exit:
  2227. memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
  2228. if (priv->ibss_beacon)
  2229. dev_kfree_skb(priv->ibss_beacon);
  2230. priv->ibss_beacon = NULL;
  2231. /* clear out any free frames */
  2232. iwl3945_clear_free_frames(priv);
  2233. }
  2234. static void iwl3945_down(struct iwl_priv *priv)
  2235. {
  2236. mutex_lock(&priv->mutex);
  2237. __iwl3945_down(priv);
  2238. mutex_unlock(&priv->mutex);
  2239. iwl3945_cancel_deferred_work(priv);
  2240. }
  2241. #define MAX_HW_RESTARTS 5
  2242. static int __iwl3945_up(struct iwl_priv *priv)
  2243. {
  2244. int rc, i;
  2245. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  2246. IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
  2247. return -EIO;
  2248. }
  2249. if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
  2250. IWL_ERR(priv, "ucode not available for device bring up\n");
  2251. return -EIO;
  2252. }
  2253. /* If platform's RF_KILL switch is NOT set to KILL */
  2254. if (iwl_read32(priv, CSR_GP_CNTRL) &
  2255. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
  2256. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  2257. else {
  2258. set_bit(STATUS_RF_KILL_HW, &priv->status);
  2259. IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
  2260. return -ENODEV;
  2261. }
  2262. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  2263. rc = iwl3945_hw_nic_init(priv);
  2264. if (rc) {
  2265. IWL_ERR(priv, "Unable to int nic\n");
  2266. return rc;
  2267. }
  2268. /* make sure rfkill handshake bits are cleared */
  2269. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2270. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  2271. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  2272. /* clear (again), then enable host interrupts */
  2273. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  2274. iwl_enable_interrupts(priv);
  2275. /* really make sure rfkill handshake bits are cleared */
  2276. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2277. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2278. /* Copy original ucode data image from disk into backup cache.
  2279. * This will be used to initialize the on-board processor's
  2280. * data SRAM for a clean start when the runtime program first loads. */
  2281. memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
  2282. priv->ucode_data.len);
  2283. /* We return success when we resume from suspend and rf_kill is on. */
  2284. if (test_bit(STATUS_RF_KILL_HW, &priv->status))
  2285. return 0;
  2286. for (i = 0; i < MAX_HW_RESTARTS; i++) {
  2287. iwl_clear_stations_table(priv);
  2288. /* load bootstrap state machine,
  2289. * load bootstrap program into processor's memory,
  2290. * prepare to load the "initialize" uCode */
  2291. priv->cfg->ops->lib->load_ucode(priv);
  2292. if (rc) {
  2293. IWL_ERR(priv,
  2294. "Unable to set up bootstrap uCode: %d\n", rc);
  2295. continue;
  2296. }
  2297. /* start card; "initialize" will load runtime ucode */
  2298. iwl3945_nic_start(priv);
  2299. IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
  2300. return 0;
  2301. }
  2302. set_bit(STATUS_EXIT_PENDING, &priv->status);
  2303. __iwl3945_down(priv);
  2304. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  2305. /* tried to restart and config the device for as long as our
  2306. * patience could withstand */
  2307. IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
  2308. return -EIO;
  2309. }
  2310. /*****************************************************************************
  2311. *
  2312. * Workqueue callbacks
  2313. *
  2314. *****************************************************************************/
  2315. static void iwl3945_bg_init_alive_start(struct work_struct *data)
  2316. {
  2317. struct iwl_priv *priv =
  2318. container_of(data, struct iwl_priv, init_alive_start.work);
  2319. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2320. return;
  2321. mutex_lock(&priv->mutex);
  2322. iwl3945_init_alive_start(priv);
  2323. mutex_unlock(&priv->mutex);
  2324. }
  2325. static void iwl3945_bg_alive_start(struct work_struct *data)
  2326. {
  2327. struct iwl_priv *priv =
  2328. container_of(data, struct iwl_priv, alive_start.work);
  2329. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2330. return;
  2331. mutex_lock(&priv->mutex);
  2332. iwl3945_alive_start(priv);
  2333. mutex_unlock(&priv->mutex);
  2334. }
  2335. /*
  2336. * 3945 cannot interrupt driver when hardware rf kill switch toggles;
  2337. * driver must poll CSR_GP_CNTRL_REG register for change. This register
  2338. * *is* readable even when device has been SW_RESET into low power mode
  2339. * (e.g. during RF KILL).
  2340. */
  2341. static void iwl3945_rfkill_poll(struct work_struct *data)
  2342. {
  2343. struct iwl_priv *priv =
  2344. container_of(data, struct iwl_priv, rfkill_poll.work);
  2345. bool old_rfkill = test_bit(STATUS_RF_KILL_HW, &priv->status);
  2346. bool new_rfkill = !(iwl_read32(priv, CSR_GP_CNTRL)
  2347. & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW);
  2348. if (new_rfkill != old_rfkill) {
  2349. if (new_rfkill)
  2350. set_bit(STATUS_RF_KILL_HW, &priv->status);
  2351. else
  2352. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  2353. wiphy_rfkill_set_hw_state(priv->hw->wiphy, new_rfkill);
  2354. IWL_DEBUG_RF_KILL(priv, "RF_KILL bit toggled to %s.\n",
  2355. new_rfkill ? "disable radio" : "enable radio");
  2356. }
  2357. /* Keep this running, even if radio now enabled. This will be
  2358. * cancelled in mac_start() if system decides to start again */
  2359. queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
  2360. round_jiffies_relative(2 * HZ));
  2361. }
  2362. #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
  2363. static void iwl3945_bg_request_scan(struct work_struct *data)
  2364. {
  2365. struct iwl_priv *priv =
  2366. container_of(data, struct iwl_priv, request_scan);
  2367. struct iwl_host_cmd cmd = {
  2368. .id = REPLY_SCAN_CMD,
  2369. .len = sizeof(struct iwl3945_scan_cmd),
  2370. .flags = CMD_SIZE_HUGE,
  2371. };
  2372. int rc = 0;
  2373. struct iwl3945_scan_cmd *scan;
  2374. struct ieee80211_conf *conf = NULL;
  2375. u8 n_probes = 0;
  2376. enum ieee80211_band band;
  2377. bool is_active = false;
  2378. conf = ieee80211_get_hw_conf(priv->hw);
  2379. mutex_lock(&priv->mutex);
  2380. cancel_delayed_work(&priv->scan_check);
  2381. if (!iwl_is_ready(priv)) {
  2382. IWL_WARN(priv, "request scan called when driver not ready.\n");
  2383. goto done;
  2384. }
  2385. /* Make sure the scan wasn't canceled before this queued work
  2386. * was given the chance to run... */
  2387. if (!test_bit(STATUS_SCANNING, &priv->status))
  2388. goto done;
  2389. /* This should never be called or scheduled if there is currently
  2390. * a scan active in the hardware. */
  2391. if (test_bit(STATUS_SCAN_HW, &priv->status)) {
  2392. IWL_DEBUG_INFO(priv, "Multiple concurrent scan requests "
  2393. "Ignoring second request.\n");
  2394. rc = -EIO;
  2395. goto done;
  2396. }
  2397. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  2398. IWL_DEBUG_SCAN(priv, "Aborting scan due to device shutdown\n");
  2399. goto done;
  2400. }
  2401. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  2402. IWL_DEBUG_HC(priv,
  2403. "Scan request while abort pending. Queuing.\n");
  2404. goto done;
  2405. }
  2406. if (iwl_is_rfkill(priv)) {
  2407. IWL_DEBUG_HC(priv, "Aborting scan due to RF Kill activation\n");
  2408. goto done;
  2409. }
  2410. if (!test_bit(STATUS_READY, &priv->status)) {
  2411. IWL_DEBUG_HC(priv,
  2412. "Scan request while uninitialized. Queuing.\n");
  2413. goto done;
  2414. }
  2415. if (!priv->scan_bands) {
  2416. IWL_DEBUG_HC(priv, "Aborting scan due to no requested bands\n");
  2417. goto done;
  2418. }
  2419. if (!priv->scan) {
  2420. priv->scan = kmalloc(sizeof(struct iwl3945_scan_cmd) +
  2421. IWL_MAX_SCAN_SIZE, GFP_KERNEL);
  2422. if (!priv->scan) {
  2423. rc = -ENOMEM;
  2424. goto done;
  2425. }
  2426. }
  2427. scan = priv->scan;
  2428. memset(scan, 0, sizeof(struct iwl3945_scan_cmd) + IWL_MAX_SCAN_SIZE);
  2429. scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
  2430. scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
  2431. if (iwl_is_associated(priv)) {
  2432. u16 interval = 0;
  2433. u32 extra;
  2434. u32 suspend_time = 100;
  2435. u32 scan_suspend_time = 100;
  2436. unsigned long flags;
  2437. IWL_DEBUG_INFO(priv, "Scanning while associated...\n");
  2438. spin_lock_irqsave(&priv->lock, flags);
  2439. interval = priv->beacon_int;
  2440. spin_unlock_irqrestore(&priv->lock, flags);
  2441. scan->suspend_time = 0;
  2442. scan->max_out_time = cpu_to_le32(200 * 1024);
  2443. if (!interval)
  2444. interval = suspend_time;
  2445. /*
  2446. * suspend time format:
  2447. * 0-19: beacon interval in usec (time before exec.)
  2448. * 20-23: 0
  2449. * 24-31: number of beacons (suspend between channels)
  2450. */
  2451. extra = (suspend_time / interval) << 24;
  2452. scan_suspend_time = 0xFF0FFFFF &
  2453. (extra | ((suspend_time % interval) * 1024));
  2454. scan->suspend_time = cpu_to_le32(scan_suspend_time);
  2455. IWL_DEBUG_SCAN(priv, "suspend_time 0x%X beacon interval %d\n",
  2456. scan_suspend_time, interval);
  2457. }
  2458. if (priv->scan_request->n_ssids) {
  2459. int i, p = 0;
  2460. IWL_DEBUG_SCAN(priv, "Kicking off active scan\n");
  2461. for (i = 0; i < priv->scan_request->n_ssids; i++) {
  2462. /* always does wildcard anyway */
  2463. if (!priv->scan_request->ssids[i].ssid_len)
  2464. continue;
  2465. scan->direct_scan[p].id = WLAN_EID_SSID;
  2466. scan->direct_scan[p].len =
  2467. priv->scan_request->ssids[i].ssid_len;
  2468. memcpy(scan->direct_scan[p].ssid,
  2469. priv->scan_request->ssids[i].ssid,
  2470. priv->scan_request->ssids[i].ssid_len);
  2471. n_probes++;
  2472. p++;
  2473. }
  2474. is_active = true;
  2475. } else
  2476. IWL_DEBUG_SCAN(priv, "Kicking off passive scan.\n");
  2477. /* We don't build a direct scan probe request; the uCode will do
  2478. * that based on the direct_mask added to each channel entry */
  2479. scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
  2480. scan->tx_cmd.sta_id = priv->hw_params.bcast_sta_id;
  2481. scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  2482. /* flags + rate selection */
  2483. if (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ)) {
  2484. scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
  2485. scan->tx_cmd.rate = IWL_RATE_1M_PLCP;
  2486. scan->good_CRC_th = 0;
  2487. band = IEEE80211_BAND_2GHZ;
  2488. } else if (priv->scan_bands & BIT(IEEE80211_BAND_5GHZ)) {
  2489. scan->tx_cmd.rate = IWL_RATE_6M_PLCP;
  2490. /*
  2491. * If active scaning is requested but a certain channel
  2492. * is marked passive, we can do active scanning if we
  2493. * detect transmissions.
  2494. */
  2495. scan->good_CRC_th = is_active ? IWL_GOOD_CRC_TH : 0;
  2496. band = IEEE80211_BAND_5GHZ;
  2497. } else {
  2498. IWL_WARN(priv, "Invalid scan band count\n");
  2499. goto done;
  2500. }
  2501. scan->tx_cmd.len = cpu_to_le16(
  2502. iwl_fill_probe_req(priv,
  2503. (struct ieee80211_mgmt *)scan->data,
  2504. priv->scan_request->ie,
  2505. priv->scan_request->ie_len,
  2506. IWL_MAX_SCAN_SIZE - sizeof(*scan)));
  2507. /* select Rx antennas */
  2508. scan->flags |= iwl3945_get_antenna_flags(priv);
  2509. if (iwl_is_monitor_mode(priv))
  2510. scan->filter_flags = RXON_FILTER_PROMISC_MSK;
  2511. scan->channel_count =
  2512. iwl3945_get_channels_for_scan(priv, band, is_active, n_probes,
  2513. (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
  2514. if (scan->channel_count == 0) {
  2515. IWL_DEBUG_SCAN(priv, "channel count %d\n", scan->channel_count);
  2516. goto done;
  2517. }
  2518. cmd.len += le16_to_cpu(scan->tx_cmd.len) +
  2519. scan->channel_count * sizeof(struct iwl3945_scan_channel);
  2520. cmd.data = scan;
  2521. scan->len = cpu_to_le16(cmd.len);
  2522. set_bit(STATUS_SCAN_HW, &priv->status);
  2523. rc = iwl_send_cmd_sync(priv, &cmd);
  2524. if (rc)
  2525. goto done;
  2526. queue_delayed_work(priv->workqueue, &priv->scan_check,
  2527. IWL_SCAN_CHECK_WATCHDOG);
  2528. mutex_unlock(&priv->mutex);
  2529. return;
  2530. done:
  2531. /* can not perform scan make sure we clear scanning
  2532. * bits from status so next scan request can be performed.
  2533. * if we dont clear scanning status bit here all next scan
  2534. * will fail
  2535. */
  2536. clear_bit(STATUS_SCAN_HW, &priv->status);
  2537. clear_bit(STATUS_SCANNING, &priv->status);
  2538. /* inform mac80211 scan aborted */
  2539. queue_work(priv->workqueue, &priv->scan_completed);
  2540. mutex_unlock(&priv->mutex);
  2541. }
  2542. static void iwl3945_bg_restart(struct work_struct *data)
  2543. {
  2544. struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
  2545. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2546. return;
  2547. if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
  2548. mutex_lock(&priv->mutex);
  2549. priv->vif = NULL;
  2550. priv->is_open = 0;
  2551. mutex_unlock(&priv->mutex);
  2552. iwl3945_down(priv);
  2553. ieee80211_restart_hw(priv->hw);
  2554. } else {
  2555. iwl3945_down(priv);
  2556. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2557. return;
  2558. mutex_lock(&priv->mutex);
  2559. __iwl3945_up(priv);
  2560. mutex_unlock(&priv->mutex);
  2561. }
  2562. }
  2563. static void iwl3945_bg_rx_replenish(struct work_struct *data)
  2564. {
  2565. struct iwl_priv *priv =
  2566. container_of(data, struct iwl_priv, rx_replenish);
  2567. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2568. return;
  2569. mutex_lock(&priv->mutex);
  2570. iwl3945_rx_replenish(priv);
  2571. mutex_unlock(&priv->mutex);
  2572. }
  2573. #define IWL_DELAY_NEXT_SCAN (HZ*2)
  2574. void iwl3945_post_associate(struct iwl_priv *priv)
  2575. {
  2576. int rc = 0;
  2577. struct ieee80211_conf *conf = NULL;
  2578. if (priv->iw_mode == NL80211_IFTYPE_AP) {
  2579. IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
  2580. return;
  2581. }
  2582. IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
  2583. priv->assoc_id, priv->active_rxon.bssid_addr);
  2584. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2585. return;
  2586. if (!priv->vif || !priv->is_open)
  2587. return;
  2588. iwl_scan_cancel_timeout(priv, 200);
  2589. conf = ieee80211_get_hw_conf(priv->hw);
  2590. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2591. iwlcore_commit_rxon(priv);
  2592. memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
  2593. iwl_setup_rxon_timing(priv);
  2594. rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  2595. sizeof(priv->rxon_timing), &priv->rxon_timing);
  2596. if (rc)
  2597. IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
  2598. "Attempting to continue.\n");
  2599. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  2600. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  2601. IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
  2602. priv->assoc_id, priv->beacon_int);
  2603. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  2604. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  2605. else
  2606. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2607. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  2608. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  2609. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  2610. else
  2611. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2612. if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
  2613. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2614. }
  2615. iwlcore_commit_rxon(priv);
  2616. switch (priv->iw_mode) {
  2617. case NL80211_IFTYPE_STATION:
  2618. iwl3945_rate_scale_init(priv->hw, IWL_AP_ID);
  2619. break;
  2620. case NL80211_IFTYPE_ADHOC:
  2621. priv->assoc_id = 1;
  2622. iwl_add_station(priv, priv->bssid, 0, CMD_SYNC, NULL);
  2623. iwl3945_sync_sta(priv, IWL_STA_ID,
  2624. (priv->band == IEEE80211_BAND_5GHZ) ?
  2625. IWL_RATE_6M_PLCP : IWL_RATE_1M_PLCP,
  2626. CMD_ASYNC);
  2627. iwl3945_rate_scale_init(priv->hw, IWL_STA_ID);
  2628. iwl3945_send_beacon_cmd(priv);
  2629. break;
  2630. default:
  2631. IWL_ERR(priv, "%s Should not be called in %d mode\n",
  2632. __func__, priv->iw_mode);
  2633. break;
  2634. }
  2635. iwl_activate_qos(priv, 0);
  2636. /* we have just associated, don't start scan too early */
  2637. priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
  2638. }
  2639. /*****************************************************************************
  2640. *
  2641. * mac80211 entry point functions
  2642. *
  2643. *****************************************************************************/
  2644. #define UCODE_READY_TIMEOUT (2 * HZ)
  2645. static int iwl3945_mac_start(struct ieee80211_hw *hw)
  2646. {
  2647. struct iwl_priv *priv = hw->priv;
  2648. int ret;
  2649. IWL_DEBUG_MAC80211(priv, "enter\n");
  2650. /* we should be verifying the device is ready to be opened */
  2651. mutex_lock(&priv->mutex);
  2652. /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
  2653. * ucode filename and max sizes are card-specific. */
  2654. if (!priv->ucode_code.len) {
  2655. ret = iwl3945_read_ucode(priv);
  2656. if (ret) {
  2657. IWL_ERR(priv, "Could not read microcode: %d\n", ret);
  2658. mutex_unlock(&priv->mutex);
  2659. goto out_release_irq;
  2660. }
  2661. }
  2662. ret = __iwl3945_up(priv);
  2663. mutex_unlock(&priv->mutex);
  2664. if (ret)
  2665. goto out_release_irq;
  2666. IWL_DEBUG_INFO(priv, "Start UP work.\n");
  2667. /* Wait for START_ALIVE from ucode. Otherwise callbacks from
  2668. * mac80211 will not be run successfully. */
  2669. ret = wait_event_interruptible_timeout(priv->wait_command_queue,
  2670. test_bit(STATUS_READY, &priv->status),
  2671. UCODE_READY_TIMEOUT);
  2672. if (!ret) {
  2673. if (!test_bit(STATUS_READY, &priv->status)) {
  2674. IWL_ERR(priv,
  2675. "Wait for START_ALIVE timeout after %dms.\n",
  2676. jiffies_to_msecs(UCODE_READY_TIMEOUT));
  2677. ret = -ETIMEDOUT;
  2678. goto out_release_irq;
  2679. }
  2680. }
  2681. /* ucode is running and will send rfkill notifications,
  2682. * no need to poll the killswitch state anymore */
  2683. cancel_delayed_work(&priv->rfkill_poll);
  2684. iwl_led_start(priv);
  2685. priv->is_open = 1;
  2686. IWL_DEBUG_MAC80211(priv, "leave\n");
  2687. return 0;
  2688. out_release_irq:
  2689. priv->is_open = 0;
  2690. IWL_DEBUG_MAC80211(priv, "leave - failed\n");
  2691. return ret;
  2692. }
  2693. static void iwl3945_mac_stop(struct ieee80211_hw *hw)
  2694. {
  2695. struct iwl_priv *priv = hw->priv;
  2696. IWL_DEBUG_MAC80211(priv, "enter\n");
  2697. if (!priv->is_open) {
  2698. IWL_DEBUG_MAC80211(priv, "leave - skip\n");
  2699. return;
  2700. }
  2701. priv->is_open = 0;
  2702. if (iwl_is_ready_rf(priv)) {
  2703. /* stop mac, cancel any scan request and clear
  2704. * RXON_FILTER_ASSOC_MSK BIT
  2705. */
  2706. mutex_lock(&priv->mutex);
  2707. iwl_scan_cancel_timeout(priv, 100);
  2708. mutex_unlock(&priv->mutex);
  2709. }
  2710. iwl3945_down(priv);
  2711. flush_workqueue(priv->workqueue);
  2712. /* start polling the killswitch state again */
  2713. queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
  2714. round_jiffies_relative(2 * HZ));
  2715. IWL_DEBUG_MAC80211(priv, "leave\n");
  2716. }
  2717. static int iwl3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
  2718. {
  2719. struct iwl_priv *priv = hw->priv;
  2720. IWL_DEBUG_MAC80211(priv, "enter\n");
  2721. IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
  2722. ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
  2723. if (iwl3945_tx_skb(priv, skb))
  2724. dev_kfree_skb_any(skb);
  2725. IWL_DEBUG_MAC80211(priv, "leave\n");
  2726. return NETDEV_TX_OK;
  2727. }
  2728. void iwl3945_config_ap(struct iwl_priv *priv)
  2729. {
  2730. int rc = 0;
  2731. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2732. return;
  2733. /* The following should be done only at AP bring up */
  2734. if (!(iwl_is_associated(priv))) {
  2735. /* RXON - unassoc (to set timing command) */
  2736. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2737. iwlcore_commit_rxon(priv);
  2738. /* RXON Timing */
  2739. memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
  2740. iwl_setup_rxon_timing(priv);
  2741. rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  2742. sizeof(priv->rxon_timing),
  2743. &priv->rxon_timing);
  2744. if (rc)
  2745. IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
  2746. "Attempting to continue.\n");
  2747. /* FIXME: what should be the assoc_id for AP? */
  2748. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  2749. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  2750. priv->staging_rxon.flags |=
  2751. RXON_FLG_SHORT_PREAMBLE_MSK;
  2752. else
  2753. priv->staging_rxon.flags &=
  2754. ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2755. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  2756. if (priv->assoc_capability &
  2757. WLAN_CAPABILITY_SHORT_SLOT_TIME)
  2758. priv->staging_rxon.flags |=
  2759. RXON_FLG_SHORT_SLOT_MSK;
  2760. else
  2761. priv->staging_rxon.flags &=
  2762. ~RXON_FLG_SHORT_SLOT_MSK;
  2763. if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
  2764. priv->staging_rxon.flags &=
  2765. ~RXON_FLG_SHORT_SLOT_MSK;
  2766. }
  2767. /* restore RXON assoc */
  2768. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  2769. iwlcore_commit_rxon(priv);
  2770. iwl_add_station(priv, iwl_bcast_addr, 0, CMD_SYNC, NULL);
  2771. }
  2772. iwl3945_send_beacon_cmd(priv);
  2773. /* FIXME - we need to add code here to detect a totally new
  2774. * configuration, reset the AP, unassoc, rxon timing, assoc,
  2775. * clear sta table, add BCAST sta... */
  2776. }
  2777. static int iwl3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
  2778. struct ieee80211_vif *vif,
  2779. struct ieee80211_sta *sta,
  2780. struct ieee80211_key_conf *key)
  2781. {
  2782. struct iwl_priv *priv = hw->priv;
  2783. const u8 *addr;
  2784. int ret = 0;
  2785. u8 sta_id = IWL_INVALID_STATION;
  2786. u8 static_key;
  2787. IWL_DEBUG_MAC80211(priv, "enter\n");
  2788. if (iwl3945_mod_params.sw_crypto) {
  2789. IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
  2790. return -EOPNOTSUPP;
  2791. }
  2792. addr = sta ? sta->addr : iwl_bcast_addr;
  2793. static_key = !iwl_is_associated(priv);
  2794. if (!static_key) {
  2795. sta_id = iwl_find_station(priv, addr);
  2796. if (sta_id == IWL_INVALID_STATION) {
  2797. IWL_DEBUG_MAC80211(priv, "leave - %pM not in station map.\n",
  2798. addr);
  2799. return -EINVAL;
  2800. }
  2801. }
  2802. mutex_lock(&priv->mutex);
  2803. iwl_scan_cancel_timeout(priv, 100);
  2804. mutex_unlock(&priv->mutex);
  2805. switch (cmd) {
  2806. case SET_KEY:
  2807. if (static_key)
  2808. ret = iwl3945_set_static_key(priv, key);
  2809. else
  2810. ret = iwl3945_set_dynamic_key(priv, key, sta_id);
  2811. IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
  2812. break;
  2813. case DISABLE_KEY:
  2814. if (static_key)
  2815. ret = iwl3945_remove_static_key(priv);
  2816. else
  2817. ret = iwl3945_clear_sta_key_info(priv, sta_id);
  2818. IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
  2819. break;
  2820. default:
  2821. ret = -EINVAL;
  2822. }
  2823. IWL_DEBUG_MAC80211(priv, "leave\n");
  2824. return ret;
  2825. }
  2826. /*****************************************************************************
  2827. *
  2828. * sysfs attributes
  2829. *
  2830. *****************************************************************************/
  2831. #ifdef CONFIG_IWLWIFI_DEBUG
  2832. /*
  2833. * The following adds a new attribute to the sysfs representation
  2834. * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
  2835. * used for controlling the debug level.
  2836. *
  2837. * See the level definitions in iwl for details.
  2838. *
  2839. * The debug_level being managed using sysfs below is a per device debug
  2840. * level that is used instead of the global debug level if it (the per
  2841. * device debug level) is set.
  2842. */
  2843. static ssize_t show_debug_level(struct device *d,
  2844. struct device_attribute *attr, char *buf)
  2845. {
  2846. struct iwl_priv *priv = dev_get_drvdata(d);
  2847. return sprintf(buf, "0x%08X\n", iwl_get_debug_level(priv));
  2848. }
  2849. static ssize_t store_debug_level(struct device *d,
  2850. struct device_attribute *attr,
  2851. const char *buf, size_t count)
  2852. {
  2853. struct iwl_priv *priv = dev_get_drvdata(d);
  2854. unsigned long val;
  2855. int ret;
  2856. ret = strict_strtoul(buf, 0, &val);
  2857. if (ret)
  2858. IWL_INFO(priv, "%s is not in hex or decimal form.\n", buf);
  2859. else {
  2860. priv->debug_level = val;
  2861. if (iwl_alloc_traffic_mem(priv))
  2862. IWL_ERR(priv,
  2863. "Not enough memory to generate traffic log\n");
  2864. }
  2865. return strnlen(buf, count);
  2866. }
  2867. static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
  2868. show_debug_level, store_debug_level);
  2869. #endif /* CONFIG_IWLWIFI_DEBUG */
  2870. static ssize_t show_temperature(struct device *d,
  2871. struct device_attribute *attr, char *buf)
  2872. {
  2873. struct iwl_priv *priv = dev_get_drvdata(d);
  2874. if (!iwl_is_alive(priv))
  2875. return -EAGAIN;
  2876. return sprintf(buf, "%d\n", iwl3945_hw_get_temperature(priv));
  2877. }
  2878. static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
  2879. static ssize_t show_tx_power(struct device *d,
  2880. struct device_attribute *attr, char *buf)
  2881. {
  2882. struct iwl_priv *priv = dev_get_drvdata(d);
  2883. return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
  2884. }
  2885. static ssize_t store_tx_power(struct device *d,
  2886. struct device_attribute *attr,
  2887. const char *buf, size_t count)
  2888. {
  2889. struct iwl_priv *priv = dev_get_drvdata(d);
  2890. char *p = (char *)buf;
  2891. u32 val;
  2892. val = simple_strtoul(p, &p, 10);
  2893. if (p == buf)
  2894. IWL_INFO(priv, ": %s is not in decimal form.\n", buf);
  2895. else
  2896. iwl3945_hw_reg_set_txpower(priv, val);
  2897. return count;
  2898. }
  2899. static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
  2900. static ssize_t show_flags(struct device *d,
  2901. struct device_attribute *attr, char *buf)
  2902. {
  2903. struct iwl_priv *priv = dev_get_drvdata(d);
  2904. return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
  2905. }
  2906. static ssize_t store_flags(struct device *d,
  2907. struct device_attribute *attr,
  2908. const char *buf, size_t count)
  2909. {
  2910. struct iwl_priv *priv = dev_get_drvdata(d);
  2911. u32 flags = simple_strtoul(buf, NULL, 0);
  2912. mutex_lock(&priv->mutex);
  2913. if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
  2914. /* Cancel any currently running scans... */
  2915. if (iwl_scan_cancel_timeout(priv, 100))
  2916. IWL_WARN(priv, "Could not cancel scan.\n");
  2917. else {
  2918. IWL_DEBUG_INFO(priv, "Committing rxon.flags = 0x%04X\n",
  2919. flags);
  2920. priv->staging_rxon.flags = cpu_to_le32(flags);
  2921. iwlcore_commit_rxon(priv);
  2922. }
  2923. }
  2924. mutex_unlock(&priv->mutex);
  2925. return count;
  2926. }
  2927. static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
  2928. static ssize_t show_filter_flags(struct device *d,
  2929. struct device_attribute *attr, char *buf)
  2930. {
  2931. struct iwl_priv *priv = dev_get_drvdata(d);
  2932. return sprintf(buf, "0x%04X\n",
  2933. le32_to_cpu(priv->active_rxon.filter_flags));
  2934. }
  2935. static ssize_t store_filter_flags(struct device *d,
  2936. struct device_attribute *attr,
  2937. const char *buf, size_t count)
  2938. {
  2939. struct iwl_priv *priv = dev_get_drvdata(d);
  2940. u32 filter_flags = simple_strtoul(buf, NULL, 0);
  2941. mutex_lock(&priv->mutex);
  2942. if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
  2943. /* Cancel any currently running scans... */
  2944. if (iwl_scan_cancel_timeout(priv, 100))
  2945. IWL_WARN(priv, "Could not cancel scan.\n");
  2946. else {
  2947. IWL_DEBUG_INFO(priv, "Committing rxon.filter_flags = "
  2948. "0x%04X\n", filter_flags);
  2949. priv->staging_rxon.filter_flags =
  2950. cpu_to_le32(filter_flags);
  2951. iwlcore_commit_rxon(priv);
  2952. }
  2953. }
  2954. mutex_unlock(&priv->mutex);
  2955. return count;
  2956. }
  2957. static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
  2958. store_filter_flags);
  2959. static ssize_t show_measurement(struct device *d,
  2960. struct device_attribute *attr, char *buf)
  2961. {
  2962. struct iwl_priv *priv = dev_get_drvdata(d);
  2963. struct iwl_spectrum_notification measure_report;
  2964. u32 size = sizeof(measure_report), len = 0, ofs = 0;
  2965. u8 *data = (u8 *)&measure_report;
  2966. unsigned long flags;
  2967. spin_lock_irqsave(&priv->lock, flags);
  2968. if (!(priv->measurement_status & MEASUREMENT_READY)) {
  2969. spin_unlock_irqrestore(&priv->lock, flags);
  2970. return 0;
  2971. }
  2972. memcpy(&measure_report, &priv->measure_report, size);
  2973. priv->measurement_status = 0;
  2974. spin_unlock_irqrestore(&priv->lock, flags);
  2975. while (size && (PAGE_SIZE - len)) {
  2976. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  2977. PAGE_SIZE - len, 1);
  2978. len = strlen(buf);
  2979. if (PAGE_SIZE - len)
  2980. buf[len++] = '\n';
  2981. ofs += 16;
  2982. size -= min(size, 16U);
  2983. }
  2984. return len;
  2985. }
  2986. static ssize_t store_measurement(struct device *d,
  2987. struct device_attribute *attr,
  2988. const char *buf, size_t count)
  2989. {
  2990. struct iwl_priv *priv = dev_get_drvdata(d);
  2991. struct ieee80211_measurement_params params = {
  2992. .channel = le16_to_cpu(priv->active_rxon.channel),
  2993. .start_time = cpu_to_le64(priv->last_tsf),
  2994. .duration = cpu_to_le16(1),
  2995. };
  2996. u8 type = IWL_MEASURE_BASIC;
  2997. u8 buffer[32];
  2998. u8 channel;
  2999. if (count) {
  3000. char *p = buffer;
  3001. strncpy(buffer, buf, min(sizeof(buffer), count));
  3002. channel = simple_strtoul(p, NULL, 0);
  3003. if (channel)
  3004. params.channel = channel;
  3005. p = buffer;
  3006. while (*p && *p != ' ')
  3007. p++;
  3008. if (*p)
  3009. type = simple_strtoul(p + 1, NULL, 0);
  3010. }
  3011. IWL_DEBUG_INFO(priv, "Invoking measurement of type %d on "
  3012. "channel %d (for '%s')\n", type, params.channel, buf);
  3013. iwl3945_get_measurement(priv, &params, type);
  3014. return count;
  3015. }
  3016. static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
  3017. show_measurement, store_measurement);
  3018. static ssize_t store_retry_rate(struct device *d,
  3019. struct device_attribute *attr,
  3020. const char *buf, size_t count)
  3021. {
  3022. struct iwl_priv *priv = dev_get_drvdata(d);
  3023. priv->retry_rate = simple_strtoul(buf, NULL, 0);
  3024. if (priv->retry_rate <= 0)
  3025. priv->retry_rate = 1;
  3026. return count;
  3027. }
  3028. static ssize_t show_retry_rate(struct device *d,
  3029. struct device_attribute *attr, char *buf)
  3030. {
  3031. struct iwl_priv *priv = dev_get_drvdata(d);
  3032. return sprintf(buf, "%d", priv->retry_rate);
  3033. }
  3034. static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
  3035. store_retry_rate);
  3036. static ssize_t show_channels(struct device *d,
  3037. struct device_attribute *attr, char *buf)
  3038. {
  3039. /* all this shit doesn't belong into sysfs anyway */
  3040. return 0;
  3041. }
  3042. static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
  3043. static ssize_t show_statistics(struct device *d,
  3044. struct device_attribute *attr, char *buf)
  3045. {
  3046. struct iwl_priv *priv = dev_get_drvdata(d);
  3047. u32 size = sizeof(struct iwl3945_notif_statistics);
  3048. u32 len = 0, ofs = 0;
  3049. u8 *data = (u8 *)&priv->statistics_39;
  3050. int rc = 0;
  3051. if (!iwl_is_alive(priv))
  3052. return -EAGAIN;
  3053. mutex_lock(&priv->mutex);
  3054. rc = iwl_send_statistics_request(priv, CMD_SYNC, false);
  3055. mutex_unlock(&priv->mutex);
  3056. if (rc) {
  3057. len = sprintf(buf,
  3058. "Error sending statistics request: 0x%08X\n", rc);
  3059. return len;
  3060. }
  3061. while (size && (PAGE_SIZE - len)) {
  3062. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  3063. PAGE_SIZE - len, 1);
  3064. len = strlen(buf);
  3065. if (PAGE_SIZE - len)
  3066. buf[len++] = '\n';
  3067. ofs += 16;
  3068. size -= min(size, 16U);
  3069. }
  3070. return len;
  3071. }
  3072. static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
  3073. static ssize_t show_antenna(struct device *d,
  3074. struct device_attribute *attr, char *buf)
  3075. {
  3076. struct iwl_priv *priv = dev_get_drvdata(d);
  3077. if (!iwl_is_alive(priv))
  3078. return -EAGAIN;
  3079. return sprintf(buf, "%d\n", iwl3945_mod_params.antenna);
  3080. }
  3081. static ssize_t store_antenna(struct device *d,
  3082. struct device_attribute *attr,
  3083. const char *buf, size_t count)
  3084. {
  3085. struct iwl_priv *priv __maybe_unused = dev_get_drvdata(d);
  3086. int ant;
  3087. if (count == 0)
  3088. return 0;
  3089. if (sscanf(buf, "%1i", &ant) != 1) {
  3090. IWL_DEBUG_INFO(priv, "not in hex or decimal form.\n");
  3091. return count;
  3092. }
  3093. if ((ant >= 0) && (ant <= 2)) {
  3094. IWL_DEBUG_INFO(priv, "Setting antenna select to %d.\n", ant);
  3095. iwl3945_mod_params.antenna = (enum iwl3945_antenna)ant;
  3096. } else
  3097. IWL_DEBUG_INFO(priv, "Bad antenna select value %d.\n", ant);
  3098. return count;
  3099. }
  3100. static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
  3101. static ssize_t show_status(struct device *d,
  3102. struct device_attribute *attr, char *buf)
  3103. {
  3104. struct iwl_priv *priv = dev_get_drvdata(d);
  3105. if (!iwl_is_alive(priv))
  3106. return -EAGAIN;
  3107. return sprintf(buf, "0x%08x\n", (int)priv->status);
  3108. }
  3109. static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
  3110. static ssize_t dump_error_log(struct device *d,
  3111. struct device_attribute *attr,
  3112. const char *buf, size_t count)
  3113. {
  3114. struct iwl_priv *priv = dev_get_drvdata(d);
  3115. char *p = (char *)buf;
  3116. if (p[0] == '1')
  3117. iwl3945_dump_nic_error_log(priv);
  3118. return strnlen(buf, count);
  3119. }
  3120. static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
  3121. /*****************************************************************************
  3122. *
  3123. * driver setup and tear down
  3124. *
  3125. *****************************************************************************/
  3126. static void iwl3945_setup_deferred_work(struct iwl_priv *priv)
  3127. {
  3128. priv->workqueue = create_singlethread_workqueue(DRV_NAME);
  3129. init_waitqueue_head(&priv->wait_command_queue);
  3130. INIT_WORK(&priv->restart, iwl3945_bg_restart);
  3131. INIT_WORK(&priv->rx_replenish, iwl3945_bg_rx_replenish);
  3132. INIT_WORK(&priv->beacon_update, iwl3945_bg_beacon_update);
  3133. INIT_DELAYED_WORK(&priv->init_alive_start, iwl3945_bg_init_alive_start);
  3134. INIT_DELAYED_WORK(&priv->alive_start, iwl3945_bg_alive_start);
  3135. INIT_DELAYED_WORK(&priv->rfkill_poll, iwl3945_rfkill_poll);
  3136. INIT_WORK(&priv->scan_completed, iwl_bg_scan_completed);
  3137. INIT_WORK(&priv->request_scan, iwl3945_bg_request_scan);
  3138. INIT_WORK(&priv->abort_scan, iwl_bg_abort_scan);
  3139. INIT_DELAYED_WORK(&priv->scan_check, iwl_bg_scan_check);
  3140. iwl3945_hw_setup_deferred_work(priv);
  3141. tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
  3142. iwl3945_irq_tasklet, (unsigned long)priv);
  3143. }
  3144. static void iwl3945_cancel_deferred_work(struct iwl_priv *priv)
  3145. {
  3146. iwl3945_hw_cancel_deferred_work(priv);
  3147. cancel_delayed_work_sync(&priv->init_alive_start);
  3148. cancel_delayed_work(&priv->scan_check);
  3149. cancel_delayed_work(&priv->alive_start);
  3150. cancel_work_sync(&priv->beacon_update);
  3151. }
  3152. static struct attribute *iwl3945_sysfs_entries[] = {
  3153. &dev_attr_antenna.attr,
  3154. &dev_attr_channels.attr,
  3155. &dev_attr_dump_errors.attr,
  3156. &dev_attr_flags.attr,
  3157. &dev_attr_filter_flags.attr,
  3158. &dev_attr_measurement.attr,
  3159. &dev_attr_retry_rate.attr,
  3160. &dev_attr_statistics.attr,
  3161. &dev_attr_status.attr,
  3162. &dev_attr_temperature.attr,
  3163. &dev_attr_tx_power.attr,
  3164. #ifdef CONFIG_IWLWIFI_DEBUG
  3165. &dev_attr_debug_level.attr,
  3166. #endif
  3167. NULL
  3168. };
  3169. static struct attribute_group iwl3945_attribute_group = {
  3170. .name = NULL, /* put in device directory */
  3171. .attrs = iwl3945_sysfs_entries,
  3172. };
  3173. static struct ieee80211_ops iwl3945_hw_ops = {
  3174. .tx = iwl3945_mac_tx,
  3175. .start = iwl3945_mac_start,
  3176. .stop = iwl3945_mac_stop,
  3177. .add_interface = iwl_mac_add_interface,
  3178. .remove_interface = iwl_mac_remove_interface,
  3179. .config = iwl_mac_config,
  3180. .configure_filter = iwl_configure_filter,
  3181. .set_key = iwl3945_mac_set_key,
  3182. .conf_tx = iwl_mac_conf_tx,
  3183. .reset_tsf = iwl_mac_reset_tsf,
  3184. .bss_info_changed = iwl_bss_info_changed,
  3185. .hw_scan = iwl_mac_hw_scan
  3186. };
  3187. static int iwl3945_init_drv(struct iwl_priv *priv)
  3188. {
  3189. int ret;
  3190. struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
  3191. priv->retry_rate = 1;
  3192. priv->ibss_beacon = NULL;
  3193. spin_lock_init(&priv->sta_lock);
  3194. spin_lock_init(&priv->hcmd_lock);
  3195. INIT_LIST_HEAD(&priv->free_frames);
  3196. mutex_init(&priv->mutex);
  3197. mutex_init(&priv->sync_cmd_mutex);
  3198. /* Clear the driver's (not device's) station table */
  3199. iwl_clear_stations_table(priv);
  3200. priv->ieee_channels = NULL;
  3201. priv->ieee_rates = NULL;
  3202. priv->band = IEEE80211_BAND_2GHZ;
  3203. priv->iw_mode = NL80211_IFTYPE_STATION;
  3204. priv->missed_beacon_threshold = IWL_MISSED_BEACON_THRESHOLD_DEF;
  3205. iwl_reset_qos(priv);
  3206. priv->qos_data.qos_active = 0;
  3207. priv->qos_data.qos_cap.val = 0;
  3208. priv->rates_mask = IWL_RATES_MASK;
  3209. priv->tx_power_user_lmt = IWL_DEFAULT_TX_POWER;
  3210. if (eeprom->version < EEPROM_3945_EEPROM_VERSION) {
  3211. IWL_WARN(priv, "Unsupported EEPROM version: 0x%04X\n",
  3212. eeprom->version);
  3213. ret = -EINVAL;
  3214. goto err;
  3215. }
  3216. ret = iwl_init_channel_map(priv);
  3217. if (ret) {
  3218. IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
  3219. goto err;
  3220. }
  3221. /* Set up txpower settings in driver for all channels */
  3222. if (iwl3945_txpower_set_from_eeprom(priv)) {
  3223. ret = -EIO;
  3224. goto err_free_channel_map;
  3225. }
  3226. ret = iwlcore_init_geos(priv);
  3227. if (ret) {
  3228. IWL_ERR(priv, "initializing geos failed: %d\n", ret);
  3229. goto err_free_channel_map;
  3230. }
  3231. iwl3945_init_hw_rates(priv, priv->ieee_rates);
  3232. return 0;
  3233. err_free_channel_map:
  3234. iwl_free_channel_map(priv);
  3235. err:
  3236. return ret;
  3237. }
  3238. static int iwl3945_setup_mac(struct iwl_priv *priv)
  3239. {
  3240. int ret;
  3241. struct ieee80211_hw *hw = priv->hw;
  3242. hw->rate_control_algorithm = "iwl-3945-rs";
  3243. hw->sta_data_size = sizeof(struct iwl3945_sta_priv);
  3244. /* Tell mac80211 our characteristics */
  3245. hw->flags = IEEE80211_HW_SIGNAL_DBM |
  3246. IEEE80211_HW_NOISE_DBM |
  3247. IEEE80211_HW_SPECTRUM_MGMT;
  3248. if (!priv->cfg->broken_powersave)
  3249. hw->flags |= IEEE80211_HW_SUPPORTS_PS |
  3250. IEEE80211_HW_SUPPORTS_DYNAMIC_PS;
  3251. hw->wiphy->interface_modes =
  3252. BIT(NL80211_IFTYPE_STATION) |
  3253. BIT(NL80211_IFTYPE_ADHOC);
  3254. hw->wiphy->flags |= WIPHY_FLAG_CUSTOM_REGULATORY |
  3255. WIPHY_FLAG_DISABLE_BEACON_HINTS;
  3256. hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX_3945;
  3257. /* we create the 802.11 header and a zero-length SSID element */
  3258. hw->wiphy->max_scan_ie_len = IWL_MAX_PROBE_REQUEST - 24 - 2;
  3259. /* Default value; 4 EDCA QOS priorities */
  3260. hw->queues = 4;
  3261. if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
  3262. priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
  3263. &priv->bands[IEEE80211_BAND_2GHZ];
  3264. if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
  3265. priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
  3266. &priv->bands[IEEE80211_BAND_5GHZ];
  3267. ret = ieee80211_register_hw(priv->hw);
  3268. if (ret) {
  3269. IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
  3270. return ret;
  3271. }
  3272. priv->mac80211_registered = 1;
  3273. return 0;
  3274. }
  3275. static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  3276. {
  3277. int err = 0;
  3278. struct iwl_priv *priv;
  3279. struct ieee80211_hw *hw;
  3280. struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
  3281. struct iwl3945_eeprom *eeprom;
  3282. unsigned long flags;
  3283. /***********************
  3284. * 1. Allocating HW data
  3285. * ********************/
  3286. /* mac80211 allocates memory for this device instance, including
  3287. * space for this driver's private structure */
  3288. hw = iwl_alloc_all(cfg, &iwl3945_hw_ops);
  3289. if (hw == NULL) {
  3290. printk(KERN_ERR DRV_NAME "Can not allocate network device\n");
  3291. err = -ENOMEM;
  3292. goto out;
  3293. }
  3294. priv = hw->priv;
  3295. SET_IEEE80211_DEV(hw, &pdev->dev);
  3296. /*
  3297. * Disabling hardware scan means that mac80211 will perform scans
  3298. * "the hard way", rather than using device's scan.
  3299. */
  3300. if (iwl3945_mod_params.disable_hw_scan) {
  3301. IWL_DEBUG_INFO(priv, "Disabling hw_scan\n");
  3302. iwl3945_hw_ops.hw_scan = NULL;
  3303. }
  3304. IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
  3305. priv->cfg = cfg;
  3306. priv->pci_dev = pdev;
  3307. priv->inta_mask = CSR_INI_SET_MASK;
  3308. #ifdef CONFIG_IWLWIFI_DEBUG
  3309. atomic_set(&priv->restrict_refcnt, 0);
  3310. #endif
  3311. if (iwl_alloc_traffic_mem(priv))
  3312. IWL_ERR(priv, "Not enough memory to generate traffic log\n");
  3313. /***************************
  3314. * 2. Initializing PCI bus
  3315. * *************************/
  3316. if (pci_enable_device(pdev)) {
  3317. err = -ENODEV;
  3318. goto out_ieee80211_free_hw;
  3319. }
  3320. pci_set_master(pdev);
  3321. err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  3322. if (!err)
  3323. err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  3324. if (err) {
  3325. IWL_WARN(priv, "No suitable DMA available.\n");
  3326. goto out_pci_disable_device;
  3327. }
  3328. pci_set_drvdata(pdev, priv);
  3329. err = pci_request_regions(pdev, DRV_NAME);
  3330. if (err)
  3331. goto out_pci_disable_device;
  3332. /***********************
  3333. * 3. Read REV Register
  3334. * ********************/
  3335. priv->hw_base = pci_iomap(pdev, 0, 0);
  3336. if (!priv->hw_base) {
  3337. err = -ENODEV;
  3338. goto out_pci_release_regions;
  3339. }
  3340. IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
  3341. (unsigned long long) pci_resource_len(pdev, 0));
  3342. IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
  3343. /* We disable the RETRY_TIMEOUT register (0x41) to keep
  3344. * PCI Tx retries from interfering with C3 CPU state */
  3345. pci_write_config_byte(pdev, 0x41, 0x00);
  3346. /* these spin locks will be used in apm_ops.init and EEPROM access
  3347. * we should init now
  3348. */
  3349. spin_lock_init(&priv->reg_lock);
  3350. spin_lock_init(&priv->lock);
  3351. /*
  3352. * stop and reset the on-board processor just in case it is in a
  3353. * strange state ... like being left stranded by a primary kernel
  3354. * and this is now the kdump kernel trying to start up
  3355. */
  3356. iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  3357. /***********************
  3358. * 4. Read EEPROM
  3359. * ********************/
  3360. /* Read the EEPROM */
  3361. err = iwl_eeprom_init(priv);
  3362. if (err) {
  3363. IWL_ERR(priv, "Unable to init EEPROM\n");
  3364. goto out_iounmap;
  3365. }
  3366. /* MAC Address location in EEPROM same for 3945/4965 */
  3367. eeprom = (struct iwl3945_eeprom *)priv->eeprom;
  3368. memcpy(priv->mac_addr, eeprom->mac_address, ETH_ALEN);
  3369. IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->mac_addr);
  3370. SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
  3371. /***********************
  3372. * 5. Setup HW Constants
  3373. * ********************/
  3374. /* Device-specific setup */
  3375. if (iwl3945_hw_set_hw_params(priv)) {
  3376. IWL_ERR(priv, "failed to set hw settings\n");
  3377. goto out_eeprom_free;
  3378. }
  3379. /***********************
  3380. * 6. Setup priv
  3381. * ********************/
  3382. err = iwl3945_init_drv(priv);
  3383. if (err) {
  3384. IWL_ERR(priv, "initializing driver failed\n");
  3385. goto out_unset_hw_params;
  3386. }
  3387. IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s\n",
  3388. priv->cfg->name);
  3389. /***********************
  3390. * 7. Setup Services
  3391. * ********************/
  3392. spin_lock_irqsave(&priv->lock, flags);
  3393. iwl_disable_interrupts(priv);
  3394. spin_unlock_irqrestore(&priv->lock, flags);
  3395. pci_enable_msi(priv->pci_dev);
  3396. err = request_irq(priv->pci_dev->irq, priv->cfg->ops->lib->isr,
  3397. IRQF_SHARED, DRV_NAME, priv);
  3398. if (err) {
  3399. IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
  3400. goto out_disable_msi;
  3401. }
  3402. err = sysfs_create_group(&pdev->dev.kobj, &iwl3945_attribute_group);
  3403. if (err) {
  3404. IWL_ERR(priv, "failed to create sysfs device attributes\n");
  3405. goto out_release_irq;
  3406. }
  3407. iwl_set_rxon_channel(priv,
  3408. &priv->bands[IEEE80211_BAND_2GHZ].channels[5]);
  3409. iwl3945_setup_deferred_work(priv);
  3410. iwl3945_setup_rx_handlers(priv);
  3411. iwl_power_initialize(priv);
  3412. /*********************************
  3413. * 8. Setup and Register mac80211
  3414. * *******************************/
  3415. iwl_enable_interrupts(priv);
  3416. err = iwl3945_setup_mac(priv);
  3417. if (err)
  3418. goto out_remove_sysfs;
  3419. err = iwl_dbgfs_register(priv, DRV_NAME);
  3420. if (err)
  3421. IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
  3422. /* Start monitoring the killswitch */
  3423. queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
  3424. 2 * HZ);
  3425. return 0;
  3426. out_remove_sysfs:
  3427. destroy_workqueue(priv->workqueue);
  3428. priv->workqueue = NULL;
  3429. sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
  3430. out_release_irq:
  3431. free_irq(priv->pci_dev->irq, priv);
  3432. out_disable_msi:
  3433. pci_disable_msi(priv->pci_dev);
  3434. iwlcore_free_geos(priv);
  3435. iwl_free_channel_map(priv);
  3436. out_unset_hw_params:
  3437. iwl3945_unset_hw_params(priv);
  3438. out_eeprom_free:
  3439. iwl_eeprom_free(priv);
  3440. out_iounmap:
  3441. pci_iounmap(pdev, priv->hw_base);
  3442. out_pci_release_regions:
  3443. pci_release_regions(pdev);
  3444. out_pci_disable_device:
  3445. pci_set_drvdata(pdev, NULL);
  3446. pci_disable_device(pdev);
  3447. out_ieee80211_free_hw:
  3448. iwl_free_traffic_mem(priv);
  3449. ieee80211_free_hw(priv->hw);
  3450. out:
  3451. return err;
  3452. }
  3453. static void __devexit iwl3945_pci_remove(struct pci_dev *pdev)
  3454. {
  3455. struct iwl_priv *priv = pci_get_drvdata(pdev);
  3456. unsigned long flags;
  3457. if (!priv)
  3458. return;
  3459. IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
  3460. iwl_dbgfs_unregister(priv);
  3461. set_bit(STATUS_EXIT_PENDING, &priv->status);
  3462. if (priv->mac80211_registered) {
  3463. ieee80211_unregister_hw(priv->hw);
  3464. priv->mac80211_registered = 0;
  3465. } else {
  3466. iwl3945_down(priv);
  3467. }
  3468. /*
  3469. * Make sure device is reset to low power before unloading driver.
  3470. * This may be redundant with iwl_down(), but there are paths to
  3471. * run iwl_down() without calling apm_ops.stop(), and there are
  3472. * paths to avoid running iwl_down() at all before leaving driver.
  3473. * This (inexpensive) call *makes sure* device is reset.
  3474. */
  3475. priv->cfg->ops->lib->apm_ops.stop(priv);
  3476. /* make sure we flush any pending irq or
  3477. * tasklet for the driver
  3478. */
  3479. spin_lock_irqsave(&priv->lock, flags);
  3480. iwl_disable_interrupts(priv);
  3481. spin_unlock_irqrestore(&priv->lock, flags);
  3482. iwl_synchronize_irq(priv);
  3483. sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
  3484. cancel_delayed_work_sync(&priv->rfkill_poll);
  3485. iwl3945_dealloc_ucode_pci(priv);
  3486. if (priv->rxq.bd)
  3487. iwl3945_rx_queue_free(priv, &priv->rxq);
  3488. iwl3945_hw_txq_ctx_free(priv);
  3489. iwl3945_unset_hw_params(priv);
  3490. iwl_clear_stations_table(priv);
  3491. /*netif_stop_queue(dev); */
  3492. flush_workqueue(priv->workqueue);
  3493. /* ieee80211_unregister_hw calls iwl3945_mac_stop, which flushes
  3494. * priv->workqueue... so we can't take down the workqueue
  3495. * until now... */
  3496. destroy_workqueue(priv->workqueue);
  3497. priv->workqueue = NULL;
  3498. iwl_free_traffic_mem(priv);
  3499. free_irq(pdev->irq, priv);
  3500. pci_disable_msi(pdev);
  3501. pci_iounmap(pdev, priv->hw_base);
  3502. pci_release_regions(pdev);
  3503. pci_disable_device(pdev);
  3504. pci_set_drvdata(pdev, NULL);
  3505. iwl_free_channel_map(priv);
  3506. iwlcore_free_geos(priv);
  3507. kfree(priv->scan);
  3508. if (priv->ibss_beacon)
  3509. dev_kfree_skb(priv->ibss_beacon);
  3510. ieee80211_free_hw(priv->hw);
  3511. }
  3512. /*****************************************************************************
  3513. *
  3514. * driver and module entry point
  3515. *
  3516. *****************************************************************************/
  3517. static struct pci_driver iwl3945_driver = {
  3518. .name = DRV_NAME,
  3519. .id_table = iwl3945_hw_card_ids,
  3520. .probe = iwl3945_pci_probe,
  3521. .remove = __devexit_p(iwl3945_pci_remove),
  3522. #ifdef CONFIG_PM
  3523. .suspend = iwl_pci_suspend,
  3524. .resume = iwl_pci_resume,
  3525. #endif
  3526. };
  3527. static int __init iwl3945_init(void)
  3528. {
  3529. int ret;
  3530. printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
  3531. printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
  3532. ret = iwl3945_rate_control_register();
  3533. if (ret) {
  3534. printk(KERN_ERR DRV_NAME
  3535. "Unable to register rate control algorithm: %d\n", ret);
  3536. return ret;
  3537. }
  3538. ret = pci_register_driver(&iwl3945_driver);
  3539. if (ret) {
  3540. printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
  3541. goto error_register;
  3542. }
  3543. return ret;
  3544. error_register:
  3545. iwl3945_rate_control_unregister();
  3546. return ret;
  3547. }
  3548. static void __exit iwl3945_exit(void)
  3549. {
  3550. pci_unregister_driver(&iwl3945_driver);
  3551. iwl3945_rate_control_unregister();
  3552. }
  3553. MODULE_FIRMWARE(IWL3945_MODULE_FIRMWARE(IWL3945_UCODE_API_MAX));
  3554. module_param_named(antenna, iwl3945_mod_params.antenna, int, S_IRUGO);
  3555. MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
  3556. module_param_named(swcrypto, iwl3945_mod_params.sw_crypto, int, S_IRUGO);
  3557. MODULE_PARM_DESC(swcrypto,
  3558. "using software crypto (default 1 [software])\n");
  3559. #ifdef CONFIG_IWLWIFI_DEBUG
  3560. module_param_named(debug, iwl_debug_level, uint, S_IRUGO | S_IWUSR);
  3561. MODULE_PARM_DESC(debug, "debug output mask");
  3562. #endif
  3563. module_param_named(disable_hw_scan, iwl3945_mod_params.disable_hw_scan,
  3564. int, S_IRUGO);
  3565. MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
  3566. module_param_named(fw_restart3945, iwl3945_mod_params.restart_fw, int, S_IRUGO);
  3567. MODULE_PARM_DESC(fw_restart3945, "restart firmware in case of error");
  3568. module_exit(iwl3945_exit);
  3569. module_init(iwl3945_init);