smctr.c 185 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641164216431644164516461647164816491650165116521653165416551656165716581659166016611662166316641665166616671668166916701671167216731674167516761677167816791680168116821683168416851686168716881689169016911692169316941695169616971698169917001701170217031704170517061707170817091710171117121713171417151716171717181719172017211722172317241725172617271728172917301731173217331734173517361737173817391740174117421743174417451746174717481749175017511752175317541755175617571758175917601761176217631764176517661767176817691770177117721773177417751776177717781779178017811782178317841785178617871788178917901791179217931794179517961797179817991800180118021803180418051806180718081809181018111812181318141815181618171818181918201821182218231824182518261827182818291830183118321833183418351836183718381839184018411842184318441845184618471848184918501851185218531854185518561857185818591860186118621863186418651866186718681869187018711872187318741875187618771878187918801881188218831884188518861887188818891890189118921893189418951896189718981899190019011902190319041905190619071908190919101911191219131914191519161917191819191920192119221923192419251926192719281929193019311932193319341935193619371938193919401941194219431944194519461947194819491950195119521953195419551956195719581959196019611962196319641965196619671968196919701971197219731974197519761977197819791980198119821983198419851986198719881989199019911992199319941995199619971998199920002001200220032004200520062007200820092010201120122013201420152016201720182019202020212022202320242025202620272028202920302031203220332034203520362037203820392040204120422043204420452046204720482049205020512052205320542055205620572058205920602061206220632064206520662067206820692070207120722073207420752076207720782079208020812082208320842085208620872088208920902091209220932094209520962097209820992100210121022103210421052106210721082109211021112112211321142115211621172118211921202121212221232124212521262127212821292130213121322133213421352136213721382139214021412142214321442145214621472148214921502151215221532154215521562157215821592160216121622163216421652166216721682169217021712172217321742175217621772178217921802181218221832184218521862187218821892190219121922193219421952196219721982199220022012202220322042205220622072208220922102211221222132214221522162217221822192220222122222223222422252226222722282229223022312232223322342235223622372238223922402241224222432244224522462247224822492250225122522253225422552256225722582259226022612262226322642265226622672268226922702271227222732274227522762277227822792280228122822283228422852286228722882289229022912292229322942295229622972298229923002301230223032304230523062307230823092310231123122313231423152316231723182319232023212322232323242325232623272328232923302331233223332334233523362337233823392340234123422343234423452346234723482349235023512352235323542355235623572358235923602361236223632364236523662367236823692370237123722373237423752376237723782379238023812382238323842385238623872388238923902391239223932394239523962397239823992400240124022403240424052406240724082409241024112412241324142415241624172418241924202421242224232424242524262427242824292430243124322433243424352436243724382439244024412442244324442445244624472448244924502451245224532454245524562457245824592460246124622463246424652466246724682469247024712472247324742475247624772478247924802481248224832484248524862487248824892490249124922493249424952496249724982499250025012502250325042505250625072508250925102511251225132514251525162517251825192520252125222523252425252526252725282529253025312532253325342535253625372538253925402541254225432544254525462547254825492550255125522553255425552556255725582559256025612562256325642565256625672568256925702571257225732574257525762577257825792580258125822583258425852586258725882589259025912592259325942595259625972598259926002601260226032604260526062607260826092610261126122613261426152616261726182619262026212622262326242625262626272628262926302631263226332634263526362637263826392640264126422643264426452646264726482649265026512652265326542655265626572658265926602661266226632664266526662667266826692670267126722673267426752676267726782679268026812682268326842685268626872688268926902691269226932694269526962697269826992700270127022703270427052706270727082709271027112712271327142715271627172718271927202721272227232724272527262727272827292730273127322733273427352736273727382739274027412742274327442745274627472748274927502751275227532754275527562757275827592760276127622763276427652766276727682769277027712772277327742775277627772778277927802781278227832784278527862787278827892790279127922793279427952796279727982799280028012802280328042805280628072808280928102811281228132814281528162817281828192820282128222823282428252826282728282829283028312832283328342835283628372838283928402841284228432844284528462847284828492850285128522853285428552856285728582859286028612862286328642865286628672868286928702871287228732874287528762877287828792880288128822883288428852886288728882889289028912892289328942895289628972898289929002901290229032904290529062907290829092910291129122913291429152916291729182919292029212922292329242925292629272928292929302931293229332934293529362937293829392940294129422943294429452946294729482949295029512952295329542955295629572958295929602961296229632964296529662967296829692970297129722973297429752976297729782979298029812982298329842985298629872988298929902991299229932994299529962997299829993000300130023003300430053006300730083009301030113012301330143015301630173018301930203021302230233024302530263027302830293030303130323033303430353036303730383039304030413042304330443045304630473048304930503051305230533054305530563057305830593060306130623063306430653066306730683069307030713072307330743075307630773078307930803081308230833084308530863087308830893090309130923093309430953096309730983099310031013102310331043105310631073108310931103111311231133114311531163117311831193120312131223123312431253126312731283129313031313132313331343135313631373138313931403141314231433144314531463147314831493150315131523153315431553156315731583159316031613162316331643165316631673168316931703171317231733174317531763177317831793180318131823183318431853186318731883189319031913192319331943195319631973198319932003201320232033204320532063207320832093210321132123213321432153216321732183219322032213222322332243225322632273228322932303231323232333234323532363237323832393240324132423243324432453246324732483249325032513252325332543255325632573258325932603261326232633264326532663267326832693270327132723273327432753276327732783279328032813282328332843285328632873288328932903291329232933294329532963297329832993300330133023303330433053306330733083309331033113312331333143315331633173318331933203321332233233324332533263327332833293330333133323333333433353336333733383339334033413342334333443345334633473348334933503351335233533354335533563357335833593360336133623363336433653366336733683369337033713372337333743375337633773378337933803381338233833384338533863387338833893390339133923393339433953396339733983399340034013402340334043405340634073408340934103411341234133414341534163417341834193420342134223423342434253426342734283429343034313432343334343435343634373438343934403441344234433444344534463447344834493450345134523453345434553456345734583459346034613462346334643465346634673468346934703471347234733474347534763477347834793480348134823483348434853486348734883489349034913492349334943495349634973498349935003501350235033504350535063507350835093510351135123513351435153516351735183519352035213522352335243525352635273528352935303531353235333534353535363537353835393540354135423543354435453546354735483549355035513552355335543555355635573558355935603561356235633564356535663567356835693570357135723573357435753576357735783579358035813582358335843585358635873588358935903591359235933594359535963597359835993600360136023603360436053606360736083609361036113612361336143615361636173618361936203621362236233624362536263627362836293630363136323633363436353636363736383639364036413642364336443645364636473648364936503651365236533654365536563657365836593660366136623663366436653666366736683669367036713672367336743675367636773678367936803681368236833684368536863687368836893690369136923693369436953696369736983699370037013702370337043705370637073708370937103711371237133714371537163717371837193720372137223723372437253726372737283729373037313732373337343735373637373738373937403741374237433744374537463747374837493750375137523753375437553756375737583759376037613762376337643765376637673768376937703771377237733774377537763777377837793780378137823783378437853786378737883789379037913792379337943795379637973798379938003801380238033804380538063807380838093810381138123813381438153816381738183819382038213822382338243825382638273828382938303831383238333834383538363837383838393840384138423843384438453846384738483849385038513852385338543855385638573858385938603861386238633864386538663867386838693870387138723873387438753876387738783879388038813882388338843885388638873888388938903891389238933894389538963897389838993900390139023903390439053906390739083909391039113912391339143915391639173918391939203921392239233924392539263927392839293930393139323933393439353936393739383939394039413942394339443945394639473948394939503951395239533954395539563957395839593960396139623963396439653966396739683969397039713972397339743975397639773978397939803981398239833984398539863987398839893990399139923993399439953996399739983999400040014002400340044005400640074008400940104011401240134014401540164017401840194020402140224023402440254026402740284029403040314032403340344035403640374038403940404041404240434044404540464047404840494050405140524053405440554056405740584059406040614062406340644065406640674068406940704071407240734074407540764077407840794080408140824083408440854086408740884089409040914092409340944095409640974098409941004101410241034104410541064107410841094110411141124113411441154116411741184119412041214122412341244125412641274128412941304131413241334134413541364137413841394140414141424143414441454146414741484149415041514152415341544155415641574158415941604161416241634164416541664167416841694170417141724173417441754176417741784179418041814182418341844185418641874188418941904191419241934194419541964197419841994200420142024203420442054206420742084209421042114212421342144215421642174218421942204221422242234224422542264227422842294230423142324233423442354236423742384239424042414242424342444245424642474248424942504251425242534254425542564257425842594260426142624263426442654266426742684269427042714272427342744275427642774278427942804281428242834284428542864287428842894290429142924293429442954296429742984299430043014302430343044305430643074308430943104311431243134314431543164317431843194320432143224323432443254326432743284329433043314332433343344335433643374338433943404341434243434344434543464347434843494350435143524353435443554356435743584359436043614362436343644365436643674368436943704371437243734374437543764377437843794380438143824383438443854386438743884389439043914392439343944395439643974398439944004401440244034404440544064407440844094410441144124413441444154416441744184419442044214422442344244425442644274428442944304431443244334434443544364437443844394440444144424443444444454446444744484449445044514452445344544455445644574458445944604461446244634464446544664467446844694470447144724473447444754476447744784479448044814482448344844485448644874488448944904491449244934494449544964497449844994500450145024503450445054506450745084509451045114512451345144515451645174518451945204521452245234524452545264527452845294530453145324533453445354536453745384539454045414542454345444545454645474548454945504551455245534554455545564557455845594560456145624563456445654566456745684569457045714572457345744575457645774578457945804581458245834584458545864587458845894590459145924593459445954596459745984599460046014602460346044605460646074608460946104611461246134614461546164617461846194620462146224623462446254626462746284629463046314632463346344635463646374638463946404641464246434644464546464647464846494650465146524653465446554656465746584659466046614662466346644665466646674668466946704671467246734674467546764677467846794680468146824683468446854686468746884689469046914692469346944695469646974698469947004701470247034704470547064707470847094710471147124713471447154716471747184719472047214722472347244725472647274728472947304731473247334734473547364737473847394740474147424743474447454746474747484749475047514752475347544755475647574758475947604761476247634764476547664767476847694770477147724773477447754776477747784779478047814782478347844785478647874788478947904791479247934794479547964797479847994800480148024803480448054806480748084809481048114812481348144815481648174818481948204821482248234824482548264827482848294830483148324833483448354836483748384839484048414842484348444845484648474848484948504851485248534854485548564857485848594860486148624863486448654866486748684869487048714872487348744875487648774878487948804881488248834884488548864887488848894890489148924893489448954896489748984899490049014902490349044905490649074908490949104911491249134914491549164917491849194920492149224923492449254926492749284929493049314932493349344935493649374938493949404941494249434944494549464947494849494950495149524953495449554956495749584959496049614962496349644965496649674968496949704971497249734974497549764977497849794980498149824983498449854986498749884989499049914992499349944995499649974998499950005001500250035004500550065007500850095010501150125013501450155016501750185019502050215022502350245025502650275028502950305031503250335034503550365037503850395040504150425043504450455046504750485049505050515052505350545055505650575058505950605061506250635064506550665067506850695070507150725073507450755076507750785079508050815082508350845085508650875088508950905091509250935094509550965097509850995100510151025103510451055106510751085109511051115112511351145115511651175118511951205121512251235124512551265127512851295130513151325133513451355136513751385139514051415142514351445145514651475148514951505151515251535154515551565157515851595160516151625163516451655166516751685169517051715172517351745175517651775178517951805181518251835184518551865187518851895190519151925193519451955196519751985199520052015202520352045205520652075208520952105211521252135214521552165217521852195220522152225223522452255226522752285229523052315232523352345235523652375238523952405241524252435244524552465247524852495250525152525253525452555256525752585259526052615262526352645265526652675268526952705271527252735274527552765277527852795280528152825283528452855286528752885289529052915292529352945295529652975298529953005301530253035304530553065307530853095310531153125313531453155316531753185319532053215322532353245325532653275328532953305331533253335334533553365337533853395340534153425343534453455346534753485349535053515352535353545355535653575358535953605361536253635364536553665367536853695370537153725373537453755376537753785379538053815382538353845385538653875388538953905391539253935394539553965397539853995400540154025403540454055406540754085409541054115412541354145415541654175418541954205421542254235424542554265427542854295430543154325433543454355436543754385439544054415442544354445445544654475448544954505451545254535454545554565457545854595460546154625463546454655466546754685469547054715472547354745475547654775478547954805481548254835484548554865487548854895490549154925493549454955496549754985499550055015502550355045505550655075508550955105511551255135514551555165517551855195520552155225523552455255526552755285529553055315532553355345535553655375538553955405541554255435544554555465547554855495550555155525553555455555556555755585559556055615562556355645565556655675568556955705571557255735574557555765577557855795580558155825583558455855586558755885589559055915592559355945595559655975598559956005601560256035604560556065607560856095610561156125613561456155616561756185619562056215622562356245625562656275628562956305631563256335634563556365637563856395640564156425643564456455646564756485649565056515652565356545655565656575658565956605661566256635664566556665667566856695670567156725673567456755676567756785679568056815682568356845685568656875688568956905691569256935694569556965697569856995700570157025703570457055706570757085709571057115712571357145715571657175718
  1. /*
  2. * smctr.c: A network driver for the SMC Token Ring Adapters.
  3. *
  4. * Written by Jay Schulist <jschlst@samba.org>
  5. *
  6. * This software may be used and distributed according to the terms
  7. * of the GNU General Public License, incorporated herein by reference.
  8. *
  9. * This device driver works with the following SMC adapters:
  10. * - SMC TokenCard Elite (8115T, chips 825/584)
  11. * - SMC TokenCard Elite/A MCA (8115T/A, chips 825/594)
  12. *
  13. * Source(s):
  14. * - SMC TokenCard SDK.
  15. *
  16. * Maintainer(s):
  17. * JS Jay Schulist <jschlst@samba.org>
  18. *
  19. * Changes:
  20. * 07102000 JS Fixed a timing problem in smctr_wait_cmd();
  21. * Also added a bit more discriptive error msgs.
  22. * 07122000 JS Fixed problem with detecting a card with
  23. * module io/irq/mem specified.
  24. *
  25. * To do:
  26. * 1. Multicast support.
  27. *
  28. * Initial 2.5 cleanup Alan Cox <alan@lxorguk.ukuu.org.uk> 2002/10/28
  29. */
  30. #include <linux/module.h>
  31. #include <linux/kernel.h>
  32. #include <linux/types.h>
  33. #include <linux/fcntl.h>
  34. #include <linux/interrupt.h>
  35. #include <linux/ptrace.h>
  36. #include <linux/ioport.h>
  37. #include <linux/in.h>
  38. #include <linux/string.h>
  39. #include <linux/time.h>
  40. #include <linux/errno.h>
  41. #include <linux/init.h>
  42. #include <linux/mca-legacy.h>
  43. #include <linux/delay.h>
  44. #include <linux/netdevice.h>
  45. #include <linux/etherdevice.h>
  46. #include <linux/skbuff.h>
  47. #include <linux/trdevice.h>
  48. #include <linux/bitops.h>
  49. #include <linux/firmware.h>
  50. #include <asm/system.h>
  51. #include <asm/io.h>
  52. #include <asm/dma.h>
  53. #include <asm/irq.h>
  54. #if BITS_PER_LONG == 64
  55. #error FIXME: driver does not support 64-bit platforms
  56. #endif
  57. #include "smctr.h" /* Our Stuff */
  58. static const char version[] __initdata =
  59. KERN_INFO "smctr.c: v1.4 7/12/00 by jschlst@samba.org\n";
  60. static const char cardname[] = "smctr";
  61. #define SMCTR_IO_EXTENT 20
  62. #ifdef CONFIG_MCA_LEGACY
  63. static unsigned int smctr_posid = 0x6ec6;
  64. #endif
  65. static int ringspeed;
  66. /* SMC Name of the Adapter. */
  67. static char smctr_name[] = "SMC TokenCard";
  68. static char *smctr_model = "Unknown";
  69. /* Use 0 for production, 1 for verification, 2 for debug, and
  70. * 3 for very verbose debug.
  71. */
  72. #ifndef SMCTR_DEBUG
  73. #define SMCTR_DEBUG 1
  74. #endif
  75. static unsigned int smctr_debug = SMCTR_DEBUG;
  76. /* smctr.c prototypes and functions are arranged alphabeticly
  77. * for clearity, maintainability and pure old fashion fun.
  78. */
  79. /* A */
  80. static int smctr_alloc_shared_memory(struct net_device *dev);
  81. /* B */
  82. static int smctr_bypass_state(struct net_device *dev);
  83. /* C */
  84. static int smctr_checksum_firmware(struct net_device *dev);
  85. static int __init smctr_chk_isa(struct net_device *dev);
  86. static int smctr_chg_rx_mask(struct net_device *dev);
  87. static int smctr_clear_int(struct net_device *dev);
  88. static int smctr_clear_trc_reset(int ioaddr);
  89. static int smctr_close(struct net_device *dev);
  90. /* D */
  91. static int smctr_decode_firmware(struct net_device *dev,
  92. const struct firmware *fw);
  93. static int smctr_disable_16bit(struct net_device *dev);
  94. static int smctr_disable_adapter_ctrl_store(struct net_device *dev);
  95. static int smctr_disable_bic_int(struct net_device *dev);
  96. /* E */
  97. static int smctr_enable_16bit(struct net_device *dev);
  98. static int smctr_enable_adapter_ctrl_store(struct net_device *dev);
  99. static int smctr_enable_adapter_ram(struct net_device *dev);
  100. static int smctr_enable_bic_int(struct net_device *dev);
  101. /* G */
  102. static int __init smctr_get_boardid(struct net_device *dev, int mca);
  103. static int smctr_get_group_address(struct net_device *dev);
  104. static int smctr_get_functional_address(struct net_device *dev);
  105. static unsigned int smctr_get_num_rx_bdbs(struct net_device *dev);
  106. static int smctr_get_physical_drop_number(struct net_device *dev);
  107. static __u8 *smctr_get_rx_pointer(struct net_device *dev, short queue);
  108. static int smctr_get_station_id(struct net_device *dev);
  109. static FCBlock *smctr_get_tx_fcb(struct net_device *dev, __u16 queue,
  110. __u16 bytes_count);
  111. static int smctr_get_upstream_neighbor_addr(struct net_device *dev);
  112. /* H */
  113. static int smctr_hardware_send_packet(struct net_device *dev,
  114. struct net_local *tp);
  115. /* I */
  116. static int smctr_init_acbs(struct net_device *dev);
  117. static int smctr_init_adapter(struct net_device *dev);
  118. static int smctr_init_card_real(struct net_device *dev);
  119. static int smctr_init_rx_bdbs(struct net_device *dev);
  120. static int smctr_init_rx_fcbs(struct net_device *dev);
  121. static int smctr_init_shared_memory(struct net_device *dev);
  122. static int smctr_init_tx_bdbs(struct net_device *dev);
  123. static int smctr_init_tx_fcbs(struct net_device *dev);
  124. static int smctr_internal_self_test(struct net_device *dev);
  125. static irqreturn_t smctr_interrupt(int irq, void *dev_id);
  126. static int smctr_issue_enable_int_cmd(struct net_device *dev,
  127. __u16 interrupt_enable_mask);
  128. static int smctr_issue_int_ack(struct net_device *dev, __u16 iack_code,
  129. __u16 ibits);
  130. static int smctr_issue_init_timers_cmd(struct net_device *dev);
  131. static int smctr_issue_init_txrx_cmd(struct net_device *dev);
  132. static int smctr_issue_insert_cmd(struct net_device *dev);
  133. static int smctr_issue_read_ring_status_cmd(struct net_device *dev);
  134. static int smctr_issue_read_word_cmd(struct net_device *dev, __u16 aword_cnt);
  135. static int smctr_issue_remove_cmd(struct net_device *dev);
  136. static int smctr_issue_resume_acb_cmd(struct net_device *dev);
  137. static int smctr_issue_resume_rx_bdb_cmd(struct net_device *dev, __u16 queue);
  138. static int smctr_issue_resume_rx_fcb_cmd(struct net_device *dev, __u16 queue);
  139. static int smctr_issue_resume_tx_fcb_cmd(struct net_device *dev, __u16 queue);
  140. static int smctr_issue_test_internal_rom_cmd(struct net_device *dev);
  141. static int smctr_issue_test_hic_cmd(struct net_device *dev);
  142. static int smctr_issue_test_mac_reg_cmd(struct net_device *dev);
  143. static int smctr_issue_trc_loopback_cmd(struct net_device *dev);
  144. static int smctr_issue_tri_loopback_cmd(struct net_device *dev);
  145. static int smctr_issue_write_byte_cmd(struct net_device *dev,
  146. short aword_cnt, void *byte);
  147. static int smctr_issue_write_word_cmd(struct net_device *dev,
  148. short aword_cnt, void *word);
  149. /* J */
  150. static int smctr_join_complete_state(struct net_device *dev);
  151. /* L */
  152. static int smctr_link_tx_fcbs_to_bdbs(struct net_device *dev);
  153. static int smctr_load_firmware(struct net_device *dev);
  154. static int smctr_load_node_addr(struct net_device *dev);
  155. static int smctr_lobe_media_test(struct net_device *dev);
  156. static int smctr_lobe_media_test_cmd(struct net_device *dev);
  157. static int smctr_lobe_media_test_state(struct net_device *dev);
  158. /* M */
  159. static int smctr_make_8025_hdr(struct net_device *dev,
  160. MAC_HEADER *rmf, MAC_HEADER *tmf, __u16 ac_fc);
  161. static int smctr_make_access_pri(struct net_device *dev,
  162. MAC_SUB_VECTOR *tsv);
  163. static int smctr_make_addr_mod(struct net_device *dev, MAC_SUB_VECTOR *tsv);
  164. static int smctr_make_auth_funct_class(struct net_device *dev,
  165. MAC_SUB_VECTOR *tsv);
  166. static int smctr_make_corr(struct net_device *dev,
  167. MAC_SUB_VECTOR *tsv, __u16 correlator);
  168. static int smctr_make_funct_addr(struct net_device *dev,
  169. MAC_SUB_VECTOR *tsv);
  170. static int smctr_make_group_addr(struct net_device *dev,
  171. MAC_SUB_VECTOR *tsv);
  172. static int smctr_make_phy_drop_num(struct net_device *dev,
  173. MAC_SUB_VECTOR *tsv);
  174. static int smctr_make_product_id(struct net_device *dev, MAC_SUB_VECTOR *tsv);
  175. static int smctr_make_station_id(struct net_device *dev, MAC_SUB_VECTOR *tsv);
  176. static int smctr_make_ring_station_status(struct net_device *dev,
  177. MAC_SUB_VECTOR *tsv);
  178. static int smctr_make_ring_station_version(struct net_device *dev,
  179. MAC_SUB_VECTOR *tsv);
  180. static int smctr_make_tx_status_code(struct net_device *dev,
  181. MAC_SUB_VECTOR *tsv, __u16 tx_fstatus);
  182. static int smctr_make_upstream_neighbor_addr(struct net_device *dev,
  183. MAC_SUB_VECTOR *tsv);
  184. static int smctr_make_wrap_data(struct net_device *dev,
  185. MAC_SUB_VECTOR *tsv);
  186. /* O */
  187. static int smctr_open(struct net_device *dev);
  188. static int smctr_open_tr(struct net_device *dev);
  189. /* P */
  190. struct net_device *smctr_probe(int unit);
  191. static int __init smctr_probe1(struct net_device *dev, int ioaddr);
  192. static int smctr_process_rx_packet(MAC_HEADER *rmf, __u16 size,
  193. struct net_device *dev, __u16 rx_status);
  194. /* R */
  195. static int smctr_ram_memory_test(struct net_device *dev);
  196. static int smctr_rcv_chg_param(struct net_device *dev, MAC_HEADER *rmf,
  197. __u16 *correlator);
  198. static int smctr_rcv_init(struct net_device *dev, MAC_HEADER *rmf,
  199. __u16 *correlator);
  200. static int smctr_rcv_tx_forward(struct net_device *dev, MAC_HEADER *rmf);
  201. static int smctr_rcv_rq_addr_state_attch(struct net_device *dev,
  202. MAC_HEADER *rmf, __u16 *correlator);
  203. static int smctr_rcv_unknown(struct net_device *dev, MAC_HEADER *rmf,
  204. __u16 *correlator);
  205. static int smctr_reset_adapter(struct net_device *dev);
  206. static int smctr_restart_tx_chain(struct net_device *dev, short queue);
  207. static int smctr_ring_status_chg(struct net_device *dev);
  208. static int smctr_rx_frame(struct net_device *dev);
  209. /* S */
  210. static int smctr_send_dat(struct net_device *dev);
  211. static netdev_tx_t smctr_send_packet(struct sk_buff *skb,
  212. struct net_device *dev);
  213. static int smctr_send_lobe_media_test(struct net_device *dev);
  214. static int smctr_send_rpt_addr(struct net_device *dev, MAC_HEADER *rmf,
  215. __u16 correlator);
  216. static int smctr_send_rpt_attch(struct net_device *dev, MAC_HEADER *rmf,
  217. __u16 correlator);
  218. static int smctr_send_rpt_state(struct net_device *dev, MAC_HEADER *rmf,
  219. __u16 correlator);
  220. static int smctr_send_rpt_tx_forward(struct net_device *dev,
  221. MAC_HEADER *rmf, __u16 tx_fstatus);
  222. static int smctr_send_rsp(struct net_device *dev, MAC_HEADER *rmf,
  223. __u16 rcode, __u16 correlator);
  224. static int smctr_send_rq_init(struct net_device *dev);
  225. static int smctr_send_tx_forward(struct net_device *dev, MAC_HEADER *rmf,
  226. __u16 *tx_fstatus);
  227. static int smctr_set_auth_access_pri(struct net_device *dev,
  228. MAC_SUB_VECTOR *rsv);
  229. static int smctr_set_auth_funct_class(struct net_device *dev,
  230. MAC_SUB_VECTOR *rsv);
  231. static int smctr_set_corr(struct net_device *dev, MAC_SUB_VECTOR *rsv,
  232. __u16 *correlator);
  233. static int smctr_set_error_timer_value(struct net_device *dev,
  234. MAC_SUB_VECTOR *rsv);
  235. static int smctr_set_frame_forward(struct net_device *dev,
  236. MAC_SUB_VECTOR *rsv, __u8 dc_sc);
  237. static int smctr_set_local_ring_num(struct net_device *dev,
  238. MAC_SUB_VECTOR *rsv);
  239. static unsigned short smctr_set_ctrl_attention(struct net_device *dev);
  240. static void smctr_set_multicast_list(struct net_device *dev);
  241. static int smctr_set_page(struct net_device *dev, __u8 *buf);
  242. static int smctr_set_phy_drop(struct net_device *dev,
  243. MAC_SUB_VECTOR *rsv);
  244. static int smctr_set_ring_speed(struct net_device *dev);
  245. static int smctr_set_rx_look_ahead(struct net_device *dev);
  246. static int smctr_set_trc_reset(int ioaddr);
  247. static int smctr_setup_single_cmd(struct net_device *dev,
  248. __u16 command, __u16 subcommand);
  249. static int smctr_setup_single_cmd_w_data(struct net_device *dev,
  250. __u16 command, __u16 subcommand);
  251. static char *smctr_malloc(struct net_device *dev, __u16 size);
  252. static int smctr_status_chg(struct net_device *dev);
  253. /* T */
  254. static void smctr_timeout(struct net_device *dev);
  255. static int smctr_trc_send_packet(struct net_device *dev, FCBlock *fcb,
  256. __u16 queue);
  257. static __u16 smctr_tx_complete(struct net_device *dev, __u16 queue);
  258. static unsigned short smctr_tx_move_frame(struct net_device *dev,
  259. struct sk_buff *skb, __u8 *pbuff, unsigned int bytes);
  260. /* U */
  261. static int smctr_update_err_stats(struct net_device *dev);
  262. static int smctr_update_rx_chain(struct net_device *dev, __u16 queue);
  263. static int smctr_update_tx_chain(struct net_device *dev, FCBlock *fcb,
  264. __u16 queue);
  265. /* W */
  266. static int smctr_wait_cmd(struct net_device *dev);
  267. static int smctr_wait_while_cbusy(struct net_device *dev);
  268. #define TO_256_BYTE_BOUNDRY(X) (((X + 0xff) & 0xff00) - X)
  269. #define TO_PARAGRAPH_BOUNDRY(X) (((X + 0x0f) & 0xfff0) - X)
  270. #define PARAGRAPH_BOUNDRY(X) smctr_malloc(dev, TO_PARAGRAPH_BOUNDRY(X))
  271. /* Allocate Adapter Shared Memory.
  272. * IMPORTANT NOTE: Any changes to this function MUST be mirrored in the
  273. * function "get_num_rx_bdbs" below!!!
  274. *
  275. * Order of memory allocation:
  276. *
  277. * 0. Initial System Configuration Block Pointer
  278. * 1. System Configuration Block
  279. * 2. System Control Block
  280. * 3. Action Command Block
  281. * 4. Interrupt Status Block
  282. *
  283. * 5. MAC TX FCB'S
  284. * 6. NON-MAC TX FCB'S
  285. * 7. MAC TX BDB'S
  286. * 8. NON-MAC TX BDB'S
  287. * 9. MAC RX FCB'S
  288. * 10. NON-MAC RX FCB'S
  289. * 11. MAC RX BDB'S
  290. * 12. NON-MAC RX BDB'S
  291. * 13. MAC TX Data Buffer( 1, 256 byte buffer)
  292. * 14. MAC RX Data Buffer( 1, 256 byte buffer)
  293. *
  294. * 15. NON-MAC TX Data Buffer
  295. * 16. NON-MAC RX Data Buffer
  296. */
  297. static int smctr_alloc_shared_memory(struct net_device *dev)
  298. {
  299. struct net_local *tp = netdev_priv(dev);
  300. if(smctr_debug > 10)
  301. printk(KERN_DEBUG "%s: smctr_alloc_shared_memory\n", dev->name);
  302. /* Allocate initial System Control Block pointer.
  303. * This pointer is located in the last page, last offset - 4.
  304. */
  305. tp->iscpb_ptr = (ISCPBlock *)(tp->ram_access + ((__u32)64 * 0x400)
  306. - (long)ISCP_BLOCK_SIZE);
  307. /* Allocate System Control Blocks. */
  308. tp->scgb_ptr = (SCGBlock *)smctr_malloc(dev, sizeof(SCGBlock));
  309. PARAGRAPH_BOUNDRY(tp->sh_mem_used);
  310. tp->sclb_ptr = (SCLBlock *)smctr_malloc(dev, sizeof(SCLBlock));
  311. PARAGRAPH_BOUNDRY(tp->sh_mem_used);
  312. tp->acb_head = (ACBlock *)smctr_malloc(dev,
  313. sizeof(ACBlock)*tp->num_acbs);
  314. PARAGRAPH_BOUNDRY(tp->sh_mem_used);
  315. tp->isb_ptr = (ISBlock *)smctr_malloc(dev, sizeof(ISBlock));
  316. PARAGRAPH_BOUNDRY(tp->sh_mem_used);
  317. tp->misc_command_data = (__u16 *)smctr_malloc(dev, MISC_DATA_SIZE);
  318. PARAGRAPH_BOUNDRY(tp->sh_mem_used);
  319. /* Allocate transmit FCBs. */
  320. tp->tx_fcb_head[MAC_QUEUE] = (FCBlock *)smctr_malloc(dev,
  321. sizeof(FCBlock) * tp->num_tx_fcbs[MAC_QUEUE]);
  322. tp->tx_fcb_head[NON_MAC_QUEUE] = (FCBlock *)smctr_malloc(dev,
  323. sizeof(FCBlock) * tp->num_tx_fcbs[NON_MAC_QUEUE]);
  324. tp->tx_fcb_head[BUG_QUEUE] = (FCBlock *)smctr_malloc(dev,
  325. sizeof(FCBlock) * tp->num_tx_fcbs[BUG_QUEUE]);
  326. /* Allocate transmit BDBs. */
  327. tp->tx_bdb_head[MAC_QUEUE] = (BDBlock *)smctr_malloc(dev,
  328. sizeof(BDBlock) * tp->num_tx_bdbs[MAC_QUEUE]);
  329. tp->tx_bdb_head[NON_MAC_QUEUE] = (BDBlock *)smctr_malloc(dev,
  330. sizeof(BDBlock) * tp->num_tx_bdbs[NON_MAC_QUEUE]);
  331. tp->tx_bdb_head[BUG_QUEUE] = (BDBlock *)smctr_malloc(dev,
  332. sizeof(BDBlock) * tp->num_tx_bdbs[BUG_QUEUE]);
  333. /* Allocate receive FCBs. */
  334. tp->rx_fcb_head[MAC_QUEUE] = (FCBlock *)smctr_malloc(dev,
  335. sizeof(FCBlock) * tp->num_rx_fcbs[MAC_QUEUE]);
  336. tp->rx_fcb_head[NON_MAC_QUEUE] = (FCBlock *)smctr_malloc(dev,
  337. sizeof(FCBlock) * tp->num_rx_fcbs[NON_MAC_QUEUE]);
  338. /* Allocate receive BDBs. */
  339. tp->rx_bdb_head[MAC_QUEUE] = (BDBlock *)smctr_malloc(dev,
  340. sizeof(BDBlock) * tp->num_rx_bdbs[MAC_QUEUE]);
  341. tp->rx_bdb_end[MAC_QUEUE] = (BDBlock *)smctr_malloc(dev, 0);
  342. tp->rx_bdb_head[NON_MAC_QUEUE] = (BDBlock *)smctr_malloc(dev,
  343. sizeof(BDBlock) * tp->num_rx_bdbs[NON_MAC_QUEUE]);
  344. tp->rx_bdb_end[NON_MAC_QUEUE] = (BDBlock *)smctr_malloc(dev, 0);
  345. /* Allocate MAC transmit buffers.
  346. * MAC Tx Buffers doen't have to be on an ODD Boundry.
  347. */
  348. tp->tx_buff_head[MAC_QUEUE]
  349. = (__u16 *)smctr_malloc(dev, tp->tx_buff_size[MAC_QUEUE]);
  350. tp->tx_buff_curr[MAC_QUEUE] = tp->tx_buff_head[MAC_QUEUE];
  351. tp->tx_buff_end [MAC_QUEUE] = (__u16 *)smctr_malloc(dev, 0);
  352. /* Allocate BUG transmit buffers. */
  353. tp->tx_buff_head[BUG_QUEUE]
  354. = (__u16 *)smctr_malloc(dev, tp->tx_buff_size[BUG_QUEUE]);
  355. tp->tx_buff_curr[BUG_QUEUE] = tp->tx_buff_head[BUG_QUEUE];
  356. tp->tx_buff_end[BUG_QUEUE] = (__u16 *)smctr_malloc(dev, 0);
  357. /* Allocate MAC receive data buffers.
  358. * MAC Rx buffer doesn't have to be on a 256 byte boundary.
  359. */
  360. tp->rx_buff_head[MAC_QUEUE] = (__u16 *)smctr_malloc(dev,
  361. RX_DATA_BUFFER_SIZE * tp->num_rx_bdbs[MAC_QUEUE]);
  362. tp->rx_buff_end[MAC_QUEUE] = (__u16 *)smctr_malloc(dev, 0);
  363. /* Allocate Non-MAC transmit buffers.
  364. * ?? For maximum Netware performance, put Tx Buffers on
  365. * ODD Boundry and then restore malloc to Even Boundrys.
  366. */
  367. smctr_malloc(dev, 1L);
  368. tp->tx_buff_head[NON_MAC_QUEUE]
  369. = (__u16 *)smctr_malloc(dev, tp->tx_buff_size[NON_MAC_QUEUE]);
  370. tp->tx_buff_curr[NON_MAC_QUEUE] = tp->tx_buff_head[NON_MAC_QUEUE];
  371. tp->tx_buff_end [NON_MAC_QUEUE] = (__u16 *)smctr_malloc(dev, 0);
  372. smctr_malloc(dev, 1L);
  373. /* Allocate Non-MAC receive data buffers.
  374. * To guarantee a minimum of 256 contiguous memory to
  375. * UM_Receive_Packet's lookahead pointer, before a page
  376. * change or ring end is encountered, place each rx buffer on
  377. * a 256 byte boundary.
  378. */
  379. smctr_malloc(dev, TO_256_BYTE_BOUNDRY(tp->sh_mem_used));
  380. tp->rx_buff_head[NON_MAC_QUEUE] = (__u16 *)smctr_malloc(dev,
  381. RX_DATA_BUFFER_SIZE * tp->num_rx_bdbs[NON_MAC_QUEUE]);
  382. tp->rx_buff_end[NON_MAC_QUEUE] = (__u16 *)smctr_malloc(dev, 0);
  383. return (0);
  384. }
  385. /* Enter Bypass state. */
  386. static int smctr_bypass_state(struct net_device *dev)
  387. {
  388. int err;
  389. if(smctr_debug > 10)
  390. printk(KERN_DEBUG "%s: smctr_bypass_state\n", dev->name);
  391. err = smctr_setup_single_cmd(dev, ACB_CMD_CHANGE_JOIN_STATE, JS_BYPASS_STATE);
  392. return (err);
  393. }
  394. static int smctr_checksum_firmware(struct net_device *dev)
  395. {
  396. struct net_local *tp = netdev_priv(dev);
  397. __u16 i, checksum = 0;
  398. if(smctr_debug > 10)
  399. printk(KERN_DEBUG "%s: smctr_checksum_firmware\n", dev->name);
  400. smctr_enable_adapter_ctrl_store(dev);
  401. for(i = 0; i < CS_RAM_SIZE; i += 2)
  402. checksum += *((__u16 *)(tp->ram_access + i));
  403. tp->microcode_version = *(__u16 *)(tp->ram_access
  404. + CS_RAM_VERSION_OFFSET);
  405. tp->microcode_version >>= 8;
  406. smctr_disable_adapter_ctrl_store(dev);
  407. if(checksum)
  408. return (checksum);
  409. return (0);
  410. }
  411. static int __init smctr_chk_mca(struct net_device *dev)
  412. {
  413. #ifdef CONFIG_MCA_LEGACY
  414. struct net_local *tp = netdev_priv(dev);
  415. int current_slot;
  416. __u8 r1, r2, r3, r4, r5;
  417. current_slot = mca_find_unused_adapter(smctr_posid, 0);
  418. if(current_slot == MCA_NOTFOUND)
  419. return (-ENODEV);
  420. mca_set_adapter_name(current_slot, smctr_name);
  421. mca_mark_as_used(current_slot);
  422. tp->slot_num = current_slot;
  423. r1 = mca_read_stored_pos(tp->slot_num, 2);
  424. r2 = mca_read_stored_pos(tp->slot_num, 3);
  425. if(tp->slot_num)
  426. outb(CNFG_POS_CONTROL_REG, (__u8)((tp->slot_num - 1) | CNFG_SLOT_ENABLE_BIT));
  427. else
  428. outb(CNFG_POS_CONTROL_REG, (__u8)((tp->slot_num) | CNFG_SLOT_ENABLE_BIT));
  429. r1 = inb(CNFG_POS_REG1);
  430. r2 = inb(CNFG_POS_REG0);
  431. tp->bic_type = BIC_594_CHIP;
  432. /* IO */
  433. r2 = mca_read_stored_pos(tp->slot_num, 2);
  434. r2 &= 0xF0;
  435. dev->base_addr = ((__u16)r2 << 8) + (__u16)0x800;
  436. request_region(dev->base_addr, SMCTR_IO_EXTENT, smctr_name);
  437. /* IRQ */
  438. r5 = mca_read_stored_pos(tp->slot_num, 5);
  439. r5 &= 0xC;
  440. switch(r5)
  441. {
  442. case 0:
  443. dev->irq = 3;
  444. break;
  445. case 0x4:
  446. dev->irq = 4;
  447. break;
  448. case 0x8:
  449. dev->irq = 10;
  450. break;
  451. default:
  452. dev->irq = 15;
  453. break;
  454. }
  455. if (request_irq(dev->irq, smctr_interrupt, IRQF_SHARED, smctr_name, dev)) {
  456. release_region(dev->base_addr, SMCTR_IO_EXTENT);
  457. return -ENODEV;
  458. }
  459. /* Get RAM base */
  460. r3 = mca_read_stored_pos(tp->slot_num, 3);
  461. tp->ram_base = ((__u32)(r3 & 0x7) << 13) + 0x0C0000;
  462. if (r3 & 0x8)
  463. tp->ram_base += 0x010000;
  464. if (r3 & 0x80)
  465. tp->ram_base += 0xF00000;
  466. /* Get Ram Size */
  467. r3 &= 0x30;
  468. r3 >>= 4;
  469. tp->ram_usable = (__u16)CNFG_SIZE_8KB << r3;
  470. tp->ram_size = (__u16)CNFG_SIZE_64KB;
  471. tp->board_id |= TOKEN_MEDIA;
  472. r4 = mca_read_stored_pos(tp->slot_num, 4);
  473. tp->rom_base = ((__u32)(r4 & 0x7) << 13) + 0x0C0000;
  474. if (r4 & 0x8)
  475. tp->rom_base += 0x010000;
  476. /* Get ROM size. */
  477. r4 >>= 4;
  478. switch (r4) {
  479. case 0:
  480. tp->rom_size = CNFG_SIZE_8KB;
  481. break;
  482. case 1:
  483. tp->rom_size = CNFG_SIZE_16KB;
  484. break;
  485. case 2:
  486. tp->rom_size = CNFG_SIZE_32KB;
  487. break;
  488. default:
  489. tp->rom_size = ROM_DISABLE;
  490. }
  491. /* Get Media Type. */
  492. r5 = mca_read_stored_pos(tp->slot_num, 5);
  493. r5 &= CNFG_MEDIA_TYPE_MASK;
  494. switch(r5)
  495. {
  496. case (0):
  497. tp->media_type = MEDIA_STP_4;
  498. break;
  499. case (1):
  500. tp->media_type = MEDIA_STP_16;
  501. break;
  502. case (3):
  503. tp->media_type = MEDIA_UTP_16;
  504. break;
  505. default:
  506. tp->media_type = MEDIA_UTP_4;
  507. break;
  508. }
  509. tp->media_menu = 14;
  510. r2 = mca_read_stored_pos(tp->slot_num, 2);
  511. if(!(r2 & 0x02))
  512. tp->mode_bits |= EARLY_TOKEN_REL;
  513. /* Disable slot */
  514. outb(CNFG_POS_CONTROL_REG, 0);
  515. tp->board_id = smctr_get_boardid(dev, 1);
  516. switch(tp->board_id & 0xffff)
  517. {
  518. case WD8115TA:
  519. smctr_model = "8115T/A";
  520. break;
  521. case WD8115T:
  522. if(tp->extra_info & CHIP_REV_MASK)
  523. smctr_model = "8115T rev XE";
  524. else
  525. smctr_model = "8115T rev XD";
  526. break;
  527. default:
  528. smctr_model = "Unknown";
  529. break;
  530. }
  531. return (0);
  532. #else
  533. return (-1);
  534. #endif /* CONFIG_MCA_LEGACY */
  535. }
  536. static int smctr_chg_rx_mask(struct net_device *dev)
  537. {
  538. struct net_local *tp = netdev_priv(dev);
  539. int err = 0;
  540. if(smctr_debug > 10)
  541. printk(KERN_DEBUG "%s: smctr_chg_rx_mask\n", dev->name);
  542. smctr_enable_16bit(dev);
  543. smctr_set_page(dev, (__u8 *)tp->ram_access);
  544. if(tp->mode_bits & LOOPING_MODE_MASK)
  545. tp->config_word0 |= RX_OWN_BIT;
  546. else
  547. tp->config_word0 &= ~RX_OWN_BIT;
  548. if(tp->receive_mask & PROMISCUOUS_MODE)
  549. tp->config_word0 |= PROMISCUOUS_BIT;
  550. else
  551. tp->config_word0 &= ~PROMISCUOUS_BIT;
  552. if(tp->receive_mask & ACCEPT_ERR_PACKETS)
  553. tp->config_word0 |= SAVBAD_BIT;
  554. else
  555. tp->config_word0 &= ~SAVBAD_BIT;
  556. if(tp->receive_mask & ACCEPT_ATT_MAC_FRAMES)
  557. tp->config_word0 |= RXATMAC;
  558. else
  559. tp->config_word0 &= ~RXATMAC;
  560. if(tp->receive_mask & ACCEPT_MULTI_PROM)
  561. tp->config_word1 |= MULTICAST_ADDRESS_BIT;
  562. else
  563. tp->config_word1 &= ~MULTICAST_ADDRESS_BIT;
  564. if(tp->receive_mask & ACCEPT_SOURCE_ROUTING_SPANNING)
  565. tp->config_word1 |= SOURCE_ROUTING_SPANNING_BITS;
  566. else
  567. {
  568. if(tp->receive_mask & ACCEPT_SOURCE_ROUTING)
  569. tp->config_word1 |= SOURCE_ROUTING_EXPLORER_BIT;
  570. else
  571. tp->config_word1 &= ~SOURCE_ROUTING_SPANNING_BITS;
  572. }
  573. if((err = smctr_issue_write_word_cmd(dev, RW_CONFIG_REGISTER_0,
  574. &tp->config_word0)))
  575. {
  576. return (err);
  577. }
  578. if((err = smctr_issue_write_word_cmd(dev, RW_CONFIG_REGISTER_1,
  579. &tp->config_word1)))
  580. {
  581. return (err);
  582. }
  583. smctr_disable_16bit(dev);
  584. return (0);
  585. }
  586. static int smctr_clear_int(struct net_device *dev)
  587. {
  588. struct net_local *tp = netdev_priv(dev);
  589. outb((tp->trc_mask | CSR_CLRTINT), dev->base_addr + CSR);
  590. return (0);
  591. }
  592. static int smctr_clear_trc_reset(int ioaddr)
  593. {
  594. __u8 r;
  595. r = inb(ioaddr + MSR);
  596. outb(~MSR_RST & r, ioaddr + MSR);
  597. return (0);
  598. }
  599. /*
  600. * The inverse routine to smctr_open().
  601. */
  602. static int smctr_close(struct net_device *dev)
  603. {
  604. struct net_local *tp = netdev_priv(dev);
  605. struct sk_buff *skb;
  606. int err;
  607. netif_stop_queue(dev);
  608. tp->cleanup = 1;
  609. /* Check to see if adapter is already in a closed state. */
  610. if(tp->status != OPEN)
  611. return (0);
  612. smctr_enable_16bit(dev);
  613. smctr_set_page(dev, (__u8 *)tp->ram_access);
  614. if((err = smctr_issue_remove_cmd(dev)))
  615. {
  616. smctr_disable_16bit(dev);
  617. return (err);
  618. }
  619. for(;;)
  620. {
  621. skb = skb_dequeue(&tp->SendSkbQueue);
  622. if(skb == NULL)
  623. break;
  624. tp->QueueSkb++;
  625. dev_kfree_skb(skb);
  626. }
  627. return (0);
  628. }
  629. static int smctr_decode_firmware(struct net_device *dev,
  630. const struct firmware *fw)
  631. {
  632. struct net_local *tp = netdev_priv(dev);
  633. short bit = 0x80, shift = 12;
  634. DECODE_TREE_NODE *tree;
  635. short branch, tsize;
  636. __u16 buff = 0;
  637. long weight;
  638. __u8 *ucode;
  639. __u16 *mem;
  640. if(smctr_debug > 10)
  641. printk(KERN_DEBUG "%s: smctr_decode_firmware\n", dev->name);
  642. weight = *(long *)(fw->data + WEIGHT_OFFSET);
  643. tsize = *(__u8 *)(fw->data + TREE_SIZE_OFFSET);
  644. tree = (DECODE_TREE_NODE *)(fw->data + TREE_OFFSET);
  645. ucode = (__u8 *)(fw->data + TREE_OFFSET
  646. + (tsize * sizeof(DECODE_TREE_NODE)));
  647. mem = (__u16 *)(tp->ram_access);
  648. while(weight)
  649. {
  650. branch = ROOT;
  651. while((tree + branch)->tag != LEAF && weight)
  652. {
  653. branch = *ucode & bit ? (tree + branch)->llink
  654. : (tree + branch)->rlink;
  655. bit >>= 1;
  656. weight--;
  657. if(bit == 0)
  658. {
  659. bit = 0x80;
  660. ucode++;
  661. }
  662. }
  663. buff |= (tree + branch)->info << shift;
  664. shift -= 4;
  665. if(shift < 0)
  666. {
  667. *(mem++) = SWAP_BYTES(buff);
  668. buff = 0;
  669. shift = 12;
  670. }
  671. }
  672. /* The following assumes the Control Store Memory has
  673. * been initialized to zero. If the last partial word
  674. * is zero, it will not be written.
  675. */
  676. if(buff)
  677. *(mem++) = SWAP_BYTES(buff);
  678. return (0);
  679. }
  680. static int smctr_disable_16bit(struct net_device *dev)
  681. {
  682. return (0);
  683. }
  684. /*
  685. * On Exit, Adapter is:
  686. * 1. TRC is in a reset state and un-initialized.
  687. * 2. Adapter memory is enabled.
  688. * 3. Control Store memory is out of context (-WCSS is 1).
  689. */
  690. static int smctr_disable_adapter_ctrl_store(struct net_device *dev)
  691. {
  692. struct net_local *tp = netdev_priv(dev);
  693. int ioaddr = dev->base_addr;
  694. if(smctr_debug > 10)
  695. printk(KERN_DEBUG "%s: smctr_disable_adapter_ctrl_store\n", dev->name);
  696. tp->trc_mask |= CSR_WCSS;
  697. outb(tp->trc_mask, ioaddr + CSR);
  698. return (0);
  699. }
  700. static int smctr_disable_bic_int(struct net_device *dev)
  701. {
  702. struct net_local *tp = netdev_priv(dev);
  703. int ioaddr = dev->base_addr;
  704. tp->trc_mask = CSR_MSK_ALL | CSR_MSKCBUSY
  705. | CSR_MSKTINT | CSR_WCSS;
  706. outb(tp->trc_mask, ioaddr + CSR);
  707. return (0);
  708. }
  709. static int smctr_enable_16bit(struct net_device *dev)
  710. {
  711. struct net_local *tp = netdev_priv(dev);
  712. __u8 r;
  713. if(tp->adapter_bus == BUS_ISA16_TYPE)
  714. {
  715. r = inb(dev->base_addr + LAAR);
  716. outb((r | LAAR_MEM16ENB), dev->base_addr + LAAR);
  717. }
  718. return (0);
  719. }
  720. /*
  721. * To enable the adapter control store memory:
  722. * 1. Adapter must be in a RESET state.
  723. * 2. Adapter memory must be enabled.
  724. * 3. Control Store Memory is in context (-WCSS is 0).
  725. */
  726. static int smctr_enable_adapter_ctrl_store(struct net_device *dev)
  727. {
  728. struct net_local *tp = netdev_priv(dev);
  729. int ioaddr = dev->base_addr;
  730. if(smctr_debug > 10)
  731. printk(KERN_DEBUG "%s: smctr_enable_adapter_ctrl_store\n", dev->name);
  732. smctr_set_trc_reset(ioaddr);
  733. smctr_enable_adapter_ram(dev);
  734. tp->trc_mask &= ~CSR_WCSS;
  735. outb(tp->trc_mask, ioaddr + CSR);
  736. return (0);
  737. }
  738. static int smctr_enable_adapter_ram(struct net_device *dev)
  739. {
  740. int ioaddr = dev->base_addr;
  741. __u8 r;
  742. if(smctr_debug > 10)
  743. printk(KERN_DEBUG "%s: smctr_enable_adapter_ram\n", dev->name);
  744. r = inb(ioaddr + MSR);
  745. outb(MSR_MEMB | r, ioaddr + MSR);
  746. return (0);
  747. }
  748. static int smctr_enable_bic_int(struct net_device *dev)
  749. {
  750. struct net_local *tp = netdev_priv(dev);
  751. int ioaddr = dev->base_addr;
  752. __u8 r;
  753. switch(tp->bic_type)
  754. {
  755. case (BIC_584_CHIP):
  756. tp->trc_mask = CSR_MSKCBUSY | CSR_WCSS;
  757. outb(tp->trc_mask, ioaddr + CSR);
  758. r = inb(ioaddr + IRR);
  759. outb(r | IRR_IEN, ioaddr + IRR);
  760. break;
  761. case (BIC_594_CHIP):
  762. tp->trc_mask = CSR_MSKCBUSY | CSR_WCSS;
  763. outb(tp->trc_mask, ioaddr + CSR);
  764. r = inb(ioaddr + IMCCR);
  765. outb(r | IMCCR_EIL, ioaddr + IMCCR);
  766. break;
  767. }
  768. return (0);
  769. }
  770. static int __init smctr_chk_isa(struct net_device *dev)
  771. {
  772. struct net_local *tp = netdev_priv(dev);
  773. int ioaddr = dev->base_addr;
  774. __u8 r1, r2, b, chksum = 0;
  775. __u16 r;
  776. int i;
  777. int err = -ENODEV;
  778. if(smctr_debug > 10)
  779. printk(KERN_DEBUG "%s: smctr_chk_isa %#4x\n", dev->name, ioaddr);
  780. if((ioaddr & 0x1F) != 0)
  781. goto out;
  782. /* Grab the region so that no one else tries to probe our ioports. */
  783. if (!request_region(ioaddr, SMCTR_IO_EXTENT, smctr_name)) {
  784. err = -EBUSY;
  785. goto out;
  786. }
  787. /* Checksum SMC node address */
  788. for(i = 0; i < 8; i++)
  789. {
  790. b = inb(ioaddr + LAR0 + i);
  791. chksum += b;
  792. }
  793. if (chksum != NODE_ADDR_CKSUM)
  794. goto out2;
  795. b = inb(ioaddr + BDID);
  796. if(b != BRD_ID_8115T)
  797. {
  798. printk(KERN_ERR "%s: The adapter found is not supported\n", dev->name);
  799. goto out2;
  800. }
  801. /* Check for 8115T Board ID */
  802. r2 = 0;
  803. for(r = 0; r < 8; r++)
  804. {
  805. r1 = inb(ioaddr + 0x8 + r);
  806. r2 += r1;
  807. }
  808. /* value of RegF adds up the sum to 0xFF */
  809. if((r2 != 0xFF) && (r2 != 0xEE))
  810. goto out2;
  811. /* Get adapter ID */
  812. tp->board_id = smctr_get_boardid(dev, 0);
  813. switch(tp->board_id & 0xffff)
  814. {
  815. case WD8115TA:
  816. smctr_model = "8115T/A";
  817. break;
  818. case WD8115T:
  819. if(tp->extra_info & CHIP_REV_MASK)
  820. smctr_model = "8115T rev XE";
  821. else
  822. smctr_model = "8115T rev XD";
  823. break;
  824. default:
  825. smctr_model = "Unknown";
  826. break;
  827. }
  828. /* Store BIC type. */
  829. tp->bic_type = BIC_584_CHIP;
  830. tp->nic_type = NIC_825_CHIP;
  831. /* Copy Ram Size */
  832. tp->ram_usable = CNFG_SIZE_16KB;
  833. tp->ram_size = CNFG_SIZE_64KB;
  834. /* Get 58x Ram Base */
  835. r1 = inb(ioaddr);
  836. r1 &= 0x3F;
  837. r2 = inb(ioaddr + CNFG_LAAR_584);
  838. r2 &= CNFG_LAAR_MASK;
  839. r2 <<= 3;
  840. r2 |= ((r1 & 0x38) >> 3);
  841. tp->ram_base = ((__u32)r2 << 16) + (((__u32)(r1 & 0x7)) << 13);
  842. /* Get 584 Irq */
  843. r1 = 0;
  844. r1 = inb(ioaddr + CNFG_ICR_583);
  845. r1 &= CNFG_ICR_IR2_584;
  846. r2 = inb(ioaddr + CNFG_IRR_583);
  847. r2 &= CNFG_IRR_IRQS; /* 0x60 */
  848. r2 >>= 5;
  849. switch(r2)
  850. {
  851. case 0:
  852. if(r1 == 0)
  853. dev->irq = 2;
  854. else
  855. dev->irq = 10;
  856. break;
  857. case 1:
  858. if(r1 == 0)
  859. dev->irq = 3;
  860. else
  861. dev->irq = 11;
  862. break;
  863. case 2:
  864. if(r1 == 0)
  865. {
  866. if(tp->extra_info & ALTERNATE_IRQ_BIT)
  867. dev->irq = 5;
  868. else
  869. dev->irq = 4;
  870. }
  871. else
  872. dev->irq = 15;
  873. break;
  874. case 3:
  875. if(r1 == 0)
  876. dev->irq = 7;
  877. else
  878. dev->irq = 4;
  879. break;
  880. default:
  881. printk(KERN_ERR "%s: No IRQ found aborting\n", dev->name);
  882. goto out2;
  883. }
  884. if (request_irq(dev->irq, smctr_interrupt, IRQF_SHARED, smctr_name, dev))
  885. goto out2;
  886. /* Get 58x Rom Base */
  887. r1 = inb(ioaddr + CNFG_BIO_583);
  888. r1 &= 0x3E;
  889. r1 |= 0x40;
  890. tp->rom_base = (__u32)r1 << 13;
  891. /* Get 58x Rom Size */
  892. r1 = inb(ioaddr + CNFG_BIO_583);
  893. r1 &= 0xC0;
  894. if(r1 == 0)
  895. tp->rom_size = ROM_DISABLE;
  896. else
  897. {
  898. r1 >>= 6;
  899. tp->rom_size = (__u16)CNFG_SIZE_8KB << r1;
  900. }
  901. /* Get 58x Boot Status */
  902. r1 = inb(ioaddr + CNFG_GP2);
  903. tp->mode_bits &= (~BOOT_STATUS_MASK);
  904. if(r1 & CNFG_GP2_BOOT_NIBBLE)
  905. tp->mode_bits |= BOOT_TYPE_1;
  906. /* Get 58x Zero Wait State */
  907. tp->mode_bits &= (~ZERO_WAIT_STATE_MASK);
  908. r1 = inb(ioaddr + CNFG_IRR_583);
  909. if(r1 & CNFG_IRR_ZWS)
  910. tp->mode_bits |= ZERO_WAIT_STATE_8_BIT;
  911. if(tp->board_id & BOARD_16BIT)
  912. {
  913. r1 = inb(ioaddr + CNFG_LAAR_584);
  914. if(r1 & CNFG_LAAR_ZWS)
  915. tp->mode_bits |= ZERO_WAIT_STATE_16_BIT;
  916. }
  917. /* Get 584 Media Menu */
  918. tp->media_menu = 14;
  919. r1 = inb(ioaddr + CNFG_IRR_583);
  920. tp->mode_bits &= 0xf8ff; /* (~CNFG_INTERFACE_TYPE_MASK) */
  921. if((tp->board_id & TOKEN_MEDIA) == TOKEN_MEDIA)
  922. {
  923. /* Get Advanced Features */
  924. if(((r1 & 0x6) >> 1) == 0x3)
  925. tp->media_type |= MEDIA_UTP_16;
  926. else
  927. {
  928. if(((r1 & 0x6) >> 1) == 0x2)
  929. tp->media_type |= MEDIA_STP_16;
  930. else
  931. {
  932. if(((r1 & 0x6) >> 1) == 0x1)
  933. tp->media_type |= MEDIA_UTP_4;
  934. else
  935. tp->media_type |= MEDIA_STP_4;
  936. }
  937. }
  938. r1 = inb(ioaddr + CNFG_GP2);
  939. if(!(r1 & 0x2) ) /* GP2_ETRD */
  940. tp->mode_bits |= EARLY_TOKEN_REL;
  941. /* see if the chip is corrupted
  942. if(smctr_read_584_chksum(ioaddr))
  943. {
  944. printk(KERN_ERR "%s: EEPROM Checksum Failure\n", dev->name);
  945. free_irq(dev->irq, dev);
  946. goto out2;
  947. }
  948. */
  949. }
  950. return (0);
  951. out2:
  952. release_region(ioaddr, SMCTR_IO_EXTENT);
  953. out:
  954. return err;
  955. }
  956. static int __init smctr_get_boardid(struct net_device *dev, int mca)
  957. {
  958. struct net_local *tp = netdev_priv(dev);
  959. int ioaddr = dev->base_addr;
  960. __u8 r, r1, IdByte;
  961. __u16 BoardIdMask;
  962. tp->board_id = BoardIdMask = 0;
  963. if(mca)
  964. {
  965. BoardIdMask |= (MICROCHANNEL+INTERFACE_CHIP+TOKEN_MEDIA+PAGED_RAM+BOARD_16BIT);
  966. tp->extra_info |= (INTERFACE_594_CHIP+RAM_SIZE_64K+NIC_825_BIT+ALTERNATE_IRQ_BIT+SLOT_16BIT);
  967. }
  968. else
  969. {
  970. BoardIdMask|=(INTERFACE_CHIP+TOKEN_MEDIA+PAGED_RAM+BOARD_16BIT);
  971. tp->extra_info |= (INTERFACE_584_CHIP + RAM_SIZE_64K
  972. + NIC_825_BIT + ALTERNATE_IRQ_BIT);
  973. }
  974. if(!mca)
  975. {
  976. r = inb(ioaddr + BID_REG_1);
  977. r &= 0x0c;
  978. outb(r, ioaddr + BID_REG_1);
  979. r = inb(ioaddr + BID_REG_1);
  980. if(r & BID_SIXTEEN_BIT_BIT)
  981. {
  982. tp->extra_info |= SLOT_16BIT;
  983. tp->adapter_bus = BUS_ISA16_TYPE;
  984. }
  985. else
  986. tp->adapter_bus = BUS_ISA8_TYPE;
  987. }
  988. else
  989. tp->adapter_bus = BUS_MCA_TYPE;
  990. /* Get Board Id Byte */
  991. IdByte = inb(ioaddr + BID_BOARD_ID_BYTE);
  992. /* if Major version > 1.0 then
  993. * return;
  994. */
  995. if(IdByte & 0xF8)
  996. return (-1);
  997. r1 = inb(ioaddr + BID_REG_1);
  998. r1 &= BID_ICR_MASK;
  999. r1 |= BID_OTHER_BIT;
  1000. outb(r1, ioaddr + BID_REG_1);
  1001. r1 = inb(ioaddr + BID_REG_3);
  1002. r1 &= BID_EAR_MASK;
  1003. r1 |= BID_ENGR_PAGE;
  1004. outb(r1, ioaddr + BID_REG_3);
  1005. r1 = inb(ioaddr + BID_REG_1);
  1006. r1 &= BID_ICR_MASK;
  1007. r1 |= (BID_RLA | BID_OTHER_BIT);
  1008. outb(r1, ioaddr + BID_REG_1);
  1009. r1 = inb(ioaddr + BID_REG_1);
  1010. while(r1 & BID_RECALL_DONE_MASK)
  1011. r1 = inb(ioaddr + BID_REG_1);
  1012. r = inb(ioaddr + BID_LAR_0 + BID_REG_6);
  1013. /* clear chip rev bits */
  1014. tp->extra_info &= ~CHIP_REV_MASK;
  1015. tp->extra_info |= ((r & BID_EEPROM_CHIP_REV_MASK) << 6);
  1016. r1 = inb(ioaddr + BID_REG_1);
  1017. r1 &= BID_ICR_MASK;
  1018. r1 |= BID_OTHER_BIT;
  1019. outb(r1, ioaddr + BID_REG_1);
  1020. r1 = inb(ioaddr + BID_REG_3);
  1021. r1 &= BID_EAR_MASK;
  1022. r1 |= BID_EA6;
  1023. outb(r1, ioaddr + BID_REG_3);
  1024. r1 = inb(ioaddr + BID_REG_1);
  1025. r1 &= BID_ICR_MASK;
  1026. r1 |= BID_RLA;
  1027. outb(r1, ioaddr + BID_REG_1);
  1028. r1 = inb(ioaddr + BID_REG_1);
  1029. while(r1 & BID_RECALL_DONE_MASK)
  1030. r1 = inb(ioaddr + BID_REG_1);
  1031. return (BoardIdMask);
  1032. }
  1033. static int smctr_get_group_address(struct net_device *dev)
  1034. {
  1035. smctr_issue_read_word_cmd(dev, RW_INDIVIDUAL_GROUP_ADDR);
  1036. return(smctr_wait_cmd(dev));
  1037. }
  1038. static int smctr_get_functional_address(struct net_device *dev)
  1039. {
  1040. smctr_issue_read_word_cmd(dev, RW_FUNCTIONAL_ADDR);
  1041. return(smctr_wait_cmd(dev));
  1042. }
  1043. /* Calculate number of Non-MAC receive BDB's and data buffers.
  1044. * This function must simulate allocateing shared memory exactly
  1045. * as the allocate_shared_memory function above.
  1046. */
  1047. static unsigned int smctr_get_num_rx_bdbs(struct net_device *dev)
  1048. {
  1049. struct net_local *tp = netdev_priv(dev);
  1050. unsigned int mem_used = 0;
  1051. /* Allocate System Control Blocks. */
  1052. mem_used += sizeof(SCGBlock);
  1053. mem_used += TO_PARAGRAPH_BOUNDRY(mem_used);
  1054. mem_used += sizeof(SCLBlock);
  1055. mem_used += TO_PARAGRAPH_BOUNDRY(mem_used);
  1056. mem_used += sizeof(ACBlock) * tp->num_acbs;
  1057. mem_used += TO_PARAGRAPH_BOUNDRY(mem_used);
  1058. mem_used += sizeof(ISBlock);
  1059. mem_used += TO_PARAGRAPH_BOUNDRY(mem_used);
  1060. mem_used += MISC_DATA_SIZE;
  1061. /* Allocate transmit FCB's. */
  1062. mem_used += TO_PARAGRAPH_BOUNDRY(mem_used);
  1063. mem_used += sizeof(FCBlock) * tp->num_tx_fcbs[MAC_QUEUE];
  1064. mem_used += sizeof(FCBlock) * tp->num_tx_fcbs[NON_MAC_QUEUE];
  1065. mem_used += sizeof(FCBlock) * tp->num_tx_fcbs[BUG_QUEUE];
  1066. /* Allocate transmit BDBs. */
  1067. mem_used += sizeof(BDBlock) * tp->num_tx_bdbs[MAC_QUEUE];
  1068. mem_used += sizeof(BDBlock) * tp->num_tx_bdbs[NON_MAC_QUEUE];
  1069. mem_used += sizeof(BDBlock) * tp->num_tx_bdbs[BUG_QUEUE];
  1070. /* Allocate receive FCBs. */
  1071. mem_used += sizeof(FCBlock) * tp->num_rx_fcbs[MAC_QUEUE];
  1072. mem_used += sizeof(FCBlock) * tp->num_rx_fcbs[NON_MAC_QUEUE];
  1073. /* Allocate receive BDBs. */
  1074. mem_used += sizeof(BDBlock) * tp->num_rx_bdbs[MAC_QUEUE];
  1075. /* Allocate MAC transmit buffers.
  1076. * MAC transmit buffers don't have to be on an ODD Boundry.
  1077. */
  1078. mem_used += tp->tx_buff_size[MAC_QUEUE];
  1079. /* Allocate BUG transmit buffers. */
  1080. mem_used += tp->tx_buff_size[BUG_QUEUE];
  1081. /* Allocate MAC receive data buffers.
  1082. * MAC receive buffers don't have to be on a 256 byte boundary.
  1083. */
  1084. mem_used += RX_DATA_BUFFER_SIZE * tp->num_rx_bdbs[MAC_QUEUE];
  1085. /* Allocate Non-MAC transmit buffers.
  1086. * For maximum Netware performance, put Tx Buffers on
  1087. * ODD Boundry,and then restore malloc to Even Boundrys.
  1088. */
  1089. mem_used += 1L;
  1090. mem_used += tp->tx_buff_size[NON_MAC_QUEUE];
  1091. mem_used += 1L;
  1092. /* CALCULATE NUMBER OF NON-MAC RX BDB'S
  1093. * AND NON-MAC RX DATA BUFFERS
  1094. *
  1095. * Make sure the mem_used offset at this point is the
  1096. * same as in allocate_shared memory or the following
  1097. * boundary adjustment will be incorrect (i.e. not allocating
  1098. * the non-mac receive buffers above cannot change the 256
  1099. * byte offset).
  1100. *
  1101. * Since this cannot be guaranteed, adding the full 256 bytes
  1102. * to the amount of shared memory used at this point will guaranteed
  1103. * that the rx data buffers do not overflow shared memory.
  1104. */
  1105. mem_used += 0x100;
  1106. return((0xffff - mem_used) / (RX_DATA_BUFFER_SIZE + sizeof(BDBlock)));
  1107. }
  1108. static int smctr_get_physical_drop_number(struct net_device *dev)
  1109. {
  1110. smctr_issue_read_word_cmd(dev, RW_PHYSICAL_DROP_NUMBER);
  1111. return(smctr_wait_cmd(dev));
  1112. }
  1113. static __u8 * smctr_get_rx_pointer(struct net_device *dev, short queue)
  1114. {
  1115. struct net_local *tp = netdev_priv(dev);
  1116. BDBlock *bdb;
  1117. bdb = (BDBlock *)((__u32)tp->ram_access
  1118. + (__u32)(tp->rx_fcb_curr[queue]->trc_bdb_ptr));
  1119. tp->rx_fcb_curr[queue]->bdb_ptr = bdb;
  1120. return ((__u8 *)bdb->data_block_ptr);
  1121. }
  1122. static int smctr_get_station_id(struct net_device *dev)
  1123. {
  1124. smctr_issue_read_word_cmd(dev, RW_INDIVIDUAL_MAC_ADDRESS);
  1125. return(smctr_wait_cmd(dev));
  1126. }
  1127. /*
  1128. * Get the current statistics. This may be called with the card open
  1129. * or closed.
  1130. */
  1131. static struct net_device_stats *smctr_get_stats(struct net_device *dev)
  1132. {
  1133. struct net_local *tp = netdev_priv(dev);
  1134. return ((struct net_device_stats *)&tp->MacStat);
  1135. }
  1136. static FCBlock *smctr_get_tx_fcb(struct net_device *dev, __u16 queue,
  1137. __u16 bytes_count)
  1138. {
  1139. struct net_local *tp = netdev_priv(dev);
  1140. FCBlock *pFCB;
  1141. BDBlock *pbdb;
  1142. unsigned short alloc_size;
  1143. unsigned short *temp;
  1144. if(smctr_debug > 20)
  1145. printk(KERN_DEBUG "smctr_get_tx_fcb\n");
  1146. /* check if there is enough FCB blocks */
  1147. if(tp->num_tx_fcbs_used[queue] >= tp->num_tx_fcbs[queue])
  1148. return ((FCBlock *)(-1L));
  1149. /* round off the input pkt size to the nearest even number */
  1150. alloc_size = (bytes_count + 1) & 0xfffe;
  1151. /* check if enough mem */
  1152. if((tp->tx_buff_used[queue] + alloc_size) > tp->tx_buff_size[queue])
  1153. return ((FCBlock *)(-1L));
  1154. /* check if past the end ;
  1155. * if exactly enough mem to end of ring, alloc from front.
  1156. * this avoids update of curr when curr = end
  1157. */
  1158. if(((unsigned long)(tp->tx_buff_curr[queue]) + alloc_size)
  1159. >= (unsigned long)(tp->tx_buff_end[queue]))
  1160. {
  1161. /* check if enough memory from ring head */
  1162. alloc_size = alloc_size +
  1163. (__u16)((__u32)tp->tx_buff_end[queue]
  1164. - (__u32)tp->tx_buff_curr[queue]);
  1165. if((tp->tx_buff_used[queue] + alloc_size)
  1166. > tp->tx_buff_size[queue])
  1167. {
  1168. return ((FCBlock *)(-1L));
  1169. }
  1170. /* ring wrap */
  1171. tp->tx_buff_curr[queue] = tp->tx_buff_head[queue];
  1172. }
  1173. tp->tx_buff_used[queue] += alloc_size;
  1174. tp->num_tx_fcbs_used[queue]++;
  1175. tp->tx_fcb_curr[queue]->frame_length = bytes_count;
  1176. tp->tx_fcb_curr[queue]->memory_alloc = alloc_size;
  1177. temp = tp->tx_buff_curr[queue];
  1178. tp->tx_buff_curr[queue]
  1179. = (__u16 *)((__u32)temp + (__u32)((bytes_count + 1) & 0xfffe));
  1180. pbdb = tp->tx_fcb_curr[queue]->bdb_ptr;
  1181. pbdb->buffer_length = bytes_count;
  1182. pbdb->data_block_ptr = temp;
  1183. pbdb->trc_data_block_ptr = TRC_POINTER(temp);
  1184. pFCB = tp->tx_fcb_curr[queue];
  1185. tp->tx_fcb_curr[queue] = tp->tx_fcb_curr[queue]->next_ptr;
  1186. return (pFCB);
  1187. }
  1188. static int smctr_get_upstream_neighbor_addr(struct net_device *dev)
  1189. {
  1190. smctr_issue_read_word_cmd(dev, RW_UPSTREAM_NEIGHBOR_ADDRESS);
  1191. return(smctr_wait_cmd(dev));
  1192. }
  1193. static int smctr_hardware_send_packet(struct net_device *dev,
  1194. struct net_local *tp)
  1195. {
  1196. struct tr_statistics *tstat = &tp->MacStat;
  1197. struct sk_buff *skb;
  1198. FCBlock *fcb;
  1199. if(smctr_debug > 10)
  1200. printk(KERN_DEBUG"%s: smctr_hardware_send_packet\n", dev->name);
  1201. if(tp->status != OPEN)
  1202. return (-1);
  1203. if(tp->monitor_state_ready != 1)
  1204. return (-1);
  1205. for(;;)
  1206. {
  1207. /* Send first buffer from queue */
  1208. skb = skb_dequeue(&tp->SendSkbQueue);
  1209. if(skb == NULL)
  1210. return (-1);
  1211. tp->QueueSkb++;
  1212. if(skb->len < SMC_HEADER_SIZE || skb->len > tp->max_packet_size) return (-1);
  1213. smctr_enable_16bit(dev);
  1214. smctr_set_page(dev, (__u8 *)tp->ram_access);
  1215. if((fcb = smctr_get_tx_fcb(dev, NON_MAC_QUEUE, skb->len))
  1216. == (FCBlock *)(-1L))
  1217. {
  1218. smctr_disable_16bit(dev);
  1219. return (-1);
  1220. }
  1221. smctr_tx_move_frame(dev, skb,
  1222. (__u8 *)fcb->bdb_ptr->data_block_ptr, skb->len);
  1223. smctr_set_page(dev, (__u8 *)fcb);
  1224. smctr_trc_send_packet(dev, fcb, NON_MAC_QUEUE);
  1225. dev_kfree_skb(skb);
  1226. tstat->tx_packets++;
  1227. smctr_disable_16bit(dev);
  1228. }
  1229. return (0);
  1230. }
  1231. static int smctr_init_acbs(struct net_device *dev)
  1232. {
  1233. struct net_local *tp = netdev_priv(dev);
  1234. unsigned int i;
  1235. ACBlock *acb;
  1236. if(smctr_debug > 10)
  1237. printk(KERN_DEBUG "%s: smctr_init_acbs\n", dev->name);
  1238. acb = tp->acb_head;
  1239. acb->cmd_done_status = (ACB_COMMAND_DONE | ACB_COMMAND_SUCCESSFUL);
  1240. acb->cmd_info = ACB_CHAIN_END;
  1241. acb->cmd = 0;
  1242. acb->subcmd = 0;
  1243. acb->data_offset_lo = 0;
  1244. acb->data_offset_hi = 0;
  1245. acb->next_ptr
  1246. = (ACBlock *)(((char *)acb) + sizeof(ACBlock));
  1247. acb->trc_next_ptr = TRC_POINTER(acb->next_ptr);
  1248. for(i = 1; i < tp->num_acbs; i++)
  1249. {
  1250. acb = acb->next_ptr;
  1251. acb->cmd_done_status
  1252. = (ACB_COMMAND_DONE | ACB_COMMAND_SUCCESSFUL);
  1253. acb->cmd_info = ACB_CHAIN_END;
  1254. acb->cmd = 0;
  1255. acb->subcmd = 0;
  1256. acb->data_offset_lo = 0;
  1257. acb->data_offset_hi = 0;
  1258. acb->next_ptr
  1259. = (ACBlock *)(((char *)acb) + sizeof(ACBlock));
  1260. acb->trc_next_ptr = TRC_POINTER(acb->next_ptr);
  1261. }
  1262. acb->next_ptr = tp->acb_head;
  1263. acb->trc_next_ptr = TRC_POINTER(tp->acb_head);
  1264. tp->acb_next = tp->acb_head->next_ptr;
  1265. tp->acb_curr = tp->acb_head->next_ptr;
  1266. tp->num_acbs_used = 0;
  1267. return (0);
  1268. }
  1269. static int smctr_init_adapter(struct net_device *dev)
  1270. {
  1271. struct net_local *tp = netdev_priv(dev);
  1272. int err;
  1273. if(smctr_debug > 10)
  1274. printk(KERN_DEBUG "%s: smctr_init_adapter\n", dev->name);
  1275. tp->status = CLOSED;
  1276. tp->page_offset_mask = (tp->ram_usable * 1024) - 1;
  1277. skb_queue_head_init(&tp->SendSkbQueue);
  1278. tp->QueueSkb = MAX_TX_QUEUE;
  1279. if(!(tp->group_address_0 & 0x0080))
  1280. tp->group_address_0 |= 0x00C0;
  1281. if(!(tp->functional_address_0 & 0x00C0))
  1282. tp->functional_address_0 |= 0x00C0;
  1283. tp->functional_address[0] &= 0xFF7F;
  1284. if(tp->authorized_function_classes == 0)
  1285. tp->authorized_function_classes = 0x7FFF;
  1286. if(tp->authorized_access_priority == 0)
  1287. tp->authorized_access_priority = 0x06;
  1288. smctr_disable_bic_int(dev);
  1289. smctr_set_trc_reset(dev->base_addr);
  1290. smctr_enable_16bit(dev);
  1291. smctr_set_page(dev, (__u8 *)tp->ram_access);
  1292. if(smctr_checksum_firmware(dev))
  1293. {
  1294. printk(KERN_ERR "%s: Previously loaded firmware is missing\n",dev->name); return (-ENOENT);
  1295. }
  1296. if((err = smctr_ram_memory_test(dev)))
  1297. {
  1298. printk(KERN_ERR "%s: RAM memory test failed.\n", dev->name);
  1299. return (-EIO);
  1300. }
  1301. smctr_set_rx_look_ahead(dev);
  1302. smctr_load_node_addr(dev);
  1303. /* Initialize adapter for Internal Self Test. */
  1304. smctr_reset_adapter(dev);
  1305. if((err = smctr_init_card_real(dev)))
  1306. {
  1307. printk(KERN_ERR "%s: Initialization of card failed (%d)\n",
  1308. dev->name, err);
  1309. return (-EINVAL);
  1310. }
  1311. /* This routine clobbers the TRC's internal registers. */
  1312. if((err = smctr_internal_self_test(dev)))
  1313. {
  1314. printk(KERN_ERR "%s: Card failed internal self test (%d)\n",
  1315. dev->name, err);
  1316. return (-EINVAL);
  1317. }
  1318. /* Re-Initialize adapter's internal registers */
  1319. smctr_reset_adapter(dev);
  1320. if((err = smctr_init_card_real(dev)))
  1321. {
  1322. printk(KERN_ERR "%s: Initialization of card failed (%d)\n",
  1323. dev->name, err);
  1324. return (-EINVAL);
  1325. }
  1326. smctr_enable_bic_int(dev);
  1327. if((err = smctr_issue_enable_int_cmd(dev, TRC_INTERRUPT_ENABLE_MASK)))
  1328. return (err);
  1329. smctr_disable_16bit(dev);
  1330. return (0);
  1331. }
  1332. static int smctr_init_card_real(struct net_device *dev)
  1333. {
  1334. struct net_local *tp = netdev_priv(dev);
  1335. int err = 0;
  1336. if(smctr_debug > 10)
  1337. printk(KERN_DEBUG "%s: smctr_init_card_real\n", dev->name);
  1338. tp->sh_mem_used = 0;
  1339. tp->num_acbs = NUM_OF_ACBS;
  1340. /* Range Check Max Packet Size */
  1341. if(tp->max_packet_size < 256)
  1342. tp->max_packet_size = 256;
  1343. else
  1344. {
  1345. if(tp->max_packet_size > NON_MAC_TX_BUFFER_MEMORY)
  1346. tp->max_packet_size = NON_MAC_TX_BUFFER_MEMORY;
  1347. }
  1348. tp->num_of_tx_buffs = (NON_MAC_TX_BUFFER_MEMORY
  1349. / tp->max_packet_size) - 1;
  1350. if(tp->num_of_tx_buffs > NUM_NON_MAC_TX_FCBS)
  1351. tp->num_of_tx_buffs = NUM_NON_MAC_TX_FCBS;
  1352. else
  1353. {
  1354. if(tp->num_of_tx_buffs == 0)
  1355. tp->num_of_tx_buffs = 1;
  1356. }
  1357. /* Tx queue constants */
  1358. tp->num_tx_fcbs [BUG_QUEUE] = NUM_BUG_TX_FCBS;
  1359. tp->num_tx_bdbs [BUG_QUEUE] = NUM_BUG_TX_BDBS;
  1360. tp->tx_buff_size [BUG_QUEUE] = BUG_TX_BUFFER_MEMORY;
  1361. tp->tx_buff_used [BUG_QUEUE] = 0;
  1362. tp->tx_queue_status [BUG_QUEUE] = NOT_TRANSMITING;
  1363. tp->num_tx_fcbs [MAC_QUEUE] = NUM_MAC_TX_FCBS;
  1364. tp->num_tx_bdbs [MAC_QUEUE] = NUM_MAC_TX_BDBS;
  1365. tp->tx_buff_size [MAC_QUEUE] = MAC_TX_BUFFER_MEMORY;
  1366. tp->tx_buff_used [MAC_QUEUE] = 0;
  1367. tp->tx_queue_status [MAC_QUEUE] = NOT_TRANSMITING;
  1368. tp->num_tx_fcbs [NON_MAC_QUEUE] = NUM_NON_MAC_TX_FCBS;
  1369. tp->num_tx_bdbs [NON_MAC_QUEUE] = NUM_NON_MAC_TX_BDBS;
  1370. tp->tx_buff_size [NON_MAC_QUEUE] = NON_MAC_TX_BUFFER_MEMORY;
  1371. tp->tx_buff_used [NON_MAC_QUEUE] = 0;
  1372. tp->tx_queue_status [NON_MAC_QUEUE] = NOT_TRANSMITING;
  1373. /* Receive Queue Constants */
  1374. tp->num_rx_fcbs[MAC_QUEUE] = NUM_MAC_RX_FCBS;
  1375. tp->num_rx_bdbs[MAC_QUEUE] = NUM_MAC_RX_BDBS;
  1376. if(tp->extra_info & CHIP_REV_MASK)
  1377. tp->num_rx_fcbs[NON_MAC_QUEUE] = 78; /* 825 Rev. XE */
  1378. else
  1379. tp->num_rx_fcbs[NON_MAC_QUEUE] = 7; /* 825 Rev. XD */
  1380. tp->num_rx_bdbs[NON_MAC_QUEUE] = smctr_get_num_rx_bdbs(dev);
  1381. smctr_alloc_shared_memory(dev);
  1382. smctr_init_shared_memory(dev);
  1383. if((err = smctr_issue_init_timers_cmd(dev)))
  1384. return (err);
  1385. if((err = smctr_issue_init_txrx_cmd(dev)))
  1386. {
  1387. printk(KERN_ERR "%s: Hardware failure\n", dev->name);
  1388. return (err);
  1389. }
  1390. return (0);
  1391. }
  1392. static int smctr_init_rx_bdbs(struct net_device *dev)
  1393. {
  1394. struct net_local *tp = netdev_priv(dev);
  1395. unsigned int i, j;
  1396. BDBlock *bdb;
  1397. __u16 *buf;
  1398. if(smctr_debug > 10)
  1399. printk(KERN_DEBUG "%s: smctr_init_rx_bdbs\n", dev->name);
  1400. for(i = 0; i < NUM_RX_QS_USED; i++)
  1401. {
  1402. bdb = tp->rx_bdb_head[i];
  1403. buf = tp->rx_buff_head[i];
  1404. bdb->info = (BDB_CHAIN_END | BDB_NO_WARNING);
  1405. bdb->buffer_length = RX_DATA_BUFFER_SIZE;
  1406. bdb->next_ptr = (BDBlock *)(((char *)bdb) + sizeof(BDBlock));
  1407. bdb->data_block_ptr = buf;
  1408. bdb->trc_next_ptr = TRC_POINTER(bdb->next_ptr);
  1409. if(i == NON_MAC_QUEUE)
  1410. bdb->trc_data_block_ptr = RX_BUFF_TRC_POINTER(buf);
  1411. else
  1412. bdb->trc_data_block_ptr = TRC_POINTER(buf);
  1413. for(j = 1; j < tp->num_rx_bdbs[i]; j++)
  1414. {
  1415. bdb->next_ptr->back_ptr = bdb;
  1416. bdb = bdb->next_ptr;
  1417. buf = (__u16 *)((char *)buf + RX_DATA_BUFFER_SIZE);
  1418. bdb->info = (BDB_NOT_CHAIN_END | BDB_NO_WARNING);
  1419. bdb->buffer_length = RX_DATA_BUFFER_SIZE;
  1420. bdb->next_ptr = (BDBlock *)(((char *)bdb) + sizeof(BDBlock));
  1421. bdb->data_block_ptr = buf;
  1422. bdb->trc_next_ptr = TRC_POINTER(bdb->next_ptr);
  1423. if(i == NON_MAC_QUEUE)
  1424. bdb->trc_data_block_ptr = RX_BUFF_TRC_POINTER(buf);
  1425. else
  1426. bdb->trc_data_block_ptr = TRC_POINTER(buf);
  1427. }
  1428. bdb->next_ptr = tp->rx_bdb_head[i];
  1429. bdb->trc_next_ptr = TRC_POINTER(tp->rx_bdb_head[i]);
  1430. tp->rx_bdb_head[i]->back_ptr = bdb;
  1431. tp->rx_bdb_curr[i] = tp->rx_bdb_head[i]->next_ptr;
  1432. }
  1433. return (0);
  1434. }
  1435. static int smctr_init_rx_fcbs(struct net_device *dev)
  1436. {
  1437. struct net_local *tp = netdev_priv(dev);
  1438. unsigned int i, j;
  1439. FCBlock *fcb;
  1440. for(i = 0; i < NUM_RX_QS_USED; i++)
  1441. {
  1442. fcb = tp->rx_fcb_head[i];
  1443. fcb->frame_status = 0;
  1444. fcb->frame_length = 0;
  1445. fcb->info = FCB_CHAIN_END;
  1446. fcb->next_ptr = (FCBlock *)(((char*)fcb) + sizeof(FCBlock));
  1447. if(i == NON_MAC_QUEUE)
  1448. fcb->trc_next_ptr = RX_FCB_TRC_POINTER(fcb->next_ptr);
  1449. else
  1450. fcb->trc_next_ptr = TRC_POINTER(fcb->next_ptr);
  1451. for(j = 1; j < tp->num_rx_fcbs[i]; j++)
  1452. {
  1453. fcb->next_ptr->back_ptr = fcb;
  1454. fcb = fcb->next_ptr;
  1455. fcb->frame_status = 0;
  1456. fcb->frame_length = 0;
  1457. fcb->info = FCB_WARNING;
  1458. fcb->next_ptr
  1459. = (FCBlock *)(((char *)fcb) + sizeof(FCBlock));
  1460. if(i == NON_MAC_QUEUE)
  1461. fcb->trc_next_ptr
  1462. = RX_FCB_TRC_POINTER(fcb->next_ptr);
  1463. else
  1464. fcb->trc_next_ptr
  1465. = TRC_POINTER(fcb->next_ptr);
  1466. }
  1467. fcb->next_ptr = tp->rx_fcb_head[i];
  1468. if(i == NON_MAC_QUEUE)
  1469. fcb->trc_next_ptr = RX_FCB_TRC_POINTER(fcb->next_ptr);
  1470. else
  1471. fcb->trc_next_ptr = TRC_POINTER(fcb->next_ptr);
  1472. tp->rx_fcb_head[i]->back_ptr = fcb;
  1473. tp->rx_fcb_curr[i] = tp->rx_fcb_head[i]->next_ptr;
  1474. }
  1475. return(0);
  1476. }
  1477. static int smctr_init_shared_memory(struct net_device *dev)
  1478. {
  1479. struct net_local *tp = netdev_priv(dev);
  1480. unsigned int i;
  1481. __u32 *iscpb;
  1482. if(smctr_debug > 10)
  1483. printk(KERN_DEBUG "%s: smctr_init_shared_memory\n", dev->name);
  1484. smctr_set_page(dev, (__u8 *)(unsigned int)tp->iscpb_ptr);
  1485. /* Initialize Initial System Configuration Point. (ISCP) */
  1486. iscpb = (__u32 *)PAGE_POINTER(&tp->iscpb_ptr->trc_scgb_ptr);
  1487. *iscpb = (__u32)(SWAP_WORDS(TRC_POINTER(tp->scgb_ptr)));
  1488. smctr_set_page(dev, (__u8 *)tp->ram_access);
  1489. /* Initialize System Configuration Pointers. (SCP) */
  1490. tp->scgb_ptr->config = (SCGB_ADDRESS_POINTER_FORMAT
  1491. | SCGB_MULTI_WORD_CONTROL | SCGB_DATA_FORMAT
  1492. | SCGB_BURST_LENGTH);
  1493. tp->scgb_ptr->trc_sclb_ptr = TRC_POINTER(tp->sclb_ptr);
  1494. tp->scgb_ptr->trc_acb_ptr = TRC_POINTER(tp->acb_head);
  1495. tp->scgb_ptr->trc_isb_ptr = TRC_POINTER(tp->isb_ptr);
  1496. tp->scgb_ptr->isbsiz = (sizeof(ISBlock)) - 2;
  1497. /* Initialize System Control Block. (SCB) */
  1498. tp->sclb_ptr->valid_command = SCLB_VALID | SCLB_CMD_NOP;
  1499. tp->sclb_ptr->iack_code = 0;
  1500. tp->sclb_ptr->resume_control = 0;
  1501. tp->sclb_ptr->int_mask_control = 0;
  1502. tp->sclb_ptr->int_mask_state = 0;
  1503. /* Initialize Interrupt Status Block. (ISB) */
  1504. for(i = 0; i < NUM_OF_INTERRUPTS; i++)
  1505. {
  1506. tp->isb_ptr->IStatus[i].IType = 0xf0;
  1507. tp->isb_ptr->IStatus[i].ISubtype = 0;
  1508. }
  1509. tp->current_isb_index = 0;
  1510. /* Initialize Action Command Block. (ACB) */
  1511. smctr_init_acbs(dev);
  1512. /* Initialize transmit FCB's and BDB's. */
  1513. smctr_link_tx_fcbs_to_bdbs(dev);
  1514. smctr_init_tx_bdbs(dev);
  1515. smctr_init_tx_fcbs(dev);
  1516. /* Initialize receive FCB's and BDB's. */
  1517. smctr_init_rx_bdbs(dev);
  1518. smctr_init_rx_fcbs(dev);
  1519. return (0);
  1520. }
  1521. static int smctr_init_tx_bdbs(struct net_device *dev)
  1522. {
  1523. struct net_local *tp = netdev_priv(dev);
  1524. unsigned int i, j;
  1525. BDBlock *bdb;
  1526. for(i = 0; i < NUM_TX_QS_USED; i++)
  1527. {
  1528. bdb = tp->tx_bdb_head[i];
  1529. bdb->info = (BDB_NOT_CHAIN_END | BDB_NO_WARNING);
  1530. bdb->next_ptr = (BDBlock *)(((char *)bdb) + sizeof(BDBlock));
  1531. bdb->trc_next_ptr = TRC_POINTER(bdb->next_ptr);
  1532. for(j = 1; j < tp->num_tx_bdbs[i]; j++)
  1533. {
  1534. bdb->next_ptr->back_ptr = bdb;
  1535. bdb = bdb->next_ptr;
  1536. bdb->info = (BDB_NOT_CHAIN_END | BDB_NO_WARNING);
  1537. bdb->next_ptr
  1538. = (BDBlock *)(((char *)bdb) + sizeof( BDBlock)); bdb->trc_next_ptr = TRC_POINTER(bdb->next_ptr);
  1539. }
  1540. bdb->next_ptr = tp->tx_bdb_head[i];
  1541. bdb->trc_next_ptr = TRC_POINTER(tp->tx_bdb_head[i]);
  1542. tp->tx_bdb_head[i]->back_ptr = bdb;
  1543. }
  1544. return (0);
  1545. }
  1546. static int smctr_init_tx_fcbs(struct net_device *dev)
  1547. {
  1548. struct net_local *tp = netdev_priv(dev);
  1549. unsigned int i, j;
  1550. FCBlock *fcb;
  1551. for(i = 0; i < NUM_TX_QS_USED; i++)
  1552. {
  1553. fcb = tp->tx_fcb_head[i];
  1554. fcb->frame_status = 0;
  1555. fcb->frame_length = 0;
  1556. fcb->info = FCB_CHAIN_END;
  1557. fcb->next_ptr = (FCBlock *)(((char *)fcb) + sizeof(FCBlock));
  1558. fcb->trc_next_ptr = TRC_POINTER(fcb->next_ptr);
  1559. for(j = 1; j < tp->num_tx_fcbs[i]; j++)
  1560. {
  1561. fcb->next_ptr->back_ptr = fcb;
  1562. fcb = fcb->next_ptr;
  1563. fcb->frame_status = 0;
  1564. fcb->frame_length = 0;
  1565. fcb->info = FCB_CHAIN_END;
  1566. fcb->next_ptr
  1567. = (FCBlock *)(((char *)fcb) + sizeof(FCBlock));
  1568. fcb->trc_next_ptr = TRC_POINTER(fcb->next_ptr);
  1569. }
  1570. fcb->next_ptr = tp->tx_fcb_head[i];
  1571. fcb->trc_next_ptr = TRC_POINTER(tp->tx_fcb_head[i]);
  1572. tp->tx_fcb_head[i]->back_ptr = fcb;
  1573. tp->tx_fcb_end[i] = tp->tx_fcb_head[i]->next_ptr;
  1574. tp->tx_fcb_curr[i] = tp->tx_fcb_head[i]->next_ptr;
  1575. tp->num_tx_fcbs_used[i] = 0;
  1576. }
  1577. return (0);
  1578. }
  1579. static int smctr_internal_self_test(struct net_device *dev)
  1580. {
  1581. struct net_local *tp = netdev_priv(dev);
  1582. int err;
  1583. if((err = smctr_issue_test_internal_rom_cmd(dev)))
  1584. return (err);
  1585. if((err = smctr_wait_cmd(dev)))
  1586. return (err);
  1587. if(tp->acb_head->cmd_done_status & 0xff)
  1588. return (-1);
  1589. if((err = smctr_issue_test_hic_cmd(dev)))
  1590. return (err);
  1591. if((err = smctr_wait_cmd(dev)))
  1592. return (err);
  1593. if(tp->acb_head->cmd_done_status & 0xff)
  1594. return (-1);
  1595. if((err = smctr_issue_test_mac_reg_cmd(dev)))
  1596. return (err);
  1597. if((err = smctr_wait_cmd(dev)))
  1598. return (err);
  1599. if(tp->acb_head->cmd_done_status & 0xff)
  1600. return (-1);
  1601. return (0);
  1602. }
  1603. /*
  1604. * The typical workload of the driver: Handle the network interface interrupts.
  1605. */
  1606. static irqreturn_t smctr_interrupt(int irq, void *dev_id)
  1607. {
  1608. struct net_device *dev = dev_id;
  1609. struct net_local *tp;
  1610. int ioaddr;
  1611. __u16 interrupt_unmask_bits = 0, interrupt_ack_code = 0xff00;
  1612. __u16 err1, err = NOT_MY_INTERRUPT;
  1613. __u8 isb_type, isb_subtype;
  1614. __u16 isb_index;
  1615. ioaddr = dev->base_addr;
  1616. tp = netdev_priv(dev);
  1617. if(tp->status == NOT_INITIALIZED)
  1618. return IRQ_NONE;
  1619. spin_lock(&tp->lock);
  1620. smctr_disable_bic_int(dev);
  1621. smctr_enable_16bit(dev);
  1622. smctr_clear_int(dev);
  1623. /* First read the LSB */
  1624. while((tp->isb_ptr->IStatus[tp->current_isb_index].IType & 0xf0) == 0)
  1625. {
  1626. isb_index = tp->current_isb_index;
  1627. isb_type = tp->isb_ptr->IStatus[isb_index].IType;
  1628. isb_subtype = tp->isb_ptr->IStatus[isb_index].ISubtype;
  1629. (tp->current_isb_index)++;
  1630. if(tp->current_isb_index == NUM_OF_INTERRUPTS)
  1631. tp->current_isb_index = 0;
  1632. if(isb_type >= 0x10)
  1633. {
  1634. smctr_disable_16bit(dev);
  1635. spin_unlock(&tp->lock);
  1636. return IRQ_HANDLED;
  1637. }
  1638. err = HARDWARE_FAILED;
  1639. interrupt_ack_code = isb_index;
  1640. tp->isb_ptr->IStatus[isb_index].IType |= 0xf0;
  1641. interrupt_unmask_bits |= (1 << (__u16)isb_type);
  1642. switch(isb_type)
  1643. {
  1644. case ISB_IMC_MAC_TYPE_3:
  1645. smctr_disable_16bit(dev);
  1646. switch(isb_subtype)
  1647. {
  1648. case 0:
  1649. tp->monitor_state = MS_MONITOR_FSM_INACTIVE;
  1650. break;
  1651. case 1:
  1652. tp->monitor_state = MS_REPEAT_BEACON_STATE;
  1653. break;
  1654. case 2:
  1655. tp->monitor_state = MS_REPEAT_CLAIM_TOKEN_STATE;
  1656. break;
  1657. case 3:
  1658. tp->monitor_state = MS_TRANSMIT_CLAIM_TOKEN_STATE; break;
  1659. case 4:
  1660. tp->monitor_state = MS_STANDBY_MONITOR_STATE;
  1661. break;
  1662. case 5:
  1663. tp->monitor_state = MS_TRANSMIT_BEACON_STATE;
  1664. break;
  1665. case 6:
  1666. tp->monitor_state = MS_ACTIVE_MONITOR_STATE;
  1667. break;
  1668. case 7:
  1669. tp->monitor_state = MS_TRANSMIT_RING_PURGE_STATE;
  1670. break;
  1671. case 8: /* diagnostic state */
  1672. break;
  1673. case 9:
  1674. tp->monitor_state = MS_BEACON_TEST_STATE;
  1675. if(smctr_lobe_media_test(dev))
  1676. {
  1677. tp->ring_status_flags = RING_STATUS_CHANGED;
  1678. tp->ring_status = AUTO_REMOVAL_ERROR;
  1679. smctr_ring_status_chg(dev);
  1680. smctr_bypass_state(dev);
  1681. }
  1682. else
  1683. smctr_issue_insert_cmd(dev);
  1684. break;
  1685. /* case 0x0a-0xff, illegal states */
  1686. default:
  1687. break;
  1688. }
  1689. tp->ring_status_flags = MONITOR_STATE_CHANGED;
  1690. err = smctr_ring_status_chg(dev);
  1691. smctr_enable_16bit(dev);
  1692. break;
  1693. /* Type 0x02 - MAC Error Counters Interrupt
  1694. * One or more MAC Error Counter is half full
  1695. * MAC Error Counters
  1696. * Lost_FR_Error_Counter
  1697. * RCV_Congestion_Counter
  1698. * FR_copied_Error_Counter
  1699. * FREQ_Error_Counter
  1700. * Token_Error_Counter
  1701. * Line_Error_Counter
  1702. * Internal_Error_Count
  1703. */
  1704. case ISB_IMC_MAC_ERROR_COUNTERS:
  1705. /* Read 802.5 Error Counters */
  1706. err = smctr_issue_read_ring_status_cmd(dev);
  1707. break;
  1708. /* Type 0x04 - MAC Type 2 Interrupt
  1709. * HOST needs to enqueue MAC Frame for transmission
  1710. * SubType Bit 15 - RQ_INIT_PDU( Request Initialization) * Changed from RQ_INIT_PDU to
  1711. * TRC_Status_Changed_Indicate
  1712. */
  1713. case ISB_IMC_MAC_TYPE_2:
  1714. err = smctr_issue_read_ring_status_cmd(dev);
  1715. break;
  1716. /* Type 0x05 - TX Frame Interrupt (FI). */
  1717. case ISB_IMC_TX_FRAME:
  1718. /* BUG QUEUE for TRC stuck receive BUG */
  1719. if(isb_subtype & TX_PENDING_PRIORITY_2)
  1720. {
  1721. if((err = smctr_tx_complete(dev, BUG_QUEUE)) != SUCCESS)
  1722. break;
  1723. }
  1724. /* NON-MAC frames only */
  1725. if(isb_subtype & TX_PENDING_PRIORITY_1)
  1726. {
  1727. if((err = smctr_tx_complete(dev, NON_MAC_QUEUE)) != SUCCESS)
  1728. break;
  1729. }
  1730. /* MAC frames only */
  1731. if(isb_subtype & TX_PENDING_PRIORITY_0)
  1732. err = smctr_tx_complete(dev, MAC_QUEUE); break;
  1733. /* Type 0x06 - TX END OF QUEUE (FE) */
  1734. case ISB_IMC_END_OF_TX_QUEUE:
  1735. /* BUG queue */
  1736. if(isb_subtype & TX_PENDING_PRIORITY_2)
  1737. {
  1738. /* ok to clear Receive FIFO overrun
  1739. * imask send_BUG now completes.
  1740. */
  1741. interrupt_unmask_bits |= 0x800;
  1742. tp->tx_queue_status[BUG_QUEUE] = NOT_TRANSMITING;
  1743. if((err = smctr_tx_complete(dev, BUG_QUEUE)) != SUCCESS)
  1744. break;
  1745. if((err = smctr_restart_tx_chain(dev, BUG_QUEUE)) != SUCCESS)
  1746. break;
  1747. }
  1748. /* NON-MAC queue only */
  1749. if(isb_subtype & TX_PENDING_PRIORITY_1)
  1750. {
  1751. tp->tx_queue_status[NON_MAC_QUEUE] = NOT_TRANSMITING;
  1752. if((err = smctr_tx_complete(dev, NON_MAC_QUEUE)) != SUCCESS)
  1753. break;
  1754. if((err = smctr_restart_tx_chain(dev, NON_MAC_QUEUE)) != SUCCESS)
  1755. break;
  1756. }
  1757. /* MAC queue only */
  1758. if(isb_subtype & TX_PENDING_PRIORITY_0)
  1759. {
  1760. tp->tx_queue_status[MAC_QUEUE] = NOT_TRANSMITING;
  1761. if((err = smctr_tx_complete(dev, MAC_QUEUE)) != SUCCESS)
  1762. break;
  1763. err = smctr_restart_tx_chain(dev, MAC_QUEUE);
  1764. }
  1765. break;
  1766. /* Type 0x07 - NON-MAC RX Resource Interrupt
  1767. * Subtype bit 12 - (BW) BDB warning
  1768. * Subtype bit 13 - (FW) FCB warning
  1769. * Subtype bit 14 - (BE) BDB End of chain
  1770. * Subtype bit 15 - (FE) FCB End of chain
  1771. */
  1772. case ISB_IMC_NON_MAC_RX_RESOURCE:
  1773. tp->rx_fifo_overrun_count = 0;
  1774. tp->receive_queue_number = NON_MAC_QUEUE;
  1775. err1 = smctr_rx_frame(dev);
  1776. if(isb_subtype & NON_MAC_RX_RESOURCE_FE)
  1777. {
  1778. if((err = smctr_issue_resume_rx_fcb_cmd( dev, NON_MAC_QUEUE)) != SUCCESS) break;
  1779. if(tp->ptr_rx_fcb_overruns)
  1780. (*tp->ptr_rx_fcb_overruns)++;
  1781. }
  1782. if(isb_subtype & NON_MAC_RX_RESOURCE_BE)
  1783. {
  1784. if((err = smctr_issue_resume_rx_bdb_cmd( dev, NON_MAC_QUEUE)) != SUCCESS) break;
  1785. if(tp->ptr_rx_bdb_overruns)
  1786. (*tp->ptr_rx_bdb_overruns)++;
  1787. }
  1788. err = err1;
  1789. break;
  1790. /* Type 0x08 - MAC RX Resource Interrupt
  1791. * Subtype bit 12 - (BW) BDB warning
  1792. * Subtype bit 13 - (FW) FCB warning
  1793. * Subtype bit 14 - (BE) BDB End of chain
  1794. * Subtype bit 15 - (FE) FCB End of chain
  1795. */
  1796. case ISB_IMC_MAC_RX_RESOURCE:
  1797. tp->receive_queue_number = MAC_QUEUE;
  1798. err1 = smctr_rx_frame(dev);
  1799. if(isb_subtype & MAC_RX_RESOURCE_FE)
  1800. {
  1801. if((err = smctr_issue_resume_rx_fcb_cmd( dev, MAC_QUEUE)) != SUCCESS)
  1802. break;
  1803. if(tp->ptr_rx_fcb_overruns)
  1804. (*tp->ptr_rx_fcb_overruns)++;
  1805. }
  1806. if(isb_subtype & MAC_RX_RESOURCE_BE)
  1807. {
  1808. if((err = smctr_issue_resume_rx_bdb_cmd( dev, MAC_QUEUE)) != SUCCESS)
  1809. break;
  1810. if(tp->ptr_rx_bdb_overruns)
  1811. (*tp->ptr_rx_bdb_overruns)++;
  1812. }
  1813. err = err1;
  1814. break;
  1815. /* Type 0x09 - NON_MAC RX Frame Interrupt */
  1816. case ISB_IMC_NON_MAC_RX_FRAME:
  1817. tp->rx_fifo_overrun_count = 0;
  1818. tp->receive_queue_number = NON_MAC_QUEUE;
  1819. err = smctr_rx_frame(dev);
  1820. break;
  1821. /* Type 0x0A - MAC RX Frame Interrupt */
  1822. case ISB_IMC_MAC_RX_FRAME:
  1823. tp->receive_queue_number = MAC_QUEUE;
  1824. err = smctr_rx_frame(dev);
  1825. break;
  1826. /* Type 0x0B - TRC status
  1827. * TRC has encountered an error condition
  1828. * subtype bit 14 - transmit FIFO underrun
  1829. * subtype bit 15 - receive FIFO overrun
  1830. */
  1831. case ISB_IMC_TRC_FIFO_STATUS:
  1832. if(isb_subtype & TRC_FIFO_STATUS_TX_UNDERRUN)
  1833. {
  1834. if(tp->ptr_tx_fifo_underruns)
  1835. (*tp->ptr_tx_fifo_underruns)++;
  1836. }
  1837. if(isb_subtype & TRC_FIFO_STATUS_RX_OVERRUN)
  1838. {
  1839. /* update overrun stuck receive counter
  1840. * if >= 3, has to clear it by sending
  1841. * back to back frames. We pick
  1842. * DAT(duplicate address MAC frame)
  1843. */
  1844. tp->rx_fifo_overrun_count++;
  1845. if(tp->rx_fifo_overrun_count >= 3)
  1846. {
  1847. tp->rx_fifo_overrun_count = 0;
  1848. /* delay clearing fifo overrun
  1849. * imask till send_BUG tx
  1850. * complete posted
  1851. */
  1852. interrupt_unmask_bits &= (~0x800);
  1853. printk(KERN_CRIT "Jay please send bug\n");// smctr_send_bug(dev);
  1854. }
  1855. if(tp->ptr_rx_fifo_overruns)
  1856. (*tp->ptr_rx_fifo_overruns)++;
  1857. }
  1858. err = SUCCESS;
  1859. break;
  1860. /* Type 0x0C - Action Command Status Interrupt
  1861. * Subtype bit 14 - CB end of command chain (CE)
  1862. * Subtype bit 15 - CB command interrupt (CI)
  1863. */
  1864. case ISB_IMC_COMMAND_STATUS:
  1865. err = SUCCESS;
  1866. if(tp->acb_head->cmd == ACB_CMD_HIC_NOP)
  1867. {
  1868. printk(KERN_ERR "i1\n");
  1869. smctr_disable_16bit(dev);
  1870. /* XXXXXXXXXXXXXXXXX */
  1871. /* err = UM_Interrupt(dev); */
  1872. smctr_enable_16bit(dev);
  1873. }
  1874. else
  1875. {
  1876. if((tp->acb_head->cmd
  1877. == ACB_CMD_READ_TRC_STATUS) &&
  1878. (tp->acb_head->subcmd
  1879. == RW_TRC_STATUS_BLOCK))
  1880. {
  1881. if(tp->ptr_bcn_type)
  1882. {
  1883. *(tp->ptr_bcn_type)
  1884. = (__u32)((SBlock *)tp->misc_command_data)->BCN_Type;
  1885. }
  1886. if(((SBlock *)tp->misc_command_data)->Status_CHG_Indicate & ERROR_COUNTERS_CHANGED)
  1887. {
  1888. smctr_update_err_stats(dev);
  1889. }
  1890. if(((SBlock *)tp->misc_command_data)->Status_CHG_Indicate & TI_NDIS_RING_STATUS_CHANGED)
  1891. {
  1892. tp->ring_status
  1893. = ((SBlock*)tp->misc_command_data)->TI_NDIS_Ring_Status;
  1894. smctr_disable_16bit(dev);
  1895. err = smctr_ring_status_chg(dev);
  1896. smctr_enable_16bit(dev);
  1897. if((tp->ring_status & REMOVE_RECEIVED) &&
  1898. (tp->config_word0 & NO_AUTOREMOVE))
  1899. {
  1900. smctr_issue_remove_cmd(dev);
  1901. }
  1902. if(err != SUCCESS)
  1903. {
  1904. tp->acb_pending = 0;
  1905. break;
  1906. }
  1907. }
  1908. if(((SBlock *)tp->misc_command_data)->Status_CHG_Indicate & UNA_CHANGED)
  1909. {
  1910. if(tp->ptr_una)
  1911. {
  1912. tp->ptr_una[0] = SWAP_BYTES(((SBlock *)tp->misc_command_data)->UNA[0]);
  1913. tp->ptr_una[1] = SWAP_BYTES(((SBlock *)tp->misc_command_data)->UNA[1]);
  1914. tp->ptr_una[2] = SWAP_BYTES(((SBlock *)tp->misc_command_data)->UNA[2]);
  1915. }
  1916. }
  1917. if(((SBlock *)tp->misc_command_data)->Status_CHG_Indicate & READY_TO_SEND_RQ_INIT) {
  1918. err = smctr_send_rq_init(dev);
  1919. }
  1920. }
  1921. }
  1922. tp->acb_pending = 0;
  1923. break;
  1924. /* Type 0x0D - MAC Type 1 interrupt
  1925. * Subtype -- 00 FR_BCN received at S12
  1926. * 01 FR_BCN received at S21
  1927. * 02 FR_DAT(DA=MA, A<>0) received at S21
  1928. * 03 TSM_EXP at S21
  1929. * 04 FR_REMOVE received at S42
  1930. * 05 TBR_EXP, BR_FLAG_SET at S42
  1931. * 06 TBT_EXP at S53
  1932. */
  1933. case ISB_IMC_MAC_TYPE_1:
  1934. if(isb_subtype > 8)
  1935. {
  1936. err = HARDWARE_FAILED;
  1937. break;
  1938. }
  1939. err = SUCCESS;
  1940. switch(isb_subtype)
  1941. {
  1942. case 0:
  1943. tp->join_state = JS_BYPASS_STATE;
  1944. if(tp->status != CLOSED)
  1945. {
  1946. tp->status = CLOSED;
  1947. err = smctr_status_chg(dev);
  1948. }
  1949. break;
  1950. case 1:
  1951. tp->join_state = JS_LOBE_TEST_STATE;
  1952. break;
  1953. case 2:
  1954. tp->join_state = JS_DETECT_MONITOR_PRESENT_STATE;
  1955. break;
  1956. case 3:
  1957. tp->join_state = JS_AWAIT_NEW_MONITOR_STATE;
  1958. break;
  1959. case 4:
  1960. tp->join_state = JS_DUPLICATE_ADDRESS_TEST_STATE;
  1961. break;
  1962. case 5:
  1963. tp->join_state = JS_NEIGHBOR_NOTIFICATION_STATE;
  1964. break;
  1965. case 6:
  1966. tp->join_state = JS_REQUEST_INITIALIZATION_STATE;
  1967. break;
  1968. case 7:
  1969. tp->join_state = JS_JOIN_COMPLETE_STATE;
  1970. tp->status = OPEN;
  1971. err = smctr_status_chg(dev);
  1972. break;
  1973. case 8:
  1974. tp->join_state = JS_BYPASS_WAIT_STATE;
  1975. break;
  1976. }
  1977. break ;
  1978. /* Type 0x0E - TRC Initialization Sequence Interrupt
  1979. * Subtype -- 00-FF Initializatin sequence complete
  1980. */
  1981. case ISB_IMC_TRC_INTRNL_TST_STATUS:
  1982. tp->status = INITIALIZED;
  1983. smctr_disable_16bit(dev);
  1984. err = smctr_status_chg(dev);
  1985. smctr_enable_16bit(dev);
  1986. break;
  1987. /* other interrupt types, illegal */
  1988. default:
  1989. break;
  1990. }
  1991. if(err != SUCCESS)
  1992. break;
  1993. }
  1994. /* Checking the ack code instead of the unmask bits here is because :
  1995. * while fixing the stuck receive, DAT frame are sent and mask off
  1996. * FIFO overrun interrupt temporarily (interrupt_unmask_bits = 0)
  1997. * but we still want to issue ack to ISB
  1998. */
  1999. if(!(interrupt_ack_code & 0xff00))
  2000. smctr_issue_int_ack(dev, interrupt_ack_code, interrupt_unmask_bits);
  2001. smctr_disable_16bit(dev);
  2002. smctr_enable_bic_int(dev);
  2003. spin_unlock(&tp->lock);
  2004. return IRQ_HANDLED;
  2005. }
  2006. static int smctr_issue_enable_int_cmd(struct net_device *dev,
  2007. __u16 interrupt_enable_mask)
  2008. {
  2009. struct net_local *tp = netdev_priv(dev);
  2010. int err;
  2011. if((err = smctr_wait_while_cbusy(dev)))
  2012. return (err);
  2013. tp->sclb_ptr->int_mask_control = interrupt_enable_mask;
  2014. tp->sclb_ptr->valid_command = SCLB_VALID | SCLB_CMD_CLEAR_INTERRUPT_MASK;
  2015. smctr_set_ctrl_attention(dev);
  2016. return (0);
  2017. }
  2018. static int smctr_issue_int_ack(struct net_device *dev, __u16 iack_code, __u16 ibits)
  2019. {
  2020. struct net_local *tp = netdev_priv(dev);
  2021. if(smctr_wait_while_cbusy(dev))
  2022. return (-1);
  2023. tp->sclb_ptr->int_mask_control = ibits;
  2024. tp->sclb_ptr->iack_code = iack_code << 1; /* use the offset from base */ tp->sclb_ptr->resume_control = 0;
  2025. tp->sclb_ptr->valid_command = SCLB_VALID | SCLB_IACK_CODE_VALID | SCLB_CMD_CLEAR_INTERRUPT_MASK;
  2026. smctr_set_ctrl_attention(dev);
  2027. return (0);
  2028. }
  2029. static int smctr_issue_init_timers_cmd(struct net_device *dev)
  2030. {
  2031. struct net_local *tp = netdev_priv(dev);
  2032. unsigned int i;
  2033. int err;
  2034. __u16 *pTimer_Struc = (__u16 *)tp->misc_command_data;
  2035. if((err = smctr_wait_while_cbusy(dev)))
  2036. return (err);
  2037. if((err = smctr_wait_cmd(dev)))
  2038. return (err);
  2039. tp->config_word0 = THDREN | DMA_TRIGGER | USETPT | NO_AUTOREMOVE;
  2040. tp->config_word1 = 0;
  2041. if((tp->media_type == MEDIA_STP_16) ||
  2042. (tp->media_type == MEDIA_UTP_16) ||
  2043. (tp->media_type == MEDIA_STP_16_UTP_16))
  2044. {
  2045. tp->config_word0 |= FREQ_16MB_BIT;
  2046. }
  2047. if(tp->mode_bits & EARLY_TOKEN_REL)
  2048. tp->config_word0 |= ETREN;
  2049. if(tp->mode_bits & LOOPING_MODE_MASK)
  2050. tp->config_word0 |= RX_OWN_BIT;
  2051. else
  2052. tp->config_word0 &= ~RX_OWN_BIT;
  2053. if(tp->receive_mask & PROMISCUOUS_MODE)
  2054. tp->config_word0 |= PROMISCUOUS_BIT;
  2055. else
  2056. tp->config_word0 &= ~PROMISCUOUS_BIT;
  2057. if(tp->receive_mask & ACCEPT_ERR_PACKETS)
  2058. tp->config_word0 |= SAVBAD_BIT;
  2059. else
  2060. tp->config_word0 &= ~SAVBAD_BIT;
  2061. if(tp->receive_mask & ACCEPT_ATT_MAC_FRAMES)
  2062. tp->config_word0 |= RXATMAC;
  2063. else
  2064. tp->config_word0 &= ~RXATMAC;
  2065. if(tp->receive_mask & ACCEPT_MULTI_PROM)
  2066. tp->config_word1 |= MULTICAST_ADDRESS_BIT;
  2067. else
  2068. tp->config_word1 &= ~MULTICAST_ADDRESS_BIT;
  2069. if(tp->receive_mask & ACCEPT_SOURCE_ROUTING_SPANNING)
  2070. tp->config_word1 |= SOURCE_ROUTING_SPANNING_BITS;
  2071. else
  2072. {
  2073. if(tp->receive_mask & ACCEPT_SOURCE_ROUTING)
  2074. tp->config_word1 |= SOURCE_ROUTING_EXPLORER_BIT;
  2075. else
  2076. tp->config_word1 &= ~SOURCE_ROUTING_SPANNING_BITS;
  2077. }
  2078. if((tp->media_type == MEDIA_STP_16) ||
  2079. (tp->media_type == MEDIA_UTP_16) ||
  2080. (tp->media_type == MEDIA_STP_16_UTP_16))
  2081. {
  2082. tp->config_word1 |= INTERFRAME_SPACING_16;
  2083. }
  2084. else
  2085. tp->config_word1 |= INTERFRAME_SPACING_4;
  2086. *pTimer_Struc++ = tp->config_word0;
  2087. *pTimer_Struc++ = tp->config_word1;
  2088. if((tp->media_type == MEDIA_STP_4) ||
  2089. (tp->media_type == MEDIA_UTP_4) ||
  2090. (tp->media_type == MEDIA_STP_4_UTP_4))
  2091. {
  2092. *pTimer_Struc++ = 0x00FA; /* prescale */
  2093. *pTimer_Struc++ = 0x2710; /* TPT_limit */
  2094. *pTimer_Struc++ = 0x2710; /* TQP_limit */
  2095. *pTimer_Struc++ = 0x0A28; /* TNT_limit */
  2096. *pTimer_Struc++ = 0x3E80; /* TBT_limit */
  2097. *pTimer_Struc++ = 0x3A98; /* TSM_limit */
  2098. *pTimer_Struc++ = 0x1B58; /* TAM_limit */
  2099. *pTimer_Struc++ = 0x00C8; /* TBR_limit */
  2100. *pTimer_Struc++ = 0x07D0; /* TER_limit */
  2101. *pTimer_Struc++ = 0x000A; /* TGT_limit */
  2102. *pTimer_Struc++ = 0x1162; /* THT_limit */
  2103. *pTimer_Struc++ = 0x07D0; /* TRR_limit */
  2104. *pTimer_Struc++ = 0x1388; /* TVX_limit */
  2105. *pTimer_Struc++ = 0x0000; /* reserved */
  2106. }
  2107. else
  2108. {
  2109. *pTimer_Struc++ = 0x03E8; /* prescale */
  2110. *pTimer_Struc++ = 0x9C40; /* TPT_limit */
  2111. *pTimer_Struc++ = 0x9C40; /* TQP_limit */
  2112. *pTimer_Struc++ = 0x0A28; /* TNT_limit */
  2113. *pTimer_Struc++ = 0x3E80; /* TBT_limit */
  2114. *pTimer_Struc++ = 0x3A98; /* TSM_limit */
  2115. *pTimer_Struc++ = 0x1B58; /* TAM_limit */
  2116. *pTimer_Struc++ = 0x00C8; /* TBR_limit */
  2117. *pTimer_Struc++ = 0x07D0; /* TER_limit */
  2118. *pTimer_Struc++ = 0x000A; /* TGT_limit */
  2119. *pTimer_Struc++ = 0x4588; /* THT_limit */
  2120. *pTimer_Struc++ = 0x1F40; /* TRR_limit */
  2121. *pTimer_Struc++ = 0x4E20; /* TVX_limit */
  2122. *pTimer_Struc++ = 0x0000; /* reserved */
  2123. }
  2124. /* Set node address. */
  2125. *pTimer_Struc++ = dev->dev_addr[0] << 8
  2126. | (dev->dev_addr[1] & 0xFF);
  2127. *pTimer_Struc++ = dev->dev_addr[2] << 8
  2128. | (dev->dev_addr[3] & 0xFF);
  2129. *pTimer_Struc++ = dev->dev_addr[4] << 8
  2130. | (dev->dev_addr[5] & 0xFF);
  2131. /* Set group address. */
  2132. *pTimer_Struc++ = tp->group_address_0 << 8
  2133. | tp->group_address_0 >> 8;
  2134. *pTimer_Struc++ = tp->group_address[0] << 8
  2135. | tp->group_address[0] >> 8;
  2136. *pTimer_Struc++ = tp->group_address[1] << 8
  2137. | tp->group_address[1] >> 8;
  2138. /* Set functional address. */
  2139. *pTimer_Struc++ = tp->functional_address_0 << 8
  2140. | tp->functional_address_0 >> 8;
  2141. *pTimer_Struc++ = tp->functional_address[0] << 8
  2142. | tp->functional_address[0] >> 8;
  2143. *pTimer_Struc++ = tp->functional_address[1] << 8
  2144. | tp->functional_address[1] >> 8;
  2145. /* Set Bit-Wise group address. */
  2146. *pTimer_Struc++ = tp->bitwise_group_address[0] << 8
  2147. | tp->bitwise_group_address[0] >> 8;
  2148. *pTimer_Struc++ = tp->bitwise_group_address[1] << 8
  2149. | tp->bitwise_group_address[1] >> 8;
  2150. /* Set ring number address. */
  2151. *pTimer_Struc++ = tp->source_ring_number;
  2152. *pTimer_Struc++ = tp->target_ring_number;
  2153. /* Physical drop number. */
  2154. *pTimer_Struc++ = (unsigned short)0;
  2155. *pTimer_Struc++ = (unsigned short)0;
  2156. /* Product instance ID. */
  2157. for(i = 0; i < 9; i++)
  2158. *pTimer_Struc++ = (unsigned short)0;
  2159. err = smctr_setup_single_cmd_w_data(dev, ACB_CMD_INIT_TRC_TIMERS, 0);
  2160. return (err);
  2161. }
  2162. static int smctr_issue_init_txrx_cmd(struct net_device *dev)
  2163. {
  2164. struct net_local *tp = netdev_priv(dev);
  2165. unsigned int i;
  2166. int err;
  2167. void **txrx_ptrs = (void *)tp->misc_command_data;
  2168. if((err = smctr_wait_while_cbusy(dev)))
  2169. return (err);
  2170. if((err = smctr_wait_cmd(dev)))
  2171. {
  2172. printk(KERN_ERR "%s: Hardware failure\n", dev->name);
  2173. return (err);
  2174. }
  2175. /* Initialize Transmit Queue Pointers that are used, to point to
  2176. * a single FCB.
  2177. */
  2178. for(i = 0; i < NUM_TX_QS_USED; i++)
  2179. *txrx_ptrs++ = (void *)TRC_POINTER(tp->tx_fcb_head[i]);
  2180. /* Initialize Transmit Queue Pointers that are NOT used to ZERO. */
  2181. for(; i < MAX_TX_QS; i++)
  2182. *txrx_ptrs++ = (void *)0;
  2183. /* Initialize Receive Queue Pointers (MAC and Non-MAC) that are
  2184. * used, to point to a single FCB and a BDB chain of buffers.
  2185. */
  2186. for(i = 0; i < NUM_RX_QS_USED; i++)
  2187. {
  2188. *txrx_ptrs++ = (void *)TRC_POINTER(tp->rx_fcb_head[i]);
  2189. *txrx_ptrs++ = (void *)TRC_POINTER(tp->rx_bdb_head[i]);
  2190. }
  2191. /* Initialize Receive Queue Pointers that are NOT used to ZERO. */
  2192. for(; i < MAX_RX_QS; i++)
  2193. {
  2194. *txrx_ptrs++ = (void *)0;
  2195. *txrx_ptrs++ = (void *)0;
  2196. }
  2197. err = smctr_setup_single_cmd_w_data(dev, ACB_CMD_INIT_TX_RX, 0);
  2198. return (err);
  2199. }
  2200. static int smctr_issue_insert_cmd(struct net_device *dev)
  2201. {
  2202. int err;
  2203. err = smctr_setup_single_cmd(dev, ACB_CMD_INSERT, ACB_SUB_CMD_NOP);
  2204. return (err);
  2205. }
  2206. static int smctr_issue_read_ring_status_cmd(struct net_device *dev)
  2207. {
  2208. int err;
  2209. if((err = smctr_wait_while_cbusy(dev)))
  2210. return (err);
  2211. if((err = smctr_wait_cmd(dev)))
  2212. return (err);
  2213. err = smctr_setup_single_cmd_w_data(dev, ACB_CMD_READ_TRC_STATUS,
  2214. RW_TRC_STATUS_BLOCK);
  2215. return (err);
  2216. }
  2217. static int smctr_issue_read_word_cmd(struct net_device *dev, __u16 aword_cnt)
  2218. {
  2219. int err;
  2220. if((err = smctr_wait_while_cbusy(dev)))
  2221. return (err);
  2222. if((err = smctr_wait_cmd(dev)))
  2223. return (err);
  2224. err = smctr_setup_single_cmd_w_data(dev, ACB_CMD_MCT_READ_VALUE,
  2225. aword_cnt);
  2226. return (err);
  2227. }
  2228. static int smctr_issue_remove_cmd(struct net_device *dev)
  2229. {
  2230. struct net_local *tp = netdev_priv(dev);
  2231. int err;
  2232. if((err = smctr_wait_while_cbusy(dev)))
  2233. return (err);
  2234. tp->sclb_ptr->resume_control = 0;
  2235. tp->sclb_ptr->valid_command = SCLB_VALID | SCLB_CMD_REMOVE;
  2236. smctr_set_ctrl_attention(dev);
  2237. return (0);
  2238. }
  2239. static int smctr_issue_resume_acb_cmd(struct net_device *dev)
  2240. {
  2241. struct net_local *tp = netdev_priv(dev);
  2242. int err;
  2243. if((err = smctr_wait_while_cbusy(dev)))
  2244. return (err);
  2245. tp->sclb_ptr->resume_control = SCLB_RC_ACB;
  2246. tp->sclb_ptr->valid_command = SCLB_VALID | SCLB_RESUME_CONTROL_VALID;
  2247. tp->acb_pending = 1;
  2248. smctr_set_ctrl_attention(dev);
  2249. return (0);
  2250. }
  2251. static int smctr_issue_resume_rx_bdb_cmd(struct net_device *dev, __u16 queue)
  2252. {
  2253. struct net_local *tp = netdev_priv(dev);
  2254. int err;
  2255. if((err = smctr_wait_while_cbusy(dev)))
  2256. return (err);
  2257. if(queue == MAC_QUEUE)
  2258. tp->sclb_ptr->resume_control = SCLB_RC_RX_MAC_BDB;
  2259. else
  2260. tp->sclb_ptr->resume_control = SCLB_RC_RX_NON_MAC_BDB;
  2261. tp->sclb_ptr->valid_command = SCLB_VALID | SCLB_RESUME_CONTROL_VALID;
  2262. smctr_set_ctrl_attention(dev);
  2263. return (0);
  2264. }
  2265. static int smctr_issue_resume_rx_fcb_cmd(struct net_device *dev, __u16 queue)
  2266. {
  2267. struct net_local *tp = netdev_priv(dev);
  2268. if(smctr_debug > 10)
  2269. printk(KERN_DEBUG "%s: smctr_issue_resume_rx_fcb_cmd\n", dev->name);
  2270. if(smctr_wait_while_cbusy(dev))
  2271. return (-1);
  2272. if(queue == MAC_QUEUE)
  2273. tp->sclb_ptr->resume_control = SCLB_RC_RX_MAC_FCB;
  2274. else
  2275. tp->sclb_ptr->resume_control = SCLB_RC_RX_NON_MAC_FCB;
  2276. tp->sclb_ptr->valid_command = SCLB_VALID | SCLB_RESUME_CONTROL_VALID;
  2277. smctr_set_ctrl_attention(dev);
  2278. return (0);
  2279. }
  2280. static int smctr_issue_resume_tx_fcb_cmd(struct net_device *dev, __u16 queue)
  2281. {
  2282. struct net_local *tp = netdev_priv(dev);
  2283. if(smctr_debug > 10)
  2284. printk(KERN_DEBUG "%s: smctr_issue_resume_tx_fcb_cmd\n", dev->name);
  2285. if(smctr_wait_while_cbusy(dev))
  2286. return (-1);
  2287. tp->sclb_ptr->resume_control = (SCLB_RC_TFCB0 << queue);
  2288. tp->sclb_ptr->valid_command = SCLB_RESUME_CONTROL_VALID | SCLB_VALID;
  2289. smctr_set_ctrl_attention(dev);
  2290. return (0);
  2291. }
  2292. static int smctr_issue_test_internal_rom_cmd(struct net_device *dev)
  2293. {
  2294. int err;
  2295. err = smctr_setup_single_cmd(dev, ACB_CMD_MCT_TEST,
  2296. TRC_INTERNAL_ROM_TEST);
  2297. return (err);
  2298. }
  2299. static int smctr_issue_test_hic_cmd(struct net_device *dev)
  2300. {
  2301. int err;
  2302. err = smctr_setup_single_cmd(dev, ACB_CMD_HIC_TEST,
  2303. TRC_HOST_INTERFACE_REG_TEST);
  2304. return (err);
  2305. }
  2306. static int smctr_issue_test_mac_reg_cmd(struct net_device *dev)
  2307. {
  2308. int err;
  2309. err = smctr_setup_single_cmd(dev, ACB_CMD_MCT_TEST,
  2310. TRC_MAC_REGISTERS_TEST);
  2311. return (err);
  2312. }
  2313. static int smctr_issue_trc_loopback_cmd(struct net_device *dev)
  2314. {
  2315. int err;
  2316. err = smctr_setup_single_cmd(dev, ACB_CMD_MCT_TEST,
  2317. TRC_INTERNAL_LOOPBACK);
  2318. return (err);
  2319. }
  2320. static int smctr_issue_tri_loopback_cmd(struct net_device *dev)
  2321. {
  2322. int err;
  2323. err = smctr_setup_single_cmd(dev, ACB_CMD_MCT_TEST,
  2324. TRC_TRI_LOOPBACK);
  2325. return (err);
  2326. }
  2327. static int smctr_issue_write_byte_cmd(struct net_device *dev,
  2328. short aword_cnt, void *byte)
  2329. {
  2330. struct net_local *tp = netdev_priv(dev);
  2331. unsigned int iword, ibyte;
  2332. int err;
  2333. if((err = smctr_wait_while_cbusy(dev)))
  2334. return (err);
  2335. if((err = smctr_wait_cmd(dev)))
  2336. return (err);
  2337. for(iword = 0, ibyte = 0; iword < (unsigned int)(aword_cnt & 0xff);
  2338. iword++, ibyte += 2)
  2339. {
  2340. tp->misc_command_data[iword] = (*((__u8 *)byte + ibyte) << 8)
  2341. | (*((__u8 *)byte + ibyte + 1));
  2342. }
  2343. return (smctr_setup_single_cmd_w_data(dev, ACB_CMD_MCT_WRITE_VALUE,
  2344. aword_cnt));
  2345. }
  2346. static int smctr_issue_write_word_cmd(struct net_device *dev,
  2347. short aword_cnt, void *word)
  2348. {
  2349. struct net_local *tp = netdev_priv(dev);
  2350. unsigned int i, err;
  2351. if((err = smctr_wait_while_cbusy(dev)))
  2352. return (err);
  2353. if((err = smctr_wait_cmd(dev)))
  2354. return (err);
  2355. for(i = 0; i < (unsigned int)(aword_cnt & 0xff); i++)
  2356. tp->misc_command_data[i] = *((__u16 *)word + i);
  2357. err = smctr_setup_single_cmd_w_data(dev, ACB_CMD_MCT_WRITE_VALUE,
  2358. aword_cnt);
  2359. return (err);
  2360. }
  2361. static int smctr_join_complete_state(struct net_device *dev)
  2362. {
  2363. int err;
  2364. err = smctr_setup_single_cmd(dev, ACB_CMD_CHANGE_JOIN_STATE,
  2365. JS_JOIN_COMPLETE_STATE);
  2366. return (err);
  2367. }
  2368. static int smctr_link_tx_fcbs_to_bdbs(struct net_device *dev)
  2369. {
  2370. struct net_local *tp = netdev_priv(dev);
  2371. unsigned int i, j;
  2372. FCBlock *fcb;
  2373. BDBlock *bdb;
  2374. for(i = 0; i < NUM_TX_QS_USED; i++)
  2375. {
  2376. fcb = tp->tx_fcb_head[i];
  2377. bdb = tp->tx_bdb_head[i];
  2378. for(j = 0; j < tp->num_tx_fcbs[i]; j++)
  2379. {
  2380. fcb->bdb_ptr = bdb;
  2381. fcb->trc_bdb_ptr = TRC_POINTER(bdb);
  2382. fcb = (FCBlock *)((char *)fcb + sizeof(FCBlock));
  2383. bdb = (BDBlock *)((char *)bdb + sizeof(BDBlock));
  2384. }
  2385. }
  2386. return (0);
  2387. }
  2388. static int smctr_load_firmware(struct net_device *dev)
  2389. {
  2390. struct net_local *tp = netdev_priv(dev);
  2391. const struct firmware *fw;
  2392. __u16 i, checksum = 0;
  2393. int err = 0;
  2394. if(smctr_debug > 10)
  2395. printk(KERN_DEBUG "%s: smctr_load_firmware\n", dev->name);
  2396. if (request_firmware(&fw, "tr_smctr.bin", &dev->dev)) {
  2397. printk(KERN_ERR "%s: firmware not found\n", dev->name);
  2398. return (UCODE_NOT_PRESENT);
  2399. }
  2400. tp->num_of_tx_buffs = 4;
  2401. tp->mode_bits |= UMAC;
  2402. tp->receive_mask = 0;
  2403. tp->max_packet_size = 4177;
  2404. /* Can only upload the firmware once per adapter reset. */
  2405. if (tp->microcode_version != 0) {
  2406. err = (UCODE_PRESENT);
  2407. goto out;
  2408. }
  2409. /* Verify the firmware exists and is there in the right amount. */
  2410. if (!fw->data ||
  2411. (*(fw->data + UCODE_VERSION_OFFSET) < UCODE_VERSION))
  2412. {
  2413. err = (UCODE_NOT_PRESENT);
  2414. goto out;
  2415. }
  2416. /* UCODE_SIZE is not included in Checksum. */
  2417. for(i = 0; i < *((__u16 *)(fw->data + UCODE_SIZE_OFFSET)); i += 2)
  2418. checksum += *((__u16 *)(fw->data + 2 + i));
  2419. if (checksum) {
  2420. err = (UCODE_NOT_PRESENT);
  2421. goto out;
  2422. }
  2423. /* At this point we have a valid firmware image, lets kick it on up. */
  2424. smctr_enable_adapter_ram(dev);
  2425. smctr_enable_16bit(dev);
  2426. smctr_set_page(dev, (__u8 *)tp->ram_access);
  2427. if((smctr_checksum_firmware(dev)) ||
  2428. (*(fw->data + UCODE_VERSION_OFFSET) > tp->microcode_version))
  2429. {
  2430. smctr_enable_adapter_ctrl_store(dev);
  2431. /* Zero out ram space for firmware. */
  2432. for(i = 0; i < CS_RAM_SIZE; i += 2)
  2433. *((__u16 *)(tp->ram_access + i)) = 0;
  2434. smctr_decode_firmware(dev, fw);
  2435. tp->microcode_version = *(fw->data + UCODE_VERSION_OFFSET); *((__u16 *)(tp->ram_access + CS_RAM_VERSION_OFFSET))
  2436. = (tp->microcode_version << 8);
  2437. *((__u16 *)(tp->ram_access + CS_RAM_CHECKSUM_OFFSET))
  2438. = ~(tp->microcode_version << 8) + 1;
  2439. smctr_disable_adapter_ctrl_store(dev);
  2440. if(smctr_checksum_firmware(dev))
  2441. err = HARDWARE_FAILED;
  2442. }
  2443. else
  2444. err = UCODE_PRESENT;
  2445. smctr_disable_16bit(dev);
  2446. out:
  2447. release_firmware(fw);
  2448. return (err);
  2449. }
  2450. static int smctr_load_node_addr(struct net_device *dev)
  2451. {
  2452. int ioaddr = dev->base_addr;
  2453. unsigned int i;
  2454. __u8 r;
  2455. for(i = 0; i < 6; i++)
  2456. {
  2457. r = inb(ioaddr + LAR0 + i);
  2458. dev->dev_addr[i] = (char)r;
  2459. }
  2460. dev->addr_len = 6;
  2461. return (0);
  2462. }
  2463. /* Lobe Media Test.
  2464. * During the transmission of the initial 1500 lobe media MAC frames,
  2465. * the phase lock loop in the 805 chip may lock, and then un-lock, causing
  2466. * the 825 to go into a PURGE state. When performing a PURGE, the MCT
  2467. * microcode will not transmit any frames given to it by the host, and
  2468. * will consequently cause a timeout.
  2469. *
  2470. * NOTE 1: If the monitor_state is MS_BEACON_TEST_STATE, all transmit
  2471. * queues other than the one used for the lobe_media_test should be
  2472. * disabled.!?
  2473. *
  2474. * NOTE 2: If the monitor_state is MS_BEACON_TEST_STATE and the receive_mask
  2475. * has any multi-cast or promiscous bits set, the receive_mask needs to
  2476. * be changed to clear the multi-cast or promiscous mode bits, the lobe_test
  2477. * run, and then the receive mask set back to its original value if the test
  2478. * is successful.
  2479. */
  2480. static int smctr_lobe_media_test(struct net_device *dev)
  2481. {
  2482. struct net_local *tp = netdev_priv(dev);
  2483. unsigned int i, perror = 0;
  2484. unsigned short saved_rcv_mask;
  2485. if(smctr_debug > 10)
  2486. printk(KERN_DEBUG "%s: smctr_lobe_media_test\n", dev->name);
  2487. /* Clear receive mask for lobe test. */
  2488. saved_rcv_mask = tp->receive_mask;
  2489. tp->receive_mask = 0;
  2490. smctr_chg_rx_mask(dev);
  2491. /* Setup the lobe media test. */
  2492. smctr_lobe_media_test_cmd(dev);
  2493. if(smctr_wait_cmd(dev))
  2494. goto err;
  2495. /* Tx lobe media test frames. */
  2496. for(i = 0; i < 1500; ++i)
  2497. {
  2498. if(smctr_send_lobe_media_test(dev))
  2499. {
  2500. if(perror)
  2501. goto err;
  2502. else
  2503. {
  2504. perror = 1;
  2505. if(smctr_lobe_media_test_cmd(dev))
  2506. goto err;
  2507. }
  2508. }
  2509. }
  2510. if(smctr_send_dat(dev))
  2511. {
  2512. if(smctr_send_dat(dev))
  2513. goto err;
  2514. }
  2515. /* Check if any frames received during test. */
  2516. if((tp->rx_fcb_curr[MAC_QUEUE]->frame_status) ||
  2517. (tp->rx_fcb_curr[NON_MAC_QUEUE]->frame_status))
  2518. goto err;
  2519. /* Set receive mask to "Promisc" mode. */
  2520. tp->receive_mask = saved_rcv_mask;
  2521. smctr_chg_rx_mask(dev);
  2522. return 0;
  2523. err:
  2524. smctr_reset_adapter(dev);
  2525. tp->status = CLOSED;
  2526. return LOBE_MEDIA_TEST_FAILED;
  2527. }
  2528. static int smctr_lobe_media_test_cmd(struct net_device *dev)
  2529. {
  2530. struct net_local *tp = netdev_priv(dev);
  2531. int err;
  2532. if(smctr_debug > 10)
  2533. printk(KERN_DEBUG "%s: smctr_lobe_media_test_cmd\n", dev->name);
  2534. /* Change to lobe media test state. */
  2535. if(tp->monitor_state != MS_BEACON_TEST_STATE)
  2536. {
  2537. smctr_lobe_media_test_state(dev);
  2538. if(smctr_wait_cmd(dev))
  2539. {
  2540. printk(KERN_ERR "Lobe Failed test state\n");
  2541. return (LOBE_MEDIA_TEST_FAILED);
  2542. }
  2543. }
  2544. err = smctr_setup_single_cmd(dev, ACB_CMD_MCT_TEST,
  2545. TRC_LOBE_MEDIA_TEST);
  2546. return (err);
  2547. }
  2548. static int smctr_lobe_media_test_state(struct net_device *dev)
  2549. {
  2550. int err;
  2551. err = smctr_setup_single_cmd(dev, ACB_CMD_CHANGE_JOIN_STATE,
  2552. JS_LOBE_TEST_STATE);
  2553. return (err);
  2554. }
  2555. static int smctr_make_8025_hdr(struct net_device *dev,
  2556. MAC_HEADER *rmf, MAC_HEADER *tmf, __u16 ac_fc)
  2557. {
  2558. tmf->ac = MSB(ac_fc); /* msb is access control */
  2559. tmf->fc = LSB(ac_fc); /* lsb is frame control */
  2560. tmf->sa[0] = dev->dev_addr[0];
  2561. tmf->sa[1] = dev->dev_addr[1];
  2562. tmf->sa[2] = dev->dev_addr[2];
  2563. tmf->sa[3] = dev->dev_addr[3];
  2564. tmf->sa[4] = dev->dev_addr[4];
  2565. tmf->sa[5] = dev->dev_addr[5];
  2566. switch(tmf->vc)
  2567. {
  2568. /* Send RQ_INIT to RPS */
  2569. case RQ_INIT:
  2570. tmf->da[0] = 0xc0;
  2571. tmf->da[1] = 0x00;
  2572. tmf->da[2] = 0x00;
  2573. tmf->da[3] = 0x00;
  2574. tmf->da[4] = 0x00;
  2575. tmf->da[5] = 0x02;
  2576. break;
  2577. /* Send RPT_TX_FORWARD to CRS */
  2578. case RPT_TX_FORWARD:
  2579. tmf->da[0] = 0xc0;
  2580. tmf->da[1] = 0x00;
  2581. tmf->da[2] = 0x00;
  2582. tmf->da[3] = 0x00;
  2583. tmf->da[4] = 0x00;
  2584. tmf->da[5] = 0x10;
  2585. break;
  2586. /* Everything else goes to sender */
  2587. default:
  2588. tmf->da[0] = rmf->sa[0];
  2589. tmf->da[1] = rmf->sa[1];
  2590. tmf->da[2] = rmf->sa[2];
  2591. tmf->da[3] = rmf->sa[3];
  2592. tmf->da[4] = rmf->sa[4];
  2593. tmf->da[5] = rmf->sa[5];
  2594. break;
  2595. }
  2596. return (0);
  2597. }
  2598. static int smctr_make_access_pri(struct net_device *dev, MAC_SUB_VECTOR *tsv)
  2599. {
  2600. struct net_local *tp = netdev_priv(dev);
  2601. tsv->svi = AUTHORIZED_ACCESS_PRIORITY;
  2602. tsv->svl = S_AUTHORIZED_ACCESS_PRIORITY;
  2603. tsv->svv[0] = MSB(tp->authorized_access_priority);
  2604. tsv->svv[1] = LSB(tp->authorized_access_priority);
  2605. return (0);
  2606. }
  2607. static int smctr_make_addr_mod(struct net_device *dev, MAC_SUB_VECTOR *tsv)
  2608. {
  2609. tsv->svi = ADDRESS_MODIFER;
  2610. tsv->svl = S_ADDRESS_MODIFER;
  2611. tsv->svv[0] = 0;
  2612. tsv->svv[1] = 0;
  2613. return (0);
  2614. }
  2615. static int smctr_make_auth_funct_class(struct net_device *dev,
  2616. MAC_SUB_VECTOR *tsv)
  2617. {
  2618. struct net_local *tp = netdev_priv(dev);
  2619. tsv->svi = AUTHORIZED_FUNCTION_CLASS;
  2620. tsv->svl = S_AUTHORIZED_FUNCTION_CLASS;
  2621. tsv->svv[0] = MSB(tp->authorized_function_classes);
  2622. tsv->svv[1] = LSB(tp->authorized_function_classes);
  2623. return (0);
  2624. }
  2625. static int smctr_make_corr(struct net_device *dev,
  2626. MAC_SUB_VECTOR *tsv, __u16 correlator)
  2627. {
  2628. tsv->svi = CORRELATOR;
  2629. tsv->svl = S_CORRELATOR;
  2630. tsv->svv[0] = MSB(correlator);
  2631. tsv->svv[1] = LSB(correlator);
  2632. return (0);
  2633. }
  2634. static int smctr_make_funct_addr(struct net_device *dev, MAC_SUB_VECTOR *tsv)
  2635. {
  2636. struct net_local *tp = netdev_priv(dev);
  2637. smctr_get_functional_address(dev);
  2638. tsv->svi = FUNCTIONAL_ADDRESS;
  2639. tsv->svl = S_FUNCTIONAL_ADDRESS;
  2640. tsv->svv[0] = MSB(tp->misc_command_data[0]);
  2641. tsv->svv[1] = LSB(tp->misc_command_data[0]);
  2642. tsv->svv[2] = MSB(tp->misc_command_data[1]);
  2643. tsv->svv[3] = LSB(tp->misc_command_data[1]);
  2644. return (0);
  2645. }
  2646. static int smctr_make_group_addr(struct net_device *dev, MAC_SUB_VECTOR *tsv)
  2647. {
  2648. struct net_local *tp = netdev_priv(dev);
  2649. smctr_get_group_address(dev);
  2650. tsv->svi = GROUP_ADDRESS;
  2651. tsv->svl = S_GROUP_ADDRESS;
  2652. tsv->svv[0] = MSB(tp->misc_command_data[0]);
  2653. tsv->svv[1] = LSB(tp->misc_command_data[0]);
  2654. tsv->svv[2] = MSB(tp->misc_command_data[1]);
  2655. tsv->svv[3] = LSB(tp->misc_command_data[1]);
  2656. /* Set Group Address Sub-vector to all zeros if only the
  2657. * Group Address/Functional Address Indicator is set.
  2658. */
  2659. if(tsv->svv[0] == 0x80 && tsv->svv[1] == 0x00 &&
  2660. tsv->svv[2] == 0x00 && tsv->svv[3] == 0x00)
  2661. tsv->svv[0] = 0x00;
  2662. return (0);
  2663. }
  2664. static int smctr_make_phy_drop_num(struct net_device *dev,
  2665. MAC_SUB_VECTOR *tsv)
  2666. {
  2667. struct net_local *tp = netdev_priv(dev);
  2668. smctr_get_physical_drop_number(dev);
  2669. tsv->svi = PHYSICAL_DROP;
  2670. tsv->svl = S_PHYSICAL_DROP;
  2671. tsv->svv[0] = MSB(tp->misc_command_data[0]);
  2672. tsv->svv[1] = LSB(tp->misc_command_data[0]);
  2673. tsv->svv[2] = MSB(tp->misc_command_data[1]);
  2674. tsv->svv[3] = LSB(tp->misc_command_data[1]);
  2675. return (0);
  2676. }
  2677. static int smctr_make_product_id(struct net_device *dev, MAC_SUB_VECTOR *tsv)
  2678. {
  2679. int i;
  2680. tsv->svi = PRODUCT_INSTANCE_ID;
  2681. tsv->svl = S_PRODUCT_INSTANCE_ID;
  2682. for(i = 0; i < 18; i++)
  2683. tsv->svv[i] = 0xF0;
  2684. return (0);
  2685. }
  2686. static int smctr_make_station_id(struct net_device *dev, MAC_SUB_VECTOR *tsv)
  2687. {
  2688. struct net_local *tp = netdev_priv(dev);
  2689. smctr_get_station_id(dev);
  2690. tsv->svi = STATION_IDENTIFER;
  2691. tsv->svl = S_STATION_IDENTIFER;
  2692. tsv->svv[0] = MSB(tp->misc_command_data[0]);
  2693. tsv->svv[1] = LSB(tp->misc_command_data[0]);
  2694. tsv->svv[2] = MSB(tp->misc_command_data[1]);
  2695. tsv->svv[3] = LSB(tp->misc_command_data[1]);
  2696. tsv->svv[4] = MSB(tp->misc_command_data[2]);
  2697. tsv->svv[5] = LSB(tp->misc_command_data[2]);
  2698. return (0);
  2699. }
  2700. static int smctr_make_ring_station_status(struct net_device *dev,
  2701. MAC_SUB_VECTOR * tsv)
  2702. {
  2703. tsv->svi = RING_STATION_STATUS;
  2704. tsv->svl = S_RING_STATION_STATUS;
  2705. tsv->svv[0] = 0;
  2706. tsv->svv[1] = 0;
  2707. tsv->svv[2] = 0;
  2708. tsv->svv[3] = 0;
  2709. tsv->svv[4] = 0;
  2710. tsv->svv[5] = 0;
  2711. return (0);
  2712. }
  2713. static int smctr_make_ring_station_version(struct net_device *dev,
  2714. MAC_SUB_VECTOR *tsv)
  2715. {
  2716. struct net_local *tp = netdev_priv(dev);
  2717. tsv->svi = RING_STATION_VERSION_NUMBER;
  2718. tsv->svl = S_RING_STATION_VERSION_NUMBER;
  2719. tsv->svv[0] = 0xe2; /* EBCDIC - S */
  2720. tsv->svv[1] = 0xd4; /* EBCDIC - M */
  2721. tsv->svv[2] = 0xc3; /* EBCDIC - C */
  2722. tsv->svv[3] = 0x40; /* EBCDIC - */
  2723. tsv->svv[4] = 0xe5; /* EBCDIC - V */
  2724. tsv->svv[5] = 0xF0 + (tp->microcode_version >> 4);
  2725. tsv->svv[6] = 0xF0 + (tp->microcode_version & 0x0f);
  2726. tsv->svv[7] = 0x40; /* EBCDIC - */
  2727. tsv->svv[8] = 0xe7; /* EBCDIC - X */
  2728. if(tp->extra_info & CHIP_REV_MASK)
  2729. tsv->svv[9] = 0xc5; /* EBCDIC - E */
  2730. else
  2731. tsv->svv[9] = 0xc4; /* EBCDIC - D */
  2732. return (0);
  2733. }
  2734. static int smctr_make_tx_status_code(struct net_device *dev,
  2735. MAC_SUB_VECTOR *tsv, __u16 tx_fstatus)
  2736. {
  2737. tsv->svi = TRANSMIT_STATUS_CODE;
  2738. tsv->svl = S_TRANSMIT_STATUS_CODE;
  2739. tsv->svv[0] = ((tx_fstatus & 0x0100 >> 6) | IBM_PASS_SOURCE_ADDR);
  2740. /* Stripped frame status of Transmitted Frame */
  2741. tsv->svv[1] = tx_fstatus & 0xff;
  2742. return (0);
  2743. }
  2744. static int smctr_make_upstream_neighbor_addr(struct net_device *dev,
  2745. MAC_SUB_VECTOR *tsv)
  2746. {
  2747. struct net_local *tp = netdev_priv(dev);
  2748. smctr_get_upstream_neighbor_addr(dev);
  2749. tsv->svi = UPSTREAM_NEIGHBOR_ADDRESS;
  2750. tsv->svl = S_UPSTREAM_NEIGHBOR_ADDRESS;
  2751. tsv->svv[0] = MSB(tp->misc_command_data[0]);
  2752. tsv->svv[1] = LSB(tp->misc_command_data[0]);
  2753. tsv->svv[2] = MSB(tp->misc_command_data[1]);
  2754. tsv->svv[3] = LSB(tp->misc_command_data[1]);
  2755. tsv->svv[4] = MSB(tp->misc_command_data[2]);
  2756. tsv->svv[5] = LSB(tp->misc_command_data[2]);
  2757. return (0);
  2758. }
  2759. static int smctr_make_wrap_data(struct net_device *dev, MAC_SUB_VECTOR *tsv)
  2760. {
  2761. tsv->svi = WRAP_DATA;
  2762. tsv->svl = S_WRAP_DATA;
  2763. return (0);
  2764. }
  2765. /*
  2766. * Open/initialize the board. This is called sometime after
  2767. * booting when the 'ifconfig' program is run.
  2768. *
  2769. * This routine should set everything up anew at each open, even
  2770. * registers that "should" only need to be set once at boot, so that
  2771. * there is non-reboot way to recover if something goes wrong.
  2772. */
  2773. static int smctr_open(struct net_device *dev)
  2774. {
  2775. int err;
  2776. if(smctr_debug > 10)
  2777. printk(KERN_DEBUG "%s: smctr_open\n", dev->name);
  2778. err = smctr_init_adapter(dev);
  2779. if(err < 0)
  2780. return (err);
  2781. return (err);
  2782. }
  2783. /* Interrupt driven open of Token card. */
  2784. static int smctr_open_tr(struct net_device *dev)
  2785. {
  2786. struct net_local *tp = netdev_priv(dev);
  2787. unsigned long flags;
  2788. int err;
  2789. if(smctr_debug > 10)
  2790. printk(KERN_DEBUG "%s: smctr_open_tr\n", dev->name);
  2791. /* Now we can actually open the adapter. */
  2792. if(tp->status == OPEN)
  2793. return (0);
  2794. if(tp->status != INITIALIZED)
  2795. return (-1);
  2796. /* FIXME: it would work a lot better if we masked the irq sources
  2797. on the card here, then we could skip the locking and poll nicely */
  2798. spin_lock_irqsave(&tp->lock, flags);
  2799. smctr_set_page(dev, (__u8 *)tp->ram_access);
  2800. if((err = smctr_issue_resume_rx_fcb_cmd(dev, (short)MAC_QUEUE)))
  2801. goto out;
  2802. if((err = smctr_issue_resume_rx_bdb_cmd(dev, (short)MAC_QUEUE)))
  2803. goto out;
  2804. if((err = smctr_issue_resume_rx_fcb_cmd(dev, (short)NON_MAC_QUEUE)))
  2805. goto out;
  2806. if((err = smctr_issue_resume_rx_bdb_cmd(dev, (short)NON_MAC_QUEUE)))
  2807. goto out;
  2808. tp->status = CLOSED;
  2809. /* Insert into the Ring or Enter Loopback Mode. */
  2810. if((tp->mode_bits & LOOPING_MODE_MASK) == LOOPBACK_MODE_1)
  2811. {
  2812. tp->status = CLOSED;
  2813. if(!(err = smctr_issue_trc_loopback_cmd(dev)))
  2814. {
  2815. if(!(err = smctr_wait_cmd(dev)))
  2816. tp->status = OPEN;
  2817. }
  2818. smctr_status_chg(dev);
  2819. }
  2820. else
  2821. {
  2822. if((tp->mode_bits & LOOPING_MODE_MASK) == LOOPBACK_MODE_2)
  2823. {
  2824. tp->status = CLOSED;
  2825. if(!(err = smctr_issue_tri_loopback_cmd(dev)))
  2826. {
  2827. if(!(err = smctr_wait_cmd(dev)))
  2828. tp->status = OPEN;
  2829. }
  2830. smctr_status_chg(dev);
  2831. }
  2832. else
  2833. {
  2834. if((tp->mode_bits & LOOPING_MODE_MASK)
  2835. == LOOPBACK_MODE_3)
  2836. {
  2837. tp->status = CLOSED;
  2838. if(!(err = smctr_lobe_media_test_cmd(dev)))
  2839. {
  2840. if(!(err = smctr_wait_cmd(dev)))
  2841. tp->status = OPEN;
  2842. }
  2843. smctr_status_chg(dev);
  2844. }
  2845. else
  2846. {
  2847. if(!(err = smctr_lobe_media_test(dev)))
  2848. err = smctr_issue_insert_cmd(dev);
  2849. else
  2850. {
  2851. if(err == LOBE_MEDIA_TEST_FAILED)
  2852. printk(KERN_WARNING "%s: Lobe Media Test Failure - Check cable?\n", dev->name);
  2853. }
  2854. }
  2855. }
  2856. }
  2857. out:
  2858. spin_unlock_irqrestore(&tp->lock, flags);
  2859. return (err);
  2860. }
  2861. /* Check for a network adapter of this type,
  2862. * and return device structure if one exists.
  2863. */
  2864. struct net_device __init *smctr_probe(int unit)
  2865. {
  2866. struct net_device *dev = alloc_trdev(sizeof(struct net_local));
  2867. static const unsigned ports[] = {
  2868. 0x200, 0x220, 0x240, 0x260, 0x280, 0x2A0, 0x2C0, 0x2E0, 0x300,
  2869. 0x320, 0x340, 0x360, 0x380, 0
  2870. };
  2871. const unsigned *port;
  2872. int err = 0;
  2873. if (!dev)
  2874. return ERR_PTR(-ENOMEM);
  2875. if (unit >= 0) {
  2876. sprintf(dev->name, "tr%d", unit);
  2877. netdev_boot_setup_check(dev);
  2878. }
  2879. if (dev->base_addr > 0x1ff) /* Check a single specified location. */
  2880. err = smctr_probe1(dev, dev->base_addr);
  2881. else if(dev->base_addr != 0) /* Don't probe at all. */
  2882. err =-ENXIO;
  2883. else {
  2884. for (port = ports; *port; port++) {
  2885. err = smctr_probe1(dev, *port);
  2886. if (!err)
  2887. break;
  2888. }
  2889. }
  2890. if (err)
  2891. goto out;
  2892. err = register_netdev(dev);
  2893. if (err)
  2894. goto out1;
  2895. return dev;
  2896. out1:
  2897. #ifdef CONFIG_MCA_LEGACY
  2898. { struct net_local *tp = netdev_priv(dev);
  2899. if (tp->slot_num)
  2900. mca_mark_as_unused(tp->slot_num);
  2901. }
  2902. #endif
  2903. release_region(dev->base_addr, SMCTR_IO_EXTENT);
  2904. free_irq(dev->irq, dev);
  2905. out:
  2906. free_netdev(dev);
  2907. return ERR_PTR(err);
  2908. }
  2909. static const struct net_device_ops smctr_netdev_ops = {
  2910. .ndo_open = smctr_open,
  2911. .ndo_stop = smctr_close,
  2912. .ndo_start_xmit = smctr_send_packet,
  2913. .ndo_tx_timeout = smctr_timeout,
  2914. .ndo_get_stats = smctr_get_stats,
  2915. .ndo_set_multicast_list = smctr_set_multicast_list,
  2916. };
  2917. static int __init smctr_probe1(struct net_device *dev, int ioaddr)
  2918. {
  2919. static unsigned version_printed;
  2920. struct net_local *tp = netdev_priv(dev);
  2921. int err;
  2922. __u32 *ram;
  2923. if(smctr_debug && version_printed++ == 0)
  2924. printk(version);
  2925. spin_lock_init(&tp->lock);
  2926. dev->base_addr = ioaddr;
  2927. /* Actually detect an adapter now. */
  2928. err = smctr_chk_isa(dev);
  2929. if(err < 0)
  2930. {
  2931. if ((err = smctr_chk_mca(dev)) < 0) {
  2932. err = -ENODEV;
  2933. goto out;
  2934. }
  2935. }
  2936. tp = netdev_priv(dev);
  2937. dev->mem_start = tp->ram_base;
  2938. dev->mem_end = dev->mem_start + 0x10000;
  2939. ram = (__u32 *)phys_to_virt(dev->mem_start);
  2940. tp->ram_access = *(__u32 *)&ram;
  2941. tp->status = NOT_INITIALIZED;
  2942. err = smctr_load_firmware(dev);
  2943. if(err != UCODE_PRESENT && err != SUCCESS)
  2944. {
  2945. printk(KERN_ERR "%s: Firmware load failed (%d)\n", dev->name, err);
  2946. err = -EIO;
  2947. goto out;
  2948. }
  2949. /* Allow user to specify ring speed on module insert. */
  2950. if(ringspeed == 4)
  2951. tp->media_type = MEDIA_UTP_4;
  2952. else
  2953. tp->media_type = MEDIA_UTP_16;
  2954. printk(KERN_INFO "%s: %s %s at Io %#4x, Irq %d, Rom %#4x, Ram %#4x.\n",
  2955. dev->name, smctr_name, smctr_model,
  2956. (unsigned int)dev->base_addr,
  2957. dev->irq, tp->rom_base, tp->ram_base);
  2958. dev->netdev_ops = &smctr_netdev_ops;
  2959. dev->watchdog_timeo = HZ;
  2960. return (0);
  2961. out:
  2962. return err;
  2963. }
  2964. static int smctr_process_rx_packet(MAC_HEADER *rmf, __u16 size,
  2965. struct net_device *dev, __u16 rx_status)
  2966. {
  2967. struct net_local *tp = netdev_priv(dev);
  2968. struct sk_buff *skb;
  2969. __u16 rcode, correlator;
  2970. int err = 0;
  2971. __u8 xframe = 1;
  2972. rmf->vl = SWAP_BYTES(rmf->vl);
  2973. if(rx_status & FCB_RX_STATUS_DA_MATCHED)
  2974. {
  2975. switch(rmf->vc)
  2976. {
  2977. /* Received MAC Frames Processed by RS. */
  2978. case INIT:
  2979. if((rcode = smctr_rcv_init(dev, rmf, &correlator)) == HARDWARE_FAILED)
  2980. {
  2981. return (rcode);
  2982. }
  2983. if((err = smctr_send_rsp(dev, rmf, rcode,
  2984. correlator)))
  2985. {
  2986. return (err);
  2987. }
  2988. break;
  2989. case CHG_PARM:
  2990. if((rcode = smctr_rcv_chg_param(dev, rmf,
  2991. &correlator)) ==HARDWARE_FAILED)
  2992. {
  2993. return (rcode);
  2994. }
  2995. if((err = smctr_send_rsp(dev, rmf, rcode,
  2996. correlator)))
  2997. {
  2998. return (err);
  2999. }
  3000. break;
  3001. case RQ_ADDR:
  3002. if((rcode = smctr_rcv_rq_addr_state_attch(dev,
  3003. rmf, &correlator)) != POSITIVE_ACK)
  3004. {
  3005. if(rcode == HARDWARE_FAILED)
  3006. return (rcode);
  3007. else
  3008. return (smctr_send_rsp(dev, rmf,
  3009. rcode, correlator));
  3010. }
  3011. if((err = smctr_send_rpt_addr(dev, rmf,
  3012. correlator)))
  3013. {
  3014. return (err);
  3015. }
  3016. break;
  3017. case RQ_ATTCH:
  3018. if((rcode = smctr_rcv_rq_addr_state_attch(dev,
  3019. rmf, &correlator)) != POSITIVE_ACK)
  3020. {
  3021. if(rcode == HARDWARE_FAILED)
  3022. return (rcode);
  3023. else
  3024. return (smctr_send_rsp(dev, rmf,
  3025. rcode,
  3026. correlator));
  3027. }
  3028. if((err = smctr_send_rpt_attch(dev, rmf,
  3029. correlator)))
  3030. {
  3031. return (err);
  3032. }
  3033. break;
  3034. case RQ_STATE:
  3035. if((rcode = smctr_rcv_rq_addr_state_attch(dev,
  3036. rmf, &correlator)) != POSITIVE_ACK)
  3037. {
  3038. if(rcode == HARDWARE_FAILED)
  3039. return (rcode);
  3040. else
  3041. return (smctr_send_rsp(dev, rmf,
  3042. rcode,
  3043. correlator));
  3044. }
  3045. if((err = smctr_send_rpt_state(dev, rmf,
  3046. correlator)))
  3047. {
  3048. return (err);
  3049. }
  3050. break;
  3051. case TX_FORWARD: {
  3052. __u16 uninitialized_var(tx_fstatus);
  3053. if((rcode = smctr_rcv_tx_forward(dev, rmf))
  3054. != POSITIVE_ACK)
  3055. {
  3056. if(rcode == HARDWARE_FAILED)
  3057. return (rcode);
  3058. else
  3059. return (smctr_send_rsp(dev, rmf,
  3060. rcode,
  3061. correlator));
  3062. }
  3063. if((err = smctr_send_tx_forward(dev, rmf,
  3064. &tx_fstatus)) == HARDWARE_FAILED)
  3065. {
  3066. return (err);
  3067. }
  3068. if(err == A_FRAME_WAS_FORWARDED)
  3069. {
  3070. if((err = smctr_send_rpt_tx_forward(dev,
  3071. rmf, tx_fstatus))
  3072. == HARDWARE_FAILED)
  3073. {
  3074. return (err);
  3075. }
  3076. }
  3077. break;
  3078. }
  3079. /* Received MAC Frames Processed by CRS/REM/RPS. */
  3080. case RSP:
  3081. case RQ_INIT:
  3082. case RPT_NEW_MON:
  3083. case RPT_SUA_CHG:
  3084. case RPT_ACTIVE_ERR:
  3085. case RPT_NN_INCMP:
  3086. case RPT_ERROR:
  3087. case RPT_ATTCH:
  3088. case RPT_STATE:
  3089. case RPT_ADDR:
  3090. break;
  3091. /* Rcvd Att. MAC Frame (if RXATMAC set) or UNKNOWN */
  3092. default:
  3093. xframe = 0;
  3094. if(!(tp->receive_mask & ACCEPT_ATT_MAC_FRAMES))
  3095. {
  3096. rcode = smctr_rcv_unknown(dev, rmf,
  3097. &correlator);
  3098. if((err = smctr_send_rsp(dev, rmf,rcode,
  3099. correlator)))
  3100. {
  3101. return (err);
  3102. }
  3103. }
  3104. break;
  3105. }
  3106. }
  3107. else
  3108. {
  3109. /* 1. DA doesn't match (Promiscuous Mode).
  3110. * 2. Parse for Extended MAC Frame Type.
  3111. */
  3112. switch(rmf->vc)
  3113. {
  3114. case RSP:
  3115. case INIT:
  3116. case RQ_INIT:
  3117. case RQ_ADDR:
  3118. case RQ_ATTCH:
  3119. case RQ_STATE:
  3120. case CHG_PARM:
  3121. case RPT_ADDR:
  3122. case RPT_ERROR:
  3123. case RPT_ATTCH:
  3124. case RPT_STATE:
  3125. case RPT_NEW_MON:
  3126. case RPT_SUA_CHG:
  3127. case RPT_NN_INCMP:
  3128. case RPT_ACTIVE_ERR:
  3129. break;
  3130. default:
  3131. xframe = 0;
  3132. break;
  3133. }
  3134. }
  3135. /* NOTE: UNKNOWN MAC frames will NOT be passed up unless
  3136. * ACCEPT_ATT_MAC_FRAMES is set.
  3137. */
  3138. if(((tp->receive_mask & ACCEPT_ATT_MAC_FRAMES) &&
  3139. (xframe == (__u8)0)) ||
  3140. ((tp->receive_mask & ACCEPT_EXT_MAC_FRAMES) &&
  3141. (xframe == (__u8)1)))
  3142. {
  3143. rmf->vl = SWAP_BYTES(rmf->vl);
  3144. if (!(skb = dev_alloc_skb(size)))
  3145. return -ENOMEM;
  3146. skb->len = size;
  3147. /* Slide data into a sleek skb. */
  3148. skb_put(skb, skb->len);
  3149. skb_copy_to_linear_data(skb, rmf, skb->len);
  3150. /* Update Counters */
  3151. tp->MacStat.rx_packets++;
  3152. tp->MacStat.rx_bytes += skb->len;
  3153. /* Kick the packet on up. */
  3154. skb->protocol = tr_type_trans(skb, dev);
  3155. netif_rx(skb);
  3156. err = 0;
  3157. }
  3158. return (err);
  3159. }
  3160. /* Adapter RAM test. Incremental word ODD boundary data test. */
  3161. static int smctr_ram_memory_test(struct net_device *dev)
  3162. {
  3163. struct net_local *tp = netdev_priv(dev);
  3164. __u16 page, pages_of_ram, start_pattern = 0, word_pattern = 0,
  3165. word_read = 0, err_word = 0, err_pattern = 0;
  3166. unsigned int err_offset;
  3167. __u32 j, pword;
  3168. __u8 err = 0;
  3169. if(smctr_debug > 10)
  3170. printk(KERN_DEBUG "%s: smctr_ram_memory_test\n", dev->name);
  3171. start_pattern = 0x0001;
  3172. pages_of_ram = tp->ram_size / tp->ram_usable;
  3173. pword = tp->ram_access;
  3174. /* Incremental word ODD boundary test. */
  3175. for(page = 0; (page < pages_of_ram) && (~err);
  3176. page++, start_pattern += 0x8000)
  3177. {
  3178. smctr_set_page(dev, (__u8 *)(tp->ram_access
  3179. + (page * tp->ram_usable * 1024) + 1));
  3180. word_pattern = start_pattern;
  3181. for(j = 1; j < (__u32)(tp->ram_usable * 1024) - 1; j += 2)
  3182. *(__u16 *)(pword + j) = word_pattern++;
  3183. word_pattern = start_pattern;
  3184. for(j = 1; j < (__u32)(tp->ram_usable * 1024) - 1 && (~err);
  3185. j += 2, word_pattern++)
  3186. {
  3187. word_read = *(__u16 *)(pword + j);
  3188. if(word_read != word_pattern)
  3189. {
  3190. err = (__u8)1;
  3191. err_offset = j;
  3192. err_word = word_read;
  3193. err_pattern = word_pattern;
  3194. return (RAM_TEST_FAILED);
  3195. }
  3196. }
  3197. }
  3198. /* Zero out memory. */
  3199. for(page = 0; page < pages_of_ram && (~err); page++)
  3200. {
  3201. smctr_set_page(dev, (__u8 *)(tp->ram_access
  3202. + (page * tp->ram_usable * 1024)));
  3203. word_pattern = 0;
  3204. for(j = 0; j < (__u32)tp->ram_usable * 1024; j +=2)
  3205. *(__u16 *)(pword + j) = word_pattern;
  3206. for(j =0; j < (__u32)tp->ram_usable * 1024 && (~err); j += 2)
  3207. {
  3208. word_read = *(__u16 *)(pword + j);
  3209. if(word_read != word_pattern)
  3210. {
  3211. err = (__u8)1;
  3212. err_offset = j;
  3213. err_word = word_read;
  3214. err_pattern = word_pattern;
  3215. return (RAM_TEST_FAILED);
  3216. }
  3217. }
  3218. }
  3219. smctr_set_page(dev, (__u8 *)tp->ram_access);
  3220. return (0);
  3221. }
  3222. static int smctr_rcv_chg_param(struct net_device *dev, MAC_HEADER *rmf,
  3223. __u16 *correlator)
  3224. {
  3225. MAC_SUB_VECTOR *rsv;
  3226. signed short vlen;
  3227. __u16 rcode = POSITIVE_ACK;
  3228. unsigned int svectors = F_NO_SUB_VECTORS_FOUND;
  3229. /* This Frame can only come from a CRS */
  3230. if((rmf->dc_sc & SC_MASK) != SC_CRS)
  3231. return(E_INAPPROPRIATE_SOURCE_CLASS);
  3232. /* Remove MVID Length from total length. */
  3233. vlen = (signed short)rmf->vl - 4;
  3234. /* Point to First SVID */
  3235. rsv = (MAC_SUB_VECTOR *)((__u32)rmf + sizeof(MAC_HEADER));
  3236. /* Search for Appropriate SVID's. */
  3237. while((vlen > 0) && (rcode == POSITIVE_ACK))
  3238. {
  3239. switch(rsv->svi)
  3240. {
  3241. case CORRELATOR:
  3242. svectors |= F_CORRELATOR;
  3243. rcode = smctr_set_corr(dev, rsv, correlator);
  3244. break;
  3245. case LOCAL_RING_NUMBER:
  3246. svectors |= F_LOCAL_RING_NUMBER;
  3247. rcode = smctr_set_local_ring_num(dev, rsv);
  3248. break;
  3249. case ASSIGN_PHYSICAL_DROP:
  3250. svectors |= F_ASSIGN_PHYSICAL_DROP;
  3251. rcode = smctr_set_phy_drop(dev, rsv);
  3252. break;
  3253. case ERROR_TIMER_VALUE:
  3254. svectors |= F_ERROR_TIMER_VALUE;
  3255. rcode = smctr_set_error_timer_value(dev, rsv);
  3256. break;
  3257. case AUTHORIZED_FUNCTION_CLASS:
  3258. svectors |= F_AUTHORIZED_FUNCTION_CLASS;
  3259. rcode = smctr_set_auth_funct_class(dev, rsv);
  3260. break;
  3261. case AUTHORIZED_ACCESS_PRIORITY:
  3262. svectors |= F_AUTHORIZED_ACCESS_PRIORITY;
  3263. rcode = smctr_set_auth_access_pri(dev, rsv);
  3264. break;
  3265. default:
  3266. rcode = E_SUB_VECTOR_UNKNOWN;
  3267. break;
  3268. }
  3269. /* Let Sender Know if SUM of SV length's is
  3270. * larger then length in MVID length field
  3271. */
  3272. if((vlen -= rsv->svl) < 0)
  3273. rcode = E_VECTOR_LENGTH_ERROR;
  3274. rsv = (MAC_SUB_VECTOR *)((__u32)rsv + rsv->svl);
  3275. }
  3276. if(rcode == POSITIVE_ACK)
  3277. {
  3278. /* Let Sender Know if MVID length field
  3279. * is larger then SUM of SV length's
  3280. */
  3281. if(vlen != 0)
  3282. rcode = E_VECTOR_LENGTH_ERROR;
  3283. else
  3284. {
  3285. /* Let Sender Know if Expected SVID Missing */
  3286. if((svectors & R_CHG_PARM) ^ R_CHG_PARM)
  3287. rcode = E_MISSING_SUB_VECTOR;
  3288. }
  3289. }
  3290. return (rcode);
  3291. }
  3292. static int smctr_rcv_init(struct net_device *dev, MAC_HEADER *rmf,
  3293. __u16 *correlator)
  3294. {
  3295. MAC_SUB_VECTOR *rsv;
  3296. signed short vlen;
  3297. __u16 rcode = POSITIVE_ACK;
  3298. unsigned int svectors = F_NO_SUB_VECTORS_FOUND;
  3299. /* This Frame can only come from a RPS */
  3300. if((rmf->dc_sc & SC_MASK) != SC_RPS)
  3301. return (E_INAPPROPRIATE_SOURCE_CLASS);
  3302. /* Remove MVID Length from total length. */
  3303. vlen = (signed short)rmf->vl - 4;
  3304. /* Point to First SVID */
  3305. rsv = (MAC_SUB_VECTOR *)((__u32)rmf + sizeof(MAC_HEADER));
  3306. /* Search for Appropriate SVID's */
  3307. while((vlen > 0) && (rcode == POSITIVE_ACK))
  3308. {
  3309. switch(rsv->svi)
  3310. {
  3311. case CORRELATOR:
  3312. svectors |= F_CORRELATOR;
  3313. rcode = smctr_set_corr(dev, rsv, correlator);
  3314. break;
  3315. case LOCAL_RING_NUMBER:
  3316. svectors |= F_LOCAL_RING_NUMBER;
  3317. rcode = smctr_set_local_ring_num(dev, rsv);
  3318. break;
  3319. case ASSIGN_PHYSICAL_DROP:
  3320. svectors |= F_ASSIGN_PHYSICAL_DROP;
  3321. rcode = smctr_set_phy_drop(dev, rsv);
  3322. break;
  3323. case ERROR_TIMER_VALUE:
  3324. svectors |= F_ERROR_TIMER_VALUE;
  3325. rcode = smctr_set_error_timer_value(dev, rsv);
  3326. break;
  3327. default:
  3328. rcode = E_SUB_VECTOR_UNKNOWN;
  3329. break;
  3330. }
  3331. /* Let Sender Know if SUM of SV length's is
  3332. * larger then length in MVID length field
  3333. */
  3334. if((vlen -= rsv->svl) < 0)
  3335. rcode = E_VECTOR_LENGTH_ERROR;
  3336. rsv = (MAC_SUB_VECTOR *)((__u32)rsv + rsv->svl);
  3337. }
  3338. if(rcode == POSITIVE_ACK)
  3339. {
  3340. /* Let Sender Know if MVID length field
  3341. * is larger then SUM of SV length's
  3342. */
  3343. if(vlen != 0)
  3344. rcode = E_VECTOR_LENGTH_ERROR;
  3345. else
  3346. {
  3347. /* Let Sender Know if Expected SV Missing */
  3348. if((svectors & R_INIT) ^ R_INIT)
  3349. rcode = E_MISSING_SUB_VECTOR;
  3350. }
  3351. }
  3352. return (rcode);
  3353. }
  3354. static int smctr_rcv_tx_forward(struct net_device *dev, MAC_HEADER *rmf)
  3355. {
  3356. MAC_SUB_VECTOR *rsv;
  3357. signed short vlen;
  3358. __u16 rcode = POSITIVE_ACK;
  3359. unsigned int svectors = F_NO_SUB_VECTORS_FOUND;
  3360. /* This Frame can only come from a CRS */
  3361. if((rmf->dc_sc & SC_MASK) != SC_CRS)
  3362. return (E_INAPPROPRIATE_SOURCE_CLASS);
  3363. /* Remove MVID Length from total length */
  3364. vlen = (signed short)rmf->vl - 4;
  3365. /* Point to First SVID */
  3366. rsv = (MAC_SUB_VECTOR *)((__u32)rmf + sizeof(MAC_HEADER));
  3367. /* Search for Appropriate SVID's */
  3368. while((vlen > 0) && (rcode == POSITIVE_ACK))
  3369. {
  3370. switch(rsv->svi)
  3371. {
  3372. case FRAME_FORWARD:
  3373. svectors |= F_FRAME_FORWARD;
  3374. rcode = smctr_set_frame_forward(dev, rsv,
  3375. rmf->dc_sc);
  3376. break;
  3377. default:
  3378. rcode = E_SUB_VECTOR_UNKNOWN;
  3379. break;
  3380. }
  3381. /* Let Sender Know if SUM of SV length's is
  3382. * larger then length in MVID length field
  3383. */
  3384. if((vlen -= rsv->svl) < 0)
  3385. rcode = E_VECTOR_LENGTH_ERROR;
  3386. rsv = (MAC_SUB_VECTOR *)((__u32)rsv + rsv->svl);
  3387. }
  3388. if(rcode == POSITIVE_ACK)
  3389. {
  3390. /* Let Sender Know if MVID length field
  3391. * is larger then SUM of SV length's
  3392. */
  3393. if(vlen != 0)
  3394. rcode = E_VECTOR_LENGTH_ERROR;
  3395. else
  3396. {
  3397. /* Let Sender Know if Expected SV Missing */
  3398. if((svectors & R_TX_FORWARD) ^ R_TX_FORWARD)
  3399. rcode = E_MISSING_SUB_VECTOR;
  3400. }
  3401. }
  3402. return (rcode);
  3403. }
  3404. static int smctr_rcv_rq_addr_state_attch(struct net_device *dev,
  3405. MAC_HEADER *rmf, __u16 *correlator)
  3406. {
  3407. MAC_SUB_VECTOR *rsv;
  3408. signed short vlen;
  3409. __u16 rcode = POSITIVE_ACK;
  3410. unsigned int svectors = F_NO_SUB_VECTORS_FOUND;
  3411. /* Remove MVID Length from total length */
  3412. vlen = (signed short)rmf->vl - 4;
  3413. /* Point to First SVID */
  3414. rsv = (MAC_SUB_VECTOR *)((__u32)rmf + sizeof(MAC_HEADER));
  3415. /* Search for Appropriate SVID's */
  3416. while((vlen > 0) && (rcode == POSITIVE_ACK))
  3417. {
  3418. switch(rsv->svi)
  3419. {
  3420. case CORRELATOR:
  3421. svectors |= F_CORRELATOR;
  3422. rcode = smctr_set_corr(dev, rsv, correlator);
  3423. break;
  3424. default:
  3425. rcode = E_SUB_VECTOR_UNKNOWN;
  3426. break;
  3427. }
  3428. /* Let Sender Know if SUM of SV length's is
  3429. * larger then length in MVID length field
  3430. */
  3431. if((vlen -= rsv->svl) < 0)
  3432. rcode = E_VECTOR_LENGTH_ERROR;
  3433. rsv = (MAC_SUB_VECTOR *)((__u32)rsv + rsv->svl);
  3434. }
  3435. if(rcode == POSITIVE_ACK)
  3436. {
  3437. /* Let Sender Know if MVID length field
  3438. * is larger then SUM of SV length's
  3439. */
  3440. if(vlen != 0)
  3441. rcode = E_VECTOR_LENGTH_ERROR;
  3442. else
  3443. {
  3444. /* Let Sender Know if Expected SVID Missing */
  3445. if((svectors & R_RQ_ATTCH_STATE_ADDR)
  3446. ^ R_RQ_ATTCH_STATE_ADDR)
  3447. rcode = E_MISSING_SUB_VECTOR;
  3448. }
  3449. }
  3450. return (rcode);
  3451. }
  3452. static int smctr_rcv_unknown(struct net_device *dev, MAC_HEADER *rmf,
  3453. __u16 *correlator)
  3454. {
  3455. MAC_SUB_VECTOR *rsv;
  3456. signed short vlen;
  3457. *correlator = 0;
  3458. /* Remove MVID Length from total length */
  3459. vlen = (signed short)rmf->vl - 4;
  3460. /* Point to First SVID */
  3461. rsv = (MAC_SUB_VECTOR *)((__u32)rmf + sizeof(MAC_HEADER));
  3462. /* Search for CORRELATOR for RSP to UNKNOWN */
  3463. while((vlen > 0) && (*correlator == 0))
  3464. {
  3465. switch(rsv->svi)
  3466. {
  3467. case CORRELATOR:
  3468. smctr_set_corr(dev, rsv, correlator);
  3469. break;
  3470. default:
  3471. break;
  3472. }
  3473. vlen -= rsv->svl;
  3474. rsv = (MAC_SUB_VECTOR *)((__u32)rsv + rsv->svl);
  3475. }
  3476. return (E_UNRECOGNIZED_VECTOR_ID);
  3477. }
  3478. /*
  3479. * Reset the 825 NIC and exit w:
  3480. * 1. The NIC reset cleared (non-reset state), halted and un-initialized.
  3481. * 2. TINT masked.
  3482. * 3. CBUSY masked.
  3483. * 4. TINT clear.
  3484. * 5. CBUSY clear.
  3485. */
  3486. static int smctr_reset_adapter(struct net_device *dev)
  3487. {
  3488. struct net_local *tp = netdev_priv(dev);
  3489. int ioaddr = dev->base_addr;
  3490. /* Reseting the NIC will put it in a halted and un-initialized state. */ smctr_set_trc_reset(ioaddr);
  3491. mdelay(200); /* ~2 ms */
  3492. smctr_clear_trc_reset(ioaddr);
  3493. mdelay(200); /* ~2 ms */
  3494. /* Remove any latched interrupts that occurred prior to reseting the
  3495. * adapter or possibily caused by line glitches due to the reset.
  3496. */
  3497. outb(tp->trc_mask | CSR_CLRTINT | CSR_CLRCBUSY, ioaddr + CSR);
  3498. return (0);
  3499. }
  3500. static int smctr_restart_tx_chain(struct net_device *dev, short queue)
  3501. {
  3502. struct net_local *tp = netdev_priv(dev);
  3503. int err = 0;
  3504. if(smctr_debug > 10)
  3505. printk(KERN_DEBUG "%s: smctr_restart_tx_chain\n", dev->name);
  3506. if(tp->num_tx_fcbs_used[queue] != 0 &&
  3507. tp->tx_queue_status[queue] == NOT_TRANSMITING)
  3508. {
  3509. tp->tx_queue_status[queue] = TRANSMITING;
  3510. err = smctr_issue_resume_tx_fcb_cmd(dev, queue);
  3511. }
  3512. return (err);
  3513. }
  3514. static int smctr_ring_status_chg(struct net_device *dev)
  3515. {
  3516. struct net_local *tp = netdev_priv(dev);
  3517. if(smctr_debug > 10)
  3518. printk(KERN_DEBUG "%s: smctr_ring_status_chg\n", dev->name);
  3519. /* Check for ring_status_flag: whenever MONITOR_STATE_BIT
  3520. * Bit is set, check value of monitor_state, only then we
  3521. * enable and start transmit/receive timeout (if and only
  3522. * if it is MS_ACTIVE_MONITOR_STATE or MS_STANDBY_MONITOR_STATE)
  3523. */
  3524. if(tp->ring_status_flags == MONITOR_STATE_CHANGED)
  3525. {
  3526. if((tp->monitor_state == MS_ACTIVE_MONITOR_STATE) ||
  3527. (tp->monitor_state == MS_STANDBY_MONITOR_STATE))
  3528. {
  3529. tp->monitor_state_ready = 1;
  3530. }
  3531. else
  3532. {
  3533. /* if adapter is NOT in either active monitor
  3534. * or standby monitor state => Disable
  3535. * transmit/receive timeout.
  3536. */
  3537. tp->monitor_state_ready = 0;
  3538. /* Ring speed problem, switching to auto mode. */
  3539. if(tp->monitor_state == MS_MONITOR_FSM_INACTIVE &&
  3540. !tp->cleanup)
  3541. {
  3542. printk(KERN_INFO "%s: Incorrect ring speed switching.\n",
  3543. dev->name);
  3544. smctr_set_ring_speed(dev);
  3545. }
  3546. }
  3547. }
  3548. if(!(tp->ring_status_flags & RING_STATUS_CHANGED))
  3549. return (0);
  3550. switch(tp->ring_status)
  3551. {
  3552. case RING_RECOVERY:
  3553. printk(KERN_INFO "%s: Ring Recovery\n", dev->name);
  3554. break;
  3555. case SINGLE_STATION:
  3556. printk(KERN_INFO "%s: Single Statinon\n", dev->name);
  3557. break;
  3558. case COUNTER_OVERFLOW:
  3559. printk(KERN_INFO "%s: Counter Overflow\n", dev->name);
  3560. break;
  3561. case REMOVE_RECEIVED:
  3562. printk(KERN_INFO "%s: Remove Received\n", dev->name);
  3563. break;
  3564. case AUTO_REMOVAL_ERROR:
  3565. printk(KERN_INFO "%s: Auto Remove Error\n", dev->name);
  3566. break;
  3567. case LOBE_WIRE_FAULT:
  3568. printk(KERN_INFO "%s: Lobe Wire Fault\n", dev->name);
  3569. break;
  3570. case TRANSMIT_BEACON:
  3571. printk(KERN_INFO "%s: Transmit Beacon\n", dev->name);
  3572. break;
  3573. case SOFT_ERROR:
  3574. printk(KERN_INFO "%s: Soft Error\n", dev->name);
  3575. break;
  3576. case HARD_ERROR:
  3577. printk(KERN_INFO "%s: Hard Error\n", dev->name);
  3578. break;
  3579. case SIGNAL_LOSS:
  3580. printk(KERN_INFO "%s: Signal Loss\n", dev->name);
  3581. break;
  3582. default:
  3583. printk(KERN_INFO "%s: Unknown ring status change\n",
  3584. dev->name);
  3585. break;
  3586. }
  3587. return (0);
  3588. }
  3589. static int smctr_rx_frame(struct net_device *dev)
  3590. {
  3591. struct net_local *tp = netdev_priv(dev);
  3592. __u16 queue, status, rx_size, err = 0;
  3593. __u8 *pbuff;
  3594. if(smctr_debug > 10)
  3595. printk(KERN_DEBUG "%s: smctr_rx_frame\n", dev->name);
  3596. queue = tp->receive_queue_number;
  3597. while((status = tp->rx_fcb_curr[queue]->frame_status) != SUCCESS)
  3598. {
  3599. err = HARDWARE_FAILED;
  3600. if(((status & 0x007f) == 0) ||
  3601. ((tp->receive_mask & ACCEPT_ERR_PACKETS) != 0))
  3602. {
  3603. /* frame length less the CRC (4 bytes) + FS (1 byte) */
  3604. rx_size = tp->rx_fcb_curr[queue]->frame_length - 5;
  3605. pbuff = smctr_get_rx_pointer(dev, queue);
  3606. smctr_set_page(dev, pbuff);
  3607. smctr_disable_16bit(dev);
  3608. /* pbuff points to addr within one page */
  3609. pbuff = (__u8 *)PAGE_POINTER(pbuff);
  3610. if(queue == NON_MAC_QUEUE)
  3611. {
  3612. struct sk_buff *skb;
  3613. skb = dev_alloc_skb(rx_size);
  3614. if (skb) {
  3615. skb_put(skb, rx_size);
  3616. skb_copy_to_linear_data(skb, pbuff, rx_size);
  3617. /* Update Counters */
  3618. tp->MacStat.rx_packets++;
  3619. tp->MacStat.rx_bytes += skb->len;
  3620. /* Kick the packet on up. */
  3621. skb->protocol = tr_type_trans(skb, dev);
  3622. netif_rx(skb);
  3623. } else {
  3624. }
  3625. }
  3626. else
  3627. smctr_process_rx_packet((MAC_HEADER *)pbuff,
  3628. rx_size, dev, status);
  3629. }
  3630. smctr_enable_16bit(dev);
  3631. smctr_set_page(dev, (__u8 *)tp->ram_access);
  3632. smctr_update_rx_chain(dev, queue);
  3633. if(err != SUCCESS)
  3634. break;
  3635. }
  3636. return (err);
  3637. }
  3638. static int smctr_send_dat(struct net_device *dev)
  3639. {
  3640. struct net_local *tp = netdev_priv(dev);
  3641. unsigned int i, err;
  3642. MAC_HEADER *tmf;
  3643. FCBlock *fcb;
  3644. if(smctr_debug > 10)
  3645. printk(KERN_DEBUG "%s: smctr_send_dat\n", dev->name);
  3646. if((fcb = smctr_get_tx_fcb(dev, MAC_QUEUE,
  3647. sizeof(MAC_HEADER))) == (FCBlock *)(-1L))
  3648. {
  3649. return (OUT_OF_RESOURCES);
  3650. }
  3651. /* Initialize DAT Data Fields. */
  3652. tmf = (MAC_HEADER *)fcb->bdb_ptr->data_block_ptr;
  3653. tmf->ac = MSB(AC_FC_DAT);
  3654. tmf->fc = LSB(AC_FC_DAT);
  3655. for(i = 0; i < 6; i++)
  3656. {
  3657. tmf->sa[i] = dev->dev_addr[i];
  3658. tmf->da[i] = dev->dev_addr[i];
  3659. }
  3660. tmf->vc = DAT;
  3661. tmf->dc_sc = DC_RS | SC_RS;
  3662. tmf->vl = 4;
  3663. tmf->vl = SWAP_BYTES(tmf->vl);
  3664. /* Start Transmit. */
  3665. if((err = smctr_trc_send_packet(dev, fcb, MAC_QUEUE)))
  3666. return (err);
  3667. /* Wait for Transmit to Complete */
  3668. for(i = 0; i < 10000; i++)
  3669. {
  3670. if(fcb->frame_status & FCB_COMMAND_DONE)
  3671. break;
  3672. mdelay(1);
  3673. }
  3674. /* Check if GOOD frame Tx'ed. */
  3675. if(!(fcb->frame_status & FCB_COMMAND_DONE) ||
  3676. fcb->frame_status & (FCB_TX_STATUS_E | FCB_TX_AC_BITS))
  3677. {
  3678. return (INITIALIZE_FAILED);
  3679. }
  3680. /* De-allocated Tx FCB and Frame Buffer
  3681. * The FCB must be de-allocated manually if executing with
  3682. * interrupts disabled, other wise the ISR (LM_Service_Events)
  3683. * will de-allocate it when the interrupt occurs.
  3684. */
  3685. tp->tx_queue_status[MAC_QUEUE] = NOT_TRANSMITING;
  3686. smctr_update_tx_chain(dev, fcb, MAC_QUEUE);
  3687. return (0);
  3688. }
  3689. static void smctr_timeout(struct net_device *dev)
  3690. {
  3691. /*
  3692. * If we get here, some higher level has decided we are broken.
  3693. * There should really be a "kick me" function call instead.
  3694. *
  3695. * Resetting the token ring adapter takes a long time so just
  3696. * fake transmission time and go on trying. Our own timeout
  3697. * routine is in sktr_timer_chk()
  3698. */
  3699. dev->trans_start = jiffies;
  3700. netif_wake_queue(dev);
  3701. }
  3702. /*
  3703. * Gets skb from system, queues it and checks if it can be sent
  3704. */
  3705. static netdev_tx_t smctr_send_packet(struct sk_buff *skb,
  3706. struct net_device *dev)
  3707. {
  3708. struct net_local *tp = netdev_priv(dev);
  3709. if(smctr_debug > 10)
  3710. printk(KERN_DEBUG "%s: smctr_send_packet\n", dev->name);
  3711. /*
  3712. * Block a transmit overlap
  3713. */
  3714. netif_stop_queue(dev);
  3715. if(tp->QueueSkb == 0)
  3716. return NETDEV_TX_BUSY; /* Return with tbusy set: queue full */
  3717. tp->QueueSkb--;
  3718. skb_queue_tail(&tp->SendSkbQueue, skb);
  3719. smctr_hardware_send_packet(dev, tp);
  3720. if(tp->QueueSkb > 0)
  3721. netif_wake_queue(dev);
  3722. return NETDEV_TX_OK;
  3723. }
  3724. static int smctr_send_lobe_media_test(struct net_device *dev)
  3725. {
  3726. struct net_local *tp = netdev_priv(dev);
  3727. MAC_SUB_VECTOR *tsv;
  3728. MAC_HEADER *tmf;
  3729. FCBlock *fcb;
  3730. __u32 i;
  3731. int err;
  3732. if(smctr_debug > 15)
  3733. printk(KERN_DEBUG "%s: smctr_send_lobe_media_test\n", dev->name);
  3734. if((fcb = smctr_get_tx_fcb(dev, MAC_QUEUE, sizeof(struct trh_hdr)
  3735. + S_WRAP_DATA + S_WRAP_DATA)) == (FCBlock *)(-1L))
  3736. {
  3737. return (OUT_OF_RESOURCES);
  3738. }
  3739. /* Initialize DAT Data Fields. */
  3740. tmf = (MAC_HEADER *)fcb->bdb_ptr->data_block_ptr;
  3741. tmf->ac = MSB(AC_FC_LOBE_MEDIA_TEST);
  3742. tmf->fc = LSB(AC_FC_LOBE_MEDIA_TEST);
  3743. for(i = 0; i < 6; i++)
  3744. {
  3745. tmf->da[i] = 0;
  3746. tmf->sa[i] = dev->dev_addr[i];
  3747. }
  3748. tmf->vc = LOBE_MEDIA_TEST;
  3749. tmf->dc_sc = DC_RS | SC_RS;
  3750. tmf->vl = 4;
  3751. tsv = (MAC_SUB_VECTOR *)((__u32)tmf + sizeof(MAC_HEADER));
  3752. smctr_make_wrap_data(dev, tsv);
  3753. tmf->vl += tsv->svl;
  3754. tsv = (MAC_SUB_VECTOR *)((__u32)tsv + tsv->svl);
  3755. smctr_make_wrap_data(dev, tsv);
  3756. tmf->vl += tsv->svl;
  3757. /* Start Transmit. */
  3758. tmf->vl = SWAP_BYTES(tmf->vl);
  3759. if((err = smctr_trc_send_packet(dev, fcb, MAC_QUEUE)))
  3760. return (err);
  3761. /* Wait for Transmit to Complete. (10 ms). */
  3762. for(i=0; i < 10000; i++)
  3763. {
  3764. if(fcb->frame_status & FCB_COMMAND_DONE)
  3765. break;
  3766. mdelay(1);
  3767. }
  3768. /* Check if GOOD frame Tx'ed */
  3769. if(!(fcb->frame_status & FCB_COMMAND_DONE) ||
  3770. fcb->frame_status & (FCB_TX_STATUS_E | FCB_TX_AC_BITS))
  3771. {
  3772. return (LOBE_MEDIA_TEST_FAILED);
  3773. }
  3774. /* De-allocated Tx FCB and Frame Buffer
  3775. * The FCB must be de-allocated manually if executing with
  3776. * interrupts disabled, other wise the ISR (LM_Service_Events)
  3777. * will de-allocate it when the interrupt occurs.
  3778. */
  3779. tp->tx_queue_status[MAC_QUEUE] = NOT_TRANSMITING;
  3780. smctr_update_tx_chain(dev, fcb, MAC_QUEUE);
  3781. return (0);
  3782. }
  3783. static int smctr_send_rpt_addr(struct net_device *dev, MAC_HEADER *rmf,
  3784. __u16 correlator)
  3785. {
  3786. MAC_HEADER *tmf;
  3787. MAC_SUB_VECTOR *tsv;
  3788. FCBlock *fcb;
  3789. if((fcb = smctr_get_tx_fcb(dev, MAC_QUEUE, sizeof(MAC_HEADER)
  3790. + S_CORRELATOR + S_PHYSICAL_DROP + S_UPSTREAM_NEIGHBOR_ADDRESS
  3791. + S_ADDRESS_MODIFER + S_GROUP_ADDRESS + S_FUNCTIONAL_ADDRESS))
  3792. == (FCBlock *)(-1L))
  3793. {
  3794. return (0);
  3795. }
  3796. tmf = (MAC_HEADER *)fcb->bdb_ptr->data_block_ptr;
  3797. tmf->vc = RPT_ADDR;
  3798. tmf->dc_sc = (rmf->dc_sc & SC_MASK) << 4;
  3799. tmf->vl = 4;
  3800. smctr_make_8025_hdr(dev, rmf, tmf, AC_FC_RPT_ADDR);
  3801. tsv = (MAC_SUB_VECTOR *)((__u32)tmf + sizeof(MAC_HEADER));
  3802. smctr_make_corr(dev, tsv, correlator);
  3803. tmf->vl += tsv->svl;
  3804. tsv = (MAC_SUB_VECTOR *)((__u32)tsv + tsv->svl);
  3805. smctr_make_phy_drop_num(dev, tsv);
  3806. tmf->vl += tsv->svl;
  3807. tsv = (MAC_SUB_VECTOR *)((__u32)tsv + tsv->svl);
  3808. smctr_make_upstream_neighbor_addr(dev, tsv);
  3809. tmf->vl += tsv->svl;
  3810. tsv = (MAC_SUB_VECTOR *)((__u32)tsv + tsv->svl);
  3811. smctr_make_addr_mod(dev, tsv);
  3812. tmf->vl += tsv->svl;
  3813. tsv = (MAC_SUB_VECTOR *)((__u32)tsv + tsv->svl);
  3814. smctr_make_group_addr(dev, tsv);
  3815. tmf->vl += tsv->svl;
  3816. tsv = (MAC_SUB_VECTOR *)((__u32)tsv + tsv->svl);
  3817. smctr_make_funct_addr(dev, tsv);
  3818. tmf->vl += tsv->svl;
  3819. /* Subtract out MVID and MVL which is
  3820. * include in both vl and MAC_HEADER
  3821. */
  3822. /* fcb->frame_length = tmf->vl + sizeof(MAC_HEADER) - 4;
  3823. fcb->bdb_ptr->buffer_length = tmf->vl + sizeof(MAC_HEADER) - 4;
  3824. */
  3825. tmf->vl = SWAP_BYTES(tmf->vl);
  3826. return (smctr_trc_send_packet(dev, fcb, MAC_QUEUE));
  3827. }
  3828. static int smctr_send_rpt_attch(struct net_device *dev, MAC_HEADER *rmf,
  3829. __u16 correlator)
  3830. {
  3831. MAC_HEADER *tmf;
  3832. MAC_SUB_VECTOR *tsv;
  3833. FCBlock *fcb;
  3834. if((fcb = smctr_get_tx_fcb(dev, MAC_QUEUE, sizeof(MAC_HEADER)
  3835. + S_CORRELATOR + S_PRODUCT_INSTANCE_ID + S_FUNCTIONAL_ADDRESS
  3836. + S_AUTHORIZED_FUNCTION_CLASS + S_AUTHORIZED_ACCESS_PRIORITY))
  3837. == (FCBlock *)(-1L))
  3838. {
  3839. return (0);
  3840. }
  3841. tmf = (MAC_HEADER *)fcb->bdb_ptr->data_block_ptr;
  3842. tmf->vc = RPT_ATTCH;
  3843. tmf->dc_sc = (rmf->dc_sc & SC_MASK) << 4;
  3844. tmf->vl = 4;
  3845. smctr_make_8025_hdr(dev, rmf, tmf, AC_FC_RPT_ATTCH);
  3846. tsv = (MAC_SUB_VECTOR *)((__u32)tmf + sizeof(MAC_HEADER));
  3847. smctr_make_corr(dev, tsv, correlator);
  3848. tmf->vl += tsv->svl;
  3849. tsv = (MAC_SUB_VECTOR *)((__u32)tsv + tsv->svl);
  3850. smctr_make_product_id(dev, tsv);
  3851. tmf->vl += tsv->svl;
  3852. tsv = (MAC_SUB_VECTOR *)((__u32)tsv + tsv->svl);
  3853. smctr_make_funct_addr(dev, tsv);
  3854. tmf->vl += tsv->svl;
  3855. tsv = (MAC_SUB_VECTOR *)((__u32)tsv + tsv->svl);
  3856. smctr_make_auth_funct_class(dev, tsv);
  3857. tmf->vl += tsv->svl;
  3858. tsv = (MAC_SUB_VECTOR *)((__u32)tsv + tsv->svl);
  3859. smctr_make_access_pri(dev, tsv);
  3860. tmf->vl += tsv->svl;
  3861. /* Subtract out MVID and MVL which is
  3862. * include in both vl and MAC_HEADER
  3863. */
  3864. /* fcb->frame_length = tmf->vl + sizeof(MAC_HEADER) - 4;
  3865. fcb->bdb_ptr->buffer_length = tmf->vl + sizeof(MAC_HEADER) - 4;
  3866. */
  3867. tmf->vl = SWAP_BYTES(tmf->vl);
  3868. return (smctr_trc_send_packet(dev, fcb, MAC_QUEUE));
  3869. }
  3870. static int smctr_send_rpt_state(struct net_device *dev, MAC_HEADER *rmf,
  3871. __u16 correlator)
  3872. {
  3873. MAC_HEADER *tmf;
  3874. MAC_SUB_VECTOR *tsv;
  3875. FCBlock *fcb;
  3876. if((fcb = smctr_get_tx_fcb(dev, MAC_QUEUE, sizeof(MAC_HEADER)
  3877. + S_CORRELATOR + S_RING_STATION_VERSION_NUMBER
  3878. + S_RING_STATION_STATUS + S_STATION_IDENTIFER))
  3879. == (FCBlock *)(-1L))
  3880. {
  3881. return (0);
  3882. }
  3883. tmf = (MAC_HEADER *)fcb->bdb_ptr->data_block_ptr;
  3884. tmf->vc = RPT_STATE;
  3885. tmf->dc_sc = (rmf->dc_sc & SC_MASK) << 4;
  3886. tmf->vl = 4;
  3887. smctr_make_8025_hdr(dev, rmf, tmf, AC_FC_RPT_STATE);
  3888. tsv = (MAC_SUB_VECTOR *)((__u32)tmf + sizeof(MAC_HEADER));
  3889. smctr_make_corr(dev, tsv, correlator);
  3890. tmf->vl += tsv->svl;
  3891. tsv = (MAC_SUB_VECTOR *)((__u32)tsv + tsv->svl);
  3892. smctr_make_ring_station_version(dev, tsv);
  3893. tmf->vl += tsv->svl;
  3894. tsv = (MAC_SUB_VECTOR *)((__u32)tsv + tsv->svl);
  3895. smctr_make_ring_station_status(dev, tsv);
  3896. tmf->vl += tsv->svl;
  3897. tsv = (MAC_SUB_VECTOR *)((__u32)tsv + tsv->svl);
  3898. smctr_make_station_id(dev, tsv);
  3899. tmf->vl += tsv->svl;
  3900. /* Subtract out MVID and MVL which is
  3901. * include in both vl and MAC_HEADER
  3902. */
  3903. /* fcb->frame_length = tmf->vl + sizeof(MAC_HEADER) - 4;
  3904. fcb->bdb_ptr->buffer_length = tmf->vl + sizeof(MAC_HEADER) - 4;
  3905. */
  3906. tmf->vl = SWAP_BYTES(tmf->vl);
  3907. return (smctr_trc_send_packet(dev, fcb, MAC_QUEUE));
  3908. }
  3909. static int smctr_send_rpt_tx_forward(struct net_device *dev,
  3910. MAC_HEADER *rmf, __u16 tx_fstatus)
  3911. {
  3912. MAC_HEADER *tmf;
  3913. MAC_SUB_VECTOR *tsv;
  3914. FCBlock *fcb;
  3915. if((fcb = smctr_get_tx_fcb(dev, MAC_QUEUE, sizeof(MAC_HEADER)
  3916. + S_TRANSMIT_STATUS_CODE)) == (FCBlock *)(-1L))
  3917. {
  3918. return (0);
  3919. }
  3920. tmf = (MAC_HEADER *)fcb->bdb_ptr->data_block_ptr;
  3921. tmf->vc = RPT_TX_FORWARD;
  3922. tmf->dc_sc = (rmf->dc_sc & SC_MASK) << 4;
  3923. tmf->vl = 4;
  3924. smctr_make_8025_hdr(dev, rmf, tmf, AC_FC_RPT_TX_FORWARD);
  3925. tsv = (MAC_SUB_VECTOR *)((__u32)tmf + sizeof(MAC_HEADER));
  3926. smctr_make_tx_status_code(dev, tsv, tx_fstatus);
  3927. tmf->vl += tsv->svl;
  3928. /* Subtract out MVID and MVL which is
  3929. * include in both vl and MAC_HEADER
  3930. */
  3931. /* fcb->frame_length = tmf->vl + sizeof(MAC_HEADER) - 4;
  3932. fcb->bdb_ptr->buffer_length = tmf->vl + sizeof(MAC_HEADER) - 4;
  3933. */
  3934. tmf->vl = SWAP_BYTES(tmf->vl);
  3935. return(smctr_trc_send_packet(dev, fcb, MAC_QUEUE));
  3936. }
  3937. static int smctr_send_rsp(struct net_device *dev, MAC_HEADER *rmf,
  3938. __u16 rcode, __u16 correlator)
  3939. {
  3940. MAC_HEADER *tmf;
  3941. MAC_SUB_VECTOR *tsv;
  3942. FCBlock *fcb;
  3943. if((fcb = smctr_get_tx_fcb(dev, MAC_QUEUE, sizeof(MAC_HEADER)
  3944. + S_CORRELATOR + S_RESPONSE_CODE)) == (FCBlock *)(-1L))
  3945. {
  3946. return (0);
  3947. }
  3948. tmf = (MAC_HEADER *)fcb->bdb_ptr->data_block_ptr;
  3949. tmf->vc = RSP;
  3950. tmf->dc_sc = (rmf->dc_sc & SC_MASK) << 4;
  3951. tmf->vl = 4;
  3952. smctr_make_8025_hdr(dev, rmf, tmf, AC_FC_RSP);
  3953. tsv = (MAC_SUB_VECTOR *)((__u32)tmf + sizeof(MAC_HEADER));
  3954. smctr_make_corr(dev, tsv, correlator);
  3955. return (0);
  3956. }
  3957. static int smctr_send_rq_init(struct net_device *dev)
  3958. {
  3959. struct net_local *tp = netdev_priv(dev);
  3960. MAC_HEADER *tmf;
  3961. MAC_SUB_VECTOR *tsv;
  3962. FCBlock *fcb;
  3963. unsigned int i, count = 0;
  3964. __u16 fstatus;
  3965. int err;
  3966. do {
  3967. if(((fcb = smctr_get_tx_fcb(dev, MAC_QUEUE, sizeof(MAC_HEADER)
  3968. + S_PRODUCT_INSTANCE_ID + S_UPSTREAM_NEIGHBOR_ADDRESS
  3969. + S_RING_STATION_VERSION_NUMBER + S_ADDRESS_MODIFER))
  3970. == (FCBlock *)(-1L)))
  3971. {
  3972. return (0);
  3973. }
  3974. tmf = (MAC_HEADER *)fcb->bdb_ptr->data_block_ptr;
  3975. tmf->vc = RQ_INIT;
  3976. tmf->dc_sc = DC_RPS | SC_RS;
  3977. tmf->vl = 4;
  3978. smctr_make_8025_hdr(dev, NULL, tmf, AC_FC_RQ_INIT);
  3979. tsv = (MAC_SUB_VECTOR *)((__u32)tmf + sizeof(MAC_HEADER));
  3980. smctr_make_product_id(dev, tsv);
  3981. tmf->vl += tsv->svl;
  3982. tsv = (MAC_SUB_VECTOR *)((__u32)tsv + tsv->svl);
  3983. smctr_make_upstream_neighbor_addr(dev, tsv);
  3984. tmf->vl += tsv->svl;
  3985. tsv = (MAC_SUB_VECTOR *)((__u32)tsv + tsv->svl);
  3986. smctr_make_ring_station_version(dev, tsv);
  3987. tmf->vl += tsv->svl;
  3988. tsv = (MAC_SUB_VECTOR *)((__u32)tsv + tsv->svl);
  3989. smctr_make_addr_mod(dev, tsv);
  3990. tmf->vl += tsv->svl;
  3991. /* Subtract out MVID and MVL which is
  3992. * include in both vl and MAC_HEADER
  3993. */
  3994. /* fcb->frame_length = tmf->vl + sizeof(MAC_HEADER) - 4;
  3995. fcb->bdb_ptr->buffer_length = tmf->vl + sizeof(MAC_HEADER) - 4;
  3996. */
  3997. tmf->vl = SWAP_BYTES(tmf->vl);
  3998. if((err = smctr_trc_send_packet(dev, fcb, MAC_QUEUE)))
  3999. return (err);
  4000. /* Wait for Transmit to Complete */
  4001. for(i = 0; i < 10000; i++)
  4002. {
  4003. if(fcb->frame_status & FCB_COMMAND_DONE)
  4004. break;
  4005. mdelay(1);
  4006. }
  4007. /* Check if GOOD frame Tx'ed */
  4008. fstatus = fcb->frame_status;
  4009. if(!(fstatus & FCB_COMMAND_DONE))
  4010. return (HARDWARE_FAILED);
  4011. if(!(fstatus & FCB_TX_STATUS_E))
  4012. count++;
  4013. /* De-allocated Tx FCB and Frame Buffer
  4014. * The FCB must be de-allocated manually if executing with
  4015. * interrupts disabled, other wise the ISR (LM_Service_Events)
  4016. * will de-allocate it when the interrupt occurs.
  4017. */
  4018. tp->tx_queue_status[MAC_QUEUE] = NOT_TRANSMITING;
  4019. smctr_update_tx_chain(dev, fcb, MAC_QUEUE);
  4020. } while(count < 4 && ((fstatus & FCB_TX_AC_BITS) ^ FCB_TX_AC_BITS));
  4021. return (smctr_join_complete_state(dev));
  4022. }
  4023. static int smctr_send_tx_forward(struct net_device *dev, MAC_HEADER *rmf,
  4024. __u16 *tx_fstatus)
  4025. {
  4026. struct net_local *tp = netdev_priv(dev);
  4027. FCBlock *fcb;
  4028. unsigned int i;
  4029. int err;
  4030. /* Check if this is the END POINT of the Transmit Forward Chain. */
  4031. if(rmf->vl <= 18)
  4032. return (0);
  4033. /* Allocate Transmit FCB only by requesting 0 bytes
  4034. * of data buffer.
  4035. */
  4036. if((fcb = smctr_get_tx_fcb(dev, MAC_QUEUE, 0)) == (FCBlock *)(-1L))
  4037. return (0);
  4038. /* Set pointer to Transmit Frame Buffer to the data
  4039. * portion of the received TX Forward frame, making
  4040. * sure to skip over the Vector Code (vc) and Vector
  4041. * length (vl).
  4042. */
  4043. fcb->bdb_ptr->trc_data_block_ptr = TRC_POINTER((__u32)rmf
  4044. + sizeof(MAC_HEADER) + 2);
  4045. fcb->bdb_ptr->data_block_ptr = (__u16 *)((__u32)rmf
  4046. + sizeof(MAC_HEADER) + 2);
  4047. fcb->frame_length = rmf->vl - 4 - 2;
  4048. fcb->bdb_ptr->buffer_length = rmf->vl - 4 - 2;
  4049. if((err = smctr_trc_send_packet(dev, fcb, MAC_QUEUE)))
  4050. return (err);
  4051. /* Wait for Transmit to Complete */
  4052. for(i = 0; i < 10000; i++)
  4053. {
  4054. if(fcb->frame_status & FCB_COMMAND_DONE)
  4055. break;
  4056. mdelay(1);
  4057. }
  4058. /* Check if GOOD frame Tx'ed */
  4059. if(!(fcb->frame_status & FCB_COMMAND_DONE))
  4060. {
  4061. if((err = smctr_issue_resume_tx_fcb_cmd(dev, MAC_QUEUE)))
  4062. return (err);
  4063. for(i = 0; i < 10000; i++)
  4064. {
  4065. if(fcb->frame_status & FCB_COMMAND_DONE)
  4066. break;
  4067. mdelay(1);
  4068. }
  4069. if(!(fcb->frame_status & FCB_COMMAND_DONE))
  4070. return (HARDWARE_FAILED);
  4071. }
  4072. *tx_fstatus = fcb->frame_status;
  4073. return (A_FRAME_WAS_FORWARDED);
  4074. }
  4075. static int smctr_set_auth_access_pri(struct net_device *dev,
  4076. MAC_SUB_VECTOR *rsv)
  4077. {
  4078. struct net_local *tp = netdev_priv(dev);
  4079. if(rsv->svl != S_AUTHORIZED_ACCESS_PRIORITY)
  4080. return (E_SUB_VECTOR_LENGTH_ERROR);
  4081. tp->authorized_access_priority = (rsv->svv[0] << 8 | rsv->svv[1]);
  4082. return (POSITIVE_ACK);
  4083. }
  4084. static int smctr_set_auth_funct_class(struct net_device *dev,
  4085. MAC_SUB_VECTOR *rsv)
  4086. {
  4087. struct net_local *tp = netdev_priv(dev);
  4088. if(rsv->svl != S_AUTHORIZED_FUNCTION_CLASS)
  4089. return (E_SUB_VECTOR_LENGTH_ERROR);
  4090. tp->authorized_function_classes = (rsv->svv[0] << 8 | rsv->svv[1]);
  4091. return (POSITIVE_ACK);
  4092. }
  4093. static int smctr_set_corr(struct net_device *dev, MAC_SUB_VECTOR *rsv,
  4094. __u16 *correlator)
  4095. {
  4096. if(rsv->svl != S_CORRELATOR)
  4097. return (E_SUB_VECTOR_LENGTH_ERROR);
  4098. *correlator = (rsv->svv[0] << 8 | rsv->svv[1]);
  4099. return (POSITIVE_ACK);
  4100. }
  4101. static int smctr_set_error_timer_value(struct net_device *dev,
  4102. MAC_SUB_VECTOR *rsv)
  4103. {
  4104. __u16 err_tval;
  4105. int err;
  4106. if(rsv->svl != S_ERROR_TIMER_VALUE)
  4107. return (E_SUB_VECTOR_LENGTH_ERROR);
  4108. err_tval = (rsv->svv[0] << 8 | rsv->svv[1])*10;
  4109. smctr_issue_write_word_cmd(dev, RW_TER_THRESHOLD, &err_tval);
  4110. if((err = smctr_wait_cmd(dev)))
  4111. return (err);
  4112. return (POSITIVE_ACK);
  4113. }
  4114. static int smctr_set_frame_forward(struct net_device *dev,
  4115. MAC_SUB_VECTOR *rsv, __u8 dc_sc)
  4116. {
  4117. if((rsv->svl < 2) || (rsv->svl > S_FRAME_FORWARD))
  4118. return (E_SUB_VECTOR_LENGTH_ERROR);
  4119. if((dc_sc & DC_MASK) != DC_CRS)
  4120. {
  4121. if(rsv->svl >= 2 && rsv->svl < 20)
  4122. return (E_TRANSMIT_FORWARD_INVALID);
  4123. if((rsv->svv[0] != 0) || (rsv->svv[1] != 0))
  4124. return (E_TRANSMIT_FORWARD_INVALID);
  4125. }
  4126. return (POSITIVE_ACK);
  4127. }
  4128. static int smctr_set_local_ring_num(struct net_device *dev,
  4129. MAC_SUB_VECTOR *rsv)
  4130. {
  4131. struct net_local *tp = netdev_priv(dev);
  4132. if(rsv->svl != S_LOCAL_RING_NUMBER)
  4133. return (E_SUB_VECTOR_LENGTH_ERROR);
  4134. if(tp->ptr_local_ring_num)
  4135. *(__u16 *)(tp->ptr_local_ring_num)
  4136. = (rsv->svv[0] << 8 | rsv->svv[1]);
  4137. return (POSITIVE_ACK);
  4138. }
  4139. static unsigned short smctr_set_ctrl_attention(struct net_device *dev)
  4140. {
  4141. struct net_local *tp = netdev_priv(dev);
  4142. int ioaddr = dev->base_addr;
  4143. if(tp->bic_type == BIC_585_CHIP)
  4144. outb((tp->trc_mask | HWR_CA), ioaddr + HWR);
  4145. else
  4146. {
  4147. outb((tp->trc_mask | CSR_CA), ioaddr + CSR);
  4148. outb(tp->trc_mask, ioaddr + CSR);
  4149. }
  4150. return (0);
  4151. }
  4152. static void smctr_set_multicast_list(struct net_device *dev)
  4153. {
  4154. if(smctr_debug > 10)
  4155. printk(KERN_DEBUG "%s: smctr_set_multicast_list\n", dev->name);
  4156. return;
  4157. }
  4158. static int smctr_set_page(struct net_device *dev, __u8 *buf)
  4159. {
  4160. struct net_local *tp = netdev_priv(dev);
  4161. __u8 amask;
  4162. __u32 tptr;
  4163. tptr = (__u32)buf - (__u32)tp->ram_access;
  4164. amask = (__u8)((tptr & PR_PAGE_MASK) >> 8);
  4165. outb(amask, dev->base_addr + PR);
  4166. return (0);
  4167. }
  4168. static int smctr_set_phy_drop(struct net_device *dev, MAC_SUB_VECTOR *rsv)
  4169. {
  4170. int err;
  4171. if(rsv->svl != S_PHYSICAL_DROP)
  4172. return (E_SUB_VECTOR_LENGTH_ERROR);
  4173. smctr_issue_write_byte_cmd(dev, RW_PHYSICAL_DROP_NUMBER, &rsv->svv[0]);
  4174. if((err = smctr_wait_cmd(dev)))
  4175. return (err);
  4176. return (POSITIVE_ACK);
  4177. }
  4178. /* Reset the ring speed to the opposite of what it was. This auto-pilot
  4179. * mode requires a complete reset and re-init of the adapter.
  4180. */
  4181. static int smctr_set_ring_speed(struct net_device *dev)
  4182. {
  4183. struct net_local *tp = netdev_priv(dev);
  4184. int err;
  4185. if(tp->media_type == MEDIA_UTP_16)
  4186. tp->media_type = MEDIA_UTP_4;
  4187. else
  4188. tp->media_type = MEDIA_UTP_16;
  4189. smctr_enable_16bit(dev);
  4190. /* Re-Initialize adapter's internal registers */
  4191. smctr_reset_adapter(dev);
  4192. if((err = smctr_init_card_real(dev)))
  4193. return (err);
  4194. smctr_enable_bic_int(dev);
  4195. if((err = smctr_issue_enable_int_cmd(dev, TRC_INTERRUPT_ENABLE_MASK)))
  4196. return (err);
  4197. smctr_disable_16bit(dev);
  4198. return (0);
  4199. }
  4200. static int smctr_set_rx_look_ahead(struct net_device *dev)
  4201. {
  4202. struct net_local *tp = netdev_priv(dev);
  4203. __u16 sword, rword;
  4204. if(smctr_debug > 10)
  4205. printk(KERN_DEBUG "%s: smctr_set_rx_look_ahead_flag\n", dev->name);
  4206. tp->adapter_flags &= ~(FORCED_16BIT_MODE);
  4207. tp->adapter_flags |= RX_VALID_LOOKAHEAD;
  4208. if(tp->adapter_bus == BUS_ISA16_TYPE)
  4209. {
  4210. sword = *((__u16 *)(tp->ram_access));
  4211. *((__u16 *)(tp->ram_access)) = 0x1234;
  4212. smctr_disable_16bit(dev);
  4213. rword = *((__u16 *)(tp->ram_access));
  4214. smctr_enable_16bit(dev);
  4215. if(rword != 0x1234)
  4216. tp->adapter_flags |= FORCED_16BIT_MODE;
  4217. *((__u16 *)(tp->ram_access)) = sword;
  4218. }
  4219. return (0);
  4220. }
  4221. static int smctr_set_trc_reset(int ioaddr)
  4222. {
  4223. __u8 r;
  4224. r = inb(ioaddr + MSR);
  4225. outb(MSR_RST | r, ioaddr + MSR);
  4226. return (0);
  4227. }
  4228. /*
  4229. * This function can be called if the adapter is busy or not.
  4230. */
  4231. static int smctr_setup_single_cmd(struct net_device *dev,
  4232. __u16 command, __u16 subcommand)
  4233. {
  4234. struct net_local *tp = netdev_priv(dev);
  4235. unsigned int err;
  4236. if(smctr_debug > 10)
  4237. printk(KERN_DEBUG "%s: smctr_setup_single_cmd\n", dev->name);
  4238. if((err = smctr_wait_while_cbusy(dev)))
  4239. return (err);
  4240. if((err = (unsigned int)smctr_wait_cmd(dev)))
  4241. return (err);
  4242. tp->acb_head->cmd_done_status = 0;
  4243. tp->acb_head->cmd = command;
  4244. tp->acb_head->subcmd = subcommand;
  4245. err = smctr_issue_resume_acb_cmd(dev);
  4246. return (err);
  4247. }
  4248. /*
  4249. * This function can not be called with the adapter busy.
  4250. */
  4251. static int smctr_setup_single_cmd_w_data(struct net_device *dev,
  4252. __u16 command, __u16 subcommand)
  4253. {
  4254. struct net_local *tp = netdev_priv(dev);
  4255. tp->acb_head->cmd_done_status = ACB_COMMAND_NOT_DONE;
  4256. tp->acb_head->cmd = command;
  4257. tp->acb_head->subcmd = subcommand;
  4258. tp->acb_head->data_offset_lo
  4259. = (__u16)TRC_POINTER(tp->misc_command_data);
  4260. return(smctr_issue_resume_acb_cmd(dev));
  4261. }
  4262. static char *smctr_malloc(struct net_device *dev, __u16 size)
  4263. {
  4264. struct net_local *tp = netdev_priv(dev);
  4265. char *m;
  4266. m = (char *)(tp->ram_access + tp->sh_mem_used);
  4267. tp->sh_mem_used += (__u32)size;
  4268. return (m);
  4269. }
  4270. static int smctr_status_chg(struct net_device *dev)
  4271. {
  4272. struct net_local *tp = netdev_priv(dev);
  4273. if(smctr_debug > 10)
  4274. printk(KERN_DEBUG "%s: smctr_status_chg\n", dev->name);
  4275. switch(tp->status)
  4276. {
  4277. case OPEN:
  4278. break;
  4279. case CLOSED:
  4280. break;
  4281. /* Interrupt driven open() completion. XXX */
  4282. case INITIALIZED:
  4283. tp->group_address_0 = 0;
  4284. tp->group_address[0] = 0;
  4285. tp->group_address[1] = 0;
  4286. tp->functional_address_0 = 0;
  4287. tp->functional_address[0] = 0;
  4288. tp->functional_address[1] = 0;
  4289. smctr_open_tr(dev);
  4290. break;
  4291. default:
  4292. printk(KERN_INFO "%s: status change unknown %x\n",
  4293. dev->name, tp->status);
  4294. break;
  4295. }
  4296. return (0);
  4297. }
  4298. static int smctr_trc_send_packet(struct net_device *dev, FCBlock *fcb,
  4299. __u16 queue)
  4300. {
  4301. struct net_local *tp = netdev_priv(dev);
  4302. int err = 0;
  4303. if(smctr_debug > 10)
  4304. printk(KERN_DEBUG "%s: smctr_trc_send_packet\n", dev->name);
  4305. fcb->info = FCB_CHAIN_END | FCB_ENABLE_TFS;
  4306. if(tp->num_tx_fcbs[queue] != 1)
  4307. fcb->back_ptr->info = FCB_INTERRUPT_ENABLE | FCB_ENABLE_TFS;
  4308. if(tp->tx_queue_status[queue] == NOT_TRANSMITING)
  4309. {
  4310. tp->tx_queue_status[queue] = TRANSMITING;
  4311. err = smctr_issue_resume_tx_fcb_cmd(dev, queue);
  4312. }
  4313. return (err);
  4314. }
  4315. static __u16 smctr_tx_complete(struct net_device *dev, __u16 queue)
  4316. {
  4317. struct net_local *tp = netdev_priv(dev);
  4318. __u16 status, err = 0;
  4319. int cstatus;
  4320. if(smctr_debug > 10)
  4321. printk(KERN_DEBUG "%s: smctr_tx_complete\n", dev->name);
  4322. while((status = tp->tx_fcb_end[queue]->frame_status) != SUCCESS)
  4323. {
  4324. if(status & 0x7e00 )
  4325. {
  4326. err = HARDWARE_FAILED;
  4327. break;
  4328. }
  4329. if((err = smctr_update_tx_chain(dev, tp->tx_fcb_end[queue],
  4330. queue)) != SUCCESS)
  4331. break;
  4332. smctr_disable_16bit(dev);
  4333. if(tp->mode_bits & UMAC)
  4334. {
  4335. if(!(status & (FCB_TX_STATUS_AR1 | FCB_TX_STATUS_AR2)))
  4336. cstatus = NO_SUCH_DESTINATION;
  4337. else
  4338. {
  4339. if(!(status & (FCB_TX_STATUS_CR1 | FCB_TX_STATUS_CR2)))
  4340. cstatus = DEST_OUT_OF_RESOURCES;
  4341. else
  4342. {
  4343. if(status & FCB_TX_STATUS_E)
  4344. cstatus = MAX_COLLISIONS;
  4345. else
  4346. cstatus = SUCCESS;
  4347. }
  4348. }
  4349. }
  4350. else
  4351. cstatus = SUCCESS;
  4352. if(queue == BUG_QUEUE)
  4353. err = SUCCESS;
  4354. smctr_enable_16bit(dev);
  4355. if(err != SUCCESS)
  4356. break;
  4357. }
  4358. return (err);
  4359. }
  4360. static unsigned short smctr_tx_move_frame(struct net_device *dev,
  4361. struct sk_buff *skb, __u8 *pbuff, unsigned int bytes)
  4362. {
  4363. struct net_local *tp = netdev_priv(dev);
  4364. unsigned int ram_usable;
  4365. __u32 flen, len, offset = 0;
  4366. __u8 *frag, *page;
  4367. if(smctr_debug > 10)
  4368. printk(KERN_DEBUG "%s: smctr_tx_move_frame\n", dev->name);
  4369. ram_usable = ((unsigned int)tp->ram_usable) << 10;
  4370. frag = skb->data;
  4371. flen = skb->len;
  4372. while(flen > 0 && bytes > 0)
  4373. {
  4374. smctr_set_page(dev, pbuff);
  4375. offset = SMC_PAGE_OFFSET(pbuff);
  4376. if(offset + flen > ram_usable)
  4377. len = ram_usable - offset;
  4378. else
  4379. len = flen;
  4380. if(len > bytes)
  4381. len = bytes;
  4382. page = (char *) (offset + tp->ram_access);
  4383. memcpy(page, frag, len);
  4384. flen -=len;
  4385. bytes -= len;
  4386. frag += len;
  4387. pbuff += len;
  4388. }
  4389. return (0);
  4390. }
  4391. /* Update the error statistic counters for this adapter. */
  4392. static int smctr_update_err_stats(struct net_device *dev)
  4393. {
  4394. struct net_local *tp = netdev_priv(dev);
  4395. struct tr_statistics *tstat = &tp->MacStat;
  4396. if(tstat->internal_errors)
  4397. tstat->internal_errors
  4398. += *(tp->misc_command_data + 0) & 0x00ff;
  4399. if(tstat->line_errors)
  4400. tstat->line_errors += *(tp->misc_command_data + 0) >> 8;
  4401. if(tstat->A_C_errors)
  4402. tstat->A_C_errors += *(tp->misc_command_data + 1) & 0x00ff;
  4403. if(tstat->burst_errors)
  4404. tstat->burst_errors += *(tp->misc_command_data + 1) >> 8;
  4405. if(tstat->abort_delimiters)
  4406. tstat->abort_delimiters += *(tp->misc_command_data + 2) >> 8;
  4407. if(tstat->recv_congest_count)
  4408. tstat->recv_congest_count
  4409. += *(tp->misc_command_data + 3) & 0x00ff;
  4410. if(tstat->lost_frames)
  4411. tstat->lost_frames
  4412. += *(tp->misc_command_data + 3) >> 8;
  4413. if(tstat->frequency_errors)
  4414. tstat->frequency_errors += *(tp->misc_command_data + 4) & 0x00ff;
  4415. if(tstat->frame_copied_errors)
  4416. tstat->frame_copied_errors
  4417. += *(tp->misc_command_data + 4) >> 8;
  4418. if(tstat->token_errors)
  4419. tstat->token_errors += *(tp->misc_command_data + 5) >> 8;
  4420. return (0);
  4421. }
  4422. static int smctr_update_rx_chain(struct net_device *dev, __u16 queue)
  4423. {
  4424. struct net_local *tp = netdev_priv(dev);
  4425. FCBlock *fcb;
  4426. BDBlock *bdb;
  4427. __u16 size, len;
  4428. fcb = tp->rx_fcb_curr[queue];
  4429. len = fcb->frame_length;
  4430. fcb->frame_status = 0;
  4431. fcb->info = FCB_CHAIN_END;
  4432. fcb->back_ptr->info = FCB_WARNING;
  4433. tp->rx_fcb_curr[queue] = tp->rx_fcb_curr[queue]->next_ptr;
  4434. /* update RX BDBs */
  4435. size = (len >> RX_BDB_SIZE_SHIFT);
  4436. if(len & RX_DATA_BUFFER_SIZE_MASK)
  4437. size += sizeof(BDBlock);
  4438. size &= (~RX_BDB_SIZE_MASK);
  4439. /* check if wrap around */
  4440. bdb = (BDBlock *)((__u32)(tp->rx_bdb_curr[queue]) + (__u32)(size));
  4441. if((__u32)bdb >= (__u32)tp->rx_bdb_end[queue])
  4442. {
  4443. bdb = (BDBlock *)((__u32)(tp->rx_bdb_head[queue])
  4444. + (__u32)(bdb) - (__u32)(tp->rx_bdb_end[queue]));
  4445. }
  4446. bdb->back_ptr->info = BDB_CHAIN_END;
  4447. tp->rx_bdb_curr[queue]->back_ptr->info = BDB_NOT_CHAIN_END;
  4448. tp->rx_bdb_curr[queue] = bdb;
  4449. return (0);
  4450. }
  4451. static int smctr_update_tx_chain(struct net_device *dev, FCBlock *fcb,
  4452. __u16 queue)
  4453. {
  4454. struct net_local *tp = netdev_priv(dev);
  4455. if(smctr_debug > 20)
  4456. printk(KERN_DEBUG "smctr_update_tx_chain\n");
  4457. if(tp->num_tx_fcbs_used[queue] <= 0)
  4458. return (HARDWARE_FAILED);
  4459. else
  4460. {
  4461. if(tp->tx_buff_used[queue] < fcb->memory_alloc)
  4462. {
  4463. tp->tx_buff_used[queue] = 0;
  4464. return (HARDWARE_FAILED);
  4465. }
  4466. tp->tx_buff_used[queue] -= fcb->memory_alloc;
  4467. /* if all transmit buffer are cleared
  4468. * need to set the tx_buff_curr[] to tx_buff_head[]
  4469. * otherwise, tx buffer will be segregate and cannot
  4470. * accommodate and buffer greater than (curr - head) and
  4471. * (end - curr) since we do not allow wrap around allocation.
  4472. */
  4473. if(tp->tx_buff_used[queue] == 0)
  4474. tp->tx_buff_curr[queue] = tp->tx_buff_head[queue];
  4475. tp->num_tx_fcbs_used[queue]--;
  4476. fcb->frame_status = 0;
  4477. tp->tx_fcb_end[queue] = fcb->next_ptr;
  4478. netif_wake_queue(dev);
  4479. return (0);
  4480. }
  4481. }
  4482. static int smctr_wait_cmd(struct net_device *dev)
  4483. {
  4484. struct net_local *tp = netdev_priv(dev);
  4485. unsigned int loop_count = 0x20000;
  4486. if(smctr_debug > 10)
  4487. printk(KERN_DEBUG "%s: smctr_wait_cmd\n", dev->name);
  4488. while(loop_count)
  4489. {
  4490. if(tp->acb_head->cmd_done_status & ACB_COMMAND_DONE)
  4491. break;
  4492. udelay(1);
  4493. loop_count--;
  4494. }
  4495. if(loop_count == 0)
  4496. return(HARDWARE_FAILED);
  4497. if(tp->acb_head->cmd_done_status & 0xff)
  4498. return(HARDWARE_FAILED);
  4499. return (0);
  4500. }
  4501. static int smctr_wait_while_cbusy(struct net_device *dev)
  4502. {
  4503. struct net_local *tp = netdev_priv(dev);
  4504. unsigned int timeout = 0x20000;
  4505. int ioaddr = dev->base_addr;
  4506. __u8 r;
  4507. if(tp->bic_type == BIC_585_CHIP)
  4508. {
  4509. while(timeout)
  4510. {
  4511. r = inb(ioaddr + HWR);
  4512. if((r & HWR_CBUSY) == 0)
  4513. break;
  4514. timeout--;
  4515. }
  4516. }
  4517. else
  4518. {
  4519. while(timeout)
  4520. {
  4521. r = inb(ioaddr + CSR);
  4522. if((r & CSR_CBUSY) == 0)
  4523. break;
  4524. timeout--;
  4525. }
  4526. }
  4527. if(timeout)
  4528. return (0);
  4529. else
  4530. return (HARDWARE_FAILED);
  4531. }
  4532. #ifdef MODULE
  4533. static struct net_device* dev_smctr[SMCTR_MAX_ADAPTERS];
  4534. static int io[SMCTR_MAX_ADAPTERS];
  4535. static int irq[SMCTR_MAX_ADAPTERS];
  4536. MODULE_LICENSE("GPL");
  4537. MODULE_FIRMWARE("tr_smctr.bin");
  4538. module_param_array(io, int, NULL, 0);
  4539. module_param_array(irq, int, NULL, 0);
  4540. module_param(ringspeed, int, 0);
  4541. static struct net_device * __init setup_card(int n)
  4542. {
  4543. struct net_device *dev = alloc_trdev(sizeof(struct net_local));
  4544. int err;
  4545. if (!dev)
  4546. return ERR_PTR(-ENOMEM);
  4547. dev->irq = irq[n];
  4548. err = smctr_probe1(dev, io[n]);
  4549. if (err)
  4550. goto out;
  4551. err = register_netdev(dev);
  4552. if (err)
  4553. goto out1;
  4554. return dev;
  4555. out1:
  4556. #ifdef CONFIG_MCA_LEGACY
  4557. { struct net_local *tp = netdev_priv(dev);
  4558. if (tp->slot_num)
  4559. mca_mark_as_unused(tp->slot_num);
  4560. }
  4561. #endif
  4562. release_region(dev->base_addr, SMCTR_IO_EXTENT);
  4563. free_irq(dev->irq, dev);
  4564. out:
  4565. free_netdev(dev);
  4566. return ERR_PTR(err);
  4567. }
  4568. int __init init_module(void)
  4569. {
  4570. int i, found = 0;
  4571. struct net_device *dev;
  4572. for(i = 0; i < SMCTR_MAX_ADAPTERS; i++) {
  4573. dev = io[0]? setup_card(i) : smctr_probe(-1);
  4574. if (!IS_ERR(dev)) {
  4575. ++found;
  4576. dev_smctr[i] = dev;
  4577. }
  4578. }
  4579. return found ? 0 : -ENODEV;
  4580. }
  4581. void __exit cleanup_module(void)
  4582. {
  4583. int i;
  4584. for(i = 0; i < SMCTR_MAX_ADAPTERS; i++) {
  4585. struct net_device *dev = dev_smctr[i];
  4586. if (dev) {
  4587. unregister_netdev(dev);
  4588. #ifdef CONFIG_MCA_LEGACY
  4589. { struct net_local *tp = netdev_priv(dev);
  4590. if (tp->slot_num)
  4591. mca_mark_as_unused(tp->slot_num);
  4592. }
  4593. #endif
  4594. release_region(dev->base_addr, SMCTR_IO_EXTENT);
  4595. if (dev->irq)
  4596. free_irq(dev->irq, dev);
  4597. free_netdev(dev);
  4598. }
  4599. }
  4600. }
  4601. #endif /* MODULE */