qlcnic_ethtool.c 27 KB

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  1. /*
  2. * Copyright (C) 2009 - QLogic Corporation.
  3. * All rights reserved.
  4. *
  5. * This program is free software; you can redistribute it and/or
  6. * modify it under the terms of the GNU General Public License
  7. * as published by the Free Software Foundation; either version 2
  8. * of the License, or (at your option) any later version.
  9. *
  10. * This program is distributed in the hope that it will be useful, but
  11. * WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the Free Software
  17. * Foundation, Inc., 59 Temple Place - Suite 330, Boston,
  18. * MA 02111-1307, USA.
  19. *
  20. * The full GNU General Public License is included in this distribution
  21. * in the file called "COPYING".
  22. *
  23. */
  24. #include <linux/types.h>
  25. #include <linux/delay.h>
  26. #include <linux/pci.h>
  27. #include <linux/io.h>
  28. #include <linux/netdevice.h>
  29. #include <linux/ethtool.h>
  30. #include "qlcnic.h"
  31. struct qlcnic_stats {
  32. char stat_string[ETH_GSTRING_LEN];
  33. int sizeof_stat;
  34. int stat_offset;
  35. };
  36. #define QLC_SIZEOF(m) FIELD_SIZEOF(struct qlcnic_adapter, m)
  37. #define QLC_OFF(m) offsetof(struct qlcnic_adapter, m)
  38. static const struct qlcnic_stats qlcnic_gstrings_stats[] = {
  39. {"xmit_called",
  40. QLC_SIZEOF(stats.xmitcalled), QLC_OFF(stats.xmitcalled)},
  41. {"xmit_finished",
  42. QLC_SIZEOF(stats.xmitfinished), QLC_OFF(stats.xmitfinished)},
  43. {"rx_dropped",
  44. QLC_SIZEOF(stats.rxdropped), QLC_OFF(stats.rxdropped)},
  45. {"tx_dropped",
  46. QLC_SIZEOF(stats.txdropped), QLC_OFF(stats.txdropped)},
  47. {"csummed",
  48. QLC_SIZEOF(stats.csummed), QLC_OFF(stats.csummed)},
  49. {"rx_pkts",
  50. QLC_SIZEOF(stats.rx_pkts), QLC_OFF(stats.rx_pkts)},
  51. {"lro_pkts",
  52. QLC_SIZEOF(stats.lro_pkts), QLC_OFF(stats.lro_pkts)},
  53. {"rx_bytes",
  54. QLC_SIZEOF(stats.rxbytes), QLC_OFF(stats.rxbytes)},
  55. {"tx_bytes",
  56. QLC_SIZEOF(stats.txbytes), QLC_OFF(stats.txbytes)},
  57. {"lrobytes",
  58. QLC_SIZEOF(stats.lrobytes), QLC_OFF(stats.lrobytes)},
  59. {"lso_frames",
  60. QLC_SIZEOF(stats.lso_frames), QLC_OFF(stats.lso_frames)},
  61. {"xmit_on",
  62. QLC_SIZEOF(stats.xmit_on), QLC_OFF(stats.xmit_on)},
  63. {"xmit_off",
  64. QLC_SIZEOF(stats.xmit_off), QLC_OFF(stats.xmit_off)},
  65. {"skb_alloc_failure", QLC_SIZEOF(stats.skb_alloc_failure),
  66. QLC_OFF(stats.skb_alloc_failure)},
  67. };
  68. #define QLCNIC_STATS_LEN ARRAY_SIZE(qlcnic_gstrings_stats)
  69. static const char qlcnic_gstrings_test[][ETH_GSTRING_LEN] = {
  70. "Register_Test_on_offline",
  71. "Link_Test_on_offline",
  72. "Interrupt_Test_offline",
  73. "Loopback_Test_offline"
  74. };
  75. #define QLCNIC_TEST_LEN ARRAY_SIZE(qlcnic_gstrings_test)
  76. #define QLCNIC_RING_REGS_COUNT 20
  77. #define QLCNIC_RING_REGS_LEN (QLCNIC_RING_REGS_COUNT * sizeof(u32))
  78. #define QLCNIC_MAX_EEPROM_LEN 1024
  79. static const u32 diag_registers[] = {
  80. CRB_CMDPEG_STATE,
  81. CRB_RCVPEG_STATE,
  82. CRB_XG_STATE_P3,
  83. CRB_FW_CAPABILITIES_1,
  84. ISR_INT_STATE_REG,
  85. QLCNIC_CRB_DEV_REF_COUNT,
  86. QLCNIC_CRB_DEV_STATE,
  87. QLCNIC_CRB_DRV_STATE,
  88. QLCNIC_CRB_DRV_SCRATCH,
  89. QLCNIC_CRB_DEV_PARTITION_INFO,
  90. QLCNIC_CRB_DRV_IDC_VER,
  91. QLCNIC_PEG_ALIVE_COUNTER,
  92. QLCNIC_PEG_HALT_STATUS1,
  93. QLCNIC_PEG_HALT_STATUS2,
  94. QLCNIC_CRB_PEG_NET_0+0x3c,
  95. QLCNIC_CRB_PEG_NET_1+0x3c,
  96. QLCNIC_CRB_PEG_NET_2+0x3c,
  97. QLCNIC_CRB_PEG_NET_4+0x3c,
  98. -1
  99. };
  100. static int qlcnic_get_regs_len(struct net_device *dev)
  101. {
  102. return sizeof(diag_registers) + QLCNIC_RING_REGS_LEN;
  103. }
  104. static int qlcnic_get_eeprom_len(struct net_device *dev)
  105. {
  106. return QLCNIC_FLASH_TOTAL_SIZE;
  107. }
  108. static void
  109. qlcnic_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *drvinfo)
  110. {
  111. struct qlcnic_adapter *adapter = netdev_priv(dev);
  112. u32 fw_major, fw_minor, fw_build;
  113. fw_major = QLCRD32(adapter, QLCNIC_FW_VERSION_MAJOR);
  114. fw_minor = QLCRD32(adapter, QLCNIC_FW_VERSION_MINOR);
  115. fw_build = QLCRD32(adapter, QLCNIC_FW_VERSION_SUB);
  116. sprintf(drvinfo->fw_version, "%d.%d.%d", fw_major, fw_minor, fw_build);
  117. strlcpy(drvinfo->bus_info, pci_name(adapter->pdev), 32);
  118. strlcpy(drvinfo->driver, qlcnic_driver_name, 32);
  119. strlcpy(drvinfo->version, QLCNIC_LINUX_VERSIONID, 32);
  120. }
  121. static int
  122. qlcnic_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
  123. {
  124. struct qlcnic_adapter *adapter = netdev_priv(dev);
  125. int check_sfp_module = 0;
  126. u16 pcifn = adapter->ahw.pci_func;
  127. /* read which mode */
  128. if (adapter->ahw.port_type == QLCNIC_GBE) {
  129. ecmd->supported = (SUPPORTED_10baseT_Half |
  130. SUPPORTED_10baseT_Full |
  131. SUPPORTED_100baseT_Half |
  132. SUPPORTED_100baseT_Full |
  133. SUPPORTED_1000baseT_Half |
  134. SUPPORTED_1000baseT_Full);
  135. ecmd->advertising = (ADVERTISED_100baseT_Half |
  136. ADVERTISED_100baseT_Full |
  137. ADVERTISED_1000baseT_Half |
  138. ADVERTISED_1000baseT_Full);
  139. ecmd->speed = adapter->link_speed;
  140. ecmd->duplex = adapter->link_duplex;
  141. ecmd->autoneg = adapter->link_autoneg;
  142. } else if (adapter->ahw.port_type == QLCNIC_XGBE) {
  143. u32 val;
  144. val = QLCRD32(adapter, QLCNIC_PORT_MODE_ADDR);
  145. if (val == QLCNIC_PORT_MODE_802_3_AP) {
  146. ecmd->supported = SUPPORTED_1000baseT_Full;
  147. ecmd->advertising = ADVERTISED_1000baseT_Full;
  148. } else {
  149. ecmd->supported = SUPPORTED_10000baseT_Full;
  150. ecmd->advertising = ADVERTISED_10000baseT_Full;
  151. }
  152. if (netif_running(dev) && adapter->has_link_events) {
  153. ecmd->speed = adapter->link_speed;
  154. ecmd->autoneg = adapter->link_autoneg;
  155. ecmd->duplex = adapter->link_duplex;
  156. goto skip;
  157. }
  158. val = QLCRD32(adapter, P3_LINK_SPEED_REG(pcifn));
  159. ecmd->speed = P3_LINK_SPEED_MHZ *
  160. P3_LINK_SPEED_VAL(pcifn, val);
  161. ecmd->duplex = DUPLEX_FULL;
  162. ecmd->autoneg = AUTONEG_DISABLE;
  163. } else
  164. return -EIO;
  165. skip:
  166. ecmd->phy_address = adapter->physical_port;
  167. ecmd->transceiver = XCVR_EXTERNAL;
  168. switch (adapter->ahw.board_type) {
  169. case QLCNIC_BRDTYPE_P3_REF_QG:
  170. case QLCNIC_BRDTYPE_P3_4_GB:
  171. case QLCNIC_BRDTYPE_P3_4_GB_MM:
  172. ecmd->supported |= SUPPORTED_Autoneg;
  173. ecmd->advertising |= ADVERTISED_Autoneg;
  174. case QLCNIC_BRDTYPE_P3_10G_CX4:
  175. case QLCNIC_BRDTYPE_P3_10G_CX4_LP:
  176. case QLCNIC_BRDTYPE_P3_10000_BASE_T:
  177. ecmd->supported |= SUPPORTED_TP;
  178. ecmd->advertising |= ADVERTISED_TP;
  179. ecmd->port = PORT_TP;
  180. ecmd->autoneg = adapter->link_autoneg;
  181. break;
  182. case QLCNIC_BRDTYPE_P3_IMEZ:
  183. case QLCNIC_BRDTYPE_P3_XG_LOM:
  184. case QLCNIC_BRDTYPE_P3_HMEZ:
  185. ecmd->supported |= SUPPORTED_MII;
  186. ecmd->advertising |= ADVERTISED_MII;
  187. ecmd->port = PORT_MII;
  188. ecmd->autoneg = AUTONEG_DISABLE;
  189. break;
  190. case QLCNIC_BRDTYPE_P3_10G_SFP_PLUS:
  191. case QLCNIC_BRDTYPE_P3_10G_SFP_CT:
  192. case QLCNIC_BRDTYPE_P3_10G_SFP_QT:
  193. ecmd->advertising |= ADVERTISED_TP;
  194. ecmd->supported |= SUPPORTED_TP;
  195. check_sfp_module = netif_running(dev) &&
  196. adapter->has_link_events;
  197. case QLCNIC_BRDTYPE_P3_10G_XFP:
  198. ecmd->supported |= SUPPORTED_FIBRE;
  199. ecmd->advertising |= ADVERTISED_FIBRE;
  200. ecmd->port = PORT_FIBRE;
  201. ecmd->autoneg = AUTONEG_DISABLE;
  202. break;
  203. case QLCNIC_BRDTYPE_P3_10G_TP:
  204. if (adapter->ahw.port_type == QLCNIC_XGBE) {
  205. ecmd->autoneg = AUTONEG_DISABLE;
  206. ecmd->supported |= (SUPPORTED_FIBRE | SUPPORTED_TP);
  207. ecmd->advertising |=
  208. (ADVERTISED_FIBRE | ADVERTISED_TP);
  209. ecmd->port = PORT_FIBRE;
  210. check_sfp_module = netif_running(dev) &&
  211. adapter->has_link_events;
  212. } else {
  213. ecmd->autoneg = AUTONEG_ENABLE;
  214. ecmd->supported |= (SUPPORTED_TP | SUPPORTED_Autoneg);
  215. ecmd->advertising |=
  216. (ADVERTISED_TP | ADVERTISED_Autoneg);
  217. ecmd->port = PORT_TP;
  218. }
  219. break;
  220. default:
  221. dev_err(&adapter->pdev->dev, "Unsupported board model %d\n",
  222. adapter->ahw.board_type);
  223. return -EIO;
  224. }
  225. if (check_sfp_module) {
  226. switch (adapter->module_type) {
  227. case LINKEVENT_MODULE_OPTICAL_UNKNOWN:
  228. case LINKEVENT_MODULE_OPTICAL_SRLR:
  229. case LINKEVENT_MODULE_OPTICAL_LRM:
  230. case LINKEVENT_MODULE_OPTICAL_SFP_1G:
  231. ecmd->port = PORT_FIBRE;
  232. break;
  233. case LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLE:
  234. case LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLELEN:
  235. case LINKEVENT_MODULE_TWINAX:
  236. ecmd->port = PORT_TP;
  237. break;
  238. default:
  239. ecmd->port = PORT_OTHER;
  240. }
  241. }
  242. return 0;
  243. }
  244. static int
  245. qlcnic_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
  246. {
  247. struct qlcnic_adapter *adapter = netdev_priv(dev);
  248. __u32 status;
  249. /* read which mode */
  250. if (adapter->ahw.port_type == QLCNIC_GBE) {
  251. /* autonegotiation */
  252. if (qlcnic_fw_cmd_set_phy(adapter,
  253. QLCNIC_NIU_GB_MII_MGMT_ADDR_AUTONEG,
  254. ecmd->autoneg) != 0)
  255. return -EIO;
  256. else
  257. adapter->link_autoneg = ecmd->autoneg;
  258. if (qlcnic_fw_cmd_query_phy(adapter,
  259. QLCNIC_NIU_GB_MII_MGMT_ADDR_PHY_STATUS,
  260. &status) != 0)
  261. return -EIO;
  262. switch (ecmd->speed) {
  263. case SPEED_10:
  264. qlcnic_set_phy_speed(status, 0);
  265. break;
  266. case SPEED_100:
  267. qlcnic_set_phy_speed(status, 1);
  268. break;
  269. case SPEED_1000:
  270. qlcnic_set_phy_speed(status, 2);
  271. break;
  272. }
  273. if (ecmd->duplex == DUPLEX_HALF)
  274. qlcnic_clear_phy_duplex(status);
  275. if (ecmd->duplex == DUPLEX_FULL)
  276. qlcnic_set_phy_duplex(status);
  277. if (qlcnic_fw_cmd_set_phy(adapter,
  278. QLCNIC_NIU_GB_MII_MGMT_ADDR_PHY_STATUS,
  279. *((int *)&status)) != 0)
  280. return -EIO;
  281. else {
  282. adapter->link_speed = ecmd->speed;
  283. adapter->link_duplex = ecmd->duplex;
  284. }
  285. } else
  286. return -EOPNOTSUPP;
  287. if (!netif_running(dev))
  288. return 0;
  289. dev->netdev_ops->ndo_stop(dev);
  290. return dev->netdev_ops->ndo_open(dev);
  291. }
  292. static void
  293. qlcnic_get_regs(struct net_device *dev, struct ethtool_regs *regs, void *p)
  294. {
  295. struct qlcnic_adapter *adapter = netdev_priv(dev);
  296. struct qlcnic_recv_context *recv_ctx = &adapter->recv_ctx;
  297. struct qlcnic_host_sds_ring *sds_ring;
  298. u32 *regs_buff = p;
  299. int ring, i = 0;
  300. memset(p, 0, qlcnic_get_regs_len(dev));
  301. regs->version = (1 << 24) | (adapter->ahw.revision_id << 16) |
  302. (adapter->pdev)->device;
  303. for (i = 0; diag_registers[i] != -1; i++)
  304. regs_buff[i] = QLCRD32(adapter, diag_registers[i]);
  305. if (adapter->is_up != QLCNIC_ADAPTER_UP_MAGIC)
  306. return;
  307. regs_buff[i++] = 0xFFEFCDAB; /* Marker btw regs and ring count*/
  308. regs_buff[i++] = 1; /* No. of tx ring */
  309. regs_buff[i++] = le32_to_cpu(*(adapter->tx_ring->hw_consumer));
  310. regs_buff[i++] = readl(adapter->tx_ring->crb_cmd_producer);
  311. regs_buff[i++] = 2; /* No. of rx ring */
  312. regs_buff[i++] = readl(recv_ctx->rds_rings[0].crb_rcv_producer);
  313. regs_buff[i++] = readl(recv_ctx->rds_rings[1].crb_rcv_producer);
  314. regs_buff[i++] = adapter->max_sds_rings;
  315. for (ring = 0; ring < adapter->max_sds_rings; ring++) {
  316. sds_ring = &(recv_ctx->sds_rings[ring]);
  317. regs_buff[i++] = readl(sds_ring->crb_sts_consumer);
  318. }
  319. }
  320. static u32 qlcnic_test_link(struct net_device *dev)
  321. {
  322. struct qlcnic_adapter *adapter = netdev_priv(dev);
  323. u32 val;
  324. val = QLCRD32(adapter, CRB_XG_STATE_P3);
  325. val = XG_LINK_STATE_P3(adapter->ahw.pci_func, val);
  326. return (val == XG_LINK_UP_P3) ? 0 : 1;
  327. }
  328. static int
  329. qlcnic_get_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom,
  330. u8 *bytes)
  331. {
  332. struct qlcnic_adapter *adapter = netdev_priv(dev);
  333. int offset;
  334. int ret;
  335. if (eeprom->len == 0)
  336. return -EINVAL;
  337. eeprom->magic = (adapter->pdev)->vendor |
  338. ((adapter->pdev)->device << 16);
  339. offset = eeprom->offset;
  340. ret = qlcnic_rom_fast_read_words(adapter, offset, bytes,
  341. eeprom->len);
  342. if (ret < 0)
  343. return ret;
  344. return 0;
  345. }
  346. static void
  347. qlcnic_get_ringparam(struct net_device *dev,
  348. struct ethtool_ringparam *ring)
  349. {
  350. struct qlcnic_adapter *adapter = netdev_priv(dev);
  351. ring->rx_pending = adapter->num_rxd;
  352. ring->rx_jumbo_pending = adapter->num_jumbo_rxd;
  353. ring->rx_jumbo_pending += adapter->num_lro_rxd;
  354. ring->tx_pending = adapter->num_txd;
  355. if (adapter->ahw.port_type == QLCNIC_GBE) {
  356. ring->rx_max_pending = MAX_RCV_DESCRIPTORS_1G;
  357. ring->rx_jumbo_max_pending = MAX_JUMBO_RCV_DESCRIPTORS_1G;
  358. } else {
  359. ring->rx_max_pending = MAX_RCV_DESCRIPTORS_10G;
  360. ring->rx_jumbo_max_pending = MAX_JUMBO_RCV_DESCRIPTORS_10G;
  361. }
  362. ring->tx_max_pending = MAX_CMD_DESCRIPTORS;
  363. ring->rx_mini_max_pending = 0;
  364. ring->rx_mini_pending = 0;
  365. }
  366. static u32
  367. qlcnic_validate_ringparam(u32 val, u32 min, u32 max, char *r_name)
  368. {
  369. u32 num_desc;
  370. num_desc = max(val, min);
  371. num_desc = min(num_desc, max);
  372. num_desc = roundup_pow_of_two(num_desc);
  373. if (val != num_desc) {
  374. printk(KERN_INFO "%s: setting %s ring size %d instead of %d\n",
  375. qlcnic_driver_name, r_name, num_desc, val);
  376. }
  377. return num_desc;
  378. }
  379. static int
  380. qlcnic_set_ringparam(struct net_device *dev,
  381. struct ethtool_ringparam *ring)
  382. {
  383. struct qlcnic_adapter *adapter = netdev_priv(dev);
  384. u16 max_rcv_desc = MAX_RCV_DESCRIPTORS_10G;
  385. u16 max_jumbo_desc = MAX_JUMBO_RCV_DESCRIPTORS_10G;
  386. u16 num_rxd, num_jumbo_rxd, num_txd;
  387. if (ring->rx_mini_pending)
  388. return -EOPNOTSUPP;
  389. if (adapter->ahw.port_type == QLCNIC_GBE) {
  390. max_rcv_desc = MAX_RCV_DESCRIPTORS_1G;
  391. max_jumbo_desc = MAX_JUMBO_RCV_DESCRIPTORS_10G;
  392. }
  393. num_rxd = qlcnic_validate_ringparam(ring->rx_pending,
  394. MIN_RCV_DESCRIPTORS, max_rcv_desc, "rx");
  395. num_jumbo_rxd = qlcnic_validate_ringparam(ring->rx_jumbo_pending,
  396. MIN_JUMBO_DESCRIPTORS, max_jumbo_desc, "rx jumbo");
  397. num_txd = qlcnic_validate_ringparam(ring->tx_pending,
  398. MIN_CMD_DESCRIPTORS, MAX_CMD_DESCRIPTORS, "tx");
  399. if (num_rxd == adapter->num_rxd && num_txd == adapter->num_txd &&
  400. num_jumbo_rxd == adapter->num_jumbo_rxd)
  401. return 0;
  402. adapter->num_rxd = num_rxd;
  403. adapter->num_jumbo_rxd = num_jumbo_rxd;
  404. adapter->num_txd = num_txd;
  405. return qlcnic_reset_context(adapter);
  406. }
  407. static void
  408. qlcnic_get_pauseparam(struct net_device *netdev,
  409. struct ethtool_pauseparam *pause)
  410. {
  411. struct qlcnic_adapter *adapter = netdev_priv(netdev);
  412. int port = adapter->physical_port;
  413. __u32 val;
  414. if (adapter->ahw.port_type == QLCNIC_GBE) {
  415. if ((port < 0) || (port > QLCNIC_NIU_MAX_GBE_PORTS))
  416. return;
  417. /* get flow control settings */
  418. val = QLCRD32(adapter, QLCNIC_NIU_GB_MAC_CONFIG_0(port));
  419. pause->rx_pause = qlcnic_gb_get_rx_flowctl(val);
  420. val = QLCRD32(adapter, QLCNIC_NIU_GB_PAUSE_CTL);
  421. switch (port) {
  422. case 0:
  423. pause->tx_pause = !(qlcnic_gb_get_gb0_mask(val));
  424. break;
  425. case 1:
  426. pause->tx_pause = !(qlcnic_gb_get_gb1_mask(val));
  427. break;
  428. case 2:
  429. pause->tx_pause = !(qlcnic_gb_get_gb2_mask(val));
  430. break;
  431. case 3:
  432. default:
  433. pause->tx_pause = !(qlcnic_gb_get_gb3_mask(val));
  434. break;
  435. }
  436. } else if (adapter->ahw.port_type == QLCNIC_XGBE) {
  437. if ((port < 0) || (port > QLCNIC_NIU_MAX_XG_PORTS))
  438. return;
  439. pause->rx_pause = 1;
  440. val = QLCRD32(adapter, QLCNIC_NIU_XG_PAUSE_CTL);
  441. if (port == 0)
  442. pause->tx_pause = !(qlcnic_xg_get_xg0_mask(val));
  443. else
  444. pause->tx_pause = !(qlcnic_xg_get_xg1_mask(val));
  445. } else {
  446. dev_err(&netdev->dev, "Unknown board type: %x\n",
  447. adapter->ahw.port_type);
  448. }
  449. }
  450. static int
  451. qlcnic_set_pauseparam(struct net_device *netdev,
  452. struct ethtool_pauseparam *pause)
  453. {
  454. struct qlcnic_adapter *adapter = netdev_priv(netdev);
  455. int port = adapter->physical_port;
  456. __u32 val;
  457. /* read mode */
  458. if (adapter->ahw.port_type == QLCNIC_GBE) {
  459. if ((port < 0) || (port > QLCNIC_NIU_MAX_GBE_PORTS))
  460. return -EIO;
  461. /* set flow control */
  462. val = QLCRD32(adapter, QLCNIC_NIU_GB_MAC_CONFIG_0(port));
  463. if (pause->rx_pause)
  464. qlcnic_gb_rx_flowctl(val);
  465. else
  466. qlcnic_gb_unset_rx_flowctl(val);
  467. QLCWR32(adapter, QLCNIC_NIU_GB_MAC_CONFIG_0(port),
  468. val);
  469. /* set autoneg */
  470. val = QLCRD32(adapter, QLCNIC_NIU_GB_PAUSE_CTL);
  471. switch (port) {
  472. case 0:
  473. if (pause->tx_pause)
  474. qlcnic_gb_unset_gb0_mask(val);
  475. else
  476. qlcnic_gb_set_gb0_mask(val);
  477. break;
  478. case 1:
  479. if (pause->tx_pause)
  480. qlcnic_gb_unset_gb1_mask(val);
  481. else
  482. qlcnic_gb_set_gb1_mask(val);
  483. break;
  484. case 2:
  485. if (pause->tx_pause)
  486. qlcnic_gb_unset_gb2_mask(val);
  487. else
  488. qlcnic_gb_set_gb2_mask(val);
  489. break;
  490. case 3:
  491. default:
  492. if (pause->tx_pause)
  493. qlcnic_gb_unset_gb3_mask(val);
  494. else
  495. qlcnic_gb_set_gb3_mask(val);
  496. break;
  497. }
  498. QLCWR32(adapter, QLCNIC_NIU_GB_PAUSE_CTL, val);
  499. } else if (adapter->ahw.port_type == QLCNIC_XGBE) {
  500. if ((port < 0) || (port > QLCNIC_NIU_MAX_XG_PORTS))
  501. return -EIO;
  502. val = QLCRD32(adapter, QLCNIC_NIU_XG_PAUSE_CTL);
  503. if (port == 0) {
  504. if (pause->tx_pause)
  505. qlcnic_xg_unset_xg0_mask(val);
  506. else
  507. qlcnic_xg_set_xg0_mask(val);
  508. } else {
  509. if (pause->tx_pause)
  510. qlcnic_xg_unset_xg1_mask(val);
  511. else
  512. qlcnic_xg_set_xg1_mask(val);
  513. }
  514. QLCWR32(adapter, QLCNIC_NIU_XG_PAUSE_CTL, val);
  515. } else {
  516. dev_err(&netdev->dev, "Unknown board type: %x\n",
  517. adapter->ahw.port_type);
  518. }
  519. return 0;
  520. }
  521. static int qlcnic_reg_test(struct net_device *dev)
  522. {
  523. struct qlcnic_adapter *adapter = netdev_priv(dev);
  524. u32 data_read, data_written;
  525. data_read = QLCRD32(adapter, QLCNIC_PCIX_PH_REG(0));
  526. if ((data_read & 0xffff) != adapter->pdev->vendor)
  527. return 1;
  528. data_written = (u32)0xa5a5a5a5;
  529. QLCWR32(adapter, CRB_SCRATCHPAD_TEST, data_written);
  530. data_read = QLCRD32(adapter, CRB_SCRATCHPAD_TEST);
  531. if (data_written != data_read)
  532. return 1;
  533. return 0;
  534. }
  535. static int qlcnic_get_sset_count(struct net_device *dev, int sset)
  536. {
  537. switch (sset) {
  538. case ETH_SS_TEST:
  539. return QLCNIC_TEST_LEN;
  540. case ETH_SS_STATS:
  541. return QLCNIC_STATS_LEN;
  542. default:
  543. return -EOPNOTSUPP;
  544. }
  545. }
  546. #define QLC_ILB_PKT_SIZE 64
  547. static void qlcnic_create_loopback_buff(unsigned char *data)
  548. {
  549. unsigned char random_data[] = {0xa8, 0x06, 0x45, 0x00};
  550. memset(data, 0x4e, QLC_ILB_PKT_SIZE);
  551. memset(data, 0xff, 12);
  552. memcpy(data + 12, random_data, sizeof(random_data));
  553. }
  554. int qlcnic_check_loopback_buff(unsigned char *data)
  555. {
  556. unsigned char buff[QLC_ILB_PKT_SIZE];
  557. qlcnic_create_loopback_buff(buff);
  558. return memcmp(data, buff, QLC_ILB_PKT_SIZE);
  559. }
  560. static int qlcnic_do_ilb_test(struct qlcnic_adapter *adapter)
  561. {
  562. struct qlcnic_recv_context *recv_ctx = &adapter->recv_ctx;
  563. struct qlcnic_host_sds_ring *sds_ring = &recv_ctx->sds_rings[0];
  564. struct sk_buff *skb;
  565. int i;
  566. for (i = 0; i < 16; i++) {
  567. skb = dev_alloc_skb(QLC_ILB_PKT_SIZE);
  568. qlcnic_create_loopback_buff(skb->data);
  569. skb_put(skb, QLC_ILB_PKT_SIZE);
  570. adapter->diag_cnt = 0;
  571. qlcnic_xmit_frame(skb, adapter->netdev);
  572. msleep(5);
  573. qlcnic_process_rcv_ring_diag(sds_ring);
  574. dev_kfree_skb_any(skb);
  575. if (!adapter->diag_cnt)
  576. return -1;
  577. }
  578. return 0;
  579. }
  580. static int qlcnic_loopback_test(struct net_device *netdev)
  581. {
  582. struct qlcnic_adapter *adapter = netdev_priv(netdev);
  583. int max_sds_rings = adapter->max_sds_rings;
  584. int ret;
  585. if (test_and_set_bit(__QLCNIC_RESETTING, &adapter->state))
  586. return -EIO;
  587. ret = qlcnic_diag_alloc_res(netdev, QLCNIC_LOOPBACK_TEST);
  588. if (ret)
  589. goto clear_it;
  590. ret = qlcnic_set_ilb_mode(adapter);
  591. if (ret)
  592. goto done;
  593. ret = qlcnic_do_ilb_test(adapter);
  594. qlcnic_clear_ilb_mode(adapter);
  595. done:
  596. qlcnic_diag_free_res(netdev, max_sds_rings);
  597. clear_it:
  598. adapter->max_sds_rings = max_sds_rings;
  599. clear_bit(__QLCNIC_RESETTING, &adapter->state);
  600. return ret;
  601. }
  602. static int qlcnic_irq_test(struct net_device *netdev)
  603. {
  604. struct qlcnic_adapter *adapter = netdev_priv(netdev);
  605. int max_sds_rings = adapter->max_sds_rings;
  606. int ret;
  607. if (test_and_set_bit(__QLCNIC_RESETTING, &adapter->state))
  608. return -EIO;
  609. ret = qlcnic_diag_alloc_res(netdev, QLCNIC_INTERRUPT_TEST);
  610. if (ret)
  611. goto clear_it;
  612. adapter->diag_cnt = 0;
  613. ret = qlcnic_issue_cmd(adapter, adapter->ahw.pci_func,
  614. QLCHAL_VERSION, adapter->portnum, 0, 0, 0x00000011);
  615. if (ret)
  616. goto done;
  617. msleep(10);
  618. ret = !adapter->diag_cnt;
  619. done:
  620. qlcnic_diag_free_res(netdev, max_sds_rings);
  621. clear_it:
  622. adapter->max_sds_rings = max_sds_rings;
  623. clear_bit(__QLCNIC_RESETTING, &adapter->state);
  624. return ret;
  625. }
  626. static void
  627. qlcnic_diag_test(struct net_device *dev, struct ethtool_test *eth_test,
  628. u64 *data)
  629. {
  630. memset(data, 0, sizeof(u64) * QLCNIC_TEST_LEN);
  631. if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
  632. data[2] = qlcnic_irq_test(dev);
  633. if (data[2])
  634. eth_test->flags |= ETH_TEST_FL_FAILED;
  635. data[3] = qlcnic_loopback_test(dev);
  636. if (data[3])
  637. eth_test->flags |= ETH_TEST_FL_FAILED;
  638. }
  639. data[0] = qlcnic_reg_test(dev);
  640. if (data[0])
  641. eth_test->flags |= ETH_TEST_FL_FAILED;
  642. /* link test */
  643. data[1] = (u64) qlcnic_test_link(dev);
  644. if (data[1])
  645. eth_test->flags |= ETH_TEST_FL_FAILED;
  646. }
  647. static void
  648. qlcnic_get_strings(struct net_device *dev, u32 stringset, u8 * data)
  649. {
  650. int index;
  651. switch (stringset) {
  652. case ETH_SS_TEST:
  653. memcpy(data, *qlcnic_gstrings_test,
  654. QLCNIC_TEST_LEN * ETH_GSTRING_LEN);
  655. break;
  656. case ETH_SS_STATS:
  657. for (index = 0; index < QLCNIC_STATS_LEN; index++) {
  658. memcpy(data + index * ETH_GSTRING_LEN,
  659. qlcnic_gstrings_stats[index].stat_string,
  660. ETH_GSTRING_LEN);
  661. }
  662. break;
  663. }
  664. }
  665. static void
  666. qlcnic_get_ethtool_stats(struct net_device *dev,
  667. struct ethtool_stats *stats, u64 * data)
  668. {
  669. struct qlcnic_adapter *adapter = netdev_priv(dev);
  670. int index;
  671. for (index = 0; index < QLCNIC_STATS_LEN; index++) {
  672. char *p =
  673. (char *)adapter +
  674. qlcnic_gstrings_stats[index].stat_offset;
  675. data[index] =
  676. (qlcnic_gstrings_stats[index].sizeof_stat ==
  677. sizeof(u64)) ? *(u64 *)p:(*(u32 *)p);
  678. }
  679. }
  680. static u32 qlcnic_get_tx_csum(struct net_device *dev)
  681. {
  682. return dev->features & NETIF_F_IP_CSUM;
  683. }
  684. static u32 qlcnic_get_rx_csum(struct net_device *dev)
  685. {
  686. struct qlcnic_adapter *adapter = netdev_priv(dev);
  687. return adapter->rx_csum;
  688. }
  689. static int qlcnic_set_rx_csum(struct net_device *dev, u32 data)
  690. {
  691. struct qlcnic_adapter *adapter = netdev_priv(dev);
  692. adapter->rx_csum = !!data;
  693. return 0;
  694. }
  695. static u32 qlcnic_get_tso(struct net_device *dev)
  696. {
  697. return (dev->features & (NETIF_F_TSO | NETIF_F_TSO6)) != 0;
  698. }
  699. static int qlcnic_set_tso(struct net_device *dev, u32 data)
  700. {
  701. if (data)
  702. dev->features |= (NETIF_F_TSO | NETIF_F_TSO6);
  703. else
  704. dev->features &= ~(NETIF_F_TSO | NETIF_F_TSO6);
  705. return 0;
  706. }
  707. static int qlcnic_blink_led(struct net_device *dev, u32 val)
  708. {
  709. struct qlcnic_adapter *adapter = netdev_priv(dev);
  710. int ret;
  711. ret = qlcnic_config_led(adapter, 1, 0xf);
  712. if (ret) {
  713. dev_err(&adapter->pdev->dev,
  714. "Failed to set LED blink state.\n");
  715. return ret;
  716. }
  717. msleep_interruptible(val * 1000);
  718. ret = qlcnic_config_led(adapter, 0, 0xf);
  719. if (ret) {
  720. dev_err(&adapter->pdev->dev,
  721. "Failed to reset LED blink state.\n");
  722. return ret;
  723. }
  724. return 0;
  725. }
  726. static void
  727. qlcnic_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
  728. {
  729. struct qlcnic_adapter *adapter = netdev_priv(dev);
  730. u32 wol_cfg;
  731. wol->supported = 0;
  732. wol->wolopts = 0;
  733. wol_cfg = QLCRD32(adapter, QLCNIC_WOL_CONFIG_NV);
  734. if (wol_cfg & (1UL << adapter->portnum))
  735. wol->supported |= WAKE_MAGIC;
  736. wol_cfg = QLCRD32(adapter, QLCNIC_WOL_CONFIG);
  737. if (wol_cfg & (1UL << adapter->portnum))
  738. wol->wolopts |= WAKE_MAGIC;
  739. }
  740. static int
  741. qlcnic_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
  742. {
  743. struct qlcnic_adapter *adapter = netdev_priv(dev);
  744. u32 wol_cfg;
  745. if (wol->wolopts & ~WAKE_MAGIC)
  746. return -EOPNOTSUPP;
  747. wol_cfg = QLCRD32(adapter, QLCNIC_WOL_CONFIG_NV);
  748. if (!(wol_cfg & (1 << adapter->portnum)))
  749. return -EOPNOTSUPP;
  750. wol_cfg = QLCRD32(adapter, QLCNIC_WOL_CONFIG);
  751. if (wol->wolopts & WAKE_MAGIC)
  752. wol_cfg |= 1UL << adapter->portnum;
  753. else
  754. wol_cfg &= ~(1UL << adapter->portnum);
  755. QLCWR32(adapter, QLCNIC_WOL_CONFIG, wol_cfg);
  756. return 0;
  757. }
  758. /*
  759. * Set the coalescing parameters. Currently only normal is supported.
  760. * If rx_coalesce_usecs == 0 or rx_max_coalesced_frames == 0 then set the
  761. * firmware coalescing to default.
  762. */
  763. static int qlcnic_set_intr_coalesce(struct net_device *netdev,
  764. struct ethtool_coalesce *ethcoal)
  765. {
  766. struct qlcnic_adapter *adapter = netdev_priv(netdev);
  767. if (adapter->is_up != QLCNIC_ADAPTER_UP_MAGIC)
  768. return -EINVAL;
  769. /*
  770. * Return Error if unsupported values or
  771. * unsupported parameters are set.
  772. */
  773. if (ethcoal->rx_coalesce_usecs > 0xffff ||
  774. ethcoal->rx_max_coalesced_frames > 0xffff ||
  775. ethcoal->tx_coalesce_usecs > 0xffff ||
  776. ethcoal->tx_max_coalesced_frames > 0xffff ||
  777. ethcoal->rx_coalesce_usecs_irq ||
  778. ethcoal->rx_max_coalesced_frames_irq ||
  779. ethcoal->tx_coalesce_usecs_irq ||
  780. ethcoal->tx_max_coalesced_frames_irq ||
  781. ethcoal->stats_block_coalesce_usecs ||
  782. ethcoal->use_adaptive_rx_coalesce ||
  783. ethcoal->use_adaptive_tx_coalesce ||
  784. ethcoal->pkt_rate_low ||
  785. ethcoal->rx_coalesce_usecs_low ||
  786. ethcoal->rx_max_coalesced_frames_low ||
  787. ethcoal->tx_coalesce_usecs_low ||
  788. ethcoal->tx_max_coalesced_frames_low ||
  789. ethcoal->pkt_rate_high ||
  790. ethcoal->rx_coalesce_usecs_high ||
  791. ethcoal->rx_max_coalesced_frames_high ||
  792. ethcoal->tx_coalesce_usecs_high ||
  793. ethcoal->tx_max_coalesced_frames_high)
  794. return -EINVAL;
  795. if (!ethcoal->rx_coalesce_usecs ||
  796. !ethcoal->rx_max_coalesced_frames) {
  797. adapter->coal.flags = QLCNIC_INTR_DEFAULT;
  798. adapter->coal.normal.data.rx_time_us =
  799. QLCNIC_DEFAULT_INTR_COALESCE_RX_TIME_US;
  800. adapter->coal.normal.data.rx_packets =
  801. QLCNIC_DEFAULT_INTR_COALESCE_RX_PACKETS;
  802. } else {
  803. adapter->coal.flags = 0;
  804. adapter->coal.normal.data.rx_time_us =
  805. ethcoal->rx_coalesce_usecs;
  806. adapter->coal.normal.data.rx_packets =
  807. ethcoal->rx_max_coalesced_frames;
  808. }
  809. adapter->coal.normal.data.tx_time_us = ethcoal->tx_coalesce_usecs;
  810. adapter->coal.normal.data.tx_packets =
  811. ethcoal->tx_max_coalesced_frames;
  812. qlcnic_config_intr_coalesce(adapter);
  813. return 0;
  814. }
  815. static int qlcnic_get_intr_coalesce(struct net_device *netdev,
  816. struct ethtool_coalesce *ethcoal)
  817. {
  818. struct qlcnic_adapter *adapter = netdev_priv(netdev);
  819. if (adapter->is_up != QLCNIC_ADAPTER_UP_MAGIC)
  820. return -EINVAL;
  821. ethcoal->rx_coalesce_usecs = adapter->coal.normal.data.rx_time_us;
  822. ethcoal->tx_coalesce_usecs = adapter->coal.normal.data.tx_time_us;
  823. ethcoal->rx_max_coalesced_frames =
  824. adapter->coal.normal.data.rx_packets;
  825. ethcoal->tx_max_coalesced_frames =
  826. adapter->coal.normal.data.tx_packets;
  827. return 0;
  828. }
  829. static int qlcnic_set_flags(struct net_device *netdev, u32 data)
  830. {
  831. struct qlcnic_adapter *adapter = netdev_priv(netdev);
  832. int hw_lro;
  833. if (!(adapter->capabilities & QLCNIC_FW_CAPABILITY_HW_LRO))
  834. return -EINVAL;
  835. ethtool_op_set_flags(netdev, data);
  836. hw_lro = (data & ETH_FLAG_LRO) ? QLCNIC_LRO_ENABLED : 0;
  837. if (qlcnic_config_hw_lro(adapter, hw_lro))
  838. return -EIO;
  839. if ((hw_lro == 0) && qlcnic_send_lro_cleanup(adapter))
  840. return -EIO;
  841. return 0;
  842. }
  843. const struct ethtool_ops qlcnic_ethtool_ops = {
  844. .get_settings = qlcnic_get_settings,
  845. .set_settings = qlcnic_set_settings,
  846. .get_drvinfo = qlcnic_get_drvinfo,
  847. .get_regs_len = qlcnic_get_regs_len,
  848. .get_regs = qlcnic_get_regs,
  849. .get_link = ethtool_op_get_link,
  850. .get_eeprom_len = qlcnic_get_eeprom_len,
  851. .get_eeprom = qlcnic_get_eeprom,
  852. .get_ringparam = qlcnic_get_ringparam,
  853. .set_ringparam = qlcnic_set_ringparam,
  854. .get_pauseparam = qlcnic_get_pauseparam,
  855. .set_pauseparam = qlcnic_set_pauseparam,
  856. .get_tx_csum = qlcnic_get_tx_csum,
  857. .set_tx_csum = ethtool_op_set_tx_csum,
  858. .set_sg = ethtool_op_set_sg,
  859. .get_tso = qlcnic_get_tso,
  860. .set_tso = qlcnic_set_tso,
  861. .get_wol = qlcnic_get_wol,
  862. .set_wol = qlcnic_set_wol,
  863. .self_test = qlcnic_diag_test,
  864. .get_strings = qlcnic_get_strings,
  865. .get_ethtool_stats = qlcnic_get_ethtool_stats,
  866. .get_sset_count = qlcnic_get_sset_count,
  867. .get_rx_csum = qlcnic_get_rx_csum,
  868. .set_rx_csum = qlcnic_set_rx_csum,
  869. .get_coalesce = qlcnic_get_intr_coalesce,
  870. .set_coalesce = qlcnic_set_intr_coalesce,
  871. .get_flags = ethtool_op_get_flags,
  872. .set_flags = qlcnic_set_flags,
  873. .phys_id = qlcnic_blink_led,
  874. };