enic_res.c 9.3 KB

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  1. /*
  2. * Copyright 2008 Cisco Systems, Inc. All rights reserved.
  3. * Copyright 2007 Nuova Systems, Inc. All rights reserved.
  4. *
  5. * This program is free software; you may redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; version 2 of the License.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  10. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  11. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  12. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  13. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  14. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  15. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  16. * SOFTWARE.
  17. *
  18. */
  19. #include <linux/kernel.h>
  20. #include <linux/errno.h>
  21. #include <linux/types.h>
  22. #include <linux/pci.h>
  23. #include <linux/netdevice.h>
  24. #include "wq_enet_desc.h"
  25. #include "rq_enet_desc.h"
  26. #include "cq_enet_desc.h"
  27. #include "vnic_resource.h"
  28. #include "vnic_enet.h"
  29. #include "vnic_dev.h"
  30. #include "vnic_wq.h"
  31. #include "vnic_rq.h"
  32. #include "vnic_cq.h"
  33. #include "vnic_intr.h"
  34. #include "vnic_stats.h"
  35. #include "vnic_nic.h"
  36. #include "vnic_rss.h"
  37. #include "enic_res.h"
  38. #include "enic.h"
  39. int enic_get_vnic_config(struct enic *enic)
  40. {
  41. struct vnic_enet_config *c = &enic->config;
  42. int err;
  43. err = vnic_dev_mac_addr(enic->vdev, enic->mac_addr);
  44. if (err) {
  45. printk(KERN_ERR PFX "Error getting MAC addr, %d\n", err);
  46. return err;
  47. }
  48. #define GET_CONFIG(m) \
  49. do { \
  50. err = vnic_dev_spec(enic->vdev, \
  51. offsetof(struct vnic_enet_config, m), \
  52. sizeof(c->m), &c->m); \
  53. if (err) { \
  54. printk(KERN_ERR PFX \
  55. "Error getting %s, %d\n", #m, err); \
  56. return err; \
  57. } \
  58. } while (0)
  59. GET_CONFIG(flags);
  60. GET_CONFIG(wq_desc_count);
  61. GET_CONFIG(rq_desc_count);
  62. GET_CONFIG(mtu);
  63. GET_CONFIG(intr_timer_type);
  64. GET_CONFIG(intr_mode);
  65. GET_CONFIG(intr_timer_usec);
  66. c->wq_desc_count =
  67. min_t(u32, ENIC_MAX_WQ_DESCS,
  68. max_t(u32, ENIC_MIN_WQ_DESCS,
  69. c->wq_desc_count));
  70. c->wq_desc_count &= 0xffffffe0; /* must be aligned to groups of 32 */
  71. c->rq_desc_count =
  72. min_t(u32, ENIC_MAX_RQ_DESCS,
  73. max_t(u32, ENIC_MIN_RQ_DESCS,
  74. c->rq_desc_count));
  75. c->rq_desc_count &= 0xffffffe0; /* must be aligned to groups of 32 */
  76. if (c->mtu == 0)
  77. c->mtu = 1500;
  78. c->mtu = min_t(u16, ENIC_MAX_MTU,
  79. max_t(u16, ENIC_MIN_MTU,
  80. c->mtu));
  81. c->intr_timer_usec = min_t(u32,
  82. INTR_COALESCE_HW_TO_USEC(VNIC_INTR_TIMER_MAX),
  83. c->intr_timer_usec);
  84. printk(KERN_INFO PFX "vNIC MAC addr %pM wq/rq %d/%d\n",
  85. enic->mac_addr, c->wq_desc_count, c->rq_desc_count);
  86. printk(KERN_INFO PFX "vNIC mtu %d csum tx/rx %d/%d tso/lro %d/%d "
  87. "intr timer %d usec\n",
  88. c->mtu, ENIC_SETTING(enic, TXCSUM),
  89. ENIC_SETTING(enic, RXCSUM), ENIC_SETTING(enic, TSO),
  90. ENIC_SETTING(enic, LRO), c->intr_timer_usec);
  91. return 0;
  92. }
  93. void enic_add_station_addr(struct enic *enic)
  94. {
  95. vnic_dev_add_addr(enic->vdev, enic->mac_addr);
  96. }
  97. void enic_add_multicast_addr(struct enic *enic, u8 *addr)
  98. {
  99. vnic_dev_add_addr(enic->vdev, addr);
  100. }
  101. void enic_del_multicast_addr(struct enic *enic, u8 *addr)
  102. {
  103. vnic_dev_del_addr(enic->vdev, addr);
  104. }
  105. void enic_add_vlan(struct enic *enic, u16 vlanid)
  106. {
  107. u64 a0 = vlanid, a1 = 0;
  108. int wait = 1000;
  109. int err;
  110. err = vnic_dev_cmd(enic->vdev, CMD_VLAN_ADD, &a0, &a1, wait);
  111. if (err)
  112. printk(KERN_ERR PFX "Can't add vlan id, %d\n", err);
  113. }
  114. void enic_del_vlan(struct enic *enic, u16 vlanid)
  115. {
  116. u64 a0 = vlanid, a1 = 0;
  117. int wait = 1000;
  118. int err;
  119. err = vnic_dev_cmd(enic->vdev, CMD_VLAN_DEL, &a0, &a1, wait);
  120. if (err)
  121. printk(KERN_ERR PFX "Can't delete vlan id, %d\n", err);
  122. }
  123. int enic_set_nic_cfg(struct enic *enic, u8 rss_default_cpu, u8 rss_hash_type,
  124. u8 rss_hash_bits, u8 rss_base_cpu, u8 rss_enable, u8 tso_ipid_split_en,
  125. u8 ig_vlan_strip_en)
  126. {
  127. u64 a0, a1;
  128. u32 nic_cfg;
  129. int wait = 1000;
  130. vnic_set_nic_cfg(&nic_cfg, rss_default_cpu,
  131. rss_hash_type, rss_hash_bits, rss_base_cpu,
  132. rss_enable, tso_ipid_split_en, ig_vlan_strip_en);
  133. a0 = nic_cfg;
  134. a1 = 0;
  135. return vnic_dev_cmd(enic->vdev, CMD_NIC_CFG, &a0, &a1, wait);
  136. }
  137. int enic_set_rss_key(struct enic *enic, dma_addr_t key_pa, u64 len)
  138. {
  139. u64 a0 = (u64)key_pa, a1 = len;
  140. int wait = 1000;
  141. return vnic_dev_cmd(enic->vdev, CMD_RSS_KEY, &a0, &a1, wait);
  142. }
  143. int enic_set_rss_cpu(struct enic *enic, dma_addr_t cpu_pa, u64 len)
  144. {
  145. u64 a0 = (u64)cpu_pa, a1 = len;
  146. int wait = 1000;
  147. return vnic_dev_cmd(enic->vdev, CMD_RSS_CPU, &a0, &a1, wait);
  148. }
  149. void enic_free_vnic_resources(struct enic *enic)
  150. {
  151. unsigned int i;
  152. for (i = 0; i < enic->wq_count; i++)
  153. vnic_wq_free(&enic->wq[i]);
  154. for (i = 0; i < enic->rq_count; i++)
  155. vnic_rq_free(&enic->rq[i]);
  156. for (i = 0; i < enic->cq_count; i++)
  157. vnic_cq_free(&enic->cq[i]);
  158. for (i = 0; i < enic->intr_count; i++)
  159. vnic_intr_free(&enic->intr[i]);
  160. }
  161. void enic_get_res_counts(struct enic *enic)
  162. {
  163. enic->wq_count = min_t(int,
  164. vnic_dev_get_res_count(enic->vdev, RES_TYPE_WQ),
  165. ENIC_WQ_MAX);
  166. enic->rq_count = min_t(int,
  167. vnic_dev_get_res_count(enic->vdev, RES_TYPE_RQ),
  168. ENIC_RQ_MAX);
  169. enic->cq_count = min_t(int,
  170. vnic_dev_get_res_count(enic->vdev, RES_TYPE_CQ),
  171. ENIC_CQ_MAX);
  172. enic->intr_count = min_t(int,
  173. vnic_dev_get_res_count(enic->vdev, RES_TYPE_INTR_CTRL),
  174. ENIC_INTR_MAX);
  175. printk(KERN_INFO PFX "vNIC resources avail: "
  176. "wq %d rq %d cq %d intr %d\n",
  177. enic->wq_count, enic->rq_count,
  178. enic->cq_count, enic->intr_count);
  179. }
  180. void enic_init_vnic_resources(struct enic *enic)
  181. {
  182. enum vnic_dev_intr_mode intr_mode;
  183. unsigned int mask_on_assertion;
  184. unsigned int interrupt_offset;
  185. unsigned int error_interrupt_enable;
  186. unsigned int error_interrupt_offset;
  187. unsigned int cq_index;
  188. unsigned int i;
  189. intr_mode = vnic_dev_get_intr_mode(enic->vdev);
  190. /* Init RQ/WQ resources.
  191. *
  192. * RQ[0 - n-1] point to CQ[0 - n-1]
  193. * WQ[0 - m-1] point to CQ[n - n+m-1]
  194. *
  195. * Error interrupt is not enabled for MSI.
  196. */
  197. switch (intr_mode) {
  198. case VNIC_DEV_INTR_MODE_INTX:
  199. case VNIC_DEV_INTR_MODE_MSIX:
  200. error_interrupt_enable = 1;
  201. error_interrupt_offset = enic->intr_count - 2;
  202. break;
  203. default:
  204. error_interrupt_enable = 0;
  205. error_interrupt_offset = 0;
  206. break;
  207. }
  208. for (i = 0; i < enic->rq_count; i++) {
  209. cq_index = i;
  210. vnic_rq_init(&enic->rq[i],
  211. cq_index,
  212. error_interrupt_enable,
  213. error_interrupt_offset);
  214. }
  215. for (i = 0; i < enic->wq_count; i++) {
  216. cq_index = enic->rq_count + i;
  217. vnic_wq_init(&enic->wq[i],
  218. cq_index,
  219. error_interrupt_enable,
  220. error_interrupt_offset);
  221. }
  222. /* Init CQ resources
  223. *
  224. * CQ[0 - n+m-1] point to INTR[0] for INTx, MSI
  225. * CQ[0 - n+m-1] point to INTR[0 - n+m-1] for MSI-X
  226. */
  227. for (i = 0; i < enic->cq_count; i++) {
  228. switch (intr_mode) {
  229. case VNIC_DEV_INTR_MODE_MSIX:
  230. interrupt_offset = i;
  231. break;
  232. default:
  233. interrupt_offset = 0;
  234. break;
  235. }
  236. vnic_cq_init(&enic->cq[i],
  237. 0 /* flow_control_enable */,
  238. 1 /* color_enable */,
  239. 0 /* cq_head */,
  240. 0 /* cq_tail */,
  241. 1 /* cq_tail_color */,
  242. 1 /* interrupt_enable */,
  243. 1 /* cq_entry_enable */,
  244. 0 /* cq_message_enable */,
  245. interrupt_offset,
  246. 0 /* cq_message_addr */);
  247. }
  248. /* Init INTR resources
  249. *
  250. * mask_on_assertion is not used for INTx due to the level-
  251. * triggered nature of INTx
  252. */
  253. switch (intr_mode) {
  254. case VNIC_DEV_INTR_MODE_MSI:
  255. case VNIC_DEV_INTR_MODE_MSIX:
  256. mask_on_assertion = 1;
  257. break;
  258. default:
  259. mask_on_assertion = 0;
  260. break;
  261. }
  262. for (i = 0; i < enic->intr_count; i++) {
  263. vnic_intr_init(&enic->intr[i],
  264. INTR_COALESCE_USEC_TO_HW(enic->config.intr_timer_usec),
  265. enic->config.intr_timer_type,
  266. mask_on_assertion);
  267. }
  268. /* Clear LIF stats
  269. */
  270. vnic_dev_stats_clear(enic->vdev);
  271. }
  272. int enic_alloc_vnic_resources(struct enic *enic)
  273. {
  274. enum vnic_dev_intr_mode intr_mode;
  275. unsigned int i;
  276. int err;
  277. intr_mode = vnic_dev_get_intr_mode(enic->vdev);
  278. printk(KERN_INFO PFX "vNIC resources used: "
  279. "wq %d rq %d cq %d intr %d intr mode %s\n",
  280. enic->wq_count, enic->rq_count,
  281. enic->cq_count, enic->intr_count,
  282. intr_mode == VNIC_DEV_INTR_MODE_INTX ? "legacy PCI INTx" :
  283. intr_mode == VNIC_DEV_INTR_MODE_MSI ? "MSI" :
  284. intr_mode == VNIC_DEV_INTR_MODE_MSIX ? "MSI-X" :
  285. "unknown"
  286. );
  287. /* Allocate queue resources
  288. */
  289. for (i = 0; i < enic->wq_count; i++) {
  290. err = vnic_wq_alloc(enic->vdev, &enic->wq[i], i,
  291. enic->config.wq_desc_count,
  292. sizeof(struct wq_enet_desc));
  293. if (err)
  294. goto err_out_cleanup;
  295. }
  296. for (i = 0; i < enic->rq_count; i++) {
  297. err = vnic_rq_alloc(enic->vdev, &enic->rq[i], i,
  298. enic->config.rq_desc_count,
  299. sizeof(struct rq_enet_desc));
  300. if (err)
  301. goto err_out_cleanup;
  302. }
  303. for (i = 0; i < enic->cq_count; i++) {
  304. if (i < enic->rq_count)
  305. err = vnic_cq_alloc(enic->vdev, &enic->cq[i], i,
  306. enic->config.rq_desc_count,
  307. sizeof(struct cq_enet_rq_desc));
  308. else
  309. err = vnic_cq_alloc(enic->vdev, &enic->cq[i], i,
  310. enic->config.wq_desc_count,
  311. sizeof(struct cq_enet_wq_desc));
  312. if (err)
  313. goto err_out_cleanup;
  314. }
  315. for (i = 0; i < enic->intr_count; i++) {
  316. err = vnic_intr_alloc(enic->vdev, &enic->intr[i], i);
  317. if (err)
  318. goto err_out_cleanup;
  319. }
  320. /* Hook remaining resource
  321. */
  322. enic->legacy_pba = vnic_dev_get_res(enic->vdev,
  323. RES_TYPE_INTR_PBA_LEGACY, 0);
  324. if (!enic->legacy_pba && intr_mode == VNIC_DEV_INTR_MODE_INTX) {
  325. printk(KERN_ERR PFX "Failed to hook legacy pba resource\n");
  326. err = -ENODEV;
  327. goto err_out_cleanup;
  328. }
  329. return 0;
  330. err_out_cleanup:
  331. enic_free_vnic_resources(enic);
  332. return err;
  333. }