mx1_camera.c 22 KB

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  1. /*
  2. * V4L2 Driver for i.MXL/i.MXL camera (CSI) host
  3. *
  4. * Copyright (C) 2008, Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
  5. * Copyright (C) 2009, Darius Augulis <augulis.darius@gmail.com>
  6. *
  7. * Based on PXA SoC camera driver
  8. * Copyright (C) 2006, Sascha Hauer, Pengutronix
  9. * Copyright (C) 2008, Guennadi Liakhovetski <kernel@pengutronix.de>
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License version 2 as
  13. * published by the Free Software Foundation.
  14. */
  15. #include <linux/clk.h>
  16. #include <linux/delay.h>
  17. #include <linux/device.h>
  18. #include <linux/dma-mapping.h>
  19. #include <linux/errno.h>
  20. #include <linux/fs.h>
  21. #include <linux/init.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/io.h>
  24. #include <linux/kernel.h>
  25. #include <linux/mm.h>
  26. #include <linux/module.h>
  27. #include <linux/moduleparam.h>
  28. #include <linux/mutex.h>
  29. #include <linux/platform_device.h>
  30. #include <linux/sched.h>
  31. #include <linux/slab.h>
  32. #include <linux/time.h>
  33. #include <linux/version.h>
  34. #include <linux/videodev2.h>
  35. #include <media/soc_camera.h>
  36. #include <media/v4l2-common.h>
  37. #include <media/v4l2-dev.h>
  38. #include <media/videobuf-dma-contig.h>
  39. #include <media/soc_mediabus.h>
  40. #include <asm/dma.h>
  41. #include <asm/fiq.h>
  42. #include <mach/dma-mx1-mx2.h>
  43. #include <mach/hardware.h>
  44. #include <mach/mx1_camera.h>
  45. /*
  46. * CSI registers
  47. */
  48. #define DMA_CCR(x) (0x8c + ((x) << 6)) /* Control Registers */
  49. #define DMA_DIMR 0x08 /* Interrupt mask Register */
  50. #define CSICR1 0x00 /* CSI Control Register 1 */
  51. #define CSISR 0x08 /* CSI Status Register */
  52. #define CSIRXR 0x10 /* CSI RxFIFO Register */
  53. #define CSICR1_RXFF_LEVEL(x) (((x) & 0x3) << 19)
  54. #define CSICR1_SOF_POL (1 << 17)
  55. #define CSICR1_SOF_INTEN (1 << 16)
  56. #define CSICR1_MCLKDIV(x) (((x) & 0xf) << 12)
  57. #define CSICR1_MCLKEN (1 << 9)
  58. #define CSICR1_FCC (1 << 8)
  59. #define CSICR1_BIG_ENDIAN (1 << 7)
  60. #define CSICR1_CLR_RXFIFO (1 << 5)
  61. #define CSICR1_GCLK_MODE (1 << 4)
  62. #define CSICR1_DATA_POL (1 << 2)
  63. #define CSICR1_REDGE (1 << 1)
  64. #define CSICR1_EN (1 << 0)
  65. #define CSISR_SFF_OR_INT (1 << 25)
  66. #define CSISR_RFF_OR_INT (1 << 24)
  67. #define CSISR_STATFF_INT (1 << 21)
  68. #define CSISR_RXFF_INT (1 << 18)
  69. #define CSISR_SOF_INT (1 << 16)
  70. #define CSISR_DRDY (1 << 0)
  71. #define VERSION_CODE KERNEL_VERSION(0, 0, 1)
  72. #define DRIVER_NAME "mx1-camera"
  73. #define CSI_IRQ_MASK (CSISR_SFF_OR_INT | CSISR_RFF_OR_INT | \
  74. CSISR_STATFF_INT | CSISR_RXFF_INT | CSISR_SOF_INT)
  75. #define CSI_BUS_FLAGS (SOCAM_MASTER | SOCAM_HSYNC_ACTIVE_HIGH | \
  76. SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_VSYNC_ACTIVE_LOW | \
  77. SOCAM_PCLK_SAMPLE_RISING | SOCAM_PCLK_SAMPLE_FALLING | \
  78. SOCAM_DATA_ACTIVE_HIGH | SOCAM_DATA_ACTIVE_LOW | \
  79. SOCAM_DATAWIDTH_8)
  80. #define MAX_VIDEO_MEM 16 /* Video memory limit in megabytes */
  81. /*
  82. * Structures
  83. */
  84. /* buffer for one video frame */
  85. struct mx1_buffer {
  86. /* common v4l buffer stuff -- must be first */
  87. struct videobuf_buffer vb;
  88. enum v4l2_mbus_pixelcode code;
  89. int inwork;
  90. };
  91. /*
  92. * i.MX1/i.MXL is only supposed to handle one camera on its Camera Sensor
  93. * Interface. If anyone ever builds hardware to enable more than
  94. * one camera, they will have to modify this driver too
  95. */
  96. struct mx1_camera_dev {
  97. struct soc_camera_host soc_host;
  98. struct soc_camera_device *icd;
  99. struct mx1_camera_pdata *pdata;
  100. struct mx1_buffer *active;
  101. struct resource *res;
  102. struct clk *clk;
  103. struct list_head capture;
  104. void __iomem *base;
  105. int dma_chan;
  106. unsigned int irq;
  107. unsigned long mclk;
  108. spinlock_t lock;
  109. };
  110. /*
  111. * Videobuf operations
  112. */
  113. static int mx1_videobuf_setup(struct videobuf_queue *vq, unsigned int *count,
  114. unsigned int *size)
  115. {
  116. struct soc_camera_device *icd = vq->priv_data;
  117. int bytes_per_line = soc_mbus_bytes_per_line(icd->user_width,
  118. icd->current_fmt->host_fmt);
  119. if (bytes_per_line < 0)
  120. return bytes_per_line;
  121. *size = bytes_per_line * icd->user_height;
  122. if (!*count)
  123. *count = 32;
  124. while (*size * *count > MAX_VIDEO_MEM * 1024 * 1024)
  125. (*count)--;
  126. dev_dbg(icd->dev.parent, "count=%d, size=%d\n", *count, *size);
  127. return 0;
  128. }
  129. static void free_buffer(struct videobuf_queue *vq, struct mx1_buffer *buf)
  130. {
  131. struct soc_camera_device *icd = vq->priv_data;
  132. struct videobuf_buffer *vb = &buf->vb;
  133. BUG_ON(in_interrupt());
  134. dev_dbg(icd->dev.parent, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
  135. vb, vb->baddr, vb->bsize);
  136. /*
  137. * This waits until this buffer is out of danger, i.e., until it is no
  138. * longer in STATE_QUEUED or STATE_ACTIVE
  139. */
  140. videobuf_waiton(vb, 0, 0);
  141. videobuf_dma_contig_free(vq, vb);
  142. vb->state = VIDEOBUF_NEEDS_INIT;
  143. }
  144. static int mx1_videobuf_prepare(struct videobuf_queue *vq,
  145. struct videobuf_buffer *vb, enum v4l2_field field)
  146. {
  147. struct soc_camera_device *icd = vq->priv_data;
  148. struct mx1_buffer *buf = container_of(vb, struct mx1_buffer, vb);
  149. int ret;
  150. int bytes_per_line = soc_mbus_bytes_per_line(icd->user_width,
  151. icd->current_fmt->host_fmt);
  152. if (bytes_per_line < 0)
  153. return bytes_per_line;
  154. dev_dbg(icd->dev.parent, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
  155. vb, vb->baddr, vb->bsize);
  156. /* Added list head initialization on alloc */
  157. WARN_ON(!list_empty(&vb->queue));
  158. BUG_ON(NULL == icd->current_fmt);
  159. /*
  160. * I think, in buf_prepare you only have to protect global data,
  161. * the actual buffer is yours
  162. */
  163. buf->inwork = 1;
  164. if (buf->code != icd->current_fmt->code ||
  165. vb->width != icd->user_width ||
  166. vb->height != icd->user_height ||
  167. vb->field != field) {
  168. buf->code = icd->current_fmt->code;
  169. vb->width = icd->user_width;
  170. vb->height = icd->user_height;
  171. vb->field = field;
  172. vb->state = VIDEOBUF_NEEDS_INIT;
  173. }
  174. vb->size = bytes_per_line * vb->height;
  175. if (0 != vb->baddr && vb->bsize < vb->size) {
  176. ret = -EINVAL;
  177. goto out;
  178. }
  179. if (vb->state == VIDEOBUF_NEEDS_INIT) {
  180. ret = videobuf_iolock(vq, vb, NULL);
  181. if (ret)
  182. goto fail;
  183. vb->state = VIDEOBUF_PREPARED;
  184. }
  185. buf->inwork = 0;
  186. return 0;
  187. fail:
  188. free_buffer(vq, buf);
  189. out:
  190. buf->inwork = 0;
  191. return ret;
  192. }
  193. static int mx1_camera_setup_dma(struct mx1_camera_dev *pcdev)
  194. {
  195. struct videobuf_buffer *vbuf = &pcdev->active->vb;
  196. struct device *dev = pcdev->icd->dev.parent;
  197. int ret;
  198. if (unlikely(!pcdev->active)) {
  199. dev_err(dev, "DMA End IRQ with no active buffer\n");
  200. return -EFAULT;
  201. }
  202. /* setup sg list for future DMA */
  203. ret = imx_dma_setup_single(pcdev->dma_chan,
  204. videobuf_to_dma_contig(vbuf),
  205. vbuf->size, pcdev->res->start +
  206. CSIRXR, DMA_MODE_READ);
  207. if (unlikely(ret))
  208. dev_err(dev, "Failed to setup DMA sg list\n");
  209. return ret;
  210. }
  211. /* Called under spinlock_irqsave(&pcdev->lock, ...) */
  212. static void mx1_videobuf_queue(struct videobuf_queue *vq,
  213. struct videobuf_buffer *vb)
  214. {
  215. struct soc_camera_device *icd = vq->priv_data;
  216. struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
  217. struct mx1_camera_dev *pcdev = ici->priv;
  218. struct mx1_buffer *buf = container_of(vb, struct mx1_buffer, vb);
  219. dev_dbg(icd->dev.parent, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
  220. vb, vb->baddr, vb->bsize);
  221. list_add_tail(&vb->queue, &pcdev->capture);
  222. vb->state = VIDEOBUF_ACTIVE;
  223. if (!pcdev->active) {
  224. pcdev->active = buf;
  225. /* setup sg list for future DMA */
  226. if (!mx1_camera_setup_dma(pcdev)) {
  227. unsigned int temp;
  228. /* enable SOF irq */
  229. temp = __raw_readl(pcdev->base + CSICR1) |
  230. CSICR1_SOF_INTEN;
  231. __raw_writel(temp, pcdev->base + CSICR1);
  232. }
  233. }
  234. }
  235. static void mx1_videobuf_release(struct videobuf_queue *vq,
  236. struct videobuf_buffer *vb)
  237. {
  238. struct mx1_buffer *buf = container_of(vb, struct mx1_buffer, vb);
  239. #ifdef DEBUG
  240. struct soc_camera_device *icd = vq->priv_data;
  241. struct device *dev = icd->dev.parent;
  242. dev_dbg(dev, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
  243. vb, vb->baddr, vb->bsize);
  244. switch (vb->state) {
  245. case VIDEOBUF_ACTIVE:
  246. dev_dbg(dev, "%s (active)\n", __func__);
  247. break;
  248. case VIDEOBUF_QUEUED:
  249. dev_dbg(dev, "%s (queued)\n", __func__);
  250. break;
  251. case VIDEOBUF_PREPARED:
  252. dev_dbg(dev, "%s (prepared)\n", __func__);
  253. break;
  254. default:
  255. dev_dbg(dev, "%s (unknown)\n", __func__);
  256. break;
  257. }
  258. #endif
  259. free_buffer(vq, buf);
  260. }
  261. static void mx1_camera_wakeup(struct mx1_camera_dev *pcdev,
  262. struct videobuf_buffer *vb,
  263. struct mx1_buffer *buf)
  264. {
  265. /* _init is used to debug races, see comment in mx1_camera_reqbufs() */
  266. list_del_init(&vb->queue);
  267. vb->state = VIDEOBUF_DONE;
  268. do_gettimeofday(&vb->ts);
  269. vb->field_count++;
  270. wake_up(&vb->done);
  271. if (list_empty(&pcdev->capture)) {
  272. pcdev->active = NULL;
  273. return;
  274. }
  275. pcdev->active = list_entry(pcdev->capture.next,
  276. struct mx1_buffer, vb.queue);
  277. /* setup sg list for future DMA */
  278. if (likely(!mx1_camera_setup_dma(pcdev))) {
  279. unsigned int temp;
  280. /* enable SOF irq */
  281. temp = __raw_readl(pcdev->base + CSICR1) | CSICR1_SOF_INTEN;
  282. __raw_writel(temp, pcdev->base + CSICR1);
  283. }
  284. }
  285. static void mx1_camera_dma_irq(int channel, void *data)
  286. {
  287. struct mx1_camera_dev *pcdev = data;
  288. struct device *dev = pcdev->icd->dev.parent;
  289. struct mx1_buffer *buf;
  290. struct videobuf_buffer *vb;
  291. unsigned long flags;
  292. spin_lock_irqsave(&pcdev->lock, flags);
  293. imx_dma_disable(channel);
  294. if (unlikely(!pcdev->active)) {
  295. dev_err(dev, "DMA End IRQ with no active buffer\n");
  296. goto out;
  297. }
  298. vb = &pcdev->active->vb;
  299. buf = container_of(vb, struct mx1_buffer, vb);
  300. WARN_ON(buf->inwork || list_empty(&vb->queue));
  301. dev_dbg(dev, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
  302. vb, vb->baddr, vb->bsize);
  303. mx1_camera_wakeup(pcdev, vb, buf);
  304. out:
  305. spin_unlock_irqrestore(&pcdev->lock, flags);
  306. }
  307. static struct videobuf_queue_ops mx1_videobuf_ops = {
  308. .buf_setup = mx1_videobuf_setup,
  309. .buf_prepare = mx1_videobuf_prepare,
  310. .buf_queue = mx1_videobuf_queue,
  311. .buf_release = mx1_videobuf_release,
  312. };
  313. static void mx1_camera_init_videobuf(struct videobuf_queue *q,
  314. struct soc_camera_device *icd)
  315. {
  316. struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
  317. struct mx1_camera_dev *pcdev = ici->priv;
  318. videobuf_queue_dma_contig_init(q, &mx1_videobuf_ops, icd->dev.parent,
  319. &pcdev->lock,
  320. V4L2_BUF_TYPE_VIDEO_CAPTURE,
  321. V4L2_FIELD_NONE,
  322. sizeof(struct mx1_buffer), icd);
  323. }
  324. static int mclk_get_divisor(struct mx1_camera_dev *pcdev)
  325. {
  326. unsigned int mclk = pcdev->mclk;
  327. unsigned long div;
  328. unsigned long lcdclk;
  329. lcdclk = clk_get_rate(pcdev->clk);
  330. /*
  331. * We verify platform_mclk_10khz != 0, so if anyone breaks it, here
  332. * they get a nice Oops
  333. */
  334. div = (lcdclk + 2 * mclk - 1) / (2 * mclk) - 1;
  335. dev_dbg(pcdev->icd->dev.parent,
  336. "System clock %lukHz, target freq %dkHz, divisor %lu\n",
  337. lcdclk / 1000, mclk / 1000, div);
  338. return div;
  339. }
  340. static void mx1_camera_activate(struct mx1_camera_dev *pcdev)
  341. {
  342. unsigned int csicr1 = CSICR1_EN;
  343. dev_dbg(pcdev->icd->dev.parent, "Activate device\n");
  344. clk_enable(pcdev->clk);
  345. /* enable CSI before doing anything else */
  346. __raw_writel(csicr1, pcdev->base + CSICR1);
  347. csicr1 |= CSICR1_MCLKEN | CSICR1_FCC | CSICR1_GCLK_MODE;
  348. csicr1 |= CSICR1_MCLKDIV(mclk_get_divisor(pcdev));
  349. csicr1 |= CSICR1_RXFF_LEVEL(2); /* 16 words */
  350. __raw_writel(csicr1, pcdev->base + CSICR1);
  351. }
  352. static void mx1_camera_deactivate(struct mx1_camera_dev *pcdev)
  353. {
  354. dev_dbg(pcdev->icd->dev.parent, "Deactivate device\n");
  355. /* Disable all CSI interface */
  356. __raw_writel(0x00, pcdev->base + CSICR1);
  357. clk_disable(pcdev->clk);
  358. }
  359. /*
  360. * The following two functions absolutely depend on the fact, that
  361. * there can be only one camera on i.MX1/i.MXL camera sensor interface
  362. */
  363. static int mx1_camera_add_device(struct soc_camera_device *icd)
  364. {
  365. struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
  366. struct mx1_camera_dev *pcdev = ici->priv;
  367. int ret;
  368. if (pcdev->icd) {
  369. ret = -EBUSY;
  370. goto ebusy;
  371. }
  372. dev_info(icd->dev.parent, "MX1 Camera driver attached to camera %d\n",
  373. icd->devnum);
  374. mx1_camera_activate(pcdev);
  375. pcdev->icd = icd;
  376. ebusy:
  377. return ret;
  378. }
  379. static void mx1_camera_remove_device(struct soc_camera_device *icd)
  380. {
  381. struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
  382. struct mx1_camera_dev *pcdev = ici->priv;
  383. unsigned int csicr1;
  384. BUG_ON(icd != pcdev->icd);
  385. /* disable interrupts */
  386. csicr1 = __raw_readl(pcdev->base + CSICR1) & ~CSI_IRQ_MASK;
  387. __raw_writel(csicr1, pcdev->base + CSICR1);
  388. /* Stop DMA engine */
  389. imx_dma_disable(pcdev->dma_chan);
  390. dev_info(icd->dev.parent, "MX1 Camera driver detached from camera %d\n",
  391. icd->devnum);
  392. mx1_camera_deactivate(pcdev);
  393. pcdev->icd = NULL;
  394. }
  395. static int mx1_camera_set_crop(struct soc_camera_device *icd,
  396. struct v4l2_crop *a)
  397. {
  398. struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
  399. return v4l2_subdev_call(sd, video, s_crop, a);
  400. }
  401. static int mx1_camera_set_bus_param(struct soc_camera_device *icd, __u32 pixfmt)
  402. {
  403. struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
  404. struct mx1_camera_dev *pcdev = ici->priv;
  405. unsigned long camera_flags, common_flags;
  406. unsigned int csicr1;
  407. int ret;
  408. camera_flags = icd->ops->query_bus_param(icd);
  409. /* MX1 supports only 8bit buswidth */
  410. common_flags = soc_camera_bus_param_compatible(camera_flags,
  411. CSI_BUS_FLAGS);
  412. if (!common_flags)
  413. return -EINVAL;
  414. /* Make choises, based on platform choice */
  415. if ((common_flags & SOCAM_VSYNC_ACTIVE_HIGH) &&
  416. (common_flags & SOCAM_VSYNC_ACTIVE_LOW)) {
  417. if (!pcdev->pdata ||
  418. pcdev->pdata->flags & MX1_CAMERA_VSYNC_HIGH)
  419. common_flags &= ~SOCAM_VSYNC_ACTIVE_LOW;
  420. else
  421. common_flags &= ~SOCAM_VSYNC_ACTIVE_HIGH;
  422. }
  423. if ((common_flags & SOCAM_PCLK_SAMPLE_RISING) &&
  424. (common_flags & SOCAM_PCLK_SAMPLE_FALLING)) {
  425. if (!pcdev->pdata ||
  426. pcdev->pdata->flags & MX1_CAMERA_PCLK_RISING)
  427. common_flags &= ~SOCAM_PCLK_SAMPLE_FALLING;
  428. else
  429. common_flags &= ~SOCAM_PCLK_SAMPLE_RISING;
  430. }
  431. if ((common_flags & SOCAM_DATA_ACTIVE_HIGH) &&
  432. (common_flags & SOCAM_DATA_ACTIVE_LOW)) {
  433. if (!pcdev->pdata ||
  434. pcdev->pdata->flags & MX1_CAMERA_DATA_HIGH)
  435. common_flags &= ~SOCAM_DATA_ACTIVE_LOW;
  436. else
  437. common_flags &= ~SOCAM_DATA_ACTIVE_HIGH;
  438. }
  439. ret = icd->ops->set_bus_param(icd, common_flags);
  440. if (ret < 0)
  441. return ret;
  442. csicr1 = __raw_readl(pcdev->base + CSICR1);
  443. if (common_flags & SOCAM_PCLK_SAMPLE_RISING)
  444. csicr1 |= CSICR1_REDGE;
  445. if (common_flags & SOCAM_VSYNC_ACTIVE_HIGH)
  446. csicr1 |= CSICR1_SOF_POL;
  447. if (common_flags & SOCAM_DATA_ACTIVE_LOW)
  448. csicr1 |= CSICR1_DATA_POL;
  449. __raw_writel(csicr1, pcdev->base + CSICR1);
  450. return 0;
  451. }
  452. static int mx1_camera_set_fmt(struct soc_camera_device *icd,
  453. struct v4l2_format *f)
  454. {
  455. struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
  456. const struct soc_camera_format_xlate *xlate;
  457. struct v4l2_pix_format *pix = &f->fmt.pix;
  458. struct v4l2_mbus_framefmt mf;
  459. int ret, buswidth;
  460. xlate = soc_camera_xlate_by_fourcc(icd, pix->pixelformat);
  461. if (!xlate) {
  462. dev_warn(icd->dev.parent, "Format %x not found\n",
  463. pix->pixelformat);
  464. return -EINVAL;
  465. }
  466. buswidth = xlate->host_fmt->bits_per_sample;
  467. if (buswidth > 8) {
  468. dev_warn(icd->dev.parent,
  469. "bits-per-sample %d for format %x unsupported\n",
  470. buswidth, pix->pixelformat);
  471. return -EINVAL;
  472. }
  473. mf.width = pix->width;
  474. mf.height = pix->height;
  475. mf.field = pix->field;
  476. mf.colorspace = pix->colorspace;
  477. mf.code = xlate->code;
  478. ret = v4l2_subdev_call(sd, video, s_mbus_fmt, &mf);
  479. if (ret < 0)
  480. return ret;
  481. if (mf.code != xlate->code)
  482. return -EINVAL;
  483. pix->width = mf.width;
  484. pix->height = mf.height;
  485. pix->field = mf.field;
  486. pix->colorspace = mf.colorspace;
  487. icd->current_fmt = xlate;
  488. return ret;
  489. }
  490. static int mx1_camera_try_fmt(struct soc_camera_device *icd,
  491. struct v4l2_format *f)
  492. {
  493. struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
  494. const struct soc_camera_format_xlate *xlate;
  495. struct v4l2_pix_format *pix = &f->fmt.pix;
  496. struct v4l2_mbus_framefmt mf;
  497. int ret;
  498. /* TODO: limit to mx1 hardware capabilities */
  499. xlate = soc_camera_xlate_by_fourcc(icd, pix->pixelformat);
  500. if (!xlate) {
  501. dev_warn(icd->dev.parent, "Format %x not found\n",
  502. pix->pixelformat);
  503. return -EINVAL;
  504. }
  505. mf.width = pix->width;
  506. mf.height = pix->height;
  507. mf.field = pix->field;
  508. mf.colorspace = pix->colorspace;
  509. mf.code = xlate->code;
  510. /* limit to sensor capabilities */
  511. ret = v4l2_subdev_call(sd, video, try_mbus_fmt, &mf);
  512. if (ret < 0)
  513. return ret;
  514. pix->width = mf.width;
  515. pix->height = mf.height;
  516. pix->field = mf.field;
  517. pix->colorspace = mf.colorspace;
  518. return 0;
  519. }
  520. static int mx1_camera_reqbufs(struct soc_camera_file *icf,
  521. struct v4l2_requestbuffers *p)
  522. {
  523. int i;
  524. /*
  525. * This is for locking debugging only. I removed spinlocks and now I
  526. * check whether .prepare is ever called on a linked buffer, or whether
  527. * a dma IRQ can occur for an in-work or unlinked buffer. Until now
  528. * it hadn't triggered
  529. */
  530. for (i = 0; i < p->count; i++) {
  531. struct mx1_buffer *buf = container_of(icf->vb_vidq.bufs[i],
  532. struct mx1_buffer, vb);
  533. buf->inwork = 0;
  534. INIT_LIST_HEAD(&buf->vb.queue);
  535. }
  536. return 0;
  537. }
  538. static unsigned int mx1_camera_poll(struct file *file, poll_table *pt)
  539. {
  540. struct soc_camera_file *icf = file->private_data;
  541. struct mx1_buffer *buf;
  542. buf = list_entry(icf->vb_vidq.stream.next, struct mx1_buffer,
  543. vb.stream);
  544. poll_wait(file, &buf->vb.done, pt);
  545. if (buf->vb.state == VIDEOBUF_DONE ||
  546. buf->vb.state == VIDEOBUF_ERROR)
  547. return POLLIN | POLLRDNORM;
  548. return 0;
  549. }
  550. static int mx1_camera_querycap(struct soc_camera_host *ici,
  551. struct v4l2_capability *cap)
  552. {
  553. /* cap->name is set by the friendly caller:-> */
  554. strlcpy(cap->card, "i.MX1/i.MXL Camera", sizeof(cap->card));
  555. cap->version = VERSION_CODE;
  556. cap->capabilities = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING;
  557. return 0;
  558. }
  559. static struct soc_camera_host_ops mx1_soc_camera_host_ops = {
  560. .owner = THIS_MODULE,
  561. .add = mx1_camera_add_device,
  562. .remove = mx1_camera_remove_device,
  563. .set_bus_param = mx1_camera_set_bus_param,
  564. .set_crop = mx1_camera_set_crop,
  565. .set_fmt = mx1_camera_set_fmt,
  566. .try_fmt = mx1_camera_try_fmt,
  567. .init_videobuf = mx1_camera_init_videobuf,
  568. .reqbufs = mx1_camera_reqbufs,
  569. .poll = mx1_camera_poll,
  570. .querycap = mx1_camera_querycap,
  571. };
  572. static struct fiq_handler fh = {
  573. .name = "csi_sof"
  574. };
  575. static int __init mx1_camera_probe(struct platform_device *pdev)
  576. {
  577. struct mx1_camera_dev *pcdev;
  578. struct resource *res;
  579. struct pt_regs regs;
  580. struct clk *clk;
  581. void __iomem *base;
  582. unsigned int irq;
  583. int err = 0;
  584. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  585. irq = platform_get_irq(pdev, 0);
  586. if (!res || (int)irq <= 0) {
  587. err = -ENODEV;
  588. goto exit;
  589. }
  590. clk = clk_get(&pdev->dev, "csi_clk");
  591. if (IS_ERR(clk)) {
  592. err = PTR_ERR(clk);
  593. goto exit;
  594. }
  595. pcdev = kzalloc(sizeof(*pcdev), GFP_KERNEL);
  596. if (!pcdev) {
  597. dev_err(&pdev->dev, "Could not allocate pcdev\n");
  598. err = -ENOMEM;
  599. goto exit_put_clk;
  600. }
  601. pcdev->res = res;
  602. pcdev->clk = clk;
  603. pcdev->pdata = pdev->dev.platform_data;
  604. if (pcdev->pdata)
  605. pcdev->mclk = pcdev->pdata->mclk_10khz * 10000;
  606. if (!pcdev->mclk) {
  607. dev_warn(&pdev->dev,
  608. "mclk_10khz == 0! Please, fix your platform data. "
  609. "Using default 20MHz\n");
  610. pcdev->mclk = 20000000;
  611. }
  612. INIT_LIST_HEAD(&pcdev->capture);
  613. spin_lock_init(&pcdev->lock);
  614. /*
  615. * Request the regions.
  616. */
  617. if (!request_mem_region(res->start, resource_size(res), DRIVER_NAME)) {
  618. err = -EBUSY;
  619. goto exit_kfree;
  620. }
  621. base = ioremap(res->start, resource_size(res));
  622. if (!base) {
  623. err = -ENOMEM;
  624. goto exit_release;
  625. }
  626. pcdev->irq = irq;
  627. pcdev->base = base;
  628. /* request dma */
  629. pcdev->dma_chan = imx_dma_request_by_prio(DRIVER_NAME, DMA_PRIO_HIGH);
  630. if (pcdev->dma_chan < 0) {
  631. dev_err(&pdev->dev, "Can't request DMA for MX1 CSI\n");
  632. err = -EBUSY;
  633. goto exit_iounmap;
  634. }
  635. dev_dbg(&pdev->dev, "got DMA channel %d\n", pcdev->dma_chan);
  636. imx_dma_setup_handlers(pcdev->dma_chan, mx1_camera_dma_irq, NULL,
  637. pcdev);
  638. imx_dma_config_channel(pcdev->dma_chan, IMX_DMA_TYPE_FIFO,
  639. IMX_DMA_MEMSIZE_32, DMA_REQ_CSI_R, 0);
  640. /* burst length : 16 words = 64 bytes */
  641. imx_dma_config_burstlen(pcdev->dma_chan, 0);
  642. /* request irq */
  643. err = claim_fiq(&fh);
  644. if (err) {
  645. dev_err(&pdev->dev, "Camera interrupt register failed \n");
  646. goto exit_free_dma;
  647. }
  648. set_fiq_handler(&mx1_camera_sof_fiq_start, &mx1_camera_sof_fiq_end -
  649. &mx1_camera_sof_fiq_start);
  650. regs.ARM_r8 = DMA_BASE + DMA_DIMR;
  651. regs.ARM_r9 = DMA_BASE + DMA_CCR(pcdev->dma_chan);
  652. regs.ARM_r10 = (long)pcdev->base + CSICR1;
  653. regs.ARM_fp = (long)pcdev->base + CSISR;
  654. regs.ARM_sp = 1 << pcdev->dma_chan;
  655. set_fiq_regs(&regs);
  656. mxc_set_irq_fiq(irq, 1);
  657. enable_fiq(irq);
  658. pcdev->soc_host.drv_name = DRIVER_NAME;
  659. pcdev->soc_host.ops = &mx1_soc_camera_host_ops;
  660. pcdev->soc_host.priv = pcdev;
  661. pcdev->soc_host.v4l2_dev.dev = &pdev->dev;
  662. pcdev->soc_host.nr = pdev->id;
  663. err = soc_camera_host_register(&pcdev->soc_host);
  664. if (err)
  665. goto exit_free_irq;
  666. dev_info(&pdev->dev, "MX1 Camera driver loaded\n");
  667. return 0;
  668. exit_free_irq:
  669. disable_fiq(irq);
  670. mxc_set_irq_fiq(irq, 0);
  671. release_fiq(&fh);
  672. exit_free_dma:
  673. imx_dma_free(pcdev->dma_chan);
  674. exit_iounmap:
  675. iounmap(base);
  676. exit_release:
  677. release_mem_region(res->start, resource_size(res));
  678. exit_kfree:
  679. kfree(pcdev);
  680. exit_put_clk:
  681. clk_put(clk);
  682. exit:
  683. return err;
  684. }
  685. static int __exit mx1_camera_remove(struct platform_device *pdev)
  686. {
  687. struct soc_camera_host *soc_host = to_soc_camera_host(&pdev->dev);
  688. struct mx1_camera_dev *pcdev = container_of(soc_host,
  689. struct mx1_camera_dev, soc_host);
  690. struct resource *res;
  691. imx_dma_free(pcdev->dma_chan);
  692. disable_fiq(pcdev->irq);
  693. mxc_set_irq_fiq(pcdev->irq, 0);
  694. release_fiq(&fh);
  695. clk_put(pcdev->clk);
  696. soc_camera_host_unregister(soc_host);
  697. iounmap(pcdev->base);
  698. res = pcdev->res;
  699. release_mem_region(res->start, resource_size(res));
  700. kfree(pcdev);
  701. dev_info(&pdev->dev, "MX1 Camera driver unloaded\n");
  702. return 0;
  703. }
  704. static struct platform_driver mx1_camera_driver = {
  705. .driver = {
  706. .name = DRIVER_NAME,
  707. },
  708. .remove = __exit_p(mx1_camera_remove),
  709. };
  710. static int __init mx1_camera_init(void)
  711. {
  712. return platform_driver_probe(&mx1_camera_driver, mx1_camera_probe);
  713. }
  714. static void __exit mx1_camera_exit(void)
  715. {
  716. return platform_driver_unregister(&mx1_camera_driver);
  717. }
  718. module_init(mx1_camera_init);
  719. module_exit(mx1_camera_exit);
  720. MODULE_DESCRIPTION("i.MX1/i.MXL SoC Camera Host driver");
  721. MODULE_AUTHOR("Paulius Zaleckas <paulius.zaleckas@teltonika.lt>");
  722. MODULE_LICENSE("GPL v2");
  723. MODULE_ALIAS("platform:" DRIVER_NAME);