pt1.c 22 KB

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  1. /*
  2. * driver for Earthsoft PT1
  3. *
  4. * Copyright (C) 2009 HIRANO Takahito <hiranotaka@zng.info>
  5. *
  6. * based on pt1dvr - http://pt1dvr.sourceforge.jp/
  7. * by Tomoaki Ishikawa <tomy@users.sourceforge.jp>
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22. */
  23. #include <linux/kernel.h>
  24. #include <linux/module.h>
  25. #include <linux/slab.h>
  26. #include <linux/vmalloc.h>
  27. #include <linux/pci.h>
  28. #include <linux/kthread.h>
  29. #include <linux/freezer.h>
  30. #include "dvbdev.h"
  31. #include "dvb_demux.h"
  32. #include "dmxdev.h"
  33. #include "dvb_net.h"
  34. #include "dvb_frontend.h"
  35. #include "va1j5jf8007t.h"
  36. #include "va1j5jf8007s.h"
  37. #define DRIVER_NAME "earth-pt1"
  38. #define PT1_PAGE_SHIFT 12
  39. #define PT1_PAGE_SIZE (1 << PT1_PAGE_SHIFT)
  40. #define PT1_NR_UPACKETS 1024
  41. #define PT1_NR_BUFS 511
  42. struct pt1_buffer_page {
  43. __le32 upackets[PT1_NR_UPACKETS];
  44. };
  45. struct pt1_table_page {
  46. __le32 next_pfn;
  47. __le32 buf_pfns[PT1_NR_BUFS];
  48. };
  49. struct pt1_buffer {
  50. struct pt1_buffer_page *page;
  51. dma_addr_t addr;
  52. };
  53. struct pt1_table {
  54. struct pt1_table_page *page;
  55. dma_addr_t addr;
  56. struct pt1_buffer bufs[PT1_NR_BUFS];
  57. };
  58. #define PT1_NR_ADAPS 4
  59. struct pt1_adapter;
  60. struct pt1 {
  61. struct pci_dev *pdev;
  62. void __iomem *regs;
  63. struct i2c_adapter i2c_adap;
  64. int i2c_running;
  65. struct pt1_adapter *adaps[PT1_NR_ADAPS];
  66. struct pt1_table *tables;
  67. struct task_struct *kthread;
  68. };
  69. struct pt1_adapter {
  70. struct pt1 *pt1;
  71. int index;
  72. u8 *buf;
  73. int upacket_count;
  74. int packet_count;
  75. struct dvb_adapter adap;
  76. struct dvb_demux demux;
  77. int users;
  78. struct dmxdev dmxdev;
  79. struct dvb_net net;
  80. struct dvb_frontend *fe;
  81. int (*orig_set_voltage)(struct dvb_frontend *fe,
  82. fe_sec_voltage_t voltage);
  83. };
  84. #define pt1_printk(level, pt1, format, arg...) \
  85. dev_printk(level, &(pt1)->pdev->dev, format, ##arg)
  86. static void pt1_write_reg(struct pt1 *pt1, int reg, u32 data)
  87. {
  88. writel(data, pt1->regs + reg * 4);
  89. }
  90. static u32 pt1_read_reg(struct pt1 *pt1, int reg)
  91. {
  92. return readl(pt1->regs + reg * 4);
  93. }
  94. static int pt1_nr_tables = 64;
  95. module_param_named(nr_tables, pt1_nr_tables, int, 0);
  96. static void pt1_increment_table_count(struct pt1 *pt1)
  97. {
  98. pt1_write_reg(pt1, 0, 0x00000020);
  99. }
  100. static void pt1_init_table_count(struct pt1 *pt1)
  101. {
  102. pt1_write_reg(pt1, 0, 0x00000010);
  103. }
  104. static void pt1_register_tables(struct pt1 *pt1, u32 first_pfn)
  105. {
  106. pt1_write_reg(pt1, 5, first_pfn);
  107. pt1_write_reg(pt1, 0, 0x0c000040);
  108. }
  109. static void pt1_unregister_tables(struct pt1 *pt1)
  110. {
  111. pt1_write_reg(pt1, 0, 0x08080000);
  112. }
  113. static int pt1_sync(struct pt1 *pt1)
  114. {
  115. int i;
  116. for (i = 0; i < 57; i++) {
  117. if (pt1_read_reg(pt1, 0) & 0x20000000)
  118. return 0;
  119. pt1_write_reg(pt1, 0, 0x00000008);
  120. }
  121. pt1_printk(KERN_ERR, pt1, "could not sync\n");
  122. return -EIO;
  123. }
  124. static u64 pt1_identify(struct pt1 *pt1)
  125. {
  126. int i;
  127. u64 id;
  128. id = 0;
  129. for (i = 0; i < 57; i++) {
  130. id |= (u64)(pt1_read_reg(pt1, 0) >> 30 & 1) << i;
  131. pt1_write_reg(pt1, 0, 0x00000008);
  132. }
  133. return id;
  134. }
  135. static int pt1_unlock(struct pt1 *pt1)
  136. {
  137. int i;
  138. pt1_write_reg(pt1, 0, 0x00000008);
  139. for (i = 0; i < 3; i++) {
  140. if (pt1_read_reg(pt1, 0) & 0x80000000)
  141. return 0;
  142. schedule_timeout_uninterruptible((HZ + 999) / 1000);
  143. }
  144. pt1_printk(KERN_ERR, pt1, "could not unlock\n");
  145. return -EIO;
  146. }
  147. static int pt1_reset_pci(struct pt1 *pt1)
  148. {
  149. int i;
  150. pt1_write_reg(pt1, 0, 0x01010000);
  151. pt1_write_reg(pt1, 0, 0x01000000);
  152. for (i = 0; i < 10; i++) {
  153. if (pt1_read_reg(pt1, 0) & 0x00000001)
  154. return 0;
  155. schedule_timeout_uninterruptible((HZ + 999) / 1000);
  156. }
  157. pt1_printk(KERN_ERR, pt1, "could not reset PCI\n");
  158. return -EIO;
  159. }
  160. static int pt1_reset_ram(struct pt1 *pt1)
  161. {
  162. int i;
  163. pt1_write_reg(pt1, 0, 0x02020000);
  164. pt1_write_reg(pt1, 0, 0x02000000);
  165. for (i = 0; i < 10; i++) {
  166. if (pt1_read_reg(pt1, 0) & 0x00000002)
  167. return 0;
  168. schedule_timeout_uninterruptible((HZ + 999) / 1000);
  169. }
  170. pt1_printk(KERN_ERR, pt1, "could not reset RAM\n");
  171. return -EIO;
  172. }
  173. static int pt1_do_enable_ram(struct pt1 *pt1)
  174. {
  175. int i, j;
  176. u32 status;
  177. status = pt1_read_reg(pt1, 0) & 0x00000004;
  178. pt1_write_reg(pt1, 0, 0x00000002);
  179. for (i = 0; i < 10; i++) {
  180. for (j = 0; j < 1024; j++) {
  181. if ((pt1_read_reg(pt1, 0) & 0x00000004) != status)
  182. return 0;
  183. }
  184. schedule_timeout_uninterruptible((HZ + 999) / 1000);
  185. }
  186. pt1_printk(KERN_ERR, pt1, "could not enable RAM\n");
  187. return -EIO;
  188. }
  189. static int pt1_enable_ram(struct pt1 *pt1)
  190. {
  191. int i, ret;
  192. schedule_timeout_uninterruptible((HZ + 999) / 1000);
  193. for (i = 0; i < 10; i++) {
  194. ret = pt1_do_enable_ram(pt1);
  195. if (ret < 0)
  196. return ret;
  197. }
  198. return 0;
  199. }
  200. static void pt1_disable_ram(struct pt1 *pt1)
  201. {
  202. pt1_write_reg(pt1, 0, 0x0b0b0000);
  203. }
  204. static void pt1_set_stream(struct pt1 *pt1, int index, int enabled)
  205. {
  206. pt1_write_reg(pt1, 2, 1 << (index + 8) | enabled << index);
  207. }
  208. static void pt1_init_streams(struct pt1 *pt1)
  209. {
  210. int i;
  211. for (i = 0; i < PT1_NR_ADAPS; i++)
  212. pt1_set_stream(pt1, i, 0);
  213. }
  214. static int pt1_filter(struct pt1 *pt1, struct pt1_buffer_page *page)
  215. {
  216. u32 upacket;
  217. int i;
  218. int index;
  219. struct pt1_adapter *adap;
  220. int offset;
  221. u8 *buf;
  222. if (!page->upackets[PT1_NR_UPACKETS - 1])
  223. return 0;
  224. for (i = 0; i < PT1_NR_UPACKETS; i++) {
  225. upacket = le32_to_cpu(page->upackets[i]);
  226. index = (upacket >> 29) - 1;
  227. if (index < 0 || index >= PT1_NR_ADAPS)
  228. continue;
  229. adap = pt1->adaps[index];
  230. if (upacket >> 25 & 1)
  231. adap->upacket_count = 0;
  232. else if (!adap->upacket_count)
  233. continue;
  234. buf = adap->buf;
  235. offset = adap->packet_count * 188 + adap->upacket_count * 3;
  236. buf[offset] = upacket >> 16;
  237. buf[offset + 1] = upacket >> 8;
  238. if (adap->upacket_count != 62)
  239. buf[offset + 2] = upacket;
  240. if (++adap->upacket_count >= 63) {
  241. adap->upacket_count = 0;
  242. if (++adap->packet_count >= 21) {
  243. dvb_dmx_swfilter_packets(&adap->demux, buf, 21);
  244. adap->packet_count = 0;
  245. }
  246. }
  247. }
  248. page->upackets[PT1_NR_UPACKETS - 1] = 0;
  249. return 1;
  250. }
  251. static int pt1_thread(void *data)
  252. {
  253. struct pt1 *pt1;
  254. int table_index;
  255. int buf_index;
  256. struct pt1_buffer_page *page;
  257. pt1 = data;
  258. set_freezable();
  259. table_index = 0;
  260. buf_index = 0;
  261. while (!kthread_should_stop()) {
  262. try_to_freeze();
  263. page = pt1->tables[table_index].bufs[buf_index].page;
  264. if (!pt1_filter(pt1, page)) {
  265. schedule_timeout_interruptible((HZ + 999) / 1000);
  266. continue;
  267. }
  268. if (++buf_index >= PT1_NR_BUFS) {
  269. pt1_increment_table_count(pt1);
  270. buf_index = 0;
  271. if (++table_index >= pt1_nr_tables)
  272. table_index = 0;
  273. }
  274. }
  275. return 0;
  276. }
  277. static void pt1_free_page(struct pt1 *pt1, void *page, dma_addr_t addr)
  278. {
  279. dma_free_coherent(&pt1->pdev->dev, PT1_PAGE_SIZE, page, addr);
  280. }
  281. static void *pt1_alloc_page(struct pt1 *pt1, dma_addr_t *addrp, u32 *pfnp)
  282. {
  283. void *page;
  284. dma_addr_t addr;
  285. page = dma_alloc_coherent(&pt1->pdev->dev, PT1_PAGE_SIZE, &addr,
  286. GFP_KERNEL);
  287. if (page == NULL)
  288. return NULL;
  289. BUG_ON(addr & (PT1_PAGE_SIZE - 1));
  290. BUG_ON(addr >> PT1_PAGE_SHIFT >> 31 >> 1);
  291. *addrp = addr;
  292. *pfnp = addr >> PT1_PAGE_SHIFT;
  293. return page;
  294. }
  295. static void pt1_cleanup_buffer(struct pt1 *pt1, struct pt1_buffer *buf)
  296. {
  297. pt1_free_page(pt1, buf->page, buf->addr);
  298. }
  299. static int
  300. pt1_init_buffer(struct pt1 *pt1, struct pt1_buffer *buf, u32 *pfnp)
  301. {
  302. struct pt1_buffer_page *page;
  303. dma_addr_t addr;
  304. page = pt1_alloc_page(pt1, &addr, pfnp);
  305. if (page == NULL)
  306. return -ENOMEM;
  307. page->upackets[PT1_NR_UPACKETS - 1] = 0;
  308. buf->page = page;
  309. buf->addr = addr;
  310. return 0;
  311. }
  312. static void pt1_cleanup_table(struct pt1 *pt1, struct pt1_table *table)
  313. {
  314. int i;
  315. for (i = 0; i < PT1_NR_BUFS; i++)
  316. pt1_cleanup_buffer(pt1, &table->bufs[i]);
  317. pt1_free_page(pt1, table->page, table->addr);
  318. }
  319. static int
  320. pt1_init_table(struct pt1 *pt1, struct pt1_table *table, u32 *pfnp)
  321. {
  322. struct pt1_table_page *page;
  323. dma_addr_t addr;
  324. int i, ret;
  325. u32 buf_pfn;
  326. page = pt1_alloc_page(pt1, &addr, pfnp);
  327. if (page == NULL)
  328. return -ENOMEM;
  329. for (i = 0; i < PT1_NR_BUFS; i++) {
  330. ret = pt1_init_buffer(pt1, &table->bufs[i], &buf_pfn);
  331. if (ret < 0)
  332. goto err;
  333. page->buf_pfns[i] = cpu_to_le32(buf_pfn);
  334. }
  335. pt1_increment_table_count(pt1);
  336. table->page = page;
  337. table->addr = addr;
  338. return 0;
  339. err:
  340. while (i--)
  341. pt1_cleanup_buffer(pt1, &table->bufs[i]);
  342. pt1_free_page(pt1, page, addr);
  343. return ret;
  344. }
  345. static void pt1_cleanup_tables(struct pt1 *pt1)
  346. {
  347. struct pt1_table *tables;
  348. int i;
  349. tables = pt1->tables;
  350. pt1_unregister_tables(pt1);
  351. for (i = 0; i < pt1_nr_tables; i++)
  352. pt1_cleanup_table(pt1, &tables[i]);
  353. vfree(tables);
  354. }
  355. static int pt1_init_tables(struct pt1 *pt1)
  356. {
  357. struct pt1_table *tables;
  358. int i, ret;
  359. u32 first_pfn, pfn;
  360. tables = vmalloc(sizeof(struct pt1_table) * pt1_nr_tables);
  361. if (tables == NULL)
  362. return -ENOMEM;
  363. pt1_init_table_count(pt1);
  364. i = 0;
  365. if (pt1_nr_tables) {
  366. ret = pt1_init_table(pt1, &tables[0], &first_pfn);
  367. if (ret)
  368. goto err;
  369. i++;
  370. }
  371. while (i < pt1_nr_tables) {
  372. ret = pt1_init_table(pt1, &tables[i], &pfn);
  373. if (ret)
  374. goto err;
  375. tables[i - 1].page->next_pfn = cpu_to_le32(pfn);
  376. i++;
  377. }
  378. tables[pt1_nr_tables - 1].page->next_pfn = cpu_to_le32(first_pfn);
  379. pt1_register_tables(pt1, first_pfn);
  380. pt1->tables = tables;
  381. return 0;
  382. err:
  383. while (i--)
  384. pt1_cleanup_table(pt1, &tables[i]);
  385. vfree(tables);
  386. return ret;
  387. }
  388. static int pt1_start_feed(struct dvb_demux_feed *feed)
  389. {
  390. struct pt1_adapter *adap;
  391. adap = container_of(feed->demux, struct pt1_adapter, demux);
  392. if (!adap->users++)
  393. pt1_set_stream(adap->pt1, adap->index, 1);
  394. return 0;
  395. }
  396. static int pt1_stop_feed(struct dvb_demux_feed *feed)
  397. {
  398. struct pt1_adapter *adap;
  399. adap = container_of(feed->demux, struct pt1_adapter, demux);
  400. if (!--adap->users)
  401. pt1_set_stream(adap->pt1, adap->index, 0);
  402. return 0;
  403. }
  404. static void
  405. pt1_set_power(struct pt1 *pt1, int power, int lnb, int reset)
  406. {
  407. pt1_write_reg(pt1, 1, power | lnb << 1 | !reset << 3);
  408. }
  409. static int pt1_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage)
  410. {
  411. struct pt1_adapter *adap;
  412. int lnb;
  413. adap = container_of(fe->dvb, struct pt1_adapter, adap);
  414. switch (voltage) {
  415. case SEC_VOLTAGE_13: /* actually 11V */
  416. lnb = 2;
  417. break;
  418. case SEC_VOLTAGE_18: /* actually 15V */
  419. lnb = 3;
  420. break;
  421. case SEC_VOLTAGE_OFF:
  422. lnb = 0;
  423. break;
  424. default:
  425. return -EINVAL;
  426. }
  427. pt1_set_power(adap->pt1, 1, lnb, 0);
  428. if (adap->orig_set_voltage)
  429. return adap->orig_set_voltage(fe, voltage);
  430. else
  431. return 0;
  432. }
  433. static void pt1_free_adapter(struct pt1_adapter *adap)
  434. {
  435. dvb_unregister_frontend(adap->fe);
  436. dvb_net_release(&adap->net);
  437. adap->demux.dmx.close(&adap->demux.dmx);
  438. dvb_dmxdev_release(&adap->dmxdev);
  439. dvb_dmx_release(&adap->demux);
  440. dvb_unregister_adapter(&adap->adap);
  441. free_page((unsigned long)adap->buf);
  442. kfree(adap);
  443. }
  444. DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
  445. static struct pt1_adapter *
  446. pt1_alloc_adapter(struct pt1 *pt1, struct dvb_frontend *fe)
  447. {
  448. struct pt1_adapter *adap;
  449. void *buf;
  450. struct dvb_adapter *dvb_adap;
  451. struct dvb_demux *demux;
  452. struct dmxdev *dmxdev;
  453. int ret;
  454. adap = kzalloc(sizeof(struct pt1_adapter), GFP_KERNEL);
  455. if (!adap) {
  456. ret = -ENOMEM;
  457. goto err;
  458. }
  459. adap->pt1 = pt1;
  460. adap->orig_set_voltage = fe->ops.set_voltage;
  461. fe->ops.set_voltage = pt1_set_voltage;
  462. buf = (u8 *)__get_free_page(GFP_KERNEL);
  463. if (!buf) {
  464. ret = -ENOMEM;
  465. goto err_kfree;
  466. }
  467. adap->buf = buf;
  468. adap->upacket_count = 0;
  469. adap->packet_count = 0;
  470. dvb_adap = &adap->adap;
  471. dvb_adap->priv = adap;
  472. ret = dvb_register_adapter(dvb_adap, DRIVER_NAME, THIS_MODULE,
  473. &pt1->pdev->dev, adapter_nr);
  474. if (ret < 0)
  475. goto err_free_page;
  476. demux = &adap->demux;
  477. demux->dmx.capabilities = DMX_TS_FILTERING | DMX_SECTION_FILTERING;
  478. demux->priv = adap;
  479. demux->feednum = 256;
  480. demux->filternum = 256;
  481. demux->start_feed = pt1_start_feed;
  482. demux->stop_feed = pt1_stop_feed;
  483. demux->write_to_decoder = NULL;
  484. ret = dvb_dmx_init(demux);
  485. if (ret < 0)
  486. goto err_unregister_adapter;
  487. dmxdev = &adap->dmxdev;
  488. dmxdev->filternum = 256;
  489. dmxdev->demux = &demux->dmx;
  490. dmxdev->capabilities = 0;
  491. ret = dvb_dmxdev_init(dmxdev, dvb_adap);
  492. if (ret < 0)
  493. goto err_dmx_release;
  494. dvb_net_init(dvb_adap, &adap->net, &demux->dmx);
  495. ret = dvb_register_frontend(dvb_adap, fe);
  496. if (ret < 0)
  497. goto err_net_release;
  498. adap->fe = fe;
  499. return adap;
  500. err_net_release:
  501. dvb_net_release(&adap->net);
  502. adap->demux.dmx.close(&adap->demux.dmx);
  503. dvb_dmxdev_release(&adap->dmxdev);
  504. err_dmx_release:
  505. dvb_dmx_release(demux);
  506. err_unregister_adapter:
  507. dvb_unregister_adapter(dvb_adap);
  508. err_free_page:
  509. free_page((unsigned long)buf);
  510. err_kfree:
  511. kfree(adap);
  512. err:
  513. return ERR_PTR(ret);
  514. }
  515. static void pt1_cleanup_adapters(struct pt1 *pt1)
  516. {
  517. int i;
  518. for (i = 0; i < PT1_NR_ADAPS; i++)
  519. pt1_free_adapter(pt1->adaps[i]);
  520. }
  521. struct pt1_config {
  522. struct va1j5jf8007s_config va1j5jf8007s_config;
  523. struct va1j5jf8007t_config va1j5jf8007t_config;
  524. };
  525. static const struct pt1_config pt1_configs[2] = {
  526. {
  527. { .demod_address = 0x1b },
  528. { .demod_address = 0x1a },
  529. }, {
  530. { .demod_address = 0x19 },
  531. { .demod_address = 0x18 },
  532. },
  533. };
  534. static int pt1_init_adapters(struct pt1 *pt1)
  535. {
  536. int i, j;
  537. struct i2c_adapter *i2c_adap;
  538. const struct pt1_config *config;
  539. struct dvb_frontend *fe[4];
  540. struct pt1_adapter *adap;
  541. int ret;
  542. i = 0;
  543. j = 0;
  544. i2c_adap = &pt1->i2c_adap;
  545. do {
  546. config = &pt1_configs[i / 2];
  547. fe[i] = va1j5jf8007s_attach(&config->va1j5jf8007s_config,
  548. i2c_adap);
  549. if (!fe[i]) {
  550. ret = -ENODEV; /* This does not sound nice... */
  551. goto err;
  552. }
  553. i++;
  554. fe[i] = va1j5jf8007t_attach(&config->va1j5jf8007t_config,
  555. i2c_adap);
  556. if (!fe[i]) {
  557. ret = -ENODEV;
  558. goto err;
  559. }
  560. i++;
  561. ret = va1j5jf8007s_prepare(fe[i - 2]);
  562. if (ret < 0)
  563. goto err;
  564. ret = va1j5jf8007t_prepare(fe[i - 1]);
  565. if (ret < 0)
  566. goto err;
  567. } while (i < 4);
  568. do {
  569. adap = pt1_alloc_adapter(pt1, fe[j]);
  570. if (IS_ERR(adap))
  571. goto err;
  572. adap->index = j;
  573. pt1->adaps[j] = adap;
  574. } while (++j < 4);
  575. return 0;
  576. err:
  577. while (i-- > j)
  578. fe[i]->ops.release(fe[i]);
  579. while (j--)
  580. pt1_free_adapter(pt1->adaps[j]);
  581. return ret;
  582. }
  583. static void pt1_i2c_emit(struct pt1 *pt1, int addr, int busy, int read_enable,
  584. int clock, int data, int next_addr)
  585. {
  586. pt1_write_reg(pt1, 4, addr << 18 | busy << 13 | read_enable << 12 |
  587. !clock << 11 | !data << 10 | next_addr);
  588. }
  589. static void pt1_i2c_write_bit(struct pt1 *pt1, int addr, int *addrp, int data)
  590. {
  591. pt1_i2c_emit(pt1, addr, 1, 0, 0, data, addr + 1);
  592. pt1_i2c_emit(pt1, addr + 1, 1, 0, 1, data, addr + 2);
  593. pt1_i2c_emit(pt1, addr + 2, 1, 0, 0, data, addr + 3);
  594. *addrp = addr + 3;
  595. }
  596. static void pt1_i2c_read_bit(struct pt1 *pt1, int addr, int *addrp)
  597. {
  598. pt1_i2c_emit(pt1, addr, 1, 0, 0, 1, addr + 1);
  599. pt1_i2c_emit(pt1, addr + 1, 1, 0, 1, 1, addr + 2);
  600. pt1_i2c_emit(pt1, addr + 2, 1, 1, 1, 1, addr + 3);
  601. pt1_i2c_emit(pt1, addr + 3, 1, 0, 0, 1, addr + 4);
  602. *addrp = addr + 4;
  603. }
  604. static void pt1_i2c_write_byte(struct pt1 *pt1, int addr, int *addrp, int data)
  605. {
  606. int i;
  607. for (i = 0; i < 8; i++)
  608. pt1_i2c_write_bit(pt1, addr, &addr, data >> (7 - i) & 1);
  609. pt1_i2c_write_bit(pt1, addr, &addr, 1);
  610. *addrp = addr;
  611. }
  612. static void pt1_i2c_read_byte(struct pt1 *pt1, int addr, int *addrp, int last)
  613. {
  614. int i;
  615. for (i = 0; i < 8; i++)
  616. pt1_i2c_read_bit(pt1, addr, &addr);
  617. pt1_i2c_write_bit(pt1, addr, &addr, last);
  618. *addrp = addr;
  619. }
  620. static void pt1_i2c_prepare(struct pt1 *pt1, int addr, int *addrp)
  621. {
  622. pt1_i2c_emit(pt1, addr, 1, 0, 1, 1, addr + 1);
  623. pt1_i2c_emit(pt1, addr + 1, 1, 0, 1, 0, addr + 2);
  624. pt1_i2c_emit(pt1, addr + 2, 1, 0, 0, 0, addr + 3);
  625. *addrp = addr + 3;
  626. }
  627. static void
  628. pt1_i2c_write_msg(struct pt1 *pt1, int addr, int *addrp, struct i2c_msg *msg)
  629. {
  630. int i;
  631. pt1_i2c_prepare(pt1, addr, &addr);
  632. pt1_i2c_write_byte(pt1, addr, &addr, msg->addr << 1);
  633. for (i = 0; i < msg->len; i++)
  634. pt1_i2c_write_byte(pt1, addr, &addr, msg->buf[i]);
  635. *addrp = addr;
  636. }
  637. static void
  638. pt1_i2c_read_msg(struct pt1 *pt1, int addr, int *addrp, struct i2c_msg *msg)
  639. {
  640. int i;
  641. pt1_i2c_prepare(pt1, addr, &addr);
  642. pt1_i2c_write_byte(pt1, addr, &addr, msg->addr << 1 | 1);
  643. for (i = 0; i < msg->len; i++)
  644. pt1_i2c_read_byte(pt1, addr, &addr, i == msg->len - 1);
  645. *addrp = addr;
  646. }
  647. static int pt1_i2c_end(struct pt1 *pt1, int addr)
  648. {
  649. pt1_i2c_emit(pt1, addr, 1, 0, 0, 0, addr + 1);
  650. pt1_i2c_emit(pt1, addr + 1, 1, 0, 1, 0, addr + 2);
  651. pt1_i2c_emit(pt1, addr + 2, 1, 0, 1, 1, 0);
  652. pt1_write_reg(pt1, 0, 0x00000004);
  653. do {
  654. if (signal_pending(current))
  655. return -EINTR;
  656. schedule_timeout_interruptible((HZ + 999) / 1000);
  657. } while (pt1_read_reg(pt1, 0) & 0x00000080);
  658. return 0;
  659. }
  660. static void pt1_i2c_begin(struct pt1 *pt1, int *addrp)
  661. {
  662. int addr;
  663. addr = 0;
  664. pt1_i2c_emit(pt1, addr, 0, 0, 1, 1, addr /* itself */);
  665. addr = addr + 1;
  666. if (!pt1->i2c_running) {
  667. pt1_i2c_emit(pt1, addr, 1, 0, 1, 1, addr + 1);
  668. pt1_i2c_emit(pt1, addr + 1, 1, 0, 1, 0, addr + 2);
  669. addr = addr + 2;
  670. pt1->i2c_running = 1;
  671. }
  672. *addrp = addr;
  673. }
  674. static int pt1_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
  675. {
  676. struct pt1 *pt1;
  677. int i;
  678. struct i2c_msg *msg, *next_msg;
  679. int addr, ret;
  680. u16 len;
  681. u32 word;
  682. pt1 = i2c_get_adapdata(adap);
  683. for (i = 0; i < num; i++) {
  684. msg = &msgs[i];
  685. if (msg->flags & I2C_M_RD)
  686. return -ENOTSUPP;
  687. if (i + 1 < num)
  688. next_msg = &msgs[i + 1];
  689. else
  690. next_msg = NULL;
  691. if (next_msg && next_msg->flags & I2C_M_RD) {
  692. i++;
  693. len = next_msg->len;
  694. if (len > 4)
  695. return -ENOTSUPP;
  696. pt1_i2c_begin(pt1, &addr);
  697. pt1_i2c_write_msg(pt1, addr, &addr, msg);
  698. pt1_i2c_read_msg(pt1, addr, &addr, next_msg);
  699. ret = pt1_i2c_end(pt1, addr);
  700. if (ret < 0)
  701. return ret;
  702. word = pt1_read_reg(pt1, 2);
  703. while (len--) {
  704. next_msg->buf[len] = word;
  705. word >>= 8;
  706. }
  707. } else {
  708. pt1_i2c_begin(pt1, &addr);
  709. pt1_i2c_write_msg(pt1, addr, &addr, msg);
  710. ret = pt1_i2c_end(pt1, addr);
  711. if (ret < 0)
  712. return ret;
  713. }
  714. }
  715. return num;
  716. }
  717. static u32 pt1_i2c_func(struct i2c_adapter *adap)
  718. {
  719. return I2C_FUNC_I2C;
  720. }
  721. static const struct i2c_algorithm pt1_i2c_algo = {
  722. .master_xfer = pt1_i2c_xfer,
  723. .functionality = pt1_i2c_func,
  724. };
  725. static void pt1_i2c_wait(struct pt1 *pt1)
  726. {
  727. int i;
  728. for (i = 0; i < 128; i++)
  729. pt1_i2c_emit(pt1, 0, 0, 0, 1, 1, 0);
  730. }
  731. static void pt1_i2c_init(struct pt1 *pt1)
  732. {
  733. int i;
  734. for (i = 0; i < 1024; i++)
  735. pt1_i2c_emit(pt1, i, 0, 0, 1, 1, 0);
  736. }
  737. static void __devexit pt1_remove(struct pci_dev *pdev)
  738. {
  739. struct pt1 *pt1;
  740. void __iomem *regs;
  741. pt1 = pci_get_drvdata(pdev);
  742. regs = pt1->regs;
  743. kthread_stop(pt1->kthread);
  744. pt1_cleanup_tables(pt1);
  745. pt1_cleanup_adapters(pt1);
  746. pt1_disable_ram(pt1);
  747. pt1_set_power(pt1, 0, 0, 1);
  748. i2c_del_adapter(&pt1->i2c_adap);
  749. pci_set_drvdata(pdev, NULL);
  750. kfree(pt1);
  751. pci_iounmap(pdev, regs);
  752. pci_release_regions(pdev);
  753. pci_disable_device(pdev);
  754. }
  755. static int __devinit
  756. pt1_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  757. {
  758. int ret;
  759. void __iomem *regs;
  760. struct pt1 *pt1;
  761. struct i2c_adapter *i2c_adap;
  762. struct task_struct *kthread;
  763. ret = pci_enable_device(pdev);
  764. if (ret < 0)
  765. goto err;
  766. ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  767. if (ret < 0)
  768. goto err_pci_disable_device;
  769. pci_set_master(pdev);
  770. ret = pci_request_regions(pdev, DRIVER_NAME);
  771. if (ret < 0)
  772. goto err_pci_disable_device;
  773. regs = pci_iomap(pdev, 0, 0);
  774. if (!regs) {
  775. ret = -EIO;
  776. goto err_pci_release_regions;
  777. }
  778. pt1 = kzalloc(sizeof(struct pt1), GFP_KERNEL);
  779. if (!pt1) {
  780. ret = -ENOMEM;
  781. goto err_pci_iounmap;
  782. }
  783. pt1->pdev = pdev;
  784. pt1->regs = regs;
  785. pci_set_drvdata(pdev, pt1);
  786. i2c_adap = &pt1->i2c_adap;
  787. i2c_adap->class = I2C_CLASS_TV_DIGITAL;
  788. i2c_adap->algo = &pt1_i2c_algo;
  789. i2c_adap->algo_data = NULL;
  790. i2c_adap->dev.parent = &pdev->dev;
  791. i2c_set_adapdata(i2c_adap, pt1);
  792. ret = i2c_add_adapter(i2c_adap);
  793. if (ret < 0)
  794. goto err_kfree;
  795. pt1_set_power(pt1, 0, 0, 1);
  796. pt1_i2c_init(pt1);
  797. pt1_i2c_wait(pt1);
  798. ret = pt1_sync(pt1);
  799. if (ret < 0)
  800. goto err_i2c_del_adapter;
  801. pt1_identify(pt1);
  802. ret = pt1_unlock(pt1);
  803. if (ret < 0)
  804. goto err_i2c_del_adapter;
  805. ret = pt1_reset_pci(pt1);
  806. if (ret < 0)
  807. goto err_i2c_del_adapter;
  808. ret = pt1_reset_ram(pt1);
  809. if (ret < 0)
  810. goto err_i2c_del_adapter;
  811. ret = pt1_enable_ram(pt1);
  812. if (ret < 0)
  813. goto err_i2c_del_adapter;
  814. pt1_init_streams(pt1);
  815. pt1_set_power(pt1, 1, 0, 1);
  816. schedule_timeout_uninterruptible((HZ + 49) / 50);
  817. pt1_set_power(pt1, 1, 0, 0);
  818. schedule_timeout_uninterruptible((HZ + 999) / 1000);
  819. ret = pt1_init_adapters(pt1);
  820. if (ret < 0)
  821. goto err_pt1_disable_ram;
  822. ret = pt1_init_tables(pt1);
  823. if (ret < 0)
  824. goto err_pt1_cleanup_adapters;
  825. kthread = kthread_run(pt1_thread, pt1, "pt1");
  826. if (IS_ERR(kthread)) {
  827. ret = PTR_ERR(kthread);
  828. goto err_pt1_cleanup_tables;
  829. }
  830. pt1->kthread = kthread;
  831. return 0;
  832. err_pt1_cleanup_tables:
  833. pt1_cleanup_tables(pt1);
  834. err_pt1_cleanup_adapters:
  835. pt1_cleanup_adapters(pt1);
  836. err_pt1_disable_ram:
  837. pt1_disable_ram(pt1);
  838. pt1_set_power(pt1, 0, 0, 1);
  839. err_i2c_del_adapter:
  840. i2c_del_adapter(i2c_adap);
  841. err_kfree:
  842. pci_set_drvdata(pdev, NULL);
  843. kfree(pt1);
  844. err_pci_iounmap:
  845. pci_iounmap(pdev, regs);
  846. err_pci_release_regions:
  847. pci_release_regions(pdev);
  848. err_pci_disable_device:
  849. pci_disable_device(pdev);
  850. err:
  851. return ret;
  852. }
  853. static struct pci_device_id pt1_id_table[] = {
  854. { PCI_DEVICE(0x10ee, 0x211a) },
  855. { },
  856. };
  857. MODULE_DEVICE_TABLE(pci, pt1_id_table);
  858. static struct pci_driver pt1_driver = {
  859. .name = DRIVER_NAME,
  860. .probe = pt1_probe,
  861. .remove = __devexit_p(pt1_remove),
  862. .id_table = pt1_id_table,
  863. };
  864. static int __init pt1_init(void)
  865. {
  866. return pci_register_driver(&pt1_driver);
  867. }
  868. static void __exit pt1_cleanup(void)
  869. {
  870. pci_unregister_driver(&pt1_driver);
  871. }
  872. module_init(pt1_init);
  873. module_exit(pt1_cleanup);
  874. MODULE_AUTHOR("Takahito HIRANO <hiranotaka@zng.info>");
  875. MODULE_DESCRIPTION("Earthsoft PT1 Driver");
  876. MODULE_LICENSE("GPL");