nv04_display.c 6.4 KB

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  1. /*
  2. * Copyright 2009 Red Hat Inc.
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice shall be included in
  12. * all copies or substantial portions of the Software.
  13. *
  14. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  17. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20. * OTHER DEALINGS IN THE SOFTWARE.
  21. *
  22. * Author: Ben Skeggs
  23. */
  24. #include "drmP.h"
  25. #include "drm.h"
  26. #include "drm_crtc_helper.h"
  27. #include "nouveau_drv.h"
  28. #include "nouveau_fb.h"
  29. #include "nouveau_hw.h"
  30. #include "nouveau_encoder.h"
  31. #include "nouveau_connector.h"
  32. #define MULTIPLE_ENCODERS(e) (e & (e - 1))
  33. static void
  34. nv04_display_store_initial_head_owner(struct drm_device *dev)
  35. {
  36. struct drm_nouveau_private *dev_priv = dev->dev_private;
  37. if (dev_priv->chipset != 0x11) {
  38. dev_priv->crtc_owner = NVReadVgaCrtc(dev, 0, NV_CIO_CRE_44);
  39. goto ownerknown;
  40. }
  41. /* reading CR44 is broken on nv11, so we attempt to infer it */
  42. if (nvReadMC(dev, NV_PBUS_DEBUG_1) & (1 << 28)) /* heads tied, restore both */
  43. dev_priv->crtc_owner = 0x4;
  44. else {
  45. uint8_t slaved_on_A, slaved_on_B;
  46. bool tvA = false;
  47. bool tvB = false;
  48. NVLockVgaCrtcs(dev, false);
  49. slaved_on_B = NVReadVgaCrtc(dev, 1, NV_CIO_CRE_PIXEL_INDEX) &
  50. 0x80;
  51. if (slaved_on_B)
  52. tvB = !(NVReadVgaCrtc(dev, 1, NV_CIO_CRE_LCD__INDEX) &
  53. MASK(NV_CIO_CRE_LCD_LCD_SELECT));
  54. slaved_on_A = NVReadVgaCrtc(dev, 0, NV_CIO_CRE_PIXEL_INDEX) &
  55. 0x80;
  56. if (slaved_on_A)
  57. tvA = !(NVReadVgaCrtc(dev, 0, NV_CIO_CRE_LCD__INDEX) &
  58. MASK(NV_CIO_CRE_LCD_LCD_SELECT));
  59. NVLockVgaCrtcs(dev, true);
  60. if (slaved_on_A && !tvA)
  61. dev_priv->crtc_owner = 0x0;
  62. else if (slaved_on_B && !tvB)
  63. dev_priv->crtc_owner = 0x3;
  64. else if (slaved_on_A)
  65. dev_priv->crtc_owner = 0x0;
  66. else if (slaved_on_B)
  67. dev_priv->crtc_owner = 0x3;
  68. else
  69. dev_priv->crtc_owner = 0x0;
  70. }
  71. ownerknown:
  72. NV_INFO(dev, "Initial CRTC_OWNER is %d\n", dev_priv->crtc_owner);
  73. /* we need to ensure the heads are not tied henceforth, or reading any
  74. * 8 bit reg on head B will fail
  75. * setting a single arbitrary head solves that */
  76. NVSetOwner(dev, 0);
  77. }
  78. int
  79. nv04_display_create(struct drm_device *dev)
  80. {
  81. struct drm_nouveau_private *dev_priv = dev->dev_private;
  82. struct dcb_table *dcb = &dev_priv->vbios.dcb;
  83. struct drm_encoder *encoder;
  84. struct drm_crtc *crtc;
  85. int i, ret;
  86. NV_DEBUG_KMS(dev, "\n");
  87. if (nv_two_heads(dev))
  88. nv04_display_store_initial_head_owner(dev);
  89. nouveau_hw_save_vga_fonts(dev, 1);
  90. drm_mode_config_init(dev);
  91. drm_mode_create_scaling_mode_property(dev);
  92. drm_mode_create_dithering_property(dev);
  93. dev->mode_config.funcs = (void *)&nouveau_mode_config_funcs;
  94. dev->mode_config.min_width = 0;
  95. dev->mode_config.min_height = 0;
  96. switch (dev_priv->card_type) {
  97. case NV_04:
  98. dev->mode_config.max_width = 2048;
  99. dev->mode_config.max_height = 2048;
  100. break;
  101. default:
  102. dev->mode_config.max_width = 4096;
  103. dev->mode_config.max_height = 4096;
  104. break;
  105. }
  106. dev->mode_config.fb_base = dev_priv->fb_phys;
  107. nv04_crtc_create(dev, 0);
  108. if (nv_two_heads(dev))
  109. nv04_crtc_create(dev, 1);
  110. for (i = 0; i < dcb->entries; i++) {
  111. struct dcb_entry *dcbent = &dcb->entry[i];
  112. switch (dcbent->type) {
  113. case OUTPUT_ANALOG:
  114. ret = nv04_dac_create(dev, dcbent);
  115. break;
  116. case OUTPUT_LVDS:
  117. case OUTPUT_TMDS:
  118. ret = nv04_dfp_create(dev, dcbent);
  119. break;
  120. case OUTPUT_TV:
  121. if (dcbent->location == DCB_LOC_ON_CHIP)
  122. ret = nv17_tv_create(dev, dcbent);
  123. else
  124. ret = nv04_tv_create(dev, dcbent);
  125. break;
  126. default:
  127. NV_WARN(dev, "DCB type %d not known\n", dcbent->type);
  128. continue;
  129. }
  130. if (ret)
  131. continue;
  132. }
  133. for (i = 0; i < dcb->connector.entries; i++)
  134. nouveau_connector_create(dev, &dcb->connector.entry[i]);
  135. /* Save previous state */
  136. NVLockVgaCrtcs(dev, false);
  137. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head)
  138. crtc->funcs->save(crtc);
  139. list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
  140. struct drm_encoder_helper_funcs *func = encoder->helper_private;
  141. func->save(encoder);
  142. }
  143. return 0;
  144. }
  145. void
  146. nv04_display_destroy(struct drm_device *dev)
  147. {
  148. struct drm_encoder *encoder;
  149. struct drm_crtc *crtc;
  150. NV_DEBUG_KMS(dev, "\n");
  151. /* Turn every CRTC off. */
  152. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  153. struct drm_mode_set modeset = {
  154. .crtc = crtc,
  155. };
  156. crtc->funcs->set_config(&modeset);
  157. }
  158. /* Restore state */
  159. NVLockVgaCrtcs(dev, false);
  160. list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
  161. struct drm_encoder_helper_funcs *func = encoder->helper_private;
  162. func->restore(encoder);
  163. }
  164. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head)
  165. crtc->funcs->restore(crtc);
  166. drm_mode_config_cleanup(dev);
  167. nouveau_hw_save_vga_fonts(dev, 0);
  168. }
  169. void
  170. nv04_display_restore(struct drm_device *dev)
  171. {
  172. struct drm_nouveau_private *dev_priv = dev->dev_private;
  173. struct drm_encoder *encoder;
  174. struct drm_crtc *crtc;
  175. NVLockVgaCrtcs(dev, false);
  176. /* meh.. modeset apparently doesn't setup all the regs and depends
  177. * on pre-existing state, for now load the state of the card *before*
  178. * nouveau was loaded, and then do a modeset.
  179. *
  180. * best thing to do probably is to make save/restore routines not
  181. * save/restore "pre-load" state, but more general so we can save
  182. * on suspend too.
  183. */
  184. list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
  185. struct drm_encoder_helper_funcs *func = encoder->helper_private;
  186. func->restore(encoder);
  187. }
  188. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head)
  189. crtc->funcs->restore(crtc);
  190. if (nv_two_heads(dev)) {
  191. NV_INFO(dev, "Restoring CRTC_OWNER to %d.\n",
  192. dev_priv->crtc_owner);
  193. NVSetOwner(dev, dev_priv->crtc_owner);
  194. }
  195. NVLockVgaCrtcs(dev, true);
  196. }