i915_drv.c 16 KB

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  1. /* i915_drv.c -- i830,i845,i855,i865,i915 driver -*- linux-c -*-
  2. */
  3. /*
  4. *
  5. * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
  6. * All Rights Reserved.
  7. *
  8. * Permission is hereby granted, free of charge, to any person obtaining a
  9. * copy of this software and associated documentation files (the
  10. * "Software"), to deal in the Software without restriction, including
  11. * without limitation the rights to use, copy, modify, merge, publish,
  12. * distribute, sub license, and/or sell copies of the Software, and to
  13. * permit persons to whom the Software is furnished to do so, subject to
  14. * the following conditions:
  15. *
  16. * The above copyright notice and this permission notice (including the
  17. * next paragraph) shall be included in all copies or substantial portions
  18. * of the Software.
  19. *
  20. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  21. * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  22. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  23. * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  24. * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  25. * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  26. * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  27. *
  28. */
  29. #include <linux/device.h>
  30. #include "drmP.h"
  31. #include "drm.h"
  32. #include "i915_drm.h"
  33. #include "i915_drv.h"
  34. #include <linux/console.h>
  35. #include "drm_crtc_helper.h"
  36. static int i915_modeset = -1;
  37. module_param_named(modeset, i915_modeset, int, 0400);
  38. unsigned int i915_fbpercrtc = 0;
  39. module_param_named(fbpercrtc, i915_fbpercrtc, int, 0400);
  40. unsigned int i915_powersave = 1;
  41. module_param_named(powersave, i915_powersave, int, 0400);
  42. unsigned int i915_lvds_downclock = 0;
  43. module_param_named(lvds_downclock, i915_lvds_downclock, int, 0400);
  44. static struct drm_driver driver;
  45. extern int intel_agp_enabled;
  46. #define INTEL_VGA_DEVICE(id, info) { \
  47. .class = PCI_CLASS_DISPLAY_VGA << 8, \
  48. .class_mask = 0xffff00, \
  49. .vendor = 0x8086, \
  50. .device = id, \
  51. .subvendor = PCI_ANY_ID, \
  52. .subdevice = PCI_ANY_ID, \
  53. .driver_data = (unsigned long) info }
  54. const static struct intel_device_info intel_i830_info = {
  55. .is_i8xx = 1, .is_mobile = 1, .cursor_needs_physical = 1,
  56. };
  57. const static struct intel_device_info intel_845g_info = {
  58. .is_i8xx = 1,
  59. };
  60. const static struct intel_device_info intel_i85x_info = {
  61. .is_i8xx = 1, .is_i85x = 1, .is_mobile = 1,
  62. .cursor_needs_physical = 1,
  63. };
  64. const static struct intel_device_info intel_i865g_info = {
  65. .is_i8xx = 1,
  66. };
  67. const static struct intel_device_info intel_i915g_info = {
  68. .is_i915g = 1, .is_i9xx = 1, .cursor_needs_physical = 1,
  69. };
  70. const static struct intel_device_info intel_i915gm_info = {
  71. .is_i9xx = 1, .is_mobile = 1,
  72. .cursor_needs_physical = 1,
  73. };
  74. const static struct intel_device_info intel_i945g_info = {
  75. .is_i9xx = 1, .has_hotplug = 1, .cursor_needs_physical = 1,
  76. };
  77. const static struct intel_device_info intel_i945gm_info = {
  78. .is_i945gm = 1, .is_i9xx = 1, .is_mobile = 1,
  79. .has_hotplug = 1, .cursor_needs_physical = 1,
  80. };
  81. const static struct intel_device_info intel_i965g_info = {
  82. .is_i965g = 1, .is_i9xx = 1, .has_hotplug = 1,
  83. };
  84. const static struct intel_device_info intel_i965gm_info = {
  85. .is_i965g = 1, .is_mobile = 1, .is_i965gm = 1, .is_i9xx = 1,
  86. .is_mobile = 1, .has_fbc = 1, .has_rc6 = 1,
  87. .has_hotplug = 1,
  88. };
  89. const static struct intel_device_info intel_g33_info = {
  90. .is_g33 = 1, .is_i9xx = 1, .need_gfx_hws = 1,
  91. .has_hotplug = 1,
  92. };
  93. const static struct intel_device_info intel_g45_info = {
  94. .is_i965g = 1, .is_g4x = 1, .is_i9xx = 1, .need_gfx_hws = 1,
  95. .has_pipe_cxsr = 1,
  96. .has_hotplug = 1,
  97. };
  98. const static struct intel_device_info intel_gm45_info = {
  99. .is_i965g = 1, .is_mobile = 1, .is_g4x = 1, .is_i9xx = 1,
  100. .is_mobile = 1, .need_gfx_hws = 1, .has_fbc = 1, .has_rc6 = 1,
  101. .has_pipe_cxsr = 1,
  102. .has_hotplug = 1,
  103. };
  104. const static struct intel_device_info intel_pineview_info = {
  105. .is_g33 = 1, .is_pineview = 1, .is_mobile = 1, .is_i9xx = 1,
  106. .need_gfx_hws = 1,
  107. .has_hotplug = 1,
  108. };
  109. const static struct intel_device_info intel_ironlake_d_info = {
  110. .is_ironlake = 1, .is_i965g = 1, .is_i9xx = 1, .need_gfx_hws = 1,
  111. .has_pipe_cxsr = 1,
  112. .has_hotplug = 1,
  113. };
  114. const static struct intel_device_info intel_ironlake_m_info = {
  115. .is_ironlake = 1, .is_mobile = 1, .is_i965g = 1, .is_i9xx = 1,
  116. .need_gfx_hws = 1, .has_rc6 = 1,
  117. .has_hotplug = 1,
  118. };
  119. const static struct intel_device_info intel_sandybridge_d_info = {
  120. .is_i965g = 1, .is_i9xx = 1, .need_gfx_hws = 1,
  121. .has_hotplug = 1, .is_gen6 = 1,
  122. };
  123. const static struct intel_device_info intel_sandybridge_m_info = {
  124. .is_i965g = 1, .is_mobile = 1, .is_i9xx = 1, .need_gfx_hws = 1,
  125. .has_hotplug = 1, .is_gen6 = 1,
  126. };
  127. const static struct pci_device_id pciidlist[] = {
  128. INTEL_VGA_DEVICE(0x3577, &intel_i830_info),
  129. INTEL_VGA_DEVICE(0x2562, &intel_845g_info),
  130. INTEL_VGA_DEVICE(0x3582, &intel_i85x_info),
  131. INTEL_VGA_DEVICE(0x358e, &intel_i85x_info),
  132. INTEL_VGA_DEVICE(0x2572, &intel_i865g_info),
  133. INTEL_VGA_DEVICE(0x2582, &intel_i915g_info),
  134. INTEL_VGA_DEVICE(0x258a, &intel_i915g_info),
  135. INTEL_VGA_DEVICE(0x2592, &intel_i915gm_info),
  136. INTEL_VGA_DEVICE(0x2772, &intel_i945g_info),
  137. INTEL_VGA_DEVICE(0x27a2, &intel_i945gm_info),
  138. INTEL_VGA_DEVICE(0x27ae, &intel_i945gm_info),
  139. INTEL_VGA_DEVICE(0x2972, &intel_i965g_info),
  140. INTEL_VGA_DEVICE(0x2982, &intel_i965g_info),
  141. INTEL_VGA_DEVICE(0x2992, &intel_i965g_info),
  142. INTEL_VGA_DEVICE(0x29a2, &intel_i965g_info),
  143. INTEL_VGA_DEVICE(0x29b2, &intel_g33_info),
  144. INTEL_VGA_DEVICE(0x29c2, &intel_g33_info),
  145. INTEL_VGA_DEVICE(0x29d2, &intel_g33_info),
  146. INTEL_VGA_DEVICE(0x2a02, &intel_i965gm_info),
  147. INTEL_VGA_DEVICE(0x2a12, &intel_i965gm_info),
  148. INTEL_VGA_DEVICE(0x2a42, &intel_gm45_info),
  149. INTEL_VGA_DEVICE(0x2e02, &intel_g45_info),
  150. INTEL_VGA_DEVICE(0x2e12, &intel_g45_info),
  151. INTEL_VGA_DEVICE(0x2e22, &intel_g45_info),
  152. INTEL_VGA_DEVICE(0x2e32, &intel_g45_info),
  153. INTEL_VGA_DEVICE(0x2e42, &intel_g45_info),
  154. INTEL_VGA_DEVICE(0xa001, &intel_pineview_info),
  155. INTEL_VGA_DEVICE(0xa011, &intel_pineview_info),
  156. INTEL_VGA_DEVICE(0x0042, &intel_ironlake_d_info),
  157. INTEL_VGA_DEVICE(0x0046, &intel_ironlake_m_info),
  158. INTEL_VGA_DEVICE(0x0102, &intel_sandybridge_d_info),
  159. INTEL_VGA_DEVICE(0x0106, &intel_sandybridge_m_info),
  160. {0, 0, 0}
  161. };
  162. #if defined(CONFIG_DRM_I915_KMS)
  163. MODULE_DEVICE_TABLE(pci, pciidlist);
  164. #endif
  165. static int i915_drm_freeze(struct drm_device *dev)
  166. {
  167. struct drm_i915_private *dev_priv = dev->dev_private;
  168. pci_save_state(dev->pdev);
  169. /* If KMS is active, we do the leavevt stuff here */
  170. if (drm_core_check_feature(dev, DRIVER_MODESET)) {
  171. int error = i915_gem_idle(dev);
  172. if (error) {
  173. dev_err(&dev->pdev->dev,
  174. "GEM idle failed, resume might fail\n");
  175. return error;
  176. }
  177. drm_irq_uninstall(dev);
  178. }
  179. i915_save_state(dev);
  180. intel_opregion_free(dev, 1);
  181. /* Modeset on resume, not lid events */
  182. dev_priv->modeset_on_lid = 0;
  183. return 0;
  184. }
  185. int i915_suspend(struct drm_device *dev, pm_message_t state)
  186. {
  187. int error;
  188. if (!dev || !dev->dev_private) {
  189. DRM_ERROR("dev: %p\n", dev);
  190. DRM_ERROR("DRM not initialized, aborting suspend.\n");
  191. return -ENODEV;
  192. }
  193. if (state.event == PM_EVENT_PRETHAW)
  194. return 0;
  195. error = i915_drm_freeze(dev);
  196. if (error)
  197. return error;
  198. if (state.event == PM_EVENT_SUSPEND) {
  199. /* Shut down the device */
  200. pci_disable_device(dev->pdev);
  201. pci_set_power_state(dev->pdev, PCI_D3hot);
  202. }
  203. return 0;
  204. }
  205. static int i915_drm_thaw(struct drm_device *dev)
  206. {
  207. struct drm_i915_private *dev_priv = dev->dev_private;
  208. int error = 0;
  209. i915_restore_state(dev);
  210. intel_opregion_init(dev, 1);
  211. /* KMS EnterVT equivalent */
  212. if (drm_core_check_feature(dev, DRIVER_MODESET)) {
  213. mutex_lock(&dev->struct_mutex);
  214. dev_priv->mm.suspended = 0;
  215. error = i915_gem_init_ringbuffer(dev);
  216. mutex_unlock(&dev->struct_mutex);
  217. drm_irq_install(dev);
  218. /* Resume the modeset for every activated CRTC */
  219. drm_helper_resume_force_mode(dev);
  220. }
  221. dev_priv->modeset_on_lid = 0;
  222. return error;
  223. }
  224. int i915_resume(struct drm_device *dev)
  225. {
  226. if (pci_enable_device(dev->pdev))
  227. return -EIO;
  228. pci_set_master(dev->pdev);
  229. return i915_drm_thaw(dev);
  230. }
  231. /**
  232. * i965_reset - reset chip after a hang
  233. * @dev: drm device to reset
  234. * @flags: reset domains
  235. *
  236. * Reset the chip. Useful if a hang is detected. Returns zero on successful
  237. * reset or otherwise an error code.
  238. *
  239. * Procedure is fairly simple:
  240. * - reset the chip using the reset reg
  241. * - re-init context state
  242. * - re-init hardware status page
  243. * - re-init ring buffer
  244. * - re-init interrupt state
  245. * - re-init display
  246. */
  247. int i965_reset(struct drm_device *dev, u8 flags)
  248. {
  249. drm_i915_private_t *dev_priv = dev->dev_private;
  250. unsigned long timeout;
  251. u8 gdrst;
  252. /*
  253. * We really should only reset the display subsystem if we actually
  254. * need to
  255. */
  256. bool need_display = true;
  257. mutex_lock(&dev->struct_mutex);
  258. /*
  259. * Clear request list
  260. */
  261. i915_gem_retire_requests(dev);
  262. if (need_display)
  263. i915_save_display(dev);
  264. if (IS_I965G(dev) || IS_G4X(dev)) {
  265. /*
  266. * Set the domains we want to reset, then the reset bit (bit 0).
  267. * Clear the reset bit after a while and wait for hardware status
  268. * bit (bit 1) to be set
  269. */
  270. pci_read_config_byte(dev->pdev, GDRST, &gdrst);
  271. pci_write_config_byte(dev->pdev, GDRST, gdrst | flags | ((flags == GDRST_FULL) ? 0x1 : 0x0));
  272. udelay(50);
  273. pci_write_config_byte(dev->pdev, GDRST, gdrst & 0xfe);
  274. /* ...we don't want to loop forever though, 500ms should be plenty */
  275. timeout = jiffies + msecs_to_jiffies(500);
  276. do {
  277. udelay(100);
  278. pci_read_config_byte(dev->pdev, GDRST, &gdrst);
  279. } while ((gdrst & 0x1) && time_after(timeout, jiffies));
  280. if (gdrst & 0x1) {
  281. WARN(true, "i915: Failed to reset chip\n");
  282. mutex_unlock(&dev->struct_mutex);
  283. return -EIO;
  284. }
  285. } else {
  286. DRM_ERROR("Error occurred. Don't know how to reset this chip.\n");
  287. return -ENODEV;
  288. }
  289. /* Ok, now get things going again... */
  290. /*
  291. * Everything depends on having the GTT running, so we need to start
  292. * there. Fortunately we don't need to do this unless we reset the
  293. * chip at a PCI level.
  294. *
  295. * Next we need to restore the context, but we don't use those
  296. * yet either...
  297. *
  298. * Ring buffer needs to be re-initialized in the KMS case, or if X
  299. * was running at the time of the reset (i.e. we weren't VT
  300. * switched away).
  301. */
  302. if (drm_core_check_feature(dev, DRIVER_MODESET) ||
  303. !dev_priv->mm.suspended) {
  304. drm_i915_ring_buffer_t *ring = &dev_priv->ring;
  305. struct drm_gem_object *obj = ring->ring_obj;
  306. struct drm_i915_gem_object *obj_priv = to_intel_bo(obj);
  307. dev_priv->mm.suspended = 0;
  308. /* Stop the ring if it's running. */
  309. I915_WRITE(PRB0_CTL, 0);
  310. I915_WRITE(PRB0_TAIL, 0);
  311. I915_WRITE(PRB0_HEAD, 0);
  312. /* Initialize the ring. */
  313. I915_WRITE(PRB0_START, obj_priv->gtt_offset);
  314. I915_WRITE(PRB0_CTL,
  315. ((obj->size - 4096) & RING_NR_PAGES) |
  316. RING_NO_REPORT |
  317. RING_VALID);
  318. if (!drm_core_check_feature(dev, DRIVER_MODESET))
  319. i915_kernel_lost_context(dev);
  320. else {
  321. ring->head = I915_READ(PRB0_HEAD) & HEAD_ADDR;
  322. ring->tail = I915_READ(PRB0_TAIL) & TAIL_ADDR;
  323. ring->space = ring->head - (ring->tail + 8);
  324. if (ring->space < 0)
  325. ring->space += ring->Size;
  326. }
  327. mutex_unlock(&dev->struct_mutex);
  328. drm_irq_uninstall(dev);
  329. drm_irq_install(dev);
  330. mutex_lock(&dev->struct_mutex);
  331. }
  332. /*
  333. * Display needs restore too...
  334. */
  335. if (need_display)
  336. i915_restore_display(dev);
  337. mutex_unlock(&dev->struct_mutex);
  338. return 0;
  339. }
  340. static int __devinit
  341. i915_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  342. {
  343. return drm_get_dev(pdev, ent, &driver);
  344. }
  345. static void
  346. i915_pci_remove(struct pci_dev *pdev)
  347. {
  348. struct drm_device *dev = pci_get_drvdata(pdev);
  349. drm_put_dev(dev);
  350. }
  351. static int i915_pm_suspend(struct device *dev)
  352. {
  353. struct pci_dev *pdev = to_pci_dev(dev);
  354. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  355. int error;
  356. if (!drm_dev || !drm_dev->dev_private) {
  357. dev_err(dev, "DRM not initialized, aborting suspend.\n");
  358. return -ENODEV;
  359. }
  360. error = i915_drm_freeze(drm_dev);
  361. if (error)
  362. return error;
  363. pci_disable_device(pdev);
  364. pci_set_power_state(pdev, PCI_D3hot);
  365. return 0;
  366. }
  367. static int i915_pm_resume(struct device *dev)
  368. {
  369. struct pci_dev *pdev = to_pci_dev(dev);
  370. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  371. return i915_resume(drm_dev);
  372. }
  373. static int i915_pm_freeze(struct device *dev)
  374. {
  375. struct pci_dev *pdev = to_pci_dev(dev);
  376. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  377. if (!drm_dev || !drm_dev->dev_private) {
  378. dev_err(dev, "DRM not initialized, aborting suspend.\n");
  379. return -ENODEV;
  380. }
  381. return i915_drm_freeze(drm_dev);
  382. }
  383. static int i915_pm_thaw(struct device *dev)
  384. {
  385. struct pci_dev *pdev = to_pci_dev(dev);
  386. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  387. return i915_drm_thaw(drm_dev);
  388. }
  389. static int i915_pm_poweroff(struct device *dev)
  390. {
  391. struct pci_dev *pdev = to_pci_dev(dev);
  392. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  393. return i915_drm_freeze(drm_dev);
  394. }
  395. const struct dev_pm_ops i915_pm_ops = {
  396. .suspend = i915_pm_suspend,
  397. .resume = i915_pm_resume,
  398. .freeze = i915_pm_freeze,
  399. .thaw = i915_pm_thaw,
  400. .poweroff = i915_pm_poweroff,
  401. .restore = i915_pm_resume,
  402. };
  403. static struct vm_operations_struct i915_gem_vm_ops = {
  404. .fault = i915_gem_fault,
  405. .open = drm_gem_vm_open,
  406. .close = drm_gem_vm_close,
  407. };
  408. static struct drm_driver driver = {
  409. /* don't use mtrr's here, the Xserver or user space app should
  410. * deal with them for intel hardware.
  411. */
  412. .driver_features =
  413. DRIVER_USE_AGP | DRIVER_REQUIRE_AGP | /* DRIVER_USE_MTRR |*/
  414. DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM,
  415. .load = i915_driver_load,
  416. .unload = i915_driver_unload,
  417. .open = i915_driver_open,
  418. .lastclose = i915_driver_lastclose,
  419. .preclose = i915_driver_preclose,
  420. .postclose = i915_driver_postclose,
  421. /* Used in place of i915_pm_ops for non-DRIVER_MODESET */
  422. .suspend = i915_suspend,
  423. .resume = i915_resume,
  424. .device_is_agp = i915_driver_device_is_agp,
  425. .enable_vblank = i915_enable_vblank,
  426. .disable_vblank = i915_disable_vblank,
  427. .irq_preinstall = i915_driver_irq_preinstall,
  428. .irq_postinstall = i915_driver_irq_postinstall,
  429. .irq_uninstall = i915_driver_irq_uninstall,
  430. .irq_handler = i915_driver_irq_handler,
  431. .reclaim_buffers = drm_core_reclaim_buffers,
  432. .get_map_ofs = drm_core_get_map_ofs,
  433. .get_reg_ofs = drm_core_get_reg_ofs,
  434. .master_create = i915_master_create,
  435. .master_destroy = i915_master_destroy,
  436. #if defined(CONFIG_DEBUG_FS)
  437. .debugfs_init = i915_debugfs_init,
  438. .debugfs_cleanup = i915_debugfs_cleanup,
  439. #endif
  440. .gem_init_object = i915_gem_init_object,
  441. .gem_free_object = i915_gem_free_object,
  442. .gem_vm_ops = &i915_gem_vm_ops,
  443. .ioctls = i915_ioctls,
  444. .fops = {
  445. .owner = THIS_MODULE,
  446. .open = drm_open,
  447. .release = drm_release,
  448. .unlocked_ioctl = drm_ioctl,
  449. .mmap = drm_gem_mmap,
  450. .poll = drm_poll,
  451. .fasync = drm_fasync,
  452. .read = drm_read,
  453. #ifdef CONFIG_COMPAT
  454. .compat_ioctl = i915_compat_ioctl,
  455. #endif
  456. },
  457. .pci_driver = {
  458. .name = DRIVER_NAME,
  459. .id_table = pciidlist,
  460. .probe = i915_pci_probe,
  461. .remove = i915_pci_remove,
  462. .driver.pm = &i915_pm_ops,
  463. },
  464. .name = DRIVER_NAME,
  465. .desc = DRIVER_DESC,
  466. .date = DRIVER_DATE,
  467. .major = DRIVER_MAJOR,
  468. .minor = DRIVER_MINOR,
  469. .patchlevel = DRIVER_PATCHLEVEL,
  470. };
  471. static int __init i915_init(void)
  472. {
  473. if (!intel_agp_enabled) {
  474. DRM_ERROR("drm/i915 can't work without intel_agp module!\n");
  475. return -ENODEV;
  476. }
  477. driver.num_ioctls = i915_max_ioctl;
  478. i915_gem_shrinker_init();
  479. /*
  480. * If CONFIG_DRM_I915_KMS is set, default to KMS unless
  481. * explicitly disabled with the module pararmeter.
  482. *
  483. * Otherwise, just follow the parameter (defaulting to off).
  484. *
  485. * Allow optional vga_text_mode_force boot option to override
  486. * the default behavior.
  487. */
  488. #if defined(CONFIG_DRM_I915_KMS)
  489. if (i915_modeset != 0)
  490. driver.driver_features |= DRIVER_MODESET;
  491. #endif
  492. if (i915_modeset == 1)
  493. driver.driver_features |= DRIVER_MODESET;
  494. #ifdef CONFIG_VGA_CONSOLE
  495. if (vgacon_text_force() && i915_modeset == -1)
  496. driver.driver_features &= ~DRIVER_MODESET;
  497. #endif
  498. if (!(driver.driver_features & DRIVER_MODESET)) {
  499. driver.suspend = i915_suspend;
  500. driver.resume = i915_resume;
  501. }
  502. return drm_init(&driver);
  503. }
  504. static void __exit i915_exit(void)
  505. {
  506. i915_gem_shrinker_exit();
  507. drm_exit(&driver);
  508. }
  509. module_init(i915_init);
  510. module_exit(i915_exit);
  511. MODULE_AUTHOR(DRIVER_AUTHOR);
  512. MODULE_DESCRIPTION(DRIVER_DESC);
  513. MODULE_LICENSE("GPL and additional rights");