drm_edid.c 45 KB

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  1. /*
  2. * Copyright (c) 2006 Luc Verhaegen (quirks list)
  3. * Copyright (c) 2007-2008 Intel Corporation
  4. * Jesse Barnes <jesse.barnes@intel.com>
  5. *
  6. * DDC probing routines (drm_ddc_read & drm_do_probe_ddc_edid) originally from
  7. * FB layer.
  8. * Copyright (C) 2006 Dennis Munsie <dmunsie@cecropia.com>
  9. *
  10. * Permission is hereby granted, free of charge, to any person obtaining a
  11. * copy of this software and associated documentation files (the "Software"),
  12. * to deal in the Software without restriction, including without limitation
  13. * the rights to use, copy, modify, merge, publish, distribute, sub license,
  14. * and/or sell copies of the Software, and to permit persons to whom the
  15. * Software is furnished to do so, subject to the following conditions:
  16. *
  17. * The above copyright notice and this permission notice (including the
  18. * next paragraph) shall be included in all copies or substantial portions
  19. * of the Software.
  20. *
  21. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  22. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  23. * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  24. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  25. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  26. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  27. * DEALINGS IN THE SOFTWARE.
  28. */
  29. #include <linux/kernel.h>
  30. #include <linux/slab.h>
  31. #include <linux/i2c.h>
  32. #include <linux/i2c-algo-bit.h>
  33. #include "drmP.h"
  34. #include "drm_edid.h"
  35. /*
  36. * TODO:
  37. * - support EDID 1.4 (incl. CE blocks)
  38. */
  39. /*
  40. * EDID blocks out in the wild have a variety of bugs, try to collect
  41. * them here (note that userspace may work around broken monitors first,
  42. * but fixes should make their way here so that the kernel "just works"
  43. * on as many displays as possible).
  44. */
  45. /* First detailed mode wrong, use largest 60Hz mode */
  46. #define EDID_QUIRK_PREFER_LARGE_60 (1 << 0)
  47. /* Reported 135MHz pixel clock is too high, needs adjustment */
  48. #define EDID_QUIRK_135_CLOCK_TOO_HIGH (1 << 1)
  49. /* Prefer the largest mode at 75 Hz */
  50. #define EDID_QUIRK_PREFER_LARGE_75 (1 << 2)
  51. /* Detail timing is in cm not mm */
  52. #define EDID_QUIRK_DETAILED_IN_CM (1 << 3)
  53. /* Detailed timing descriptors have bogus size values, so just take the
  54. * maximum size and use that.
  55. */
  56. #define EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE (1 << 4)
  57. /* Monitor forgot to set the first detailed is preferred bit. */
  58. #define EDID_QUIRK_FIRST_DETAILED_PREFERRED (1 << 5)
  59. /* use +hsync +vsync for detailed mode */
  60. #define EDID_QUIRK_DETAILED_SYNC_PP (1 << 6)
  61. #define LEVEL_DMT 0
  62. #define LEVEL_GTF 1
  63. #define LEVEL_CVT 2
  64. static struct edid_quirk {
  65. char *vendor;
  66. int product_id;
  67. u32 quirks;
  68. } edid_quirk_list[] = {
  69. /* Acer AL1706 */
  70. { "ACR", 44358, EDID_QUIRK_PREFER_LARGE_60 },
  71. /* Acer F51 */
  72. { "API", 0x7602, EDID_QUIRK_PREFER_LARGE_60 },
  73. /* Unknown Acer */
  74. { "ACR", 2423, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
  75. /* Belinea 10 15 55 */
  76. { "MAX", 1516, EDID_QUIRK_PREFER_LARGE_60 },
  77. { "MAX", 0x77e, EDID_QUIRK_PREFER_LARGE_60 },
  78. /* Envision Peripherals, Inc. EN-7100e */
  79. { "EPI", 59264, EDID_QUIRK_135_CLOCK_TOO_HIGH },
  80. /* Envision EN2028 */
  81. { "EPI", 8232, EDID_QUIRK_PREFER_LARGE_60 },
  82. /* Funai Electronics PM36B */
  83. { "FCM", 13600, EDID_QUIRK_PREFER_LARGE_75 |
  84. EDID_QUIRK_DETAILED_IN_CM },
  85. /* LG Philips LCD LP154W01-A5 */
  86. { "LPL", 0, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
  87. { "LPL", 0x2a00, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
  88. /* Philips 107p5 CRT */
  89. { "PHL", 57364, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
  90. /* Proview AY765C */
  91. { "PTS", 765, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
  92. /* Samsung SyncMaster 205BW. Note: irony */
  93. { "SAM", 541, EDID_QUIRK_DETAILED_SYNC_PP },
  94. /* Samsung SyncMaster 22[5-6]BW */
  95. { "SAM", 596, EDID_QUIRK_PREFER_LARGE_60 },
  96. { "SAM", 638, EDID_QUIRK_PREFER_LARGE_60 },
  97. };
  98. /* Valid EDID header has these bytes */
  99. static const u8 edid_header[] = {
  100. 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00
  101. };
  102. /**
  103. * drm_edid_is_valid - sanity check EDID data
  104. * @edid: EDID data
  105. *
  106. * Sanity check the EDID block by looking at the header, the version number
  107. * and the checksum. Return 0 if the EDID doesn't check out, or 1 if it's
  108. * valid.
  109. */
  110. bool drm_edid_is_valid(struct edid *edid)
  111. {
  112. int i, score = 0;
  113. u8 csum = 0;
  114. u8 *raw_edid = (u8 *)edid;
  115. for (i = 0; i < sizeof(edid_header); i++)
  116. if (raw_edid[i] == edid_header[i])
  117. score++;
  118. if (score == 8) ;
  119. else if (score >= 6) {
  120. DRM_DEBUG("Fixing EDID header, your hardware may be failing\n");
  121. memcpy(raw_edid, edid_header, sizeof(edid_header));
  122. } else
  123. goto bad;
  124. for (i = 0; i < EDID_LENGTH; i++)
  125. csum += raw_edid[i];
  126. if (csum) {
  127. DRM_ERROR("EDID checksum is invalid, remainder is %d\n", csum);
  128. goto bad;
  129. }
  130. if (edid->version != 1) {
  131. DRM_ERROR("EDID has major version %d, instead of 1\n", edid->version);
  132. goto bad;
  133. }
  134. if (edid->revision > 4)
  135. DRM_DEBUG("EDID minor > 4, assuming backward compatibility\n");
  136. return 1;
  137. bad:
  138. if (raw_edid) {
  139. DRM_ERROR("Raw EDID:\n");
  140. print_hex_dump_bytes(KERN_ERR, DUMP_PREFIX_NONE, raw_edid, EDID_LENGTH);
  141. printk("\n");
  142. }
  143. return 0;
  144. }
  145. EXPORT_SYMBOL(drm_edid_is_valid);
  146. /**
  147. * edid_vendor - match a string against EDID's obfuscated vendor field
  148. * @edid: EDID to match
  149. * @vendor: vendor string
  150. *
  151. * Returns true if @vendor is in @edid, false otherwise
  152. */
  153. static bool edid_vendor(struct edid *edid, char *vendor)
  154. {
  155. char edid_vendor[3];
  156. edid_vendor[0] = ((edid->mfg_id[0] & 0x7c) >> 2) + '@';
  157. edid_vendor[1] = (((edid->mfg_id[0] & 0x3) << 3) |
  158. ((edid->mfg_id[1] & 0xe0) >> 5)) + '@';
  159. edid_vendor[2] = (edid->mfg_id[1] & 0x1f) + '@';
  160. return !strncmp(edid_vendor, vendor, 3);
  161. }
  162. /**
  163. * edid_get_quirks - return quirk flags for a given EDID
  164. * @edid: EDID to process
  165. *
  166. * This tells subsequent routines what fixes they need to apply.
  167. */
  168. static u32 edid_get_quirks(struct edid *edid)
  169. {
  170. struct edid_quirk *quirk;
  171. int i;
  172. for (i = 0; i < ARRAY_SIZE(edid_quirk_list); i++) {
  173. quirk = &edid_quirk_list[i];
  174. if (edid_vendor(edid, quirk->vendor) &&
  175. (EDID_PRODUCT_ID(edid) == quirk->product_id))
  176. return quirk->quirks;
  177. }
  178. return 0;
  179. }
  180. #define MODE_SIZE(m) ((m)->hdisplay * (m)->vdisplay)
  181. #define MODE_REFRESH_DIFF(m,r) (abs((m)->vrefresh - target_refresh))
  182. /**
  183. * edid_fixup_preferred - set preferred modes based on quirk list
  184. * @connector: has mode list to fix up
  185. * @quirks: quirks list
  186. *
  187. * Walk the mode list for @connector, clearing the preferred status
  188. * on existing modes and setting it anew for the right mode ala @quirks.
  189. */
  190. static void edid_fixup_preferred(struct drm_connector *connector,
  191. u32 quirks)
  192. {
  193. struct drm_display_mode *t, *cur_mode, *preferred_mode;
  194. int target_refresh = 0;
  195. if (list_empty(&connector->probed_modes))
  196. return;
  197. if (quirks & EDID_QUIRK_PREFER_LARGE_60)
  198. target_refresh = 60;
  199. if (quirks & EDID_QUIRK_PREFER_LARGE_75)
  200. target_refresh = 75;
  201. preferred_mode = list_first_entry(&connector->probed_modes,
  202. struct drm_display_mode, head);
  203. list_for_each_entry_safe(cur_mode, t, &connector->probed_modes, head) {
  204. cur_mode->type &= ~DRM_MODE_TYPE_PREFERRED;
  205. if (cur_mode == preferred_mode)
  206. continue;
  207. /* Largest mode is preferred */
  208. if (MODE_SIZE(cur_mode) > MODE_SIZE(preferred_mode))
  209. preferred_mode = cur_mode;
  210. /* At a given size, try to get closest to target refresh */
  211. if ((MODE_SIZE(cur_mode) == MODE_SIZE(preferred_mode)) &&
  212. MODE_REFRESH_DIFF(cur_mode, target_refresh) <
  213. MODE_REFRESH_DIFF(preferred_mode, target_refresh)) {
  214. preferred_mode = cur_mode;
  215. }
  216. }
  217. preferred_mode->type |= DRM_MODE_TYPE_PREFERRED;
  218. }
  219. /*
  220. * Add the Autogenerated from the DMT spec.
  221. * This table is copied from xfree86/modes/xf86EdidModes.c.
  222. * But the mode with Reduced blank feature is deleted.
  223. */
  224. static struct drm_display_mode drm_dmt_modes[] = {
  225. /* 640x350@85Hz */
  226. { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 31500, 640, 672,
  227. 736, 832, 0, 350, 382, 385, 445, 0,
  228. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
  229. /* 640x400@85Hz */
  230. { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 31500, 640, 672,
  231. 736, 832, 0, 400, 401, 404, 445, 0,
  232. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  233. /* 720x400@85Hz */
  234. { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 756,
  235. 828, 936, 0, 400, 401, 404, 446, 0,
  236. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  237. /* 640x480@60Hz */
  238. { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
  239. 752, 800, 0, 480, 489, 492, 525, 0,
  240. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
  241. /* 640x480@72Hz */
  242. { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664,
  243. 704, 832, 0, 480, 489, 492, 520, 0,
  244. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
  245. /* 640x480@75Hz */
  246. { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656,
  247. 720, 840, 0, 480, 481, 484, 500, 0,
  248. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
  249. /* 640x480@85Hz */
  250. { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 36000, 640, 696,
  251. 752, 832, 0, 480, 481, 484, 509, 0,
  252. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
  253. /* 800x600@56Hz */
  254. { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824,
  255. 896, 1024, 0, 600, 601, 603, 625, 0,
  256. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  257. /* 800x600@60Hz */
  258. { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
  259. 968, 1056, 0, 600, 601, 605, 628, 0,
  260. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  261. /* 800x600@72Hz */
  262. { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856,
  263. 976, 1040, 0, 600, 637, 643, 666, 0,
  264. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  265. /* 800x600@75Hz */
  266. { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816,
  267. 896, 1056, 0, 600, 601, 604, 625, 0,
  268. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  269. /* 800x600@85Hz */
  270. { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 56250, 800, 832,
  271. 896, 1048, 0, 600, 601, 604, 631, 0,
  272. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  273. /* 848x480@60Hz */
  274. { DRM_MODE("848x480", DRM_MODE_TYPE_DRIVER, 33750, 848, 864,
  275. 976, 1088, 0, 480, 486, 494, 517, 0,
  276. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  277. /* 1024x768@43Hz, interlace */
  278. { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 44900, 1024, 1032,
  279. 1208, 1264, 0, 768, 768, 772, 817, 0,
  280. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
  281. DRM_MODE_FLAG_INTERLACE) },
  282. /* 1024x768@60Hz */
  283. { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
  284. 1184, 1344, 0, 768, 771, 777, 806, 0,
  285. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
  286. /* 1024x768@70Hz */
  287. { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048,
  288. 1184, 1328, 0, 768, 771, 777, 806, 0,
  289. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
  290. /* 1024x768@75Hz */
  291. { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78750, 1024, 1040,
  292. 1136, 1312, 0, 768, 769, 772, 800, 0,
  293. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  294. /* 1024x768@85Hz */
  295. { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 94500, 1024, 1072,
  296. 1072, 1376, 0, 768, 769, 772, 808, 0,
  297. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  298. /* 1152x864@75Hz */
  299. { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
  300. 1344, 1600, 0, 864, 865, 868, 900, 0,
  301. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  302. /* 1280x768@60Hz */
  303. { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344,
  304. 1472, 1664, 0, 768, 771, 778, 798, 0,
  305. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  306. /* 1280x768@75Hz */
  307. { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 102250, 1280, 1360,
  308. 1488, 1696, 0, 768, 771, 778, 805, 0,
  309. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
  310. /* 1280x768@85Hz */
  311. { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 117500, 1280, 1360,
  312. 1496, 1712, 0, 768, 771, 778, 809, 0,
  313. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  314. /* 1280x800@60Hz */
  315. { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352,
  316. 1480, 1680, 0, 800, 803, 809, 831, 0,
  317. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
  318. /* 1280x800@75Hz */
  319. { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 106500, 1280, 1360,
  320. 1488, 1696, 0, 800, 803, 809, 838, 0,
  321. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  322. /* 1280x800@85Hz */
  323. { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 122500, 1280, 1360,
  324. 1496, 1712, 0, 800, 803, 809, 843, 0,
  325. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  326. /* 1280x960@60Hz */
  327. { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376,
  328. 1488, 1800, 0, 960, 961, 964, 1000, 0,
  329. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  330. /* 1280x960@85Hz */
  331. { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1344,
  332. 1504, 1728, 0, 960, 961, 964, 1011, 0,
  333. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  334. /* 1280x1024@60Hz */
  335. { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328,
  336. 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
  337. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  338. /* 1280x1024@75Hz */
  339. { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296,
  340. 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
  341. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  342. /* 1280x1024@85Hz */
  343. { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 157500, 1280, 1344,
  344. 1504, 1728, 0, 1024, 1025, 1028, 1072, 0,
  345. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  346. /* 1360x768@60Hz */
  347. { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424,
  348. 1536, 1792, 0, 768, 771, 777, 795, 0,
  349. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  350. /* 1440x1050@60Hz */
  351. { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488,
  352. 1632, 1864, 0, 1050, 1053, 1057, 1089, 0,
  353. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  354. /* 1440x1050@75Hz */
  355. { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 156000, 1400, 1504,
  356. 1648, 1896, 0, 1050, 1053, 1057, 1099, 0,
  357. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  358. /* 1440x1050@85Hz */
  359. { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 179500, 1400, 1504,
  360. 1656, 1912, 0, 1050, 1053, 1057, 1105, 0,
  361. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  362. /* 1440x900@60Hz */
  363. { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520,
  364. 1672, 1904, 0, 900, 903, 909, 934, 0,
  365. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  366. /* 1440x900@75Hz */
  367. { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 136750, 1440, 1536,
  368. 1688, 1936, 0, 900, 903, 909, 942, 0,
  369. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  370. /* 1440x900@85Hz */
  371. { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 157000, 1440, 1544,
  372. 1696, 1952, 0, 900, 903, 909, 948, 0,
  373. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  374. /* 1600x1200@60Hz */
  375. { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664,
  376. 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
  377. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  378. /* 1600x1200@65Hz */
  379. { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 175500, 1600, 1664,
  380. 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
  381. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  382. /* 1600x1200@70Hz */
  383. { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 189000, 1600, 1664,
  384. 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
  385. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  386. /* 1600x1200@75Hz */
  387. { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 2025000, 1600, 1664,
  388. 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
  389. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  390. /* 1600x1200@85Hz */
  391. { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 229500, 1600, 1664,
  392. 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
  393. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  394. /* 1680x1050@60Hz */
  395. { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784,
  396. 1960, 2240, 0, 1050, 1053, 1059, 1089, 0,
  397. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  398. /* 1680x1050@75Hz */
  399. { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 187000, 1680, 1800,
  400. 1976, 2272, 0, 1050, 1053, 1059, 1099, 0,
  401. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  402. /* 1680x1050@85Hz */
  403. { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 214750, 1680, 1808,
  404. 1984, 2288, 0, 1050, 1053, 1059, 1105, 0,
  405. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  406. /* 1792x1344@60Hz */
  407. { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920,
  408. 2120, 2448, 0, 1344, 1345, 1348, 1394, 0,
  409. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  410. /* 1729x1344@75Hz */
  411. { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 261000, 1792, 1888,
  412. 2104, 2456, 0, 1344, 1345, 1348, 1417, 0,
  413. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  414. /* 1853x1392@60Hz */
  415. { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952,
  416. 2176, 2528, 0, 1392, 1393, 1396, 1439, 0,
  417. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  418. /* 1856x1392@75Hz */
  419. { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 288000, 1856, 1984,
  420. 2208, 2560, 0, 1392, 1395, 1399, 1500, 0,
  421. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  422. /* 1920x1200@60Hz */
  423. { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056,
  424. 2256, 2592, 0, 1200, 1203, 1209, 1245, 0,
  425. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  426. /* 1920x1200@75Hz */
  427. { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 245250, 1920, 2056,
  428. 2264, 2608, 0, 1200, 1203, 1209, 1255, 0,
  429. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  430. /* 1920x1200@85Hz */
  431. { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 281250, 1920, 2064,
  432. 2272, 2624, 0, 1200, 1203, 1209, 1262, 0,
  433. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  434. /* 1920x1440@60Hz */
  435. { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048,
  436. 2256, 2600, 0, 1440, 1441, 1444, 1500, 0,
  437. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  438. /* 1920x1440@75Hz */
  439. { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2064,
  440. 2288, 2640, 0, 1440, 1441, 1444, 1500, 0,
  441. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  442. /* 2560x1600@60Hz */
  443. { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752,
  444. 3032, 3504, 0, 1600, 1603, 1609, 1658, 0,
  445. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  446. /* 2560x1600@75HZ */
  447. { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 443250, 2560, 2768,
  448. 3048, 3536, 0, 1600, 1603, 1609, 1672, 0,
  449. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  450. /* 2560x1600@85HZ */
  451. { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 505250, 2560, 2768,
  452. 3048, 3536, 0, 1600, 1603, 1609, 1682, 0,
  453. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  454. };
  455. static const int drm_num_dmt_modes =
  456. sizeof(drm_dmt_modes) / sizeof(struct drm_display_mode);
  457. static struct drm_display_mode *drm_find_dmt(struct drm_device *dev,
  458. int hsize, int vsize, int fresh)
  459. {
  460. int i;
  461. struct drm_display_mode *ptr, *mode;
  462. mode = NULL;
  463. for (i = 0; i < drm_num_dmt_modes; i++) {
  464. ptr = &drm_dmt_modes[i];
  465. if (hsize == ptr->hdisplay &&
  466. vsize == ptr->vdisplay &&
  467. fresh == drm_mode_vrefresh(ptr)) {
  468. /* get the expected default mode */
  469. mode = drm_mode_duplicate(dev, ptr);
  470. break;
  471. }
  472. }
  473. return mode;
  474. }
  475. /*
  476. * 0 is reserved. The spec says 0x01 fill for unused timings. Some old
  477. * monitors fill with ascii space (0x20) instead.
  478. */
  479. static int
  480. bad_std_timing(u8 a, u8 b)
  481. {
  482. return (a == 0x00 && b == 0x00) ||
  483. (a == 0x01 && b == 0x01) ||
  484. (a == 0x20 && b == 0x20);
  485. }
  486. /**
  487. * drm_mode_std - convert standard mode info (width, height, refresh) into mode
  488. * @t: standard timing params
  489. * @timing_level: standard timing level
  490. *
  491. * Take the standard timing params (in this case width, aspect, and refresh)
  492. * and convert them into a real mode using CVT/GTF/DMT.
  493. *
  494. * Punts for now, but should eventually use the FB layer's CVT based mode
  495. * generation code.
  496. */
  497. struct drm_display_mode *drm_mode_std(struct drm_device *dev,
  498. struct std_timing *t,
  499. int revision,
  500. int timing_level)
  501. {
  502. struct drm_display_mode *mode;
  503. int hsize, vsize;
  504. int vrefresh_rate;
  505. unsigned aspect_ratio = (t->vfreq_aspect & EDID_TIMING_ASPECT_MASK)
  506. >> EDID_TIMING_ASPECT_SHIFT;
  507. unsigned vfreq = (t->vfreq_aspect & EDID_TIMING_VFREQ_MASK)
  508. >> EDID_TIMING_VFREQ_SHIFT;
  509. if (bad_std_timing(t->hsize, t->vfreq_aspect))
  510. return NULL;
  511. /* According to the EDID spec, the hdisplay = hsize * 8 + 248 */
  512. hsize = t->hsize * 8 + 248;
  513. /* vrefresh_rate = vfreq + 60 */
  514. vrefresh_rate = vfreq + 60;
  515. /* the vdisplay is calculated based on the aspect ratio */
  516. if (aspect_ratio == 0) {
  517. if (revision < 3)
  518. vsize = hsize;
  519. else
  520. vsize = (hsize * 10) / 16;
  521. } else if (aspect_ratio == 1)
  522. vsize = (hsize * 3) / 4;
  523. else if (aspect_ratio == 2)
  524. vsize = (hsize * 4) / 5;
  525. else
  526. vsize = (hsize * 9) / 16;
  527. /* HDTV hack */
  528. if (hsize == 1360 && vsize == 765 && vrefresh_rate == 60) {
  529. mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0,
  530. false);
  531. mode->hdisplay = 1366;
  532. mode->vsync_start = mode->vsync_start - 1;
  533. mode->vsync_end = mode->vsync_end - 1;
  534. return mode;
  535. }
  536. mode = NULL;
  537. /* check whether it can be found in default mode table */
  538. mode = drm_find_dmt(dev, hsize, vsize, vrefresh_rate);
  539. if (mode)
  540. return mode;
  541. switch (timing_level) {
  542. case LEVEL_DMT:
  543. break;
  544. case LEVEL_GTF:
  545. mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
  546. break;
  547. case LEVEL_CVT:
  548. mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0,
  549. false);
  550. break;
  551. }
  552. return mode;
  553. }
  554. /*
  555. * EDID is delightfully ambiguous about how interlaced modes are to be
  556. * encoded. Our internal representation is of frame height, but some
  557. * HDTV detailed timings are encoded as field height.
  558. *
  559. * The format list here is from CEA, in frame size. Technically we
  560. * should be checking refresh rate too. Whatever.
  561. */
  562. static void
  563. drm_mode_do_interlace_quirk(struct drm_display_mode *mode,
  564. struct detailed_pixel_timing *pt)
  565. {
  566. int i;
  567. static const struct {
  568. int w, h;
  569. } cea_interlaced[] = {
  570. { 1920, 1080 },
  571. { 720, 480 },
  572. { 1440, 480 },
  573. { 2880, 480 },
  574. { 720, 576 },
  575. { 1440, 576 },
  576. { 2880, 576 },
  577. };
  578. static const int n_sizes =
  579. sizeof(cea_interlaced)/sizeof(cea_interlaced[0]);
  580. if (!(pt->misc & DRM_EDID_PT_INTERLACED))
  581. return;
  582. for (i = 0; i < n_sizes; i++) {
  583. if ((mode->hdisplay == cea_interlaced[i].w) &&
  584. (mode->vdisplay == cea_interlaced[i].h / 2)) {
  585. mode->vdisplay *= 2;
  586. mode->vsync_start *= 2;
  587. mode->vsync_end *= 2;
  588. mode->vtotal *= 2;
  589. mode->vtotal |= 1;
  590. }
  591. }
  592. mode->flags |= DRM_MODE_FLAG_INTERLACE;
  593. }
  594. /**
  595. * drm_mode_detailed - create a new mode from an EDID detailed timing section
  596. * @dev: DRM device (needed to create new mode)
  597. * @edid: EDID block
  598. * @timing: EDID detailed timing info
  599. * @quirks: quirks to apply
  600. *
  601. * An EDID detailed timing block contains enough info for us to create and
  602. * return a new struct drm_display_mode.
  603. */
  604. static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev,
  605. struct edid *edid,
  606. struct detailed_timing *timing,
  607. u32 quirks)
  608. {
  609. struct drm_display_mode *mode;
  610. struct detailed_pixel_timing *pt = &timing->data.pixel_data;
  611. unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 | pt->hactive_lo;
  612. unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo;
  613. unsigned hblank = (pt->hactive_hblank_hi & 0xf) << 8 | pt->hblank_lo;
  614. unsigned vblank = (pt->vactive_vblank_hi & 0xf) << 8 | pt->vblank_lo;
  615. unsigned hsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc0) << 2 | pt->hsync_offset_lo;
  616. unsigned hsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x30) << 4 | pt->hsync_pulse_width_lo;
  617. unsigned vsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc) >> 2 | pt->vsync_offset_pulse_width_lo >> 4;
  618. unsigned vsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x3) << 4 | (pt->vsync_offset_pulse_width_lo & 0xf);
  619. /* ignore tiny modes */
  620. if (hactive < 64 || vactive < 64)
  621. return NULL;
  622. if (pt->misc & DRM_EDID_PT_STEREO) {
  623. printk(KERN_WARNING "stereo mode not supported\n");
  624. return NULL;
  625. }
  626. if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) {
  627. printk(KERN_WARNING "composite sync not supported\n");
  628. }
  629. /* it is incorrect if hsync/vsync width is zero */
  630. if (!hsync_pulse_width || !vsync_pulse_width) {
  631. DRM_DEBUG_KMS("Incorrect Detailed timing. "
  632. "Wrong Hsync/Vsync pulse width\n");
  633. return NULL;
  634. }
  635. mode = drm_mode_create(dev);
  636. if (!mode)
  637. return NULL;
  638. mode->type = DRM_MODE_TYPE_DRIVER;
  639. if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH)
  640. timing->pixel_clock = cpu_to_le16(1088);
  641. mode->clock = le16_to_cpu(timing->pixel_clock) * 10;
  642. mode->hdisplay = hactive;
  643. mode->hsync_start = mode->hdisplay + hsync_offset;
  644. mode->hsync_end = mode->hsync_start + hsync_pulse_width;
  645. mode->htotal = mode->hdisplay + hblank;
  646. mode->vdisplay = vactive;
  647. mode->vsync_start = mode->vdisplay + vsync_offset;
  648. mode->vsync_end = mode->vsync_start + vsync_pulse_width;
  649. mode->vtotal = mode->vdisplay + vblank;
  650. /* Some EDIDs have bogus h/vtotal values */
  651. if (mode->hsync_end > mode->htotal)
  652. mode->htotal = mode->hsync_end + 1;
  653. if (mode->vsync_end > mode->vtotal)
  654. mode->vtotal = mode->vsync_end + 1;
  655. drm_mode_set_name(mode);
  656. drm_mode_do_interlace_quirk(mode, pt);
  657. if (quirks & EDID_QUIRK_DETAILED_SYNC_PP) {
  658. pt->misc |= DRM_EDID_PT_HSYNC_POSITIVE | DRM_EDID_PT_VSYNC_POSITIVE;
  659. }
  660. mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ?
  661. DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
  662. mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ?
  663. DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
  664. mode->width_mm = pt->width_mm_lo | (pt->width_height_mm_hi & 0xf0) << 4;
  665. mode->height_mm = pt->height_mm_lo | (pt->width_height_mm_hi & 0xf) << 8;
  666. if (quirks & EDID_QUIRK_DETAILED_IN_CM) {
  667. mode->width_mm *= 10;
  668. mode->height_mm *= 10;
  669. }
  670. if (quirks & EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE) {
  671. mode->width_mm = edid->width_cm * 10;
  672. mode->height_mm = edid->height_cm * 10;
  673. }
  674. return mode;
  675. }
  676. /*
  677. * Detailed mode info for the EDID "established modes" data to use.
  678. */
  679. static struct drm_display_mode edid_est_modes[] = {
  680. { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
  681. 968, 1056, 0, 600, 601, 605, 628, 0,
  682. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@60Hz */
  683. { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824,
  684. 896, 1024, 0, 600, 601, 603, 625, 0,
  685. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@56Hz */
  686. { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656,
  687. 720, 840, 0, 480, 481, 484, 500, 0,
  688. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@75Hz */
  689. { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664,
  690. 704, 832, 0, 480, 489, 491, 520, 0,
  691. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@72Hz */
  692. { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 30240, 640, 704,
  693. 768, 864, 0, 480, 483, 486, 525, 0,
  694. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@67Hz */
  695. { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25200, 640, 656,
  696. 752, 800, 0, 480, 490, 492, 525, 0,
  697. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@60Hz */
  698. { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 738,
  699. 846, 900, 0, 400, 421, 423, 449, 0,
  700. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 720x400@88Hz */
  701. { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 28320, 720, 738,
  702. 846, 900, 0, 400, 412, 414, 449, 0,
  703. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 720x400@70Hz */
  704. { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296,
  705. 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
  706. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1280x1024@75Hz */
  707. { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78800, 1024, 1040,
  708. 1136, 1312, 0, 768, 769, 772, 800, 0,
  709. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1024x768@75Hz */
  710. { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048,
  711. 1184, 1328, 0, 768, 771, 777, 806, 0,
  712. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@70Hz */
  713. { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
  714. 1184, 1344, 0, 768, 771, 777, 806, 0,
  715. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@60Hz */
  716. { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER,44900, 1024, 1032,
  717. 1208, 1264, 0, 768, 768, 776, 817, 0,
  718. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_INTERLACE) }, /* 1024x768@43Hz */
  719. { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 57284, 832, 864,
  720. 928, 1152, 0, 624, 625, 628, 667, 0,
  721. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 832x624@75Hz */
  722. { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816,
  723. 896, 1056, 0, 600, 601, 604, 625, 0,
  724. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@75Hz */
  725. { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856,
  726. 976, 1040, 0, 600, 637, 643, 666, 0,
  727. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@72Hz */
  728. { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
  729. 1344, 1600, 0, 864, 865, 868, 900, 0,
  730. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1152x864@75Hz */
  731. };
  732. #define EDID_EST_TIMINGS 16
  733. #define EDID_STD_TIMINGS 8
  734. #define EDID_DETAILED_TIMINGS 4
  735. /**
  736. * add_established_modes - get est. modes from EDID and add them
  737. * @edid: EDID block to scan
  738. *
  739. * Each EDID block contains a bitmap of the supported "established modes" list
  740. * (defined above). Tease them out and add them to the global modes list.
  741. */
  742. static int add_established_modes(struct drm_connector *connector, struct edid *edid)
  743. {
  744. struct drm_device *dev = connector->dev;
  745. unsigned long est_bits = edid->established_timings.t1 |
  746. (edid->established_timings.t2 << 8) |
  747. ((edid->established_timings.mfg_rsvd & 0x80) << 9);
  748. int i, modes = 0;
  749. for (i = 0; i <= EDID_EST_TIMINGS; i++)
  750. if (est_bits & (1<<i)) {
  751. struct drm_display_mode *newmode;
  752. newmode = drm_mode_duplicate(dev, &edid_est_modes[i]);
  753. if (newmode) {
  754. drm_mode_probed_add(connector, newmode);
  755. modes++;
  756. }
  757. }
  758. return modes;
  759. }
  760. /**
  761. * stanard_timing_level - get std. timing level(CVT/GTF/DMT)
  762. * @edid: EDID block to scan
  763. */
  764. static int standard_timing_level(struct edid *edid)
  765. {
  766. if (edid->revision >= 2) {
  767. if (edid->revision >= 4 && (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF))
  768. return LEVEL_CVT;
  769. return LEVEL_GTF;
  770. }
  771. return LEVEL_DMT;
  772. }
  773. /**
  774. * add_standard_modes - get std. modes from EDID and add them
  775. * @edid: EDID block to scan
  776. *
  777. * Standard modes can be calculated using the CVT standard. Grab them from
  778. * @edid, calculate them, and add them to the list.
  779. */
  780. static int add_standard_modes(struct drm_connector *connector, struct edid *edid)
  781. {
  782. struct drm_device *dev = connector->dev;
  783. int i, modes = 0;
  784. int timing_level;
  785. timing_level = standard_timing_level(edid);
  786. for (i = 0; i < EDID_STD_TIMINGS; i++) {
  787. struct std_timing *t = &edid->standard_timings[i];
  788. struct drm_display_mode *newmode;
  789. /* If std timings bytes are 1, 1 it's empty */
  790. if (t->hsize == 1 && t->vfreq_aspect == 1)
  791. continue;
  792. newmode = drm_mode_std(dev, &edid->standard_timings[i],
  793. edid->revision, timing_level);
  794. if (newmode) {
  795. drm_mode_probed_add(connector, newmode);
  796. modes++;
  797. }
  798. }
  799. return modes;
  800. }
  801. /*
  802. * XXX fix this for:
  803. * - GTF secondary curve formula
  804. * - EDID 1.4 range offsets
  805. * - CVT extended bits
  806. */
  807. static bool
  808. mode_in_range(struct drm_display_mode *mode, struct detailed_timing *timing)
  809. {
  810. struct detailed_data_monitor_range *range;
  811. int hsync, vrefresh;
  812. range = &timing->data.other_data.data.range;
  813. hsync = drm_mode_hsync(mode);
  814. vrefresh = drm_mode_vrefresh(mode);
  815. if (hsync < range->min_hfreq_khz || hsync > range->max_hfreq_khz)
  816. return false;
  817. if (vrefresh < range->min_vfreq || vrefresh > range->max_vfreq)
  818. return false;
  819. if (range->pixel_clock_mhz && range->pixel_clock_mhz != 0xff) {
  820. /* be forgiving since it's in units of 10MHz */
  821. int max_clock = range->pixel_clock_mhz * 10 + 9;
  822. max_clock *= 1000;
  823. if (mode->clock > max_clock)
  824. return false;
  825. }
  826. return true;
  827. }
  828. /*
  829. * XXX If drm_dmt_modes ever regrows the CVT-R modes (and it will) this will
  830. * need to account for them.
  831. */
  832. static int drm_gtf_modes_for_range(struct drm_connector *connector,
  833. struct detailed_timing *timing)
  834. {
  835. int i, modes = 0;
  836. struct drm_display_mode *newmode;
  837. struct drm_device *dev = connector->dev;
  838. for (i = 0; i < drm_num_dmt_modes; i++) {
  839. if (mode_in_range(drm_dmt_modes + i, timing)) {
  840. newmode = drm_mode_duplicate(dev, &drm_dmt_modes[i]);
  841. if (newmode) {
  842. drm_mode_probed_add(connector, newmode);
  843. modes++;
  844. }
  845. }
  846. }
  847. return modes;
  848. }
  849. static int drm_cvt_modes(struct drm_connector *connector,
  850. struct detailed_timing *timing)
  851. {
  852. int i, j, modes = 0;
  853. struct drm_display_mode *newmode;
  854. struct drm_device *dev = connector->dev;
  855. struct cvt_timing *cvt;
  856. const int rates[] = { 60, 85, 75, 60, 50 };
  857. const u8 empty[3] = { 0, 0, 0 };
  858. for (i = 0; i < 4; i++) {
  859. int uninitialized_var(width), height;
  860. cvt = &(timing->data.other_data.data.cvt[i]);
  861. if (!memcmp(cvt->code, empty, 3))
  862. continue;
  863. height = (cvt->code[0] + ((cvt->code[1] & 0xf0) << 4) + 1) * 2;
  864. switch (cvt->code[1] & 0x0c) {
  865. case 0x00:
  866. width = height * 4 / 3;
  867. break;
  868. case 0x04:
  869. width = height * 16 / 9;
  870. break;
  871. case 0x08:
  872. width = height * 16 / 10;
  873. break;
  874. case 0x0c:
  875. width = height * 15 / 9;
  876. break;
  877. }
  878. for (j = 1; j < 5; j++) {
  879. if (cvt->code[2] & (1 << j)) {
  880. newmode = drm_cvt_mode(dev, width, height,
  881. rates[j], j == 0,
  882. false, false);
  883. if (newmode) {
  884. drm_mode_probed_add(connector, newmode);
  885. modes++;
  886. }
  887. }
  888. }
  889. }
  890. return modes;
  891. }
  892. static int add_detailed_modes(struct drm_connector *connector,
  893. struct detailed_timing *timing,
  894. struct edid *edid, u32 quirks, int preferred)
  895. {
  896. int i, modes = 0;
  897. struct detailed_non_pixel *data = &timing->data.other_data;
  898. int timing_level = standard_timing_level(edid);
  899. int gtf = (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF);
  900. struct drm_display_mode *newmode;
  901. struct drm_device *dev = connector->dev;
  902. if (timing->pixel_clock) {
  903. newmode = drm_mode_detailed(dev, edid, timing, quirks);
  904. if (!newmode)
  905. return 0;
  906. if (preferred)
  907. newmode->type |= DRM_MODE_TYPE_PREFERRED;
  908. drm_mode_probed_add(connector, newmode);
  909. return 1;
  910. }
  911. /* other timing types */
  912. switch (data->type) {
  913. case EDID_DETAIL_MONITOR_RANGE:
  914. if (gtf)
  915. modes += drm_gtf_modes_for_range(connector, timing);
  916. break;
  917. case EDID_DETAIL_STD_MODES:
  918. /* Six modes per detailed section */
  919. for (i = 0; i < 6; i++) {
  920. struct std_timing *std;
  921. struct drm_display_mode *newmode;
  922. std = &data->data.timings[i];
  923. newmode = drm_mode_std(dev, std, edid->revision,
  924. timing_level);
  925. if (newmode) {
  926. drm_mode_probed_add(connector, newmode);
  927. modes++;
  928. }
  929. }
  930. break;
  931. case EDID_DETAIL_CVT_3BYTE:
  932. modes += drm_cvt_modes(connector, timing);
  933. break;
  934. default:
  935. break;
  936. }
  937. return modes;
  938. }
  939. /**
  940. * add_detailed_info - get detailed mode info from EDID data
  941. * @connector: attached connector
  942. * @edid: EDID block to scan
  943. * @quirks: quirks to apply
  944. *
  945. * Some of the detailed timing sections may contain mode information. Grab
  946. * it and add it to the list.
  947. */
  948. static int add_detailed_info(struct drm_connector *connector,
  949. struct edid *edid, u32 quirks)
  950. {
  951. int i, modes = 0;
  952. for (i = 0; i < EDID_DETAILED_TIMINGS; i++) {
  953. struct detailed_timing *timing = &edid->detailed_timings[i];
  954. int preferred = (i == 0) && (edid->features & DRM_EDID_FEATURE_PREFERRED_TIMING);
  955. /* In 1.0, only timings are allowed */
  956. if (!timing->pixel_clock && edid->version == 1 &&
  957. edid->revision == 0)
  958. continue;
  959. modes += add_detailed_modes(connector, timing, edid, quirks,
  960. preferred);
  961. }
  962. return modes;
  963. }
  964. /**
  965. * add_detailed_mode_eedid - get detailed mode info from addtional timing
  966. * EDID block
  967. * @connector: attached connector
  968. * @edid: EDID block to scan(It is only to get addtional timing EDID block)
  969. * @quirks: quirks to apply
  970. *
  971. * Some of the detailed timing sections may contain mode information. Grab
  972. * it and add it to the list.
  973. */
  974. static int add_detailed_info_eedid(struct drm_connector *connector,
  975. struct edid *edid, u32 quirks)
  976. {
  977. int i, modes = 0;
  978. char *edid_ext = NULL;
  979. struct detailed_timing *timing;
  980. int edid_ext_num;
  981. int start_offset, end_offset;
  982. int timing_level;
  983. if (edid->version == 1 && edid->revision < 3) {
  984. /* If the EDID version is less than 1.3, there is no
  985. * extension EDID.
  986. */
  987. return 0;
  988. }
  989. if (!edid->extensions) {
  990. /* if there is no extension EDID, it is unnecessary to
  991. * parse the E-EDID to get detailed info
  992. */
  993. return 0;
  994. }
  995. /* Chose real EDID extension number */
  996. edid_ext_num = edid->extensions > DRM_MAX_EDID_EXT_NUM ?
  997. DRM_MAX_EDID_EXT_NUM : edid->extensions;
  998. /* Find CEA extension */
  999. for (i = 0; i < edid_ext_num; i++) {
  1000. edid_ext = (char *)edid + EDID_LENGTH * (i + 1);
  1001. /* This block is CEA extension */
  1002. if (edid_ext[0] == 0x02)
  1003. break;
  1004. }
  1005. if (i == edid_ext_num) {
  1006. /* if there is no additional timing EDID block, return */
  1007. return 0;
  1008. }
  1009. /* Get the start offset of detailed timing block */
  1010. start_offset = edid_ext[2];
  1011. if (start_offset == 0) {
  1012. /* If the start_offset is zero, it means that neither detailed
  1013. * info nor data block exist. In such case it is also
  1014. * unnecessary to parse the detailed timing info.
  1015. */
  1016. return 0;
  1017. }
  1018. timing_level = standard_timing_level(edid);
  1019. end_offset = EDID_LENGTH;
  1020. end_offset -= sizeof(struct detailed_timing);
  1021. for (i = start_offset; i < end_offset;
  1022. i += sizeof(struct detailed_timing)) {
  1023. timing = (struct detailed_timing *)(edid_ext + i);
  1024. modes += add_detailed_modes(connector, timing, edid, quirks, 0);
  1025. }
  1026. return modes;
  1027. }
  1028. #define DDC_ADDR 0x50
  1029. /**
  1030. * Get EDID information via I2C.
  1031. *
  1032. * \param adapter : i2c device adaptor
  1033. * \param buf : EDID data buffer to be filled
  1034. * \param len : EDID data buffer length
  1035. * \return 0 on success or -1 on failure.
  1036. *
  1037. * Try to fetch EDID information by calling i2c driver function.
  1038. */
  1039. int drm_do_probe_ddc_edid(struct i2c_adapter *adapter,
  1040. unsigned char *buf, int len)
  1041. {
  1042. unsigned char start = 0x0;
  1043. struct i2c_msg msgs[] = {
  1044. {
  1045. .addr = DDC_ADDR,
  1046. .flags = 0,
  1047. .len = 1,
  1048. .buf = &start,
  1049. }, {
  1050. .addr = DDC_ADDR,
  1051. .flags = I2C_M_RD,
  1052. .len = len,
  1053. .buf = buf,
  1054. }
  1055. };
  1056. if (i2c_transfer(adapter, msgs, 2) == 2)
  1057. return 0;
  1058. return -1;
  1059. }
  1060. EXPORT_SYMBOL(drm_do_probe_ddc_edid);
  1061. static int drm_ddc_read_edid(struct drm_connector *connector,
  1062. struct i2c_adapter *adapter,
  1063. char *buf, int len)
  1064. {
  1065. int i;
  1066. for (i = 0; i < 4; i++) {
  1067. if (drm_do_probe_ddc_edid(adapter, buf, len))
  1068. return -1;
  1069. if (drm_edid_is_valid((struct edid *)buf))
  1070. return 0;
  1071. }
  1072. /* repeated checksum failures; warn, but carry on */
  1073. dev_warn(&connector->dev->pdev->dev, "%s: EDID invalid.\n",
  1074. drm_get_connector_name(connector));
  1075. return -1;
  1076. }
  1077. /**
  1078. * drm_get_edid - get EDID data, if available
  1079. * @connector: connector we're probing
  1080. * @adapter: i2c adapter to use for DDC
  1081. *
  1082. * Poke the given connector's i2c channel to grab EDID data if possible.
  1083. *
  1084. * Return edid data or NULL if we couldn't find any.
  1085. */
  1086. struct edid *drm_get_edid(struct drm_connector *connector,
  1087. struct i2c_adapter *adapter)
  1088. {
  1089. int ret;
  1090. struct edid *edid;
  1091. edid = kmalloc(EDID_LENGTH * (DRM_MAX_EDID_EXT_NUM + 1),
  1092. GFP_KERNEL);
  1093. if (edid == NULL) {
  1094. dev_warn(&connector->dev->pdev->dev,
  1095. "Failed to allocate EDID\n");
  1096. goto end;
  1097. }
  1098. /* Read first EDID block */
  1099. ret = drm_ddc_read_edid(connector, adapter,
  1100. (unsigned char *)edid, EDID_LENGTH);
  1101. if (ret != 0)
  1102. goto clean_up;
  1103. /* There are EDID extensions to be read */
  1104. if (edid->extensions != 0) {
  1105. int edid_ext_num = edid->extensions;
  1106. if (edid_ext_num > DRM_MAX_EDID_EXT_NUM) {
  1107. dev_warn(&connector->dev->pdev->dev,
  1108. "The number of extension(%d) is "
  1109. "over max (%d), actually read number (%d)\n",
  1110. edid_ext_num, DRM_MAX_EDID_EXT_NUM,
  1111. DRM_MAX_EDID_EXT_NUM);
  1112. /* Reset EDID extension number to be read */
  1113. edid_ext_num = DRM_MAX_EDID_EXT_NUM;
  1114. }
  1115. /* Read EDID including extensions too */
  1116. ret = drm_ddc_read_edid(connector, adapter, (char *)edid,
  1117. EDID_LENGTH * (edid_ext_num + 1));
  1118. if (ret != 0)
  1119. goto clean_up;
  1120. }
  1121. connector->display_info.raw_edid = (char *)edid;
  1122. goto end;
  1123. clean_up:
  1124. kfree(edid);
  1125. edid = NULL;
  1126. end:
  1127. return edid;
  1128. }
  1129. EXPORT_SYMBOL(drm_get_edid);
  1130. #define HDMI_IDENTIFIER 0x000C03
  1131. #define VENDOR_BLOCK 0x03
  1132. /**
  1133. * drm_detect_hdmi_monitor - detect whether monitor is hdmi.
  1134. * @edid: monitor EDID information
  1135. *
  1136. * Parse the CEA extension according to CEA-861-B.
  1137. * Return true if HDMI, false if not or unknown.
  1138. */
  1139. bool drm_detect_hdmi_monitor(struct edid *edid)
  1140. {
  1141. char *edid_ext = NULL;
  1142. int i, hdmi_id, edid_ext_num;
  1143. int start_offset, end_offset;
  1144. bool is_hdmi = false;
  1145. /* No EDID or EDID extensions */
  1146. if (edid == NULL || edid->extensions == 0)
  1147. goto end;
  1148. /* Chose real EDID extension number */
  1149. edid_ext_num = edid->extensions > DRM_MAX_EDID_EXT_NUM ?
  1150. DRM_MAX_EDID_EXT_NUM : edid->extensions;
  1151. /* Find CEA extension */
  1152. for (i = 0; i < edid_ext_num; i++) {
  1153. edid_ext = (char *)edid + EDID_LENGTH * (i + 1);
  1154. /* This block is CEA extension */
  1155. if (edid_ext[0] == 0x02)
  1156. break;
  1157. }
  1158. if (i == edid_ext_num)
  1159. goto end;
  1160. /* Data block offset in CEA extension block */
  1161. start_offset = 4;
  1162. end_offset = edid_ext[2];
  1163. /*
  1164. * Because HDMI identifier is in Vendor Specific Block,
  1165. * search it from all data blocks of CEA extension.
  1166. */
  1167. for (i = start_offset; i < end_offset;
  1168. /* Increased by data block len */
  1169. i += ((edid_ext[i] & 0x1f) + 1)) {
  1170. /* Find vendor specific block */
  1171. if ((edid_ext[i] >> 5) == VENDOR_BLOCK) {
  1172. hdmi_id = edid_ext[i + 1] | (edid_ext[i + 2] << 8) |
  1173. edid_ext[i + 3] << 16;
  1174. /* Find HDMI identifier */
  1175. if (hdmi_id == HDMI_IDENTIFIER)
  1176. is_hdmi = true;
  1177. break;
  1178. }
  1179. }
  1180. end:
  1181. return is_hdmi;
  1182. }
  1183. EXPORT_SYMBOL(drm_detect_hdmi_monitor);
  1184. /**
  1185. * drm_add_edid_modes - add modes from EDID data, if available
  1186. * @connector: connector we're probing
  1187. * @edid: edid data
  1188. *
  1189. * Add the specified modes to the connector's mode list.
  1190. *
  1191. * Return number of modes added or 0 if we couldn't find any.
  1192. */
  1193. int drm_add_edid_modes(struct drm_connector *connector, struct edid *edid)
  1194. {
  1195. int num_modes = 0;
  1196. u32 quirks;
  1197. if (edid == NULL) {
  1198. return 0;
  1199. }
  1200. if (!drm_edid_is_valid(edid)) {
  1201. dev_warn(&connector->dev->pdev->dev, "%s: EDID invalid.\n",
  1202. drm_get_connector_name(connector));
  1203. return 0;
  1204. }
  1205. quirks = edid_get_quirks(edid);
  1206. num_modes += add_established_modes(connector, edid);
  1207. num_modes += add_standard_modes(connector, edid);
  1208. num_modes += add_detailed_info(connector, edid, quirks);
  1209. num_modes += add_detailed_info_eedid(connector, edid, quirks);
  1210. if (quirks & (EDID_QUIRK_PREFER_LARGE_60 | EDID_QUIRK_PREFER_LARGE_75))
  1211. edid_fixup_preferred(connector, quirks);
  1212. connector->display_info.serration_vsync = (edid->input & DRM_EDID_INPUT_SERRATION_VSYNC) ? 1 : 0;
  1213. connector->display_info.sync_on_green = (edid->input & DRM_EDID_INPUT_SYNC_ON_GREEN) ? 1 : 0;
  1214. connector->display_info.composite_sync = (edid->input & DRM_EDID_INPUT_COMPOSITE_SYNC) ? 1 : 0;
  1215. connector->display_info.separate_syncs = (edid->input & DRM_EDID_INPUT_SEPARATE_SYNCS) ? 1 : 0;
  1216. connector->display_info.blank_to_black = (edid->input & DRM_EDID_INPUT_BLANK_TO_BLACK) ? 1 : 0;
  1217. connector->display_info.video_level = (edid->input & DRM_EDID_INPUT_VIDEO_LEVEL) >> 5;
  1218. connector->display_info.digital = (edid->input & DRM_EDID_INPUT_DIGITAL) ? 1 : 0;
  1219. connector->display_info.width_mm = edid->width_cm * 10;
  1220. connector->display_info.height_mm = edid->height_cm * 10;
  1221. connector->display_info.gamma = edid->gamma;
  1222. connector->display_info.gtf_supported = (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF) ? 1 : 0;
  1223. connector->display_info.standard_color = (edid->features & DRM_EDID_FEATURE_STANDARD_COLOR) ? 1 : 0;
  1224. connector->display_info.display_type = (edid->features & DRM_EDID_FEATURE_DISPLAY_TYPE) >> 3;
  1225. connector->display_info.active_off_supported = (edid->features & DRM_EDID_FEATURE_PM_ACTIVE_OFF) ? 1 : 0;
  1226. connector->display_info.suspend_supported = (edid->features & DRM_EDID_FEATURE_PM_SUSPEND) ? 1 : 0;
  1227. connector->display_info.standby_supported = (edid->features & DRM_EDID_FEATURE_PM_STANDBY) ? 1 : 0;
  1228. connector->display_info.gamma = edid->gamma;
  1229. return num_modes;
  1230. }
  1231. EXPORT_SYMBOL(drm_add_edid_modes);
  1232. /**
  1233. * drm_add_modes_noedid - add modes for the connectors without EDID
  1234. * @connector: connector we're probing
  1235. * @hdisplay: the horizontal display limit
  1236. * @vdisplay: the vertical display limit
  1237. *
  1238. * Add the specified modes to the connector's mode list. Only when the
  1239. * hdisplay/vdisplay is not beyond the given limit, it will be added.
  1240. *
  1241. * Return number of modes added or 0 if we couldn't find any.
  1242. */
  1243. int drm_add_modes_noedid(struct drm_connector *connector,
  1244. int hdisplay, int vdisplay)
  1245. {
  1246. int i, count, num_modes = 0;
  1247. struct drm_display_mode *mode, *ptr;
  1248. struct drm_device *dev = connector->dev;
  1249. count = sizeof(drm_dmt_modes) / sizeof(struct drm_display_mode);
  1250. if (hdisplay < 0)
  1251. hdisplay = 0;
  1252. if (vdisplay < 0)
  1253. vdisplay = 0;
  1254. for (i = 0; i < count; i++) {
  1255. ptr = &drm_dmt_modes[i];
  1256. if (hdisplay && vdisplay) {
  1257. /*
  1258. * Only when two are valid, they will be used to check
  1259. * whether the mode should be added to the mode list of
  1260. * the connector.
  1261. */
  1262. if (ptr->hdisplay > hdisplay ||
  1263. ptr->vdisplay > vdisplay)
  1264. continue;
  1265. }
  1266. if (drm_mode_vrefresh(ptr) > 61)
  1267. continue;
  1268. mode = drm_mode_duplicate(dev, ptr);
  1269. if (mode) {
  1270. drm_mode_probed_add(connector, mode);
  1271. num_modes++;
  1272. }
  1273. }
  1274. return num_modes;
  1275. }
  1276. EXPORT_SYMBOL(drm_add_modes_noedid);