nicstar.c 84 KB

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  1. /******************************************************************************
  2. *
  3. * nicstar.c
  4. *
  5. * Device driver supporting CBR for IDT 77201/77211 "NICStAR" based cards.
  6. *
  7. * IMPORTANT: The included file nicstarmac.c was NOT WRITTEN BY ME.
  8. * It was taken from the frle-0.22 device driver.
  9. * As the file doesn't have a copyright notice, in the file
  10. * nicstarmac.copyright I put the copyright notice from the
  11. * frle-0.22 device driver.
  12. * Some code is based on the nicstar driver by M. Welsh.
  13. *
  14. * Author: Rui Prior (rprior@inescn.pt)
  15. * PowerPC support by Jay Talbott (jay_talbott@mcg.mot.com) April 1999
  16. *
  17. *
  18. * (C) INESC 1999
  19. *
  20. *
  21. ******************************************************************************/
  22. /**** IMPORTANT INFORMATION ***************************************************
  23. *
  24. * There are currently three types of spinlocks:
  25. *
  26. * 1 - Per card interrupt spinlock (to protect structures and such)
  27. * 2 - Per SCQ scq spinlock
  28. * 3 - Per card resource spinlock (to access registers, etc.)
  29. *
  30. * These must NEVER be grabbed in reverse order.
  31. *
  32. ******************************************************************************/
  33. /* Header files ***************************************************************/
  34. #include <linux/module.h>
  35. #include <linux/kernel.h>
  36. #include <linux/skbuff.h>
  37. #include <linux/atmdev.h>
  38. #include <linux/atm.h>
  39. #include <linux/pci.h>
  40. #include <linux/types.h>
  41. #include <linux/string.h>
  42. #include <linux/delay.h>
  43. #include <linux/init.h>
  44. #include <linux/sched.h>
  45. #include <linux/timer.h>
  46. #include <linux/interrupt.h>
  47. #include <linux/bitops.h>
  48. #include <linux/slab.h>
  49. #include <asm/io.h>
  50. #include <asm/uaccess.h>
  51. #include <asm/atomic.h>
  52. #include "nicstar.h"
  53. #ifdef CONFIG_ATM_NICSTAR_USE_SUNI
  54. #include "suni.h"
  55. #endif /* CONFIG_ATM_NICSTAR_USE_SUNI */
  56. #ifdef CONFIG_ATM_NICSTAR_USE_IDT77105
  57. #include "idt77105.h"
  58. #endif /* CONFIG_ATM_NICSTAR_USE_IDT77105 */
  59. #if BITS_PER_LONG != 32
  60. # error FIXME: this driver requires a 32-bit platform
  61. #endif
  62. /* Additional code ************************************************************/
  63. #include "nicstarmac.c"
  64. /* Configurable parameters ****************************************************/
  65. #undef PHY_LOOPBACK
  66. #undef TX_DEBUG
  67. #undef RX_DEBUG
  68. #undef GENERAL_DEBUG
  69. #undef EXTRA_DEBUG
  70. #undef NS_USE_DESTRUCTORS /* For now keep this undefined unless you know
  71. you're going to use only raw ATM */
  72. /* Do not touch these *********************************************************/
  73. #ifdef TX_DEBUG
  74. #define TXPRINTK(args...) printk(args)
  75. #else
  76. #define TXPRINTK(args...)
  77. #endif /* TX_DEBUG */
  78. #ifdef RX_DEBUG
  79. #define RXPRINTK(args...) printk(args)
  80. #else
  81. #define RXPRINTK(args...)
  82. #endif /* RX_DEBUG */
  83. #ifdef GENERAL_DEBUG
  84. #define PRINTK(args...) printk(args)
  85. #else
  86. #define PRINTK(args...)
  87. #endif /* GENERAL_DEBUG */
  88. #ifdef EXTRA_DEBUG
  89. #define XPRINTK(args...) printk(args)
  90. #else
  91. #define XPRINTK(args...)
  92. #endif /* EXTRA_DEBUG */
  93. /* Macros *********************************************************************/
  94. #define CMD_BUSY(card) (readl((card)->membase + STAT) & NS_STAT_CMDBZ)
  95. #define NS_DELAY mdelay(1)
  96. #define ALIGN_BUS_ADDR(addr, alignment) \
  97. ((((u32) (addr)) + (((u32) (alignment)) - 1)) & ~(((u32) (alignment)) - 1))
  98. #define ALIGN_ADDRESS(addr, alignment) \
  99. bus_to_virt(ALIGN_BUS_ADDR(virt_to_bus(addr), alignment))
  100. #undef CEIL
  101. #ifndef ATM_SKB
  102. #define ATM_SKB(s) (&(s)->atm)
  103. #endif
  104. /* Function declarations ******************************************************/
  105. static u32 ns_read_sram(ns_dev *card, u32 sram_address);
  106. static void ns_write_sram(ns_dev *card, u32 sram_address, u32 *value, int count);
  107. static int __devinit ns_init_card(int i, struct pci_dev *pcidev);
  108. static void __devinit ns_init_card_error(ns_dev *card, int error);
  109. static scq_info *get_scq(int size, u32 scd);
  110. static void free_scq(scq_info *scq, struct atm_vcc *vcc);
  111. static void push_rxbufs(ns_dev *, struct sk_buff *);
  112. static irqreturn_t ns_irq_handler(int irq, void *dev_id);
  113. static int ns_open(struct atm_vcc *vcc);
  114. static void ns_close(struct atm_vcc *vcc);
  115. static void fill_tst(ns_dev *card, int n, vc_map *vc);
  116. static int ns_send(struct atm_vcc *vcc, struct sk_buff *skb);
  117. static int push_scqe(ns_dev *card, vc_map *vc, scq_info *scq, ns_scqe *tbd,
  118. struct sk_buff *skb);
  119. static void process_tsq(ns_dev *card);
  120. static void drain_scq(ns_dev *card, scq_info *scq, int pos);
  121. static void process_rsq(ns_dev *card);
  122. static void dequeue_rx(ns_dev *card, ns_rsqe *rsqe);
  123. #ifdef NS_USE_DESTRUCTORS
  124. static void ns_sb_destructor(struct sk_buff *sb);
  125. static void ns_lb_destructor(struct sk_buff *lb);
  126. static void ns_hb_destructor(struct sk_buff *hb);
  127. #endif /* NS_USE_DESTRUCTORS */
  128. static void recycle_rx_buf(ns_dev *card, struct sk_buff *skb);
  129. static void recycle_iovec_rx_bufs(ns_dev *card, struct iovec *iov, int count);
  130. static void recycle_iov_buf(ns_dev *card, struct sk_buff *iovb);
  131. static void dequeue_sm_buf(ns_dev *card, struct sk_buff *sb);
  132. static void dequeue_lg_buf(ns_dev *card, struct sk_buff *lb);
  133. static int ns_proc_read(struct atm_dev *dev, loff_t *pos, char *page);
  134. static int ns_ioctl(struct atm_dev *dev, unsigned int cmd, void __user *arg);
  135. static void which_list(ns_dev *card, struct sk_buff *skb);
  136. static void ns_poll(unsigned long arg);
  137. static int ns_parse_mac(char *mac, unsigned char *esi);
  138. static short ns_h2i(char c);
  139. static void ns_phy_put(struct atm_dev *dev, unsigned char value,
  140. unsigned long addr);
  141. static unsigned char ns_phy_get(struct atm_dev *dev, unsigned long addr);
  142. /* Global variables ***********************************************************/
  143. static struct ns_dev *cards[NS_MAX_CARDS];
  144. static unsigned num_cards;
  145. static struct atmdev_ops atm_ops =
  146. {
  147. .open = ns_open,
  148. .close = ns_close,
  149. .ioctl = ns_ioctl,
  150. .send = ns_send,
  151. .phy_put = ns_phy_put,
  152. .phy_get = ns_phy_get,
  153. .proc_read = ns_proc_read,
  154. .owner = THIS_MODULE,
  155. };
  156. static struct timer_list ns_timer;
  157. static char *mac[NS_MAX_CARDS];
  158. module_param_array(mac, charp, NULL, 0);
  159. MODULE_LICENSE("GPL");
  160. /* Functions*******************************************************************/
  161. static int __devinit nicstar_init_one(struct pci_dev *pcidev,
  162. const struct pci_device_id *ent)
  163. {
  164. static int index = -1;
  165. unsigned int error;
  166. index++;
  167. cards[index] = NULL;
  168. error = ns_init_card(index, pcidev);
  169. if (error) {
  170. cards[index--] = NULL; /* don't increment index */
  171. goto err_out;
  172. }
  173. return 0;
  174. err_out:
  175. return -ENODEV;
  176. }
  177. static void __devexit nicstar_remove_one(struct pci_dev *pcidev)
  178. {
  179. int i, j;
  180. ns_dev *card = pci_get_drvdata(pcidev);
  181. struct sk_buff *hb;
  182. struct sk_buff *iovb;
  183. struct sk_buff *lb;
  184. struct sk_buff *sb;
  185. i = card->index;
  186. if (cards[i] == NULL)
  187. return;
  188. if (card->atmdev->phy && card->atmdev->phy->stop)
  189. card->atmdev->phy->stop(card->atmdev);
  190. /* Stop everything */
  191. writel(0x00000000, card->membase + CFG);
  192. /* De-register device */
  193. atm_dev_deregister(card->atmdev);
  194. /* Disable PCI device */
  195. pci_disable_device(pcidev);
  196. /* Free up resources */
  197. j = 0;
  198. PRINTK("nicstar%d: freeing %d huge buffers.\n", i, card->hbpool.count);
  199. while ((hb = skb_dequeue(&card->hbpool.queue)) != NULL)
  200. {
  201. dev_kfree_skb_any(hb);
  202. j++;
  203. }
  204. PRINTK("nicstar%d: %d huge buffers freed.\n", i, j);
  205. j = 0;
  206. PRINTK("nicstar%d: freeing %d iovec buffers.\n", i, card->iovpool.count);
  207. while ((iovb = skb_dequeue(&card->iovpool.queue)) != NULL)
  208. {
  209. dev_kfree_skb_any(iovb);
  210. j++;
  211. }
  212. PRINTK("nicstar%d: %d iovec buffers freed.\n", i, j);
  213. while ((lb = skb_dequeue(&card->lbpool.queue)) != NULL)
  214. dev_kfree_skb_any(lb);
  215. while ((sb = skb_dequeue(&card->sbpool.queue)) != NULL)
  216. dev_kfree_skb_any(sb);
  217. free_scq(card->scq0, NULL);
  218. for (j = 0; j < NS_FRSCD_NUM; j++)
  219. {
  220. if (card->scd2vc[j] != NULL)
  221. free_scq(card->scd2vc[j]->scq, card->scd2vc[j]->tx_vcc);
  222. }
  223. kfree(card->rsq.org);
  224. kfree(card->tsq.org);
  225. free_irq(card->pcidev->irq, card);
  226. iounmap(card->membase);
  227. kfree(card);
  228. }
  229. static struct pci_device_id nicstar_pci_tbl[] __devinitdata =
  230. {
  231. {PCI_VENDOR_ID_IDT, PCI_DEVICE_ID_IDT_IDT77201,
  232. PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  233. {0,} /* terminate list */
  234. };
  235. MODULE_DEVICE_TABLE(pci, nicstar_pci_tbl);
  236. static struct pci_driver nicstar_driver = {
  237. .name = "nicstar",
  238. .id_table = nicstar_pci_tbl,
  239. .probe = nicstar_init_one,
  240. .remove = __devexit_p(nicstar_remove_one),
  241. };
  242. static int __init nicstar_init(void)
  243. {
  244. unsigned error = 0; /* Initialized to remove compile warning */
  245. XPRINTK("nicstar: nicstar_init() called.\n");
  246. error = pci_register_driver(&nicstar_driver);
  247. TXPRINTK("nicstar: TX debug enabled.\n");
  248. RXPRINTK("nicstar: RX debug enabled.\n");
  249. PRINTK("nicstar: General debug enabled.\n");
  250. #ifdef PHY_LOOPBACK
  251. printk("nicstar: using PHY loopback.\n");
  252. #endif /* PHY_LOOPBACK */
  253. XPRINTK("nicstar: nicstar_init() returned.\n");
  254. if (!error) {
  255. init_timer(&ns_timer);
  256. ns_timer.expires = jiffies + NS_POLL_PERIOD;
  257. ns_timer.data = 0UL;
  258. ns_timer.function = ns_poll;
  259. add_timer(&ns_timer);
  260. }
  261. return error;
  262. }
  263. static void __exit nicstar_cleanup(void)
  264. {
  265. XPRINTK("nicstar: nicstar_cleanup() called.\n");
  266. del_timer(&ns_timer);
  267. pci_unregister_driver(&nicstar_driver);
  268. XPRINTK("nicstar: nicstar_cleanup() returned.\n");
  269. }
  270. static u32 ns_read_sram(ns_dev *card, u32 sram_address)
  271. {
  272. unsigned long flags;
  273. u32 data;
  274. sram_address <<= 2;
  275. sram_address &= 0x0007FFFC; /* address must be dword aligned */
  276. sram_address |= 0x50000000; /* SRAM read command */
  277. spin_lock_irqsave(&card->res_lock, flags);
  278. while (CMD_BUSY(card));
  279. writel(sram_address, card->membase + CMD);
  280. while (CMD_BUSY(card));
  281. data = readl(card->membase + DR0);
  282. spin_unlock_irqrestore(&card->res_lock, flags);
  283. return data;
  284. }
  285. static void ns_write_sram(ns_dev *card, u32 sram_address, u32 *value, int count)
  286. {
  287. unsigned long flags;
  288. int i, c;
  289. count--; /* count range now is 0..3 instead of 1..4 */
  290. c = count;
  291. c <<= 2; /* to use increments of 4 */
  292. spin_lock_irqsave(&card->res_lock, flags);
  293. while (CMD_BUSY(card));
  294. for (i = 0; i <= c; i += 4)
  295. writel(*(value++), card->membase + i);
  296. /* Note: DR# registers are the first 4 dwords in nicstar's memspace,
  297. so card->membase + DR0 == card->membase */
  298. sram_address <<= 2;
  299. sram_address &= 0x0007FFFC;
  300. sram_address |= (0x40000000 | count);
  301. writel(sram_address, card->membase + CMD);
  302. spin_unlock_irqrestore(&card->res_lock, flags);
  303. }
  304. static int __devinit ns_init_card(int i, struct pci_dev *pcidev)
  305. {
  306. int j;
  307. struct ns_dev *card = NULL;
  308. unsigned char pci_latency;
  309. unsigned error;
  310. u32 data;
  311. u32 u32d[4];
  312. u32 ns_cfg_rctsize;
  313. int bcount;
  314. unsigned long membase;
  315. error = 0;
  316. if (pci_enable_device(pcidev))
  317. {
  318. printk("nicstar%d: can't enable PCI device\n", i);
  319. error = 2;
  320. ns_init_card_error(card, error);
  321. return error;
  322. }
  323. if ((card = kmalloc(sizeof(ns_dev), GFP_KERNEL)) == NULL)
  324. {
  325. printk("nicstar%d: can't allocate memory for device structure.\n", i);
  326. error = 2;
  327. ns_init_card_error(card, error);
  328. return error;
  329. }
  330. cards[i] = card;
  331. spin_lock_init(&card->int_lock);
  332. spin_lock_init(&card->res_lock);
  333. pci_set_drvdata(pcidev, card);
  334. card->index = i;
  335. card->atmdev = NULL;
  336. card->pcidev = pcidev;
  337. membase = pci_resource_start(pcidev, 1);
  338. card->membase = ioremap(membase, NS_IOREMAP_SIZE);
  339. if (!card->membase)
  340. {
  341. printk("nicstar%d: can't ioremap() membase.\n",i);
  342. error = 3;
  343. ns_init_card_error(card, error);
  344. return error;
  345. }
  346. PRINTK("nicstar%d: membase at 0x%x.\n", i, card->membase);
  347. pci_set_master(pcidev);
  348. if (pci_read_config_byte(pcidev, PCI_LATENCY_TIMER, &pci_latency) != 0)
  349. {
  350. printk("nicstar%d: can't read PCI latency timer.\n", i);
  351. error = 6;
  352. ns_init_card_error(card, error);
  353. return error;
  354. }
  355. #ifdef NS_PCI_LATENCY
  356. if (pci_latency < NS_PCI_LATENCY)
  357. {
  358. PRINTK("nicstar%d: setting PCI latency timer to %d.\n", i, NS_PCI_LATENCY);
  359. for (j = 1; j < 4; j++)
  360. {
  361. if (pci_write_config_byte(pcidev, PCI_LATENCY_TIMER, NS_PCI_LATENCY) != 0)
  362. break;
  363. }
  364. if (j == 4)
  365. {
  366. printk("nicstar%d: can't set PCI latency timer to %d.\n", i, NS_PCI_LATENCY);
  367. error = 7;
  368. ns_init_card_error(card, error);
  369. return error;
  370. }
  371. }
  372. #endif /* NS_PCI_LATENCY */
  373. /* Clear timer overflow */
  374. data = readl(card->membase + STAT);
  375. if (data & NS_STAT_TMROF)
  376. writel(NS_STAT_TMROF, card->membase + STAT);
  377. /* Software reset */
  378. writel(NS_CFG_SWRST, card->membase + CFG);
  379. NS_DELAY;
  380. writel(0x00000000, card->membase + CFG);
  381. /* PHY reset */
  382. writel(0x00000008, card->membase + GP);
  383. NS_DELAY;
  384. writel(0x00000001, card->membase + GP);
  385. NS_DELAY;
  386. while (CMD_BUSY(card));
  387. writel(NS_CMD_WRITE_UTILITY | 0x00000100, card->membase + CMD); /* Sync UTOPIA with SAR clock */
  388. NS_DELAY;
  389. /* Detect PHY type */
  390. while (CMD_BUSY(card));
  391. writel(NS_CMD_READ_UTILITY | 0x00000200, card->membase + CMD);
  392. while (CMD_BUSY(card));
  393. data = readl(card->membase + DR0);
  394. switch(data) {
  395. case 0x00000009:
  396. printk("nicstar%d: PHY seems to be 25 Mbps.\n", i);
  397. card->max_pcr = ATM_25_PCR;
  398. while(CMD_BUSY(card));
  399. writel(0x00000008, card->membase + DR0);
  400. writel(NS_CMD_WRITE_UTILITY | 0x00000200, card->membase + CMD);
  401. /* Clear an eventual pending interrupt */
  402. writel(NS_STAT_SFBQF, card->membase + STAT);
  403. #ifdef PHY_LOOPBACK
  404. while(CMD_BUSY(card));
  405. writel(0x00000022, card->membase + DR0);
  406. writel(NS_CMD_WRITE_UTILITY | 0x00000202, card->membase + CMD);
  407. #endif /* PHY_LOOPBACK */
  408. break;
  409. case 0x00000030:
  410. case 0x00000031:
  411. printk("nicstar%d: PHY seems to be 155 Mbps.\n", i);
  412. card->max_pcr = ATM_OC3_PCR;
  413. #ifdef PHY_LOOPBACK
  414. while(CMD_BUSY(card));
  415. writel(0x00000002, card->membase + DR0);
  416. writel(NS_CMD_WRITE_UTILITY | 0x00000205, card->membase + CMD);
  417. #endif /* PHY_LOOPBACK */
  418. break;
  419. default:
  420. printk("nicstar%d: unknown PHY type (0x%08X).\n", i, data);
  421. error = 8;
  422. ns_init_card_error(card, error);
  423. return error;
  424. }
  425. writel(0x00000000, card->membase + GP);
  426. /* Determine SRAM size */
  427. data = 0x76543210;
  428. ns_write_sram(card, 0x1C003, &data, 1);
  429. data = 0x89ABCDEF;
  430. ns_write_sram(card, 0x14003, &data, 1);
  431. if (ns_read_sram(card, 0x14003) == 0x89ABCDEF &&
  432. ns_read_sram(card, 0x1C003) == 0x76543210)
  433. card->sram_size = 128;
  434. else
  435. card->sram_size = 32;
  436. PRINTK("nicstar%d: %dK x 32bit SRAM size.\n", i, card->sram_size);
  437. card->rct_size = NS_MAX_RCTSIZE;
  438. #if (NS_MAX_RCTSIZE == 4096)
  439. if (card->sram_size == 128)
  440. printk("nicstar%d: limiting maximum VCI. See NS_MAX_RCTSIZE in nicstar.h\n", i);
  441. #elif (NS_MAX_RCTSIZE == 16384)
  442. if (card->sram_size == 32)
  443. {
  444. printk("nicstar%d: wasting memory. See NS_MAX_RCTSIZE in nicstar.h\n", i);
  445. card->rct_size = 4096;
  446. }
  447. #else
  448. #error NS_MAX_RCTSIZE must be either 4096 or 16384 in nicstar.c
  449. #endif
  450. card->vpibits = NS_VPIBITS;
  451. if (card->rct_size == 4096)
  452. card->vcibits = 12 - NS_VPIBITS;
  453. else /* card->rct_size == 16384 */
  454. card->vcibits = 14 - NS_VPIBITS;
  455. /* Initialize the nicstar eeprom/eprom stuff, for the MAC addr */
  456. if (mac[i] == NULL)
  457. nicstar_init_eprom(card->membase);
  458. /* Set the VPI/VCI MSb mask to zero so we can receive OAM cells */
  459. writel(0x00000000, card->membase + VPM);
  460. /* Initialize TSQ */
  461. card->tsq.org = kmalloc(NS_TSQSIZE + NS_TSQ_ALIGNMENT, GFP_KERNEL);
  462. if (card->tsq.org == NULL)
  463. {
  464. printk("nicstar%d: can't allocate TSQ.\n", i);
  465. error = 10;
  466. ns_init_card_error(card, error);
  467. return error;
  468. }
  469. card->tsq.base = (ns_tsi *) ALIGN_ADDRESS(card->tsq.org, NS_TSQ_ALIGNMENT);
  470. card->tsq.next = card->tsq.base;
  471. card->tsq.last = card->tsq.base + (NS_TSQ_NUM_ENTRIES - 1);
  472. for (j = 0; j < NS_TSQ_NUM_ENTRIES; j++)
  473. ns_tsi_init(card->tsq.base + j);
  474. writel(0x00000000, card->membase + TSQH);
  475. writel((u32) virt_to_bus(card->tsq.base), card->membase + TSQB);
  476. PRINTK("nicstar%d: TSQ base at 0x%x 0x%x 0x%x.\n", i, (u32) card->tsq.base,
  477. (u32) virt_to_bus(card->tsq.base), readl(card->membase + TSQB));
  478. /* Initialize RSQ */
  479. card->rsq.org = kmalloc(NS_RSQSIZE + NS_RSQ_ALIGNMENT, GFP_KERNEL);
  480. if (card->rsq.org == NULL)
  481. {
  482. printk("nicstar%d: can't allocate RSQ.\n", i);
  483. error = 11;
  484. ns_init_card_error(card, error);
  485. return error;
  486. }
  487. card->rsq.base = (ns_rsqe *) ALIGN_ADDRESS(card->rsq.org, NS_RSQ_ALIGNMENT);
  488. card->rsq.next = card->rsq.base;
  489. card->rsq.last = card->rsq.base + (NS_RSQ_NUM_ENTRIES - 1);
  490. for (j = 0; j < NS_RSQ_NUM_ENTRIES; j++)
  491. ns_rsqe_init(card->rsq.base + j);
  492. writel(0x00000000, card->membase + RSQH);
  493. writel((u32) virt_to_bus(card->rsq.base), card->membase + RSQB);
  494. PRINTK("nicstar%d: RSQ base at 0x%x.\n", i, (u32) card->rsq.base);
  495. /* Initialize SCQ0, the only VBR SCQ used */
  496. card->scq1 = NULL;
  497. card->scq2 = NULL;
  498. card->scq0 = get_scq(VBR_SCQSIZE, NS_VRSCD0);
  499. if (card->scq0 == NULL)
  500. {
  501. printk("nicstar%d: can't get SCQ0.\n", i);
  502. error = 12;
  503. ns_init_card_error(card, error);
  504. return error;
  505. }
  506. u32d[0] = (u32) virt_to_bus(card->scq0->base);
  507. u32d[1] = (u32) 0x00000000;
  508. u32d[2] = (u32) 0xffffffff;
  509. u32d[3] = (u32) 0x00000000;
  510. ns_write_sram(card, NS_VRSCD0, u32d, 4);
  511. ns_write_sram(card, NS_VRSCD1, u32d, 4); /* These last two won't be used */
  512. ns_write_sram(card, NS_VRSCD2, u32d, 4); /* but are initialized, just in case... */
  513. card->scq0->scd = NS_VRSCD0;
  514. PRINTK("nicstar%d: VBR-SCQ0 base at 0x%x.\n", i, (u32) card->scq0->base);
  515. /* Initialize TSTs */
  516. card->tst_addr = NS_TST0;
  517. card->tst_free_entries = NS_TST_NUM_ENTRIES;
  518. data = NS_TST_OPCODE_VARIABLE;
  519. for (j = 0; j < NS_TST_NUM_ENTRIES; j++)
  520. ns_write_sram(card, NS_TST0 + j, &data, 1);
  521. data = ns_tste_make(NS_TST_OPCODE_END, NS_TST0);
  522. ns_write_sram(card, NS_TST0 + NS_TST_NUM_ENTRIES, &data, 1);
  523. for (j = 0; j < NS_TST_NUM_ENTRIES; j++)
  524. ns_write_sram(card, NS_TST1 + j, &data, 1);
  525. data = ns_tste_make(NS_TST_OPCODE_END, NS_TST1);
  526. ns_write_sram(card, NS_TST1 + NS_TST_NUM_ENTRIES, &data, 1);
  527. for (j = 0; j < NS_TST_NUM_ENTRIES; j++)
  528. card->tste2vc[j] = NULL;
  529. writel(NS_TST0 << 2, card->membase + TSTB);
  530. /* Initialize RCT. AAL type is set on opening the VC. */
  531. #ifdef RCQ_SUPPORT
  532. u32d[0] = NS_RCTE_RAWCELLINTEN;
  533. #else
  534. u32d[0] = 0x00000000;
  535. #endif /* RCQ_SUPPORT */
  536. u32d[1] = 0x00000000;
  537. u32d[2] = 0x00000000;
  538. u32d[3] = 0xFFFFFFFF;
  539. for (j = 0; j < card->rct_size; j++)
  540. ns_write_sram(card, j * 4, u32d, 4);
  541. memset(card->vcmap, 0, NS_MAX_RCTSIZE * sizeof(vc_map));
  542. for (j = 0; j < NS_FRSCD_NUM; j++)
  543. card->scd2vc[j] = NULL;
  544. /* Initialize buffer levels */
  545. card->sbnr.min = MIN_SB;
  546. card->sbnr.init = NUM_SB;
  547. card->sbnr.max = MAX_SB;
  548. card->lbnr.min = MIN_LB;
  549. card->lbnr.init = NUM_LB;
  550. card->lbnr.max = MAX_LB;
  551. card->iovnr.min = MIN_IOVB;
  552. card->iovnr.init = NUM_IOVB;
  553. card->iovnr.max = MAX_IOVB;
  554. card->hbnr.min = MIN_HB;
  555. card->hbnr.init = NUM_HB;
  556. card->hbnr.max = MAX_HB;
  557. card->sm_handle = 0x00000000;
  558. card->sm_addr = 0x00000000;
  559. card->lg_handle = 0x00000000;
  560. card->lg_addr = 0x00000000;
  561. card->efbie = 1; /* To prevent push_rxbufs from enabling the interrupt */
  562. /* Pre-allocate some huge buffers */
  563. skb_queue_head_init(&card->hbpool.queue);
  564. card->hbpool.count = 0;
  565. for (j = 0; j < NUM_HB; j++)
  566. {
  567. struct sk_buff *hb;
  568. hb = __dev_alloc_skb(NS_HBUFSIZE, GFP_KERNEL);
  569. if (hb == NULL)
  570. {
  571. printk("nicstar%d: can't allocate %dth of %d huge buffers.\n",
  572. i, j, NUM_HB);
  573. error = 13;
  574. ns_init_card_error(card, error);
  575. return error;
  576. }
  577. NS_SKB_CB(hb)->buf_type = BUF_NONE;
  578. skb_queue_tail(&card->hbpool.queue, hb);
  579. card->hbpool.count++;
  580. }
  581. /* Allocate large buffers */
  582. skb_queue_head_init(&card->lbpool.queue);
  583. card->lbpool.count = 0; /* Not used */
  584. for (j = 0; j < NUM_LB; j++)
  585. {
  586. struct sk_buff *lb;
  587. lb = __dev_alloc_skb(NS_LGSKBSIZE, GFP_KERNEL);
  588. if (lb == NULL)
  589. {
  590. printk("nicstar%d: can't allocate %dth of %d large buffers.\n",
  591. i, j, NUM_LB);
  592. error = 14;
  593. ns_init_card_error(card, error);
  594. return error;
  595. }
  596. NS_SKB_CB(lb)->buf_type = BUF_LG;
  597. skb_queue_tail(&card->lbpool.queue, lb);
  598. skb_reserve(lb, NS_SMBUFSIZE);
  599. push_rxbufs(card, lb);
  600. /* Due to the implementation of push_rxbufs() this is 1, not 0 */
  601. if (j == 1)
  602. {
  603. card->rcbuf = lb;
  604. card->rawch = (u32) virt_to_bus(lb->data);
  605. }
  606. }
  607. /* Test for strange behaviour which leads to crashes */
  608. if ((bcount = ns_stat_lfbqc_get(readl(card->membase + STAT))) < card->lbnr.min)
  609. {
  610. printk("nicstar%d: Strange... Just allocated %d large buffers and lfbqc = %d.\n",
  611. i, j, bcount);
  612. error = 14;
  613. ns_init_card_error(card, error);
  614. return error;
  615. }
  616. /* Allocate small buffers */
  617. skb_queue_head_init(&card->sbpool.queue);
  618. card->sbpool.count = 0; /* Not used */
  619. for (j = 0; j < NUM_SB; j++)
  620. {
  621. struct sk_buff *sb;
  622. sb = __dev_alloc_skb(NS_SMSKBSIZE, GFP_KERNEL);
  623. if (sb == NULL)
  624. {
  625. printk("nicstar%d: can't allocate %dth of %d small buffers.\n",
  626. i, j, NUM_SB);
  627. error = 15;
  628. ns_init_card_error(card, error);
  629. return error;
  630. }
  631. NS_SKB_CB(sb)->buf_type = BUF_SM;
  632. skb_queue_tail(&card->sbpool.queue, sb);
  633. skb_reserve(sb, NS_AAL0_HEADER);
  634. push_rxbufs(card, sb);
  635. }
  636. /* Test for strange behaviour which leads to crashes */
  637. if ((bcount = ns_stat_sfbqc_get(readl(card->membase + STAT))) < card->sbnr.min)
  638. {
  639. printk("nicstar%d: Strange... Just allocated %d small buffers and sfbqc = %d.\n",
  640. i, j, bcount);
  641. error = 15;
  642. ns_init_card_error(card, error);
  643. return error;
  644. }
  645. /* Allocate iovec buffers */
  646. skb_queue_head_init(&card->iovpool.queue);
  647. card->iovpool.count = 0;
  648. for (j = 0; j < NUM_IOVB; j++)
  649. {
  650. struct sk_buff *iovb;
  651. iovb = alloc_skb(NS_IOVBUFSIZE, GFP_KERNEL);
  652. if (iovb == NULL)
  653. {
  654. printk("nicstar%d: can't allocate %dth of %d iovec buffers.\n",
  655. i, j, NUM_IOVB);
  656. error = 16;
  657. ns_init_card_error(card, error);
  658. return error;
  659. }
  660. NS_SKB_CB(iovb)->buf_type = BUF_NONE;
  661. skb_queue_tail(&card->iovpool.queue, iovb);
  662. card->iovpool.count++;
  663. }
  664. /* Configure NICStAR */
  665. if (card->rct_size == 4096)
  666. ns_cfg_rctsize = NS_CFG_RCTSIZE_4096_ENTRIES;
  667. else /* (card->rct_size == 16384) */
  668. ns_cfg_rctsize = NS_CFG_RCTSIZE_16384_ENTRIES;
  669. card->efbie = 1;
  670. card->intcnt = 0;
  671. if (request_irq(pcidev->irq, &ns_irq_handler, IRQF_DISABLED | IRQF_SHARED, "nicstar", card) != 0)
  672. {
  673. printk("nicstar%d: can't allocate IRQ %d.\n", i, pcidev->irq);
  674. error = 9;
  675. ns_init_card_error(card, error);
  676. return error;
  677. }
  678. /* Register device */
  679. card->atmdev = atm_dev_register("nicstar", &atm_ops, -1, NULL);
  680. if (card->atmdev == NULL)
  681. {
  682. printk("nicstar%d: can't register device.\n", i);
  683. error = 17;
  684. ns_init_card_error(card, error);
  685. return error;
  686. }
  687. if (ns_parse_mac(mac[i], card->atmdev->esi)) {
  688. nicstar_read_eprom(card->membase, NICSTAR_EPROM_MAC_ADDR_OFFSET,
  689. card->atmdev->esi, 6);
  690. if (memcmp(card->atmdev->esi, "\x00\x00\x00\x00\x00\x00", 6) == 0) {
  691. nicstar_read_eprom(card->membase, NICSTAR_EPROM_MAC_ADDR_OFFSET_ALT,
  692. card->atmdev->esi, 6);
  693. }
  694. }
  695. printk("nicstar%d: MAC address %pM\n", i, card->atmdev->esi);
  696. card->atmdev->dev_data = card;
  697. card->atmdev->ci_range.vpi_bits = card->vpibits;
  698. card->atmdev->ci_range.vci_bits = card->vcibits;
  699. card->atmdev->link_rate = card->max_pcr;
  700. card->atmdev->phy = NULL;
  701. #ifdef CONFIG_ATM_NICSTAR_USE_SUNI
  702. if (card->max_pcr == ATM_OC3_PCR)
  703. suni_init(card->atmdev);
  704. #endif /* CONFIG_ATM_NICSTAR_USE_SUNI */
  705. #ifdef CONFIG_ATM_NICSTAR_USE_IDT77105
  706. if (card->max_pcr == ATM_25_PCR)
  707. idt77105_init(card->atmdev);
  708. #endif /* CONFIG_ATM_NICSTAR_USE_IDT77105 */
  709. if (card->atmdev->phy && card->atmdev->phy->start)
  710. card->atmdev->phy->start(card->atmdev);
  711. writel(NS_CFG_RXPATH |
  712. NS_CFG_SMBUFSIZE |
  713. NS_CFG_LGBUFSIZE |
  714. NS_CFG_EFBIE |
  715. NS_CFG_RSQSIZE |
  716. NS_CFG_VPIBITS |
  717. ns_cfg_rctsize |
  718. NS_CFG_RXINT_NODELAY |
  719. NS_CFG_RAWIE | /* Only enabled if RCQ_SUPPORT */
  720. NS_CFG_RSQAFIE |
  721. NS_CFG_TXEN |
  722. NS_CFG_TXIE |
  723. NS_CFG_TSQFIE_OPT | /* Only enabled if ENABLE_TSQFIE */
  724. NS_CFG_PHYIE,
  725. card->membase + CFG);
  726. num_cards++;
  727. return error;
  728. }
  729. static void __devinit ns_init_card_error(ns_dev *card, int error)
  730. {
  731. if (error >= 17)
  732. {
  733. writel(0x00000000, card->membase + CFG);
  734. }
  735. if (error >= 16)
  736. {
  737. struct sk_buff *iovb;
  738. while ((iovb = skb_dequeue(&card->iovpool.queue)) != NULL)
  739. dev_kfree_skb_any(iovb);
  740. }
  741. if (error >= 15)
  742. {
  743. struct sk_buff *sb;
  744. while ((sb = skb_dequeue(&card->sbpool.queue)) != NULL)
  745. dev_kfree_skb_any(sb);
  746. free_scq(card->scq0, NULL);
  747. }
  748. if (error >= 14)
  749. {
  750. struct sk_buff *lb;
  751. while ((lb = skb_dequeue(&card->lbpool.queue)) != NULL)
  752. dev_kfree_skb_any(lb);
  753. }
  754. if (error >= 13)
  755. {
  756. struct sk_buff *hb;
  757. while ((hb = skb_dequeue(&card->hbpool.queue)) != NULL)
  758. dev_kfree_skb_any(hb);
  759. }
  760. if (error >= 12)
  761. {
  762. kfree(card->rsq.org);
  763. }
  764. if (error >= 11)
  765. {
  766. kfree(card->tsq.org);
  767. }
  768. if (error >= 10)
  769. {
  770. free_irq(card->pcidev->irq, card);
  771. }
  772. if (error >= 4)
  773. {
  774. iounmap(card->membase);
  775. }
  776. if (error >= 3)
  777. {
  778. pci_disable_device(card->pcidev);
  779. kfree(card);
  780. }
  781. }
  782. static scq_info *get_scq(int size, u32 scd)
  783. {
  784. scq_info *scq;
  785. int i;
  786. if (size != VBR_SCQSIZE && size != CBR_SCQSIZE)
  787. return NULL;
  788. scq = kmalloc(sizeof(scq_info), GFP_KERNEL);
  789. if (scq == NULL)
  790. return NULL;
  791. scq->org = kmalloc(2 * size, GFP_KERNEL);
  792. if (scq->org == NULL)
  793. {
  794. kfree(scq);
  795. return NULL;
  796. }
  797. scq->skb = kmalloc(sizeof(struct sk_buff *) *
  798. (size / NS_SCQE_SIZE), GFP_KERNEL);
  799. if (scq->skb == NULL)
  800. {
  801. kfree(scq->org);
  802. kfree(scq);
  803. return NULL;
  804. }
  805. scq->num_entries = size / NS_SCQE_SIZE;
  806. scq->base = (ns_scqe *) ALIGN_ADDRESS(scq->org, size);
  807. scq->next = scq->base;
  808. scq->last = scq->base + (scq->num_entries - 1);
  809. scq->tail = scq->last;
  810. scq->scd = scd;
  811. scq->num_entries = size / NS_SCQE_SIZE;
  812. scq->tbd_count = 0;
  813. init_waitqueue_head(&scq->scqfull_waitq);
  814. scq->full = 0;
  815. spin_lock_init(&scq->lock);
  816. for (i = 0; i < scq->num_entries; i++)
  817. scq->skb[i] = NULL;
  818. return scq;
  819. }
  820. /* For variable rate SCQ vcc must be NULL */
  821. static void free_scq(scq_info *scq, struct atm_vcc *vcc)
  822. {
  823. int i;
  824. if (scq->num_entries == VBR_SCQ_NUM_ENTRIES)
  825. for (i = 0; i < scq->num_entries; i++)
  826. {
  827. if (scq->skb[i] != NULL)
  828. {
  829. vcc = ATM_SKB(scq->skb[i])->vcc;
  830. if (vcc->pop != NULL)
  831. vcc->pop(vcc, scq->skb[i]);
  832. else
  833. dev_kfree_skb_any(scq->skb[i]);
  834. }
  835. }
  836. else /* vcc must be != NULL */
  837. {
  838. if (vcc == NULL)
  839. {
  840. printk("nicstar: free_scq() called with vcc == NULL for fixed rate scq.");
  841. for (i = 0; i < scq->num_entries; i++)
  842. dev_kfree_skb_any(scq->skb[i]);
  843. }
  844. else
  845. for (i = 0; i < scq->num_entries; i++)
  846. {
  847. if (scq->skb[i] != NULL)
  848. {
  849. if (vcc->pop != NULL)
  850. vcc->pop(vcc, scq->skb[i]);
  851. else
  852. dev_kfree_skb_any(scq->skb[i]);
  853. }
  854. }
  855. }
  856. kfree(scq->skb);
  857. kfree(scq->org);
  858. kfree(scq);
  859. }
  860. /* The handles passed must be pointers to the sk_buff containing the small
  861. or large buffer(s) cast to u32. */
  862. static void push_rxbufs(ns_dev *card, struct sk_buff *skb)
  863. {
  864. struct ns_skb_cb *cb = NS_SKB_CB(skb);
  865. u32 handle1, addr1;
  866. u32 handle2, addr2;
  867. u32 stat;
  868. unsigned long flags;
  869. /* *BARF* */
  870. handle2 = addr2 = 0;
  871. handle1 = (u32)skb;
  872. addr1 = (u32)virt_to_bus(skb->data);
  873. #ifdef GENERAL_DEBUG
  874. if (!addr1)
  875. printk("nicstar%d: push_rxbufs called with addr1 = 0.\n", card->index);
  876. #endif /* GENERAL_DEBUG */
  877. stat = readl(card->membase + STAT);
  878. card->sbfqc = ns_stat_sfbqc_get(stat);
  879. card->lbfqc = ns_stat_lfbqc_get(stat);
  880. if (cb->buf_type == BUF_SM)
  881. {
  882. if (!addr2)
  883. {
  884. if (card->sm_addr)
  885. {
  886. addr2 = card->sm_addr;
  887. handle2 = card->sm_handle;
  888. card->sm_addr = 0x00000000;
  889. card->sm_handle = 0x00000000;
  890. }
  891. else /* (!sm_addr) */
  892. {
  893. card->sm_addr = addr1;
  894. card->sm_handle = handle1;
  895. }
  896. }
  897. }
  898. else /* buf_type == BUF_LG */
  899. {
  900. if (!addr2)
  901. {
  902. if (card->lg_addr)
  903. {
  904. addr2 = card->lg_addr;
  905. handle2 = card->lg_handle;
  906. card->lg_addr = 0x00000000;
  907. card->lg_handle = 0x00000000;
  908. }
  909. else /* (!lg_addr) */
  910. {
  911. card->lg_addr = addr1;
  912. card->lg_handle = handle1;
  913. }
  914. }
  915. }
  916. if (addr2)
  917. {
  918. if (cb->buf_type == BUF_SM)
  919. {
  920. if (card->sbfqc >= card->sbnr.max)
  921. {
  922. skb_unlink((struct sk_buff *) handle1, &card->sbpool.queue);
  923. dev_kfree_skb_any((struct sk_buff *) handle1);
  924. skb_unlink((struct sk_buff *) handle2, &card->sbpool.queue);
  925. dev_kfree_skb_any((struct sk_buff *) handle2);
  926. return;
  927. }
  928. else
  929. card->sbfqc += 2;
  930. }
  931. else /* (buf_type == BUF_LG) */
  932. {
  933. if (card->lbfqc >= card->lbnr.max)
  934. {
  935. skb_unlink((struct sk_buff *) handle1, &card->lbpool.queue);
  936. dev_kfree_skb_any((struct sk_buff *) handle1);
  937. skb_unlink((struct sk_buff *) handle2, &card->lbpool.queue);
  938. dev_kfree_skb_any((struct sk_buff *) handle2);
  939. return;
  940. }
  941. else
  942. card->lbfqc += 2;
  943. }
  944. spin_lock_irqsave(&card->res_lock, flags);
  945. while (CMD_BUSY(card));
  946. writel(addr2, card->membase + DR3);
  947. writel(handle2, card->membase + DR2);
  948. writel(addr1, card->membase + DR1);
  949. writel(handle1, card->membase + DR0);
  950. writel(NS_CMD_WRITE_FREEBUFQ | cb->buf_type, card->membase + CMD);
  951. spin_unlock_irqrestore(&card->res_lock, flags);
  952. XPRINTK("nicstar%d: Pushing %s buffers at 0x%x and 0x%x.\n", card->index,
  953. (cb->buf_type == BUF_SM ? "small" : "large"), addr1, addr2);
  954. }
  955. if (!card->efbie && card->sbfqc >= card->sbnr.min &&
  956. card->lbfqc >= card->lbnr.min)
  957. {
  958. card->efbie = 1;
  959. writel((readl(card->membase + CFG) | NS_CFG_EFBIE), card->membase + CFG);
  960. }
  961. return;
  962. }
  963. static irqreturn_t ns_irq_handler(int irq, void *dev_id)
  964. {
  965. u32 stat_r;
  966. ns_dev *card;
  967. struct atm_dev *dev;
  968. unsigned long flags;
  969. card = (ns_dev *) dev_id;
  970. dev = card->atmdev;
  971. card->intcnt++;
  972. PRINTK("nicstar%d: NICStAR generated an interrupt\n", card->index);
  973. spin_lock_irqsave(&card->int_lock, flags);
  974. stat_r = readl(card->membase + STAT);
  975. /* Transmit Status Indicator has been written to T. S. Queue */
  976. if (stat_r & NS_STAT_TSIF)
  977. {
  978. TXPRINTK("nicstar%d: TSI interrupt\n", card->index);
  979. process_tsq(card);
  980. writel(NS_STAT_TSIF, card->membase + STAT);
  981. }
  982. /* Incomplete CS-PDU has been transmitted */
  983. if (stat_r & NS_STAT_TXICP)
  984. {
  985. writel(NS_STAT_TXICP, card->membase + STAT);
  986. TXPRINTK("nicstar%d: Incomplete CS-PDU transmitted.\n",
  987. card->index);
  988. }
  989. /* Transmit Status Queue 7/8 full */
  990. if (stat_r & NS_STAT_TSQF)
  991. {
  992. writel(NS_STAT_TSQF, card->membase + STAT);
  993. PRINTK("nicstar%d: TSQ full.\n", card->index);
  994. process_tsq(card);
  995. }
  996. /* Timer overflow */
  997. if (stat_r & NS_STAT_TMROF)
  998. {
  999. writel(NS_STAT_TMROF, card->membase + STAT);
  1000. PRINTK("nicstar%d: Timer overflow.\n", card->index);
  1001. }
  1002. /* PHY device interrupt signal active */
  1003. if (stat_r & NS_STAT_PHYI)
  1004. {
  1005. writel(NS_STAT_PHYI, card->membase + STAT);
  1006. PRINTK("nicstar%d: PHY interrupt.\n", card->index);
  1007. if (dev->phy && dev->phy->interrupt) {
  1008. dev->phy->interrupt(dev);
  1009. }
  1010. }
  1011. /* Small Buffer Queue is full */
  1012. if (stat_r & NS_STAT_SFBQF)
  1013. {
  1014. writel(NS_STAT_SFBQF, card->membase + STAT);
  1015. printk("nicstar%d: Small free buffer queue is full.\n", card->index);
  1016. }
  1017. /* Large Buffer Queue is full */
  1018. if (stat_r & NS_STAT_LFBQF)
  1019. {
  1020. writel(NS_STAT_LFBQF, card->membase + STAT);
  1021. printk("nicstar%d: Large free buffer queue is full.\n", card->index);
  1022. }
  1023. /* Receive Status Queue is full */
  1024. if (stat_r & NS_STAT_RSQF)
  1025. {
  1026. writel(NS_STAT_RSQF, card->membase + STAT);
  1027. printk("nicstar%d: RSQ full.\n", card->index);
  1028. process_rsq(card);
  1029. }
  1030. /* Complete CS-PDU received */
  1031. if (stat_r & NS_STAT_EOPDU)
  1032. {
  1033. RXPRINTK("nicstar%d: End of CS-PDU received.\n", card->index);
  1034. process_rsq(card);
  1035. writel(NS_STAT_EOPDU, card->membase + STAT);
  1036. }
  1037. /* Raw cell received */
  1038. if (stat_r & NS_STAT_RAWCF)
  1039. {
  1040. writel(NS_STAT_RAWCF, card->membase + STAT);
  1041. #ifndef RCQ_SUPPORT
  1042. printk("nicstar%d: Raw cell received and no support yet...\n",
  1043. card->index);
  1044. #endif /* RCQ_SUPPORT */
  1045. /* NOTE: the following procedure may keep a raw cell pending until the
  1046. next interrupt. As this preliminary support is only meant to
  1047. avoid buffer leakage, this is not an issue. */
  1048. while (readl(card->membase + RAWCT) != card->rawch)
  1049. {
  1050. ns_rcqe *rawcell;
  1051. rawcell = (ns_rcqe *) bus_to_virt(card->rawch);
  1052. if (ns_rcqe_islast(rawcell))
  1053. {
  1054. struct sk_buff *oldbuf;
  1055. oldbuf = card->rcbuf;
  1056. card->rcbuf = (struct sk_buff *) ns_rcqe_nextbufhandle(rawcell);
  1057. card->rawch = (u32) virt_to_bus(card->rcbuf->data);
  1058. recycle_rx_buf(card, oldbuf);
  1059. }
  1060. else
  1061. card->rawch += NS_RCQE_SIZE;
  1062. }
  1063. }
  1064. /* Small buffer queue is empty */
  1065. if (stat_r & NS_STAT_SFBQE)
  1066. {
  1067. int i;
  1068. struct sk_buff *sb;
  1069. writel(NS_STAT_SFBQE, card->membase + STAT);
  1070. printk("nicstar%d: Small free buffer queue empty.\n",
  1071. card->index);
  1072. for (i = 0; i < card->sbnr.min; i++)
  1073. {
  1074. sb = dev_alloc_skb(NS_SMSKBSIZE);
  1075. if (sb == NULL)
  1076. {
  1077. writel(readl(card->membase + CFG) & ~NS_CFG_EFBIE, card->membase + CFG);
  1078. card->efbie = 0;
  1079. break;
  1080. }
  1081. NS_SKB_CB(sb)->buf_type = BUF_SM;
  1082. skb_queue_tail(&card->sbpool.queue, sb);
  1083. skb_reserve(sb, NS_AAL0_HEADER);
  1084. push_rxbufs(card, sb);
  1085. }
  1086. card->sbfqc = i;
  1087. process_rsq(card);
  1088. }
  1089. /* Large buffer queue empty */
  1090. if (stat_r & NS_STAT_LFBQE)
  1091. {
  1092. int i;
  1093. struct sk_buff *lb;
  1094. writel(NS_STAT_LFBQE, card->membase + STAT);
  1095. printk("nicstar%d: Large free buffer queue empty.\n",
  1096. card->index);
  1097. for (i = 0; i < card->lbnr.min; i++)
  1098. {
  1099. lb = dev_alloc_skb(NS_LGSKBSIZE);
  1100. if (lb == NULL)
  1101. {
  1102. writel(readl(card->membase + CFG) & ~NS_CFG_EFBIE, card->membase + CFG);
  1103. card->efbie = 0;
  1104. break;
  1105. }
  1106. NS_SKB_CB(lb)->buf_type = BUF_LG;
  1107. skb_queue_tail(&card->lbpool.queue, lb);
  1108. skb_reserve(lb, NS_SMBUFSIZE);
  1109. push_rxbufs(card, lb);
  1110. }
  1111. card->lbfqc = i;
  1112. process_rsq(card);
  1113. }
  1114. /* Receive Status Queue is 7/8 full */
  1115. if (stat_r & NS_STAT_RSQAF)
  1116. {
  1117. writel(NS_STAT_RSQAF, card->membase + STAT);
  1118. RXPRINTK("nicstar%d: RSQ almost full.\n", card->index);
  1119. process_rsq(card);
  1120. }
  1121. spin_unlock_irqrestore(&card->int_lock, flags);
  1122. PRINTK("nicstar%d: end of interrupt service\n", card->index);
  1123. return IRQ_HANDLED;
  1124. }
  1125. static int ns_open(struct atm_vcc *vcc)
  1126. {
  1127. ns_dev *card;
  1128. vc_map *vc;
  1129. unsigned long tmpl, modl;
  1130. int tcr, tcra; /* target cell rate, and absolute value */
  1131. int n = 0; /* Number of entries in the TST. Initialized to remove
  1132. the compiler warning. */
  1133. u32 u32d[4];
  1134. int frscdi = 0; /* Index of the SCD. Initialized to remove the compiler
  1135. warning. How I wish compilers were clever enough to
  1136. tell which variables can truly be used
  1137. uninitialized... */
  1138. int inuse; /* tx or rx vc already in use by another vcc */
  1139. short vpi = vcc->vpi;
  1140. int vci = vcc->vci;
  1141. card = (ns_dev *) vcc->dev->dev_data;
  1142. PRINTK("nicstar%d: opening vpi.vci %d.%d \n", card->index, (int) vpi, vci);
  1143. if (vcc->qos.aal != ATM_AAL5 && vcc->qos.aal != ATM_AAL0)
  1144. {
  1145. PRINTK("nicstar%d: unsupported AAL.\n", card->index);
  1146. return -EINVAL;
  1147. }
  1148. vc = &(card->vcmap[vpi << card->vcibits | vci]);
  1149. vcc->dev_data = vc;
  1150. inuse = 0;
  1151. if (vcc->qos.txtp.traffic_class != ATM_NONE && vc->tx)
  1152. inuse = 1;
  1153. if (vcc->qos.rxtp.traffic_class != ATM_NONE && vc->rx)
  1154. inuse += 2;
  1155. if (inuse)
  1156. {
  1157. printk("nicstar%d: %s vci already in use.\n", card->index,
  1158. inuse == 1 ? "tx" : inuse == 2 ? "rx" : "tx and rx");
  1159. return -EINVAL;
  1160. }
  1161. set_bit(ATM_VF_ADDR,&vcc->flags);
  1162. /* NOTE: You are not allowed to modify an open connection's QOS. To change
  1163. that, remove the ATM_VF_PARTIAL flag checking. There may be other changes
  1164. needed to do that. */
  1165. if (!test_bit(ATM_VF_PARTIAL,&vcc->flags))
  1166. {
  1167. scq_info *scq;
  1168. set_bit(ATM_VF_PARTIAL,&vcc->flags);
  1169. if (vcc->qos.txtp.traffic_class == ATM_CBR)
  1170. {
  1171. /* Check requested cell rate and availability of SCD */
  1172. if (vcc->qos.txtp.max_pcr == 0 && vcc->qos.txtp.pcr == 0 &&
  1173. vcc->qos.txtp.min_pcr == 0)
  1174. {
  1175. PRINTK("nicstar%d: trying to open a CBR vc with cell rate = 0 \n",
  1176. card->index);
  1177. clear_bit(ATM_VF_PARTIAL,&vcc->flags);
  1178. clear_bit(ATM_VF_ADDR,&vcc->flags);
  1179. return -EINVAL;
  1180. }
  1181. tcr = atm_pcr_goal(&(vcc->qos.txtp));
  1182. tcra = tcr >= 0 ? tcr : -tcr;
  1183. PRINTK("nicstar%d: target cell rate = %d.\n", card->index,
  1184. vcc->qos.txtp.max_pcr);
  1185. tmpl = (unsigned long)tcra * (unsigned long)NS_TST_NUM_ENTRIES;
  1186. modl = tmpl % card->max_pcr;
  1187. n = (int)(tmpl / card->max_pcr);
  1188. if (tcr > 0)
  1189. {
  1190. if (modl > 0) n++;
  1191. }
  1192. else if (tcr == 0)
  1193. {
  1194. if ((n = (card->tst_free_entries - NS_TST_RESERVED)) <= 0)
  1195. {
  1196. PRINTK("nicstar%d: no CBR bandwidth free.\n", card->index);
  1197. clear_bit(ATM_VF_PARTIAL,&vcc->flags);
  1198. clear_bit(ATM_VF_ADDR,&vcc->flags);
  1199. return -EINVAL;
  1200. }
  1201. }
  1202. if (n == 0)
  1203. {
  1204. printk("nicstar%d: selected bandwidth < granularity.\n", card->index);
  1205. clear_bit(ATM_VF_PARTIAL,&vcc->flags);
  1206. clear_bit(ATM_VF_ADDR,&vcc->flags);
  1207. return -EINVAL;
  1208. }
  1209. if (n > (card->tst_free_entries - NS_TST_RESERVED))
  1210. {
  1211. PRINTK("nicstar%d: not enough free CBR bandwidth.\n", card->index);
  1212. clear_bit(ATM_VF_PARTIAL,&vcc->flags);
  1213. clear_bit(ATM_VF_ADDR,&vcc->flags);
  1214. return -EINVAL;
  1215. }
  1216. else
  1217. card->tst_free_entries -= n;
  1218. XPRINTK("nicstar%d: writing %d tst entries.\n", card->index, n);
  1219. for (frscdi = 0; frscdi < NS_FRSCD_NUM; frscdi++)
  1220. {
  1221. if (card->scd2vc[frscdi] == NULL)
  1222. {
  1223. card->scd2vc[frscdi] = vc;
  1224. break;
  1225. }
  1226. }
  1227. if (frscdi == NS_FRSCD_NUM)
  1228. {
  1229. PRINTK("nicstar%d: no SCD available for CBR channel.\n", card->index);
  1230. card->tst_free_entries += n;
  1231. clear_bit(ATM_VF_PARTIAL,&vcc->flags);
  1232. clear_bit(ATM_VF_ADDR,&vcc->flags);
  1233. return -EBUSY;
  1234. }
  1235. vc->cbr_scd = NS_FRSCD + frscdi * NS_FRSCD_SIZE;
  1236. scq = get_scq(CBR_SCQSIZE, vc->cbr_scd);
  1237. if (scq == NULL)
  1238. {
  1239. PRINTK("nicstar%d: can't get fixed rate SCQ.\n", card->index);
  1240. card->scd2vc[frscdi] = NULL;
  1241. card->tst_free_entries += n;
  1242. clear_bit(ATM_VF_PARTIAL,&vcc->flags);
  1243. clear_bit(ATM_VF_ADDR,&vcc->flags);
  1244. return -ENOMEM;
  1245. }
  1246. vc->scq = scq;
  1247. u32d[0] = (u32) virt_to_bus(scq->base);
  1248. u32d[1] = (u32) 0x00000000;
  1249. u32d[2] = (u32) 0xffffffff;
  1250. u32d[3] = (u32) 0x00000000;
  1251. ns_write_sram(card, vc->cbr_scd, u32d, 4);
  1252. fill_tst(card, n, vc);
  1253. }
  1254. else if (vcc->qos.txtp.traffic_class == ATM_UBR)
  1255. {
  1256. vc->cbr_scd = 0x00000000;
  1257. vc->scq = card->scq0;
  1258. }
  1259. if (vcc->qos.txtp.traffic_class != ATM_NONE)
  1260. {
  1261. vc->tx = 1;
  1262. vc->tx_vcc = vcc;
  1263. vc->tbd_count = 0;
  1264. }
  1265. if (vcc->qos.rxtp.traffic_class != ATM_NONE)
  1266. {
  1267. u32 status;
  1268. vc->rx = 1;
  1269. vc->rx_vcc = vcc;
  1270. vc->rx_iov = NULL;
  1271. /* Open the connection in hardware */
  1272. if (vcc->qos.aal == ATM_AAL5)
  1273. status = NS_RCTE_AAL5 | NS_RCTE_CONNECTOPEN;
  1274. else /* vcc->qos.aal == ATM_AAL0 */
  1275. status = NS_RCTE_AAL0 | NS_RCTE_CONNECTOPEN;
  1276. #ifdef RCQ_SUPPORT
  1277. status |= NS_RCTE_RAWCELLINTEN;
  1278. #endif /* RCQ_SUPPORT */
  1279. ns_write_sram(card, NS_RCT + (vpi << card->vcibits | vci) *
  1280. NS_RCT_ENTRY_SIZE, &status, 1);
  1281. }
  1282. }
  1283. set_bit(ATM_VF_READY,&vcc->flags);
  1284. return 0;
  1285. }
  1286. static void ns_close(struct atm_vcc *vcc)
  1287. {
  1288. vc_map *vc;
  1289. ns_dev *card;
  1290. u32 data;
  1291. int i;
  1292. vc = vcc->dev_data;
  1293. card = vcc->dev->dev_data;
  1294. PRINTK("nicstar%d: closing vpi.vci %d.%d \n", card->index,
  1295. (int) vcc->vpi, vcc->vci);
  1296. clear_bit(ATM_VF_READY,&vcc->flags);
  1297. if (vcc->qos.rxtp.traffic_class != ATM_NONE)
  1298. {
  1299. u32 addr;
  1300. unsigned long flags;
  1301. addr = NS_RCT + (vcc->vpi << card->vcibits | vcc->vci) * NS_RCT_ENTRY_SIZE;
  1302. spin_lock_irqsave(&card->res_lock, flags);
  1303. while(CMD_BUSY(card));
  1304. writel(NS_CMD_CLOSE_CONNECTION | addr << 2, card->membase + CMD);
  1305. spin_unlock_irqrestore(&card->res_lock, flags);
  1306. vc->rx = 0;
  1307. if (vc->rx_iov != NULL)
  1308. {
  1309. struct sk_buff *iovb;
  1310. u32 stat;
  1311. stat = readl(card->membase + STAT);
  1312. card->sbfqc = ns_stat_sfbqc_get(stat);
  1313. card->lbfqc = ns_stat_lfbqc_get(stat);
  1314. PRINTK("nicstar%d: closing a VC with pending rx buffers.\n",
  1315. card->index);
  1316. iovb = vc->rx_iov;
  1317. recycle_iovec_rx_bufs(card, (struct iovec *) iovb->data,
  1318. NS_SKB(iovb)->iovcnt);
  1319. NS_SKB(iovb)->iovcnt = 0;
  1320. NS_SKB(iovb)->vcc = NULL;
  1321. spin_lock_irqsave(&card->int_lock, flags);
  1322. recycle_iov_buf(card, iovb);
  1323. spin_unlock_irqrestore(&card->int_lock, flags);
  1324. vc->rx_iov = NULL;
  1325. }
  1326. }
  1327. if (vcc->qos.txtp.traffic_class != ATM_NONE)
  1328. {
  1329. vc->tx = 0;
  1330. }
  1331. if (vcc->qos.txtp.traffic_class == ATM_CBR)
  1332. {
  1333. unsigned long flags;
  1334. ns_scqe *scqep;
  1335. scq_info *scq;
  1336. scq = vc->scq;
  1337. for (;;)
  1338. {
  1339. spin_lock_irqsave(&scq->lock, flags);
  1340. scqep = scq->next;
  1341. if (scqep == scq->base)
  1342. scqep = scq->last;
  1343. else
  1344. scqep--;
  1345. if (scqep == scq->tail)
  1346. {
  1347. spin_unlock_irqrestore(&scq->lock, flags);
  1348. break;
  1349. }
  1350. /* If the last entry is not a TSR, place one in the SCQ in order to
  1351. be able to completely drain it and then close. */
  1352. if (!ns_scqe_is_tsr(scqep) && scq->tail != scq->next)
  1353. {
  1354. ns_scqe tsr;
  1355. u32 scdi, scqi;
  1356. u32 data;
  1357. int index;
  1358. tsr.word_1 = ns_tsr_mkword_1(NS_TSR_INTENABLE);
  1359. scdi = (vc->cbr_scd - NS_FRSCD) / NS_FRSCD_SIZE;
  1360. scqi = scq->next - scq->base;
  1361. tsr.word_2 = ns_tsr_mkword_2(scdi, scqi);
  1362. tsr.word_3 = 0x00000000;
  1363. tsr.word_4 = 0x00000000;
  1364. *scq->next = tsr;
  1365. index = (int) scqi;
  1366. scq->skb[index] = NULL;
  1367. if (scq->next == scq->last)
  1368. scq->next = scq->base;
  1369. else
  1370. scq->next++;
  1371. data = (u32) virt_to_bus(scq->next);
  1372. ns_write_sram(card, scq->scd, &data, 1);
  1373. }
  1374. spin_unlock_irqrestore(&scq->lock, flags);
  1375. schedule();
  1376. }
  1377. /* Free all TST entries */
  1378. data = NS_TST_OPCODE_VARIABLE;
  1379. for (i = 0; i < NS_TST_NUM_ENTRIES; i++)
  1380. {
  1381. if (card->tste2vc[i] == vc)
  1382. {
  1383. ns_write_sram(card, card->tst_addr + i, &data, 1);
  1384. card->tste2vc[i] = NULL;
  1385. card->tst_free_entries++;
  1386. }
  1387. }
  1388. card->scd2vc[(vc->cbr_scd - NS_FRSCD) / NS_FRSCD_SIZE] = NULL;
  1389. free_scq(vc->scq, vcc);
  1390. }
  1391. /* remove all references to vcc before deleting it */
  1392. if (vcc->qos.txtp.traffic_class != ATM_NONE)
  1393. {
  1394. unsigned long flags;
  1395. scq_info *scq = card->scq0;
  1396. spin_lock_irqsave(&scq->lock, flags);
  1397. for(i = 0; i < scq->num_entries; i++) {
  1398. if(scq->skb[i] && ATM_SKB(scq->skb[i])->vcc == vcc) {
  1399. ATM_SKB(scq->skb[i])->vcc = NULL;
  1400. atm_return(vcc, scq->skb[i]->truesize);
  1401. PRINTK("nicstar: deleted pending vcc mapping\n");
  1402. }
  1403. }
  1404. spin_unlock_irqrestore(&scq->lock, flags);
  1405. }
  1406. vcc->dev_data = NULL;
  1407. clear_bit(ATM_VF_PARTIAL,&vcc->flags);
  1408. clear_bit(ATM_VF_ADDR,&vcc->flags);
  1409. #ifdef RX_DEBUG
  1410. {
  1411. u32 stat, cfg;
  1412. stat = readl(card->membase + STAT);
  1413. cfg = readl(card->membase + CFG);
  1414. printk("STAT = 0x%08X CFG = 0x%08X \n", stat, cfg);
  1415. printk("TSQ: base = 0x%08X next = 0x%08X last = 0x%08X TSQT = 0x%08X \n",
  1416. (u32) card->tsq.base, (u32) card->tsq.next,(u32) card->tsq.last,
  1417. readl(card->membase + TSQT));
  1418. printk("RSQ: base = 0x%08X next = 0x%08X last = 0x%08X RSQT = 0x%08X \n",
  1419. (u32) card->rsq.base, (u32) card->rsq.next,(u32) card->rsq.last,
  1420. readl(card->membase + RSQT));
  1421. printk("Empty free buffer queue interrupt %s \n",
  1422. card->efbie ? "enabled" : "disabled");
  1423. printk("SBCNT = %d count = %d LBCNT = %d count = %d \n",
  1424. ns_stat_sfbqc_get(stat), card->sbpool.count,
  1425. ns_stat_lfbqc_get(stat), card->lbpool.count);
  1426. printk("hbpool.count = %d iovpool.count = %d \n",
  1427. card->hbpool.count, card->iovpool.count);
  1428. }
  1429. #endif /* RX_DEBUG */
  1430. }
  1431. static void fill_tst(ns_dev *card, int n, vc_map *vc)
  1432. {
  1433. u32 new_tst;
  1434. unsigned long cl;
  1435. int e, r;
  1436. u32 data;
  1437. /* It would be very complicated to keep the two TSTs synchronized while
  1438. assuring that writes are only made to the inactive TST. So, for now I
  1439. will use only one TST. If problems occur, I will change this again */
  1440. new_tst = card->tst_addr;
  1441. /* Fill procedure */
  1442. for (e = 0; e < NS_TST_NUM_ENTRIES; e++)
  1443. {
  1444. if (card->tste2vc[e] == NULL)
  1445. break;
  1446. }
  1447. if (e == NS_TST_NUM_ENTRIES) {
  1448. printk("nicstar%d: No free TST entries found. \n", card->index);
  1449. return;
  1450. }
  1451. r = n;
  1452. cl = NS_TST_NUM_ENTRIES;
  1453. data = ns_tste_make(NS_TST_OPCODE_FIXED, vc->cbr_scd);
  1454. while (r > 0)
  1455. {
  1456. if (cl >= NS_TST_NUM_ENTRIES && card->tste2vc[e] == NULL)
  1457. {
  1458. card->tste2vc[e] = vc;
  1459. ns_write_sram(card, new_tst + e, &data, 1);
  1460. cl -= NS_TST_NUM_ENTRIES;
  1461. r--;
  1462. }
  1463. if (++e == NS_TST_NUM_ENTRIES) {
  1464. e = 0;
  1465. }
  1466. cl += n;
  1467. }
  1468. /* End of fill procedure */
  1469. data = ns_tste_make(NS_TST_OPCODE_END, new_tst);
  1470. ns_write_sram(card, new_tst + NS_TST_NUM_ENTRIES, &data, 1);
  1471. ns_write_sram(card, card->tst_addr + NS_TST_NUM_ENTRIES, &data, 1);
  1472. card->tst_addr = new_tst;
  1473. }
  1474. static int ns_send(struct atm_vcc *vcc, struct sk_buff *skb)
  1475. {
  1476. ns_dev *card;
  1477. vc_map *vc;
  1478. scq_info *scq;
  1479. unsigned long buflen;
  1480. ns_scqe scqe;
  1481. u32 flags; /* TBD flags, not CPU flags */
  1482. card = vcc->dev->dev_data;
  1483. TXPRINTK("nicstar%d: ns_send() called.\n", card->index);
  1484. if ((vc = (vc_map *) vcc->dev_data) == NULL)
  1485. {
  1486. printk("nicstar%d: vcc->dev_data == NULL on ns_send().\n", card->index);
  1487. atomic_inc(&vcc->stats->tx_err);
  1488. dev_kfree_skb_any(skb);
  1489. return -EINVAL;
  1490. }
  1491. if (!vc->tx)
  1492. {
  1493. printk("nicstar%d: Trying to transmit on a non-tx VC.\n", card->index);
  1494. atomic_inc(&vcc->stats->tx_err);
  1495. dev_kfree_skb_any(skb);
  1496. return -EINVAL;
  1497. }
  1498. if (vcc->qos.aal != ATM_AAL5 && vcc->qos.aal != ATM_AAL0)
  1499. {
  1500. printk("nicstar%d: Only AAL0 and AAL5 are supported.\n", card->index);
  1501. atomic_inc(&vcc->stats->tx_err);
  1502. dev_kfree_skb_any(skb);
  1503. return -EINVAL;
  1504. }
  1505. if (skb_shinfo(skb)->nr_frags != 0)
  1506. {
  1507. printk("nicstar%d: No scatter-gather yet.\n", card->index);
  1508. atomic_inc(&vcc->stats->tx_err);
  1509. dev_kfree_skb_any(skb);
  1510. return -EINVAL;
  1511. }
  1512. ATM_SKB(skb)->vcc = vcc;
  1513. if (vcc->qos.aal == ATM_AAL5)
  1514. {
  1515. buflen = (skb->len + 47 + 8) / 48 * 48; /* Multiple of 48 */
  1516. flags = NS_TBD_AAL5;
  1517. scqe.word_2 = cpu_to_le32((u32) virt_to_bus(skb->data));
  1518. scqe.word_3 = cpu_to_le32((u32) skb->len);
  1519. scqe.word_4 = ns_tbd_mkword_4(0, (u32) vcc->vpi, (u32) vcc->vci, 0,
  1520. ATM_SKB(skb)->atm_options & ATM_ATMOPT_CLP ? 1 : 0);
  1521. flags |= NS_TBD_EOPDU;
  1522. }
  1523. else /* (vcc->qos.aal == ATM_AAL0) */
  1524. {
  1525. buflen = ATM_CELL_PAYLOAD; /* i.e., 48 bytes */
  1526. flags = NS_TBD_AAL0;
  1527. scqe.word_2 = cpu_to_le32((u32) virt_to_bus(skb->data) + NS_AAL0_HEADER);
  1528. scqe.word_3 = cpu_to_le32(0x00000000);
  1529. if (*skb->data & 0x02) /* Payload type 1 - end of pdu */
  1530. flags |= NS_TBD_EOPDU;
  1531. scqe.word_4 = cpu_to_le32(*((u32 *) skb->data) & ~NS_TBD_VC_MASK);
  1532. /* Force the VPI/VCI to be the same as in VCC struct */
  1533. scqe.word_4 |= cpu_to_le32((((u32) vcc->vpi) << NS_TBD_VPI_SHIFT |
  1534. ((u32) vcc->vci) << NS_TBD_VCI_SHIFT) &
  1535. NS_TBD_VC_MASK);
  1536. }
  1537. if (vcc->qos.txtp.traffic_class == ATM_CBR)
  1538. {
  1539. scqe.word_1 = ns_tbd_mkword_1_novbr(flags, (u32) buflen);
  1540. scq = ((vc_map *) vcc->dev_data)->scq;
  1541. }
  1542. else
  1543. {
  1544. scqe.word_1 = ns_tbd_mkword_1(flags, (u32) 1, (u32) 1, (u32) buflen);
  1545. scq = card->scq0;
  1546. }
  1547. if (push_scqe(card, vc, scq, &scqe, skb) != 0)
  1548. {
  1549. atomic_inc(&vcc->stats->tx_err);
  1550. dev_kfree_skb_any(skb);
  1551. return -EIO;
  1552. }
  1553. atomic_inc(&vcc->stats->tx);
  1554. return 0;
  1555. }
  1556. static int push_scqe(ns_dev *card, vc_map *vc, scq_info *scq, ns_scqe *tbd,
  1557. struct sk_buff *skb)
  1558. {
  1559. unsigned long flags;
  1560. ns_scqe tsr;
  1561. u32 scdi, scqi;
  1562. int scq_is_vbr;
  1563. u32 data;
  1564. int index;
  1565. spin_lock_irqsave(&scq->lock, flags);
  1566. while (scq->tail == scq->next)
  1567. {
  1568. if (in_interrupt()) {
  1569. spin_unlock_irqrestore(&scq->lock, flags);
  1570. printk("nicstar%d: Error pushing TBD.\n", card->index);
  1571. return 1;
  1572. }
  1573. scq->full = 1;
  1574. spin_unlock_irqrestore(&scq->lock, flags);
  1575. interruptible_sleep_on_timeout(&scq->scqfull_waitq, SCQFULL_TIMEOUT);
  1576. spin_lock_irqsave(&scq->lock, flags);
  1577. if (scq->full) {
  1578. spin_unlock_irqrestore(&scq->lock, flags);
  1579. printk("nicstar%d: Timeout pushing TBD.\n", card->index);
  1580. return 1;
  1581. }
  1582. }
  1583. *scq->next = *tbd;
  1584. index = (int) (scq->next - scq->base);
  1585. scq->skb[index] = skb;
  1586. XPRINTK("nicstar%d: sending skb at 0x%x (pos %d).\n",
  1587. card->index, (u32) skb, index);
  1588. XPRINTK("nicstar%d: TBD written:\n0x%x\n0x%x\n0x%x\n0x%x\n at 0x%x.\n",
  1589. card->index, le32_to_cpu(tbd->word_1), le32_to_cpu(tbd->word_2),
  1590. le32_to_cpu(tbd->word_3), le32_to_cpu(tbd->word_4),
  1591. (u32) scq->next);
  1592. if (scq->next == scq->last)
  1593. scq->next = scq->base;
  1594. else
  1595. scq->next++;
  1596. vc->tbd_count++;
  1597. if (scq->num_entries == VBR_SCQ_NUM_ENTRIES)
  1598. {
  1599. scq->tbd_count++;
  1600. scq_is_vbr = 1;
  1601. }
  1602. else
  1603. scq_is_vbr = 0;
  1604. if (vc->tbd_count >= MAX_TBD_PER_VC || scq->tbd_count >= MAX_TBD_PER_SCQ)
  1605. {
  1606. int has_run = 0;
  1607. while (scq->tail == scq->next)
  1608. {
  1609. if (in_interrupt()) {
  1610. data = (u32) virt_to_bus(scq->next);
  1611. ns_write_sram(card, scq->scd, &data, 1);
  1612. spin_unlock_irqrestore(&scq->lock, flags);
  1613. printk("nicstar%d: Error pushing TSR.\n", card->index);
  1614. return 0;
  1615. }
  1616. scq->full = 1;
  1617. if (has_run++) break;
  1618. spin_unlock_irqrestore(&scq->lock, flags);
  1619. interruptible_sleep_on_timeout(&scq->scqfull_waitq, SCQFULL_TIMEOUT);
  1620. spin_lock_irqsave(&scq->lock, flags);
  1621. }
  1622. if (!scq->full)
  1623. {
  1624. tsr.word_1 = ns_tsr_mkword_1(NS_TSR_INTENABLE);
  1625. if (scq_is_vbr)
  1626. scdi = NS_TSR_SCDISVBR;
  1627. else
  1628. scdi = (vc->cbr_scd - NS_FRSCD) / NS_FRSCD_SIZE;
  1629. scqi = scq->next - scq->base;
  1630. tsr.word_2 = ns_tsr_mkword_2(scdi, scqi);
  1631. tsr.word_3 = 0x00000000;
  1632. tsr.word_4 = 0x00000000;
  1633. *scq->next = tsr;
  1634. index = (int) scqi;
  1635. scq->skb[index] = NULL;
  1636. XPRINTK("nicstar%d: TSR written:\n0x%x\n0x%x\n0x%x\n0x%x\n at 0x%x.\n",
  1637. card->index, le32_to_cpu(tsr.word_1), le32_to_cpu(tsr.word_2),
  1638. le32_to_cpu(tsr.word_3), le32_to_cpu(tsr.word_4),
  1639. (u32) scq->next);
  1640. if (scq->next == scq->last)
  1641. scq->next = scq->base;
  1642. else
  1643. scq->next++;
  1644. vc->tbd_count = 0;
  1645. scq->tbd_count = 0;
  1646. }
  1647. else
  1648. PRINTK("nicstar%d: Timeout pushing TSR.\n", card->index);
  1649. }
  1650. data = (u32) virt_to_bus(scq->next);
  1651. ns_write_sram(card, scq->scd, &data, 1);
  1652. spin_unlock_irqrestore(&scq->lock, flags);
  1653. return 0;
  1654. }
  1655. static void process_tsq(ns_dev *card)
  1656. {
  1657. u32 scdi;
  1658. scq_info *scq;
  1659. ns_tsi *previous = NULL, *one_ahead, *two_ahead;
  1660. int serviced_entries; /* flag indicating at least on entry was serviced */
  1661. serviced_entries = 0;
  1662. if (card->tsq.next == card->tsq.last)
  1663. one_ahead = card->tsq.base;
  1664. else
  1665. one_ahead = card->tsq.next + 1;
  1666. if (one_ahead == card->tsq.last)
  1667. two_ahead = card->tsq.base;
  1668. else
  1669. two_ahead = one_ahead + 1;
  1670. while (!ns_tsi_isempty(card->tsq.next) || !ns_tsi_isempty(one_ahead) ||
  1671. !ns_tsi_isempty(two_ahead))
  1672. /* At most two empty, as stated in the 77201 errata */
  1673. {
  1674. serviced_entries = 1;
  1675. /* Skip the one or two possible empty entries */
  1676. while (ns_tsi_isempty(card->tsq.next)) {
  1677. if (card->tsq.next == card->tsq.last)
  1678. card->tsq.next = card->tsq.base;
  1679. else
  1680. card->tsq.next++;
  1681. }
  1682. if (!ns_tsi_tmrof(card->tsq.next))
  1683. {
  1684. scdi = ns_tsi_getscdindex(card->tsq.next);
  1685. if (scdi == NS_TSI_SCDISVBR)
  1686. scq = card->scq0;
  1687. else
  1688. {
  1689. if (card->scd2vc[scdi] == NULL)
  1690. {
  1691. printk("nicstar%d: could not find VC from SCD index.\n",
  1692. card->index);
  1693. ns_tsi_init(card->tsq.next);
  1694. return;
  1695. }
  1696. scq = card->scd2vc[scdi]->scq;
  1697. }
  1698. drain_scq(card, scq, ns_tsi_getscqpos(card->tsq.next));
  1699. scq->full = 0;
  1700. wake_up_interruptible(&(scq->scqfull_waitq));
  1701. }
  1702. ns_tsi_init(card->tsq.next);
  1703. previous = card->tsq.next;
  1704. if (card->tsq.next == card->tsq.last)
  1705. card->tsq.next = card->tsq.base;
  1706. else
  1707. card->tsq.next++;
  1708. if (card->tsq.next == card->tsq.last)
  1709. one_ahead = card->tsq.base;
  1710. else
  1711. one_ahead = card->tsq.next + 1;
  1712. if (one_ahead == card->tsq.last)
  1713. two_ahead = card->tsq.base;
  1714. else
  1715. two_ahead = one_ahead + 1;
  1716. }
  1717. if (serviced_entries) {
  1718. writel((((u32) previous) - ((u32) card->tsq.base)),
  1719. card->membase + TSQH);
  1720. }
  1721. }
  1722. static void drain_scq(ns_dev *card, scq_info *scq, int pos)
  1723. {
  1724. struct atm_vcc *vcc;
  1725. struct sk_buff *skb;
  1726. int i;
  1727. unsigned long flags;
  1728. XPRINTK("nicstar%d: drain_scq() called, scq at 0x%x, pos %d.\n",
  1729. card->index, (u32) scq, pos);
  1730. if (pos >= scq->num_entries)
  1731. {
  1732. printk("nicstar%d: Bad index on drain_scq().\n", card->index);
  1733. return;
  1734. }
  1735. spin_lock_irqsave(&scq->lock, flags);
  1736. i = (int) (scq->tail - scq->base);
  1737. if (++i == scq->num_entries)
  1738. i = 0;
  1739. while (i != pos)
  1740. {
  1741. skb = scq->skb[i];
  1742. XPRINTK("nicstar%d: freeing skb at 0x%x (index %d).\n",
  1743. card->index, (u32) skb, i);
  1744. if (skb != NULL)
  1745. {
  1746. vcc = ATM_SKB(skb)->vcc;
  1747. if (vcc && vcc->pop != NULL) {
  1748. vcc->pop(vcc, skb);
  1749. } else {
  1750. dev_kfree_skb_irq(skb);
  1751. }
  1752. scq->skb[i] = NULL;
  1753. }
  1754. if (++i == scq->num_entries)
  1755. i = 0;
  1756. }
  1757. scq->tail = scq->base + pos;
  1758. spin_unlock_irqrestore(&scq->lock, flags);
  1759. }
  1760. static void process_rsq(ns_dev *card)
  1761. {
  1762. ns_rsqe *previous;
  1763. if (!ns_rsqe_valid(card->rsq.next))
  1764. return;
  1765. do {
  1766. dequeue_rx(card, card->rsq.next);
  1767. ns_rsqe_init(card->rsq.next);
  1768. previous = card->rsq.next;
  1769. if (card->rsq.next == card->rsq.last)
  1770. card->rsq.next = card->rsq.base;
  1771. else
  1772. card->rsq.next++;
  1773. } while (ns_rsqe_valid(card->rsq.next));
  1774. writel((((u32) previous) - ((u32) card->rsq.base)),
  1775. card->membase + RSQH);
  1776. }
  1777. static void dequeue_rx(ns_dev *card, ns_rsqe *rsqe)
  1778. {
  1779. u32 vpi, vci;
  1780. vc_map *vc;
  1781. struct sk_buff *iovb;
  1782. struct iovec *iov;
  1783. struct atm_vcc *vcc;
  1784. struct sk_buff *skb;
  1785. unsigned short aal5_len;
  1786. int len;
  1787. u32 stat;
  1788. stat = readl(card->membase + STAT);
  1789. card->sbfqc = ns_stat_sfbqc_get(stat);
  1790. card->lbfqc = ns_stat_lfbqc_get(stat);
  1791. skb = (struct sk_buff *) le32_to_cpu(rsqe->buffer_handle);
  1792. vpi = ns_rsqe_vpi(rsqe);
  1793. vci = ns_rsqe_vci(rsqe);
  1794. if (vpi >= 1UL << card->vpibits || vci >= 1UL << card->vcibits)
  1795. {
  1796. printk("nicstar%d: SDU received for out-of-range vc %d.%d.\n",
  1797. card->index, vpi, vci);
  1798. recycle_rx_buf(card, skb);
  1799. return;
  1800. }
  1801. vc = &(card->vcmap[vpi << card->vcibits | vci]);
  1802. if (!vc->rx)
  1803. {
  1804. RXPRINTK("nicstar%d: SDU received on non-rx vc %d.%d.\n",
  1805. card->index, vpi, vci);
  1806. recycle_rx_buf(card, skb);
  1807. return;
  1808. }
  1809. vcc = vc->rx_vcc;
  1810. if (vcc->qos.aal == ATM_AAL0)
  1811. {
  1812. struct sk_buff *sb;
  1813. unsigned char *cell;
  1814. int i;
  1815. cell = skb->data;
  1816. for (i = ns_rsqe_cellcount(rsqe); i; i--)
  1817. {
  1818. if ((sb = dev_alloc_skb(NS_SMSKBSIZE)) == NULL)
  1819. {
  1820. printk("nicstar%d: Can't allocate buffers for aal0.\n",
  1821. card->index);
  1822. atomic_add(i,&vcc->stats->rx_drop);
  1823. break;
  1824. }
  1825. if (!atm_charge(vcc, sb->truesize))
  1826. {
  1827. RXPRINTK("nicstar%d: atm_charge() dropped aal0 packets.\n",
  1828. card->index);
  1829. atomic_add(i-1,&vcc->stats->rx_drop); /* already increased by 1 */
  1830. dev_kfree_skb_any(sb);
  1831. break;
  1832. }
  1833. /* Rebuild the header */
  1834. *((u32 *) sb->data) = le32_to_cpu(rsqe->word_1) << 4 |
  1835. (ns_rsqe_clp(rsqe) ? 0x00000001 : 0x00000000);
  1836. if (i == 1 && ns_rsqe_eopdu(rsqe))
  1837. *((u32 *) sb->data) |= 0x00000002;
  1838. skb_put(sb, NS_AAL0_HEADER);
  1839. memcpy(skb_tail_pointer(sb), cell, ATM_CELL_PAYLOAD);
  1840. skb_put(sb, ATM_CELL_PAYLOAD);
  1841. ATM_SKB(sb)->vcc = vcc;
  1842. __net_timestamp(sb);
  1843. vcc->push(vcc, sb);
  1844. atomic_inc(&vcc->stats->rx);
  1845. cell += ATM_CELL_PAYLOAD;
  1846. }
  1847. recycle_rx_buf(card, skb);
  1848. return;
  1849. }
  1850. /* To reach this point, the AAL layer can only be AAL5 */
  1851. if ((iovb = vc->rx_iov) == NULL)
  1852. {
  1853. iovb = skb_dequeue(&(card->iovpool.queue));
  1854. if (iovb == NULL) /* No buffers in the queue */
  1855. {
  1856. iovb = alloc_skb(NS_IOVBUFSIZE, GFP_ATOMIC);
  1857. if (iovb == NULL)
  1858. {
  1859. printk("nicstar%d: Out of iovec buffers.\n", card->index);
  1860. atomic_inc(&vcc->stats->rx_drop);
  1861. recycle_rx_buf(card, skb);
  1862. return;
  1863. }
  1864. NS_SKB_CB(iovb)->buf_type = BUF_NONE;
  1865. }
  1866. else
  1867. if (--card->iovpool.count < card->iovnr.min)
  1868. {
  1869. struct sk_buff *new_iovb;
  1870. if ((new_iovb = alloc_skb(NS_IOVBUFSIZE, GFP_ATOMIC)) != NULL)
  1871. {
  1872. NS_SKB_CB(iovb)->buf_type = BUF_NONE;
  1873. skb_queue_tail(&card->iovpool.queue, new_iovb);
  1874. card->iovpool.count++;
  1875. }
  1876. }
  1877. vc->rx_iov = iovb;
  1878. NS_SKB(iovb)->iovcnt = 0;
  1879. iovb->len = 0;
  1880. iovb->data = iovb->head;
  1881. skb_reset_tail_pointer(iovb);
  1882. NS_SKB(iovb)->vcc = vcc;
  1883. /* IMPORTANT: a pointer to the sk_buff containing the small or large
  1884. buffer is stored as iovec base, NOT a pointer to the
  1885. small or large buffer itself. */
  1886. }
  1887. else if (NS_SKB(iovb)->iovcnt >= NS_MAX_IOVECS)
  1888. {
  1889. printk("nicstar%d: received too big AAL5 SDU.\n", card->index);
  1890. atomic_inc(&vcc->stats->rx_err);
  1891. recycle_iovec_rx_bufs(card, (struct iovec *) iovb->data, NS_MAX_IOVECS);
  1892. NS_SKB(iovb)->iovcnt = 0;
  1893. iovb->len = 0;
  1894. iovb->data = iovb->head;
  1895. skb_reset_tail_pointer(iovb);
  1896. NS_SKB(iovb)->vcc = vcc;
  1897. }
  1898. iov = &((struct iovec *) iovb->data)[NS_SKB(iovb)->iovcnt++];
  1899. iov->iov_base = (void *) skb;
  1900. iov->iov_len = ns_rsqe_cellcount(rsqe) * 48;
  1901. iovb->len += iov->iov_len;
  1902. if (NS_SKB(iovb)->iovcnt == 1)
  1903. {
  1904. if (NS_SKB_CB(skb)->buf_type != BUF_SM)
  1905. {
  1906. printk("nicstar%d: Expected a small buffer, and this is not one.\n",
  1907. card->index);
  1908. which_list(card, skb);
  1909. atomic_inc(&vcc->stats->rx_err);
  1910. recycle_rx_buf(card, skb);
  1911. vc->rx_iov = NULL;
  1912. recycle_iov_buf(card, iovb);
  1913. return;
  1914. }
  1915. }
  1916. else /* NS_SKB(iovb)->iovcnt >= 2 */
  1917. {
  1918. if (NS_SKB_CB(skb)->buf_type != BUF_LG)
  1919. {
  1920. printk("nicstar%d: Expected a large buffer, and this is not one.\n",
  1921. card->index);
  1922. which_list(card, skb);
  1923. atomic_inc(&vcc->stats->rx_err);
  1924. recycle_iovec_rx_bufs(card, (struct iovec *) iovb->data,
  1925. NS_SKB(iovb)->iovcnt);
  1926. vc->rx_iov = NULL;
  1927. recycle_iov_buf(card, iovb);
  1928. return;
  1929. }
  1930. }
  1931. if (ns_rsqe_eopdu(rsqe))
  1932. {
  1933. /* This works correctly regardless of the endianness of the host */
  1934. unsigned char *L1L2 = (unsigned char *)((u32)skb->data +
  1935. iov->iov_len - 6);
  1936. aal5_len = L1L2[0] << 8 | L1L2[1];
  1937. len = (aal5_len == 0x0000) ? 0x10000 : aal5_len;
  1938. if (ns_rsqe_crcerr(rsqe) ||
  1939. len + 8 > iovb->len || len + (47 + 8) < iovb->len)
  1940. {
  1941. printk("nicstar%d: AAL5 CRC error", card->index);
  1942. if (len + 8 > iovb->len || len + (47 + 8) < iovb->len)
  1943. printk(" - PDU size mismatch.\n");
  1944. else
  1945. printk(".\n");
  1946. atomic_inc(&vcc->stats->rx_err);
  1947. recycle_iovec_rx_bufs(card, (struct iovec *) iovb->data,
  1948. NS_SKB(iovb)->iovcnt);
  1949. vc->rx_iov = NULL;
  1950. recycle_iov_buf(card, iovb);
  1951. return;
  1952. }
  1953. /* By this point we (hopefully) have a complete SDU without errors. */
  1954. if (NS_SKB(iovb)->iovcnt == 1) /* Just a small buffer */
  1955. {
  1956. /* skb points to a small buffer */
  1957. if (!atm_charge(vcc, skb->truesize))
  1958. {
  1959. push_rxbufs(card, skb);
  1960. atomic_inc(&vcc->stats->rx_drop);
  1961. }
  1962. else
  1963. {
  1964. skb_put(skb, len);
  1965. dequeue_sm_buf(card, skb);
  1966. #ifdef NS_USE_DESTRUCTORS
  1967. skb->destructor = ns_sb_destructor;
  1968. #endif /* NS_USE_DESTRUCTORS */
  1969. ATM_SKB(skb)->vcc = vcc;
  1970. __net_timestamp(skb);
  1971. vcc->push(vcc, skb);
  1972. atomic_inc(&vcc->stats->rx);
  1973. }
  1974. }
  1975. else if (NS_SKB(iovb)->iovcnt == 2) /* One small plus one large buffer */
  1976. {
  1977. struct sk_buff *sb;
  1978. sb = (struct sk_buff *) (iov - 1)->iov_base;
  1979. /* skb points to a large buffer */
  1980. if (len <= NS_SMBUFSIZE)
  1981. {
  1982. if (!atm_charge(vcc, sb->truesize))
  1983. {
  1984. push_rxbufs(card, sb);
  1985. atomic_inc(&vcc->stats->rx_drop);
  1986. }
  1987. else
  1988. {
  1989. skb_put(sb, len);
  1990. dequeue_sm_buf(card, sb);
  1991. #ifdef NS_USE_DESTRUCTORS
  1992. sb->destructor = ns_sb_destructor;
  1993. #endif /* NS_USE_DESTRUCTORS */
  1994. ATM_SKB(sb)->vcc = vcc;
  1995. __net_timestamp(sb);
  1996. vcc->push(vcc, sb);
  1997. atomic_inc(&vcc->stats->rx);
  1998. }
  1999. push_rxbufs(card, skb);
  2000. }
  2001. else /* len > NS_SMBUFSIZE, the usual case */
  2002. {
  2003. if (!atm_charge(vcc, skb->truesize))
  2004. {
  2005. push_rxbufs(card, skb);
  2006. atomic_inc(&vcc->stats->rx_drop);
  2007. }
  2008. else
  2009. {
  2010. dequeue_lg_buf(card, skb);
  2011. #ifdef NS_USE_DESTRUCTORS
  2012. skb->destructor = ns_lb_destructor;
  2013. #endif /* NS_USE_DESTRUCTORS */
  2014. skb_push(skb, NS_SMBUFSIZE);
  2015. skb_copy_from_linear_data(sb, skb->data, NS_SMBUFSIZE);
  2016. skb_put(skb, len - NS_SMBUFSIZE);
  2017. ATM_SKB(skb)->vcc = vcc;
  2018. __net_timestamp(skb);
  2019. vcc->push(vcc, skb);
  2020. atomic_inc(&vcc->stats->rx);
  2021. }
  2022. push_rxbufs(card, sb);
  2023. }
  2024. }
  2025. else /* Must push a huge buffer */
  2026. {
  2027. struct sk_buff *hb, *sb, *lb;
  2028. int remaining, tocopy;
  2029. int j;
  2030. hb = skb_dequeue(&(card->hbpool.queue));
  2031. if (hb == NULL) /* No buffers in the queue */
  2032. {
  2033. hb = dev_alloc_skb(NS_HBUFSIZE);
  2034. if (hb == NULL)
  2035. {
  2036. printk("nicstar%d: Out of huge buffers.\n", card->index);
  2037. atomic_inc(&vcc->stats->rx_drop);
  2038. recycle_iovec_rx_bufs(card, (struct iovec *) iovb->data,
  2039. NS_SKB(iovb)->iovcnt);
  2040. vc->rx_iov = NULL;
  2041. recycle_iov_buf(card, iovb);
  2042. return;
  2043. }
  2044. else if (card->hbpool.count < card->hbnr.min)
  2045. {
  2046. struct sk_buff *new_hb;
  2047. if ((new_hb = dev_alloc_skb(NS_HBUFSIZE)) != NULL)
  2048. {
  2049. skb_queue_tail(&card->hbpool.queue, new_hb);
  2050. card->hbpool.count++;
  2051. }
  2052. }
  2053. NS_SKB_CB(hb)->buf_type = BUF_NONE;
  2054. }
  2055. else
  2056. if (--card->hbpool.count < card->hbnr.min)
  2057. {
  2058. struct sk_buff *new_hb;
  2059. if ((new_hb = dev_alloc_skb(NS_HBUFSIZE)) != NULL)
  2060. {
  2061. NS_SKB_CB(new_hb)->buf_type = BUF_NONE;
  2062. skb_queue_tail(&card->hbpool.queue, new_hb);
  2063. card->hbpool.count++;
  2064. }
  2065. if (card->hbpool.count < card->hbnr.min)
  2066. {
  2067. if ((new_hb = dev_alloc_skb(NS_HBUFSIZE)) != NULL)
  2068. {
  2069. NS_SKB_CB(new_hb)->buf_type = BUF_NONE;
  2070. skb_queue_tail(&card->hbpool.queue, new_hb);
  2071. card->hbpool.count++;
  2072. }
  2073. }
  2074. }
  2075. iov = (struct iovec *) iovb->data;
  2076. if (!atm_charge(vcc, hb->truesize))
  2077. {
  2078. recycle_iovec_rx_bufs(card, iov, NS_SKB(iovb)->iovcnt);
  2079. if (card->hbpool.count < card->hbnr.max)
  2080. {
  2081. skb_queue_tail(&card->hbpool.queue, hb);
  2082. card->hbpool.count++;
  2083. }
  2084. else
  2085. dev_kfree_skb_any(hb);
  2086. atomic_inc(&vcc->stats->rx_drop);
  2087. }
  2088. else
  2089. {
  2090. /* Copy the small buffer to the huge buffer */
  2091. sb = (struct sk_buff *) iov->iov_base;
  2092. skb_copy_from_linear_data(sb, hb->data, iov->iov_len);
  2093. skb_put(hb, iov->iov_len);
  2094. remaining = len - iov->iov_len;
  2095. iov++;
  2096. /* Free the small buffer */
  2097. push_rxbufs(card, sb);
  2098. /* Copy all large buffers to the huge buffer and free them */
  2099. for (j = 1; j < NS_SKB(iovb)->iovcnt; j++)
  2100. {
  2101. lb = (struct sk_buff *) iov->iov_base;
  2102. tocopy = min_t(int, remaining, iov->iov_len);
  2103. skb_copy_from_linear_data(lb, skb_tail_pointer(hb), tocopy);
  2104. skb_put(hb, tocopy);
  2105. iov++;
  2106. remaining -= tocopy;
  2107. push_rxbufs(card, lb);
  2108. }
  2109. #ifdef EXTRA_DEBUG
  2110. if (remaining != 0 || hb->len != len)
  2111. printk("nicstar%d: Huge buffer len mismatch.\n", card->index);
  2112. #endif /* EXTRA_DEBUG */
  2113. ATM_SKB(hb)->vcc = vcc;
  2114. #ifdef NS_USE_DESTRUCTORS
  2115. hb->destructor = ns_hb_destructor;
  2116. #endif /* NS_USE_DESTRUCTORS */
  2117. __net_timestamp(hb);
  2118. vcc->push(vcc, hb);
  2119. atomic_inc(&vcc->stats->rx);
  2120. }
  2121. }
  2122. vc->rx_iov = NULL;
  2123. recycle_iov_buf(card, iovb);
  2124. }
  2125. }
  2126. #ifdef NS_USE_DESTRUCTORS
  2127. static void ns_sb_destructor(struct sk_buff *sb)
  2128. {
  2129. ns_dev *card;
  2130. u32 stat;
  2131. card = (ns_dev *) ATM_SKB(sb)->vcc->dev->dev_data;
  2132. stat = readl(card->membase + STAT);
  2133. card->sbfqc = ns_stat_sfbqc_get(stat);
  2134. card->lbfqc = ns_stat_lfbqc_get(stat);
  2135. do
  2136. {
  2137. sb = __dev_alloc_skb(NS_SMSKBSIZE, GFP_KERNEL);
  2138. if (sb == NULL)
  2139. break;
  2140. NS_SKB_CB(sb)->buf_type = BUF_SM;
  2141. skb_queue_tail(&card->sbpool.queue, sb);
  2142. skb_reserve(sb, NS_AAL0_HEADER);
  2143. push_rxbufs(card, sb);
  2144. } while (card->sbfqc < card->sbnr.min);
  2145. }
  2146. static void ns_lb_destructor(struct sk_buff *lb)
  2147. {
  2148. ns_dev *card;
  2149. u32 stat;
  2150. card = (ns_dev *) ATM_SKB(lb)->vcc->dev->dev_data;
  2151. stat = readl(card->membase + STAT);
  2152. card->sbfqc = ns_stat_sfbqc_get(stat);
  2153. card->lbfqc = ns_stat_lfbqc_get(stat);
  2154. do
  2155. {
  2156. lb = __dev_alloc_skb(NS_LGSKBSIZE, GFP_KERNEL);
  2157. if (lb == NULL)
  2158. break;
  2159. NS_SKB_CB(lb)->buf_type = BUF_LG;
  2160. skb_queue_tail(&card->lbpool.queue, lb);
  2161. skb_reserve(lb, NS_SMBUFSIZE);
  2162. push_rxbufs(card, lb);
  2163. } while (card->lbfqc < card->lbnr.min);
  2164. }
  2165. static void ns_hb_destructor(struct sk_buff *hb)
  2166. {
  2167. ns_dev *card;
  2168. card = (ns_dev *) ATM_SKB(hb)->vcc->dev->dev_data;
  2169. while (card->hbpool.count < card->hbnr.init)
  2170. {
  2171. hb = __dev_alloc_skb(NS_HBUFSIZE, GFP_KERNEL);
  2172. if (hb == NULL)
  2173. break;
  2174. NS_SKB_CB(hb)->buf_type = BUF_NONE;
  2175. skb_queue_tail(&card->hbpool.queue, hb);
  2176. card->hbpool.count++;
  2177. }
  2178. }
  2179. #endif /* NS_USE_DESTRUCTORS */
  2180. static void recycle_rx_buf(ns_dev *card, struct sk_buff *skb)
  2181. {
  2182. struct ns_skb_cb *cb = NS_SKB_CB(skb);
  2183. if (unlikely(cb->buf_type == BUF_NONE)) {
  2184. printk("nicstar%d: What kind of rx buffer is this?\n", card->index);
  2185. dev_kfree_skb_any(skb);
  2186. } else
  2187. push_rxbufs(card, skb);
  2188. }
  2189. static void recycle_iovec_rx_bufs(ns_dev *card, struct iovec *iov, int count)
  2190. {
  2191. while (count-- > 0)
  2192. recycle_rx_buf(card, (struct sk_buff *) (iov++)->iov_base);
  2193. }
  2194. static void recycle_iov_buf(ns_dev *card, struct sk_buff *iovb)
  2195. {
  2196. if (card->iovpool.count < card->iovnr.max)
  2197. {
  2198. skb_queue_tail(&card->iovpool.queue, iovb);
  2199. card->iovpool.count++;
  2200. }
  2201. else
  2202. dev_kfree_skb_any(iovb);
  2203. }
  2204. static void dequeue_sm_buf(ns_dev *card, struct sk_buff *sb)
  2205. {
  2206. skb_unlink(sb, &card->sbpool.queue);
  2207. #ifdef NS_USE_DESTRUCTORS
  2208. if (card->sbfqc < card->sbnr.min)
  2209. #else
  2210. if (card->sbfqc < card->sbnr.init)
  2211. {
  2212. struct sk_buff *new_sb;
  2213. if ((new_sb = dev_alloc_skb(NS_SMSKBSIZE)) != NULL)
  2214. {
  2215. NS_SKB_CB(new_sb)->buf_type = BUF_SM;
  2216. skb_queue_tail(&card->sbpool.queue, new_sb);
  2217. skb_reserve(new_sb, NS_AAL0_HEADER);
  2218. push_rxbufs(card, new_sb);
  2219. }
  2220. }
  2221. if (card->sbfqc < card->sbnr.init)
  2222. #endif /* NS_USE_DESTRUCTORS */
  2223. {
  2224. struct sk_buff *new_sb;
  2225. if ((new_sb = dev_alloc_skb(NS_SMSKBSIZE)) != NULL)
  2226. {
  2227. NS_SKB_CB(new_sb)->buf_type = BUF_SM;
  2228. skb_queue_tail(&card->sbpool.queue, new_sb);
  2229. skb_reserve(new_sb, NS_AAL0_HEADER);
  2230. push_rxbufs(card, new_sb);
  2231. }
  2232. }
  2233. }
  2234. static void dequeue_lg_buf(ns_dev *card, struct sk_buff *lb)
  2235. {
  2236. skb_unlink(lb, &card->lbpool.queue);
  2237. #ifdef NS_USE_DESTRUCTORS
  2238. if (card->lbfqc < card->lbnr.min)
  2239. #else
  2240. if (card->lbfqc < card->lbnr.init)
  2241. {
  2242. struct sk_buff *new_lb;
  2243. if ((new_lb = dev_alloc_skb(NS_LGSKBSIZE)) != NULL)
  2244. {
  2245. NS_SKB_CB(new_lb)->buf_type = BUF_LG;
  2246. skb_queue_tail(&card->lbpool.queue, new_lb);
  2247. skb_reserve(new_lb, NS_SMBUFSIZE);
  2248. push_rxbufs(card, new_lb);
  2249. }
  2250. }
  2251. if (card->lbfqc < card->lbnr.init)
  2252. #endif /* NS_USE_DESTRUCTORS */
  2253. {
  2254. struct sk_buff *new_lb;
  2255. if ((new_lb = dev_alloc_skb(NS_LGSKBSIZE)) != NULL)
  2256. {
  2257. NS_SKB_CB(new_lb)->buf_type = BUF_LG;
  2258. skb_queue_tail(&card->lbpool.queue, new_lb);
  2259. skb_reserve(new_lb, NS_SMBUFSIZE);
  2260. push_rxbufs(card, new_lb);
  2261. }
  2262. }
  2263. }
  2264. static int ns_proc_read(struct atm_dev *dev, loff_t *pos, char *page)
  2265. {
  2266. u32 stat;
  2267. ns_dev *card;
  2268. int left;
  2269. left = (int) *pos;
  2270. card = (ns_dev *) dev->dev_data;
  2271. stat = readl(card->membase + STAT);
  2272. if (!left--)
  2273. return sprintf(page, "Pool count min init max \n");
  2274. if (!left--)
  2275. return sprintf(page, "Small %5d %5d %5d %5d \n",
  2276. ns_stat_sfbqc_get(stat), card->sbnr.min, card->sbnr.init,
  2277. card->sbnr.max);
  2278. if (!left--)
  2279. return sprintf(page, "Large %5d %5d %5d %5d \n",
  2280. ns_stat_lfbqc_get(stat), card->lbnr.min, card->lbnr.init,
  2281. card->lbnr.max);
  2282. if (!left--)
  2283. return sprintf(page, "Huge %5d %5d %5d %5d \n", card->hbpool.count,
  2284. card->hbnr.min, card->hbnr.init, card->hbnr.max);
  2285. if (!left--)
  2286. return sprintf(page, "Iovec %5d %5d %5d %5d \n", card->iovpool.count,
  2287. card->iovnr.min, card->iovnr.init, card->iovnr.max);
  2288. if (!left--)
  2289. {
  2290. int retval;
  2291. retval = sprintf(page, "Interrupt counter: %u \n", card->intcnt);
  2292. card->intcnt = 0;
  2293. return retval;
  2294. }
  2295. #if 0
  2296. /* Dump 25.6 Mbps PHY registers */
  2297. /* Now there's a 25.6 Mbps PHY driver this code isn't needed. I left it
  2298. here just in case it's needed for debugging. */
  2299. if (card->max_pcr == ATM_25_PCR && !left--)
  2300. {
  2301. u32 phy_regs[4];
  2302. u32 i;
  2303. for (i = 0; i < 4; i++)
  2304. {
  2305. while (CMD_BUSY(card));
  2306. writel(NS_CMD_READ_UTILITY | 0x00000200 | i, card->membase + CMD);
  2307. while (CMD_BUSY(card));
  2308. phy_regs[i] = readl(card->membase + DR0) & 0x000000FF;
  2309. }
  2310. return sprintf(page, "PHY regs: 0x%02X 0x%02X 0x%02X 0x%02X \n",
  2311. phy_regs[0], phy_regs[1], phy_regs[2], phy_regs[3]);
  2312. }
  2313. #endif /* 0 - Dump 25.6 Mbps PHY registers */
  2314. #if 0
  2315. /* Dump TST */
  2316. if (left-- < NS_TST_NUM_ENTRIES)
  2317. {
  2318. if (card->tste2vc[left + 1] == NULL)
  2319. return sprintf(page, "%5d - VBR/UBR \n", left + 1);
  2320. else
  2321. return sprintf(page, "%5d - %d %d \n", left + 1,
  2322. card->tste2vc[left + 1]->tx_vcc->vpi,
  2323. card->tste2vc[left + 1]->tx_vcc->vci);
  2324. }
  2325. #endif /* 0 */
  2326. return 0;
  2327. }
  2328. static int ns_ioctl(struct atm_dev *dev, unsigned int cmd, void __user *arg)
  2329. {
  2330. ns_dev *card;
  2331. pool_levels pl;
  2332. long btype;
  2333. unsigned long flags;
  2334. card = dev->dev_data;
  2335. switch (cmd)
  2336. {
  2337. case NS_GETPSTAT:
  2338. if (get_user(pl.buftype, &((pool_levels __user *) arg)->buftype))
  2339. return -EFAULT;
  2340. switch (pl.buftype)
  2341. {
  2342. case NS_BUFTYPE_SMALL:
  2343. pl.count = ns_stat_sfbqc_get(readl(card->membase + STAT));
  2344. pl.level.min = card->sbnr.min;
  2345. pl.level.init = card->sbnr.init;
  2346. pl.level.max = card->sbnr.max;
  2347. break;
  2348. case NS_BUFTYPE_LARGE:
  2349. pl.count = ns_stat_lfbqc_get(readl(card->membase + STAT));
  2350. pl.level.min = card->lbnr.min;
  2351. pl.level.init = card->lbnr.init;
  2352. pl.level.max = card->lbnr.max;
  2353. break;
  2354. case NS_BUFTYPE_HUGE:
  2355. pl.count = card->hbpool.count;
  2356. pl.level.min = card->hbnr.min;
  2357. pl.level.init = card->hbnr.init;
  2358. pl.level.max = card->hbnr.max;
  2359. break;
  2360. case NS_BUFTYPE_IOVEC:
  2361. pl.count = card->iovpool.count;
  2362. pl.level.min = card->iovnr.min;
  2363. pl.level.init = card->iovnr.init;
  2364. pl.level.max = card->iovnr.max;
  2365. break;
  2366. default:
  2367. return -ENOIOCTLCMD;
  2368. }
  2369. if (!copy_to_user((pool_levels __user *) arg, &pl, sizeof(pl)))
  2370. return (sizeof(pl));
  2371. else
  2372. return -EFAULT;
  2373. case NS_SETBUFLEV:
  2374. if (!capable(CAP_NET_ADMIN))
  2375. return -EPERM;
  2376. if (copy_from_user(&pl, (pool_levels __user *) arg, sizeof(pl)))
  2377. return -EFAULT;
  2378. if (pl.level.min >= pl.level.init || pl.level.init >= pl.level.max)
  2379. return -EINVAL;
  2380. if (pl.level.min == 0)
  2381. return -EINVAL;
  2382. switch (pl.buftype)
  2383. {
  2384. case NS_BUFTYPE_SMALL:
  2385. if (pl.level.max > TOP_SB)
  2386. return -EINVAL;
  2387. card->sbnr.min = pl.level.min;
  2388. card->sbnr.init = pl.level.init;
  2389. card->sbnr.max = pl.level.max;
  2390. break;
  2391. case NS_BUFTYPE_LARGE:
  2392. if (pl.level.max > TOP_LB)
  2393. return -EINVAL;
  2394. card->lbnr.min = pl.level.min;
  2395. card->lbnr.init = pl.level.init;
  2396. card->lbnr.max = pl.level.max;
  2397. break;
  2398. case NS_BUFTYPE_HUGE:
  2399. if (pl.level.max > TOP_HB)
  2400. return -EINVAL;
  2401. card->hbnr.min = pl.level.min;
  2402. card->hbnr.init = pl.level.init;
  2403. card->hbnr.max = pl.level.max;
  2404. break;
  2405. case NS_BUFTYPE_IOVEC:
  2406. if (pl.level.max > TOP_IOVB)
  2407. return -EINVAL;
  2408. card->iovnr.min = pl.level.min;
  2409. card->iovnr.init = pl.level.init;
  2410. card->iovnr.max = pl.level.max;
  2411. break;
  2412. default:
  2413. return -EINVAL;
  2414. }
  2415. return 0;
  2416. case NS_ADJBUFLEV:
  2417. if (!capable(CAP_NET_ADMIN))
  2418. return -EPERM;
  2419. btype = (long) arg; /* a long is the same size as a pointer or bigger */
  2420. switch (btype)
  2421. {
  2422. case NS_BUFTYPE_SMALL:
  2423. while (card->sbfqc < card->sbnr.init)
  2424. {
  2425. struct sk_buff *sb;
  2426. sb = __dev_alloc_skb(NS_SMSKBSIZE, GFP_KERNEL);
  2427. if (sb == NULL)
  2428. return -ENOMEM;
  2429. NS_SKB_CB(sb)->buf_type = BUF_SM;
  2430. skb_queue_tail(&card->sbpool.queue, sb);
  2431. skb_reserve(sb, NS_AAL0_HEADER);
  2432. push_rxbufs(card, sb);
  2433. }
  2434. break;
  2435. case NS_BUFTYPE_LARGE:
  2436. while (card->lbfqc < card->lbnr.init)
  2437. {
  2438. struct sk_buff *lb;
  2439. lb = __dev_alloc_skb(NS_LGSKBSIZE, GFP_KERNEL);
  2440. if (lb == NULL)
  2441. return -ENOMEM;
  2442. NS_SKB_CB(lb)->buf_type = BUF_LG;
  2443. skb_queue_tail(&card->lbpool.queue, lb);
  2444. skb_reserve(lb, NS_SMBUFSIZE);
  2445. push_rxbufs(card, lb);
  2446. }
  2447. break;
  2448. case NS_BUFTYPE_HUGE:
  2449. while (card->hbpool.count > card->hbnr.init)
  2450. {
  2451. struct sk_buff *hb;
  2452. spin_lock_irqsave(&card->int_lock, flags);
  2453. hb = skb_dequeue(&card->hbpool.queue);
  2454. card->hbpool.count--;
  2455. spin_unlock_irqrestore(&card->int_lock, flags);
  2456. if (hb == NULL)
  2457. printk("nicstar%d: huge buffer count inconsistent.\n",
  2458. card->index);
  2459. else
  2460. dev_kfree_skb_any(hb);
  2461. }
  2462. while (card->hbpool.count < card->hbnr.init)
  2463. {
  2464. struct sk_buff *hb;
  2465. hb = __dev_alloc_skb(NS_HBUFSIZE, GFP_KERNEL);
  2466. if (hb == NULL)
  2467. return -ENOMEM;
  2468. NS_SKB_CB(hb)->buf_type = BUF_NONE;
  2469. spin_lock_irqsave(&card->int_lock, flags);
  2470. skb_queue_tail(&card->hbpool.queue, hb);
  2471. card->hbpool.count++;
  2472. spin_unlock_irqrestore(&card->int_lock, flags);
  2473. }
  2474. break;
  2475. case NS_BUFTYPE_IOVEC:
  2476. while (card->iovpool.count > card->iovnr.init)
  2477. {
  2478. struct sk_buff *iovb;
  2479. spin_lock_irqsave(&card->int_lock, flags);
  2480. iovb = skb_dequeue(&card->iovpool.queue);
  2481. card->iovpool.count--;
  2482. spin_unlock_irqrestore(&card->int_lock, flags);
  2483. if (iovb == NULL)
  2484. printk("nicstar%d: iovec buffer count inconsistent.\n",
  2485. card->index);
  2486. else
  2487. dev_kfree_skb_any(iovb);
  2488. }
  2489. while (card->iovpool.count < card->iovnr.init)
  2490. {
  2491. struct sk_buff *iovb;
  2492. iovb = alloc_skb(NS_IOVBUFSIZE, GFP_KERNEL);
  2493. if (iovb == NULL)
  2494. return -ENOMEM;
  2495. NS_SKB_CB(iovb)->buf_type = BUF_NONE;
  2496. spin_lock_irqsave(&card->int_lock, flags);
  2497. skb_queue_tail(&card->iovpool.queue, iovb);
  2498. card->iovpool.count++;
  2499. spin_unlock_irqrestore(&card->int_lock, flags);
  2500. }
  2501. break;
  2502. default:
  2503. return -EINVAL;
  2504. }
  2505. return 0;
  2506. default:
  2507. if (dev->phy && dev->phy->ioctl) {
  2508. return dev->phy->ioctl(dev, cmd, arg);
  2509. }
  2510. else {
  2511. printk("nicstar%d: %s == NULL \n", card->index,
  2512. dev->phy ? "dev->phy->ioctl" : "dev->phy");
  2513. return -ENOIOCTLCMD;
  2514. }
  2515. }
  2516. }
  2517. static void which_list(ns_dev *card, struct sk_buff *skb)
  2518. {
  2519. printk("skb buf_type: 0x%08x\n", NS_SKB_CB(skb)->buf_type);
  2520. }
  2521. static void ns_poll(unsigned long arg)
  2522. {
  2523. int i;
  2524. ns_dev *card;
  2525. unsigned long flags;
  2526. u32 stat_r, stat_w;
  2527. PRINTK("nicstar: Entering ns_poll().\n");
  2528. for (i = 0; i < num_cards; i++)
  2529. {
  2530. card = cards[i];
  2531. if (spin_is_locked(&card->int_lock)) {
  2532. /* Probably it isn't worth spinning */
  2533. continue;
  2534. }
  2535. spin_lock_irqsave(&card->int_lock, flags);
  2536. stat_w = 0;
  2537. stat_r = readl(card->membase + STAT);
  2538. if (stat_r & NS_STAT_TSIF)
  2539. stat_w |= NS_STAT_TSIF;
  2540. if (stat_r & NS_STAT_EOPDU)
  2541. stat_w |= NS_STAT_EOPDU;
  2542. process_tsq(card);
  2543. process_rsq(card);
  2544. writel(stat_w, card->membase + STAT);
  2545. spin_unlock_irqrestore(&card->int_lock, flags);
  2546. }
  2547. mod_timer(&ns_timer, jiffies + NS_POLL_PERIOD);
  2548. PRINTK("nicstar: Leaving ns_poll().\n");
  2549. }
  2550. static int ns_parse_mac(char *mac, unsigned char *esi)
  2551. {
  2552. int i, j;
  2553. short byte1, byte0;
  2554. if (mac == NULL || esi == NULL)
  2555. return -1;
  2556. j = 0;
  2557. for (i = 0; i < 6; i++)
  2558. {
  2559. if ((byte1 = ns_h2i(mac[j++])) < 0)
  2560. return -1;
  2561. if ((byte0 = ns_h2i(mac[j++])) < 0)
  2562. return -1;
  2563. esi[i] = (unsigned char) (byte1 * 16 + byte0);
  2564. if (i < 5)
  2565. {
  2566. if (mac[j++] != ':')
  2567. return -1;
  2568. }
  2569. }
  2570. return 0;
  2571. }
  2572. static short ns_h2i(char c)
  2573. {
  2574. if (c >= '0' && c <= '9')
  2575. return (short) (c - '0');
  2576. if (c >= 'A' && c <= 'F')
  2577. return (short) (c - 'A' + 10);
  2578. if (c >= 'a' && c <= 'f')
  2579. return (short) (c - 'a' + 10);
  2580. return -1;
  2581. }
  2582. static void ns_phy_put(struct atm_dev *dev, unsigned char value,
  2583. unsigned long addr)
  2584. {
  2585. ns_dev *card;
  2586. unsigned long flags;
  2587. card = dev->dev_data;
  2588. spin_lock_irqsave(&card->res_lock, flags);
  2589. while(CMD_BUSY(card));
  2590. writel((unsigned long) value, card->membase + DR0);
  2591. writel(NS_CMD_WRITE_UTILITY | 0x00000200 | (addr & 0x000000FF),
  2592. card->membase + CMD);
  2593. spin_unlock_irqrestore(&card->res_lock, flags);
  2594. }
  2595. static unsigned char ns_phy_get(struct atm_dev *dev, unsigned long addr)
  2596. {
  2597. ns_dev *card;
  2598. unsigned long flags;
  2599. unsigned long data;
  2600. card = dev->dev_data;
  2601. spin_lock_irqsave(&card->res_lock, flags);
  2602. while(CMD_BUSY(card));
  2603. writel(NS_CMD_READ_UTILITY | 0x00000200 | (addr & 0x000000FF),
  2604. card->membase + CMD);
  2605. while(CMD_BUSY(card));
  2606. data = readl(card->membase + DR0) & 0x000000FF;
  2607. spin_unlock_irqrestore(&card->res_lock, flags);
  2608. return (unsigned char) data;
  2609. }
  2610. module_init(nicstar_init);
  2611. module_exit(nicstar_cleanup);