mpparse.c 24 KB

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  1. /*
  2. * Intel Multiprocessor Specification 1.1 and 1.4
  3. * compliant MP-table parsing routines.
  4. *
  5. * (c) 1995 Alan Cox, Building #3 <alan@lxorguk.ukuu.org.uk>
  6. * (c) 1998, 1999, 2000, 2009 Ingo Molnar <mingo@redhat.com>
  7. * (c) 2008 Alexey Starikovskiy <astarikovskiy@suse.de>
  8. */
  9. #include <linux/mm.h>
  10. #include <linux/init.h>
  11. #include <linux/delay.h>
  12. #include <linux/bootmem.h>
  13. #include <linux/kernel_stat.h>
  14. #include <linux/mc146818rtc.h>
  15. #include <linux/bitops.h>
  16. #include <linux/acpi.h>
  17. #include <linux/module.h>
  18. #include <linux/smp.h>
  19. #include <linux/pci.h>
  20. #include <asm/mtrr.h>
  21. #include <asm/mpspec.h>
  22. #include <asm/pgalloc.h>
  23. #include <asm/io_apic.h>
  24. #include <asm/proto.h>
  25. #include <asm/bios_ebda.h>
  26. #include <asm/e820.h>
  27. #include <asm/trampoline.h>
  28. #include <asm/setup.h>
  29. #include <asm/smp.h>
  30. #include <asm/apic.h>
  31. /*
  32. * Checksum an MP configuration block.
  33. */
  34. static int __init mpf_checksum(unsigned char *mp, int len)
  35. {
  36. int sum = 0;
  37. while (len--)
  38. sum += *mp++;
  39. return sum & 0xFF;
  40. }
  41. int __init default_mpc_apic_id(struct mpc_cpu *m)
  42. {
  43. return m->apicid;
  44. }
  45. static void __init MP_processor_info(struct mpc_cpu *m)
  46. {
  47. int apicid;
  48. char *bootup_cpu = "";
  49. if (!(m->cpuflag & CPU_ENABLED)) {
  50. disabled_cpus++;
  51. return;
  52. }
  53. apicid = x86_init.mpparse.mpc_apic_id(m);
  54. if (m->cpuflag & CPU_BOOTPROCESSOR) {
  55. bootup_cpu = " (Bootup-CPU)";
  56. boot_cpu_physical_apicid = m->apicid;
  57. }
  58. printk(KERN_INFO "Processor #%d%s\n", m->apicid, bootup_cpu);
  59. generic_processor_info(apicid, m->apicver);
  60. }
  61. #ifdef CONFIG_X86_IO_APIC
  62. void __init default_mpc_oem_bus_info(struct mpc_bus *m, char *str)
  63. {
  64. memcpy(str, m->bustype, 6);
  65. str[6] = 0;
  66. apic_printk(APIC_VERBOSE, "Bus #%d is %s\n", m->busid, str);
  67. }
  68. static void __init MP_bus_info(struct mpc_bus *m)
  69. {
  70. char str[7];
  71. x86_init.mpparse.mpc_oem_bus_info(m, str);
  72. #if MAX_MP_BUSSES < 256
  73. if (m->busid >= MAX_MP_BUSSES) {
  74. printk(KERN_WARNING "MP table busid value (%d) for bustype %s "
  75. " is too large, max. supported is %d\n",
  76. m->busid, str, MAX_MP_BUSSES - 1);
  77. return;
  78. }
  79. #endif
  80. if (strncmp(str, BUSTYPE_ISA, sizeof(BUSTYPE_ISA) - 1) == 0) {
  81. set_bit(m->busid, mp_bus_not_pci);
  82. #if defined(CONFIG_EISA) || defined(CONFIG_MCA)
  83. mp_bus_id_to_type[m->busid] = MP_BUS_ISA;
  84. #endif
  85. } else if (strncmp(str, BUSTYPE_PCI, sizeof(BUSTYPE_PCI) - 1) == 0) {
  86. if (x86_init.mpparse.mpc_oem_pci_bus)
  87. x86_init.mpparse.mpc_oem_pci_bus(m);
  88. clear_bit(m->busid, mp_bus_not_pci);
  89. #if defined(CONFIG_EISA) || defined(CONFIG_MCA)
  90. mp_bus_id_to_type[m->busid] = MP_BUS_PCI;
  91. } else if (strncmp(str, BUSTYPE_EISA, sizeof(BUSTYPE_EISA) - 1) == 0) {
  92. mp_bus_id_to_type[m->busid] = MP_BUS_EISA;
  93. } else if (strncmp(str, BUSTYPE_MCA, sizeof(BUSTYPE_MCA) - 1) == 0) {
  94. mp_bus_id_to_type[m->busid] = MP_BUS_MCA;
  95. #endif
  96. } else
  97. printk(KERN_WARNING "Unknown bustype %s - ignoring\n", str);
  98. }
  99. static int bad_ioapic(unsigned long address)
  100. {
  101. if (nr_ioapics >= MAX_IO_APICS) {
  102. printk(KERN_ERR "ERROR: Max # of I/O APICs (%d) exceeded "
  103. "(found %d)\n", MAX_IO_APICS, nr_ioapics);
  104. panic("Recompile kernel with bigger MAX_IO_APICS!\n");
  105. }
  106. if (!address) {
  107. printk(KERN_ERR "WARNING: Bogus (zero) I/O APIC address"
  108. " found in table, skipping!\n");
  109. return 1;
  110. }
  111. return 0;
  112. }
  113. static void __init MP_ioapic_info(struct mpc_ioapic *m)
  114. {
  115. if (!(m->flags & MPC_APIC_USABLE))
  116. return;
  117. printk(KERN_INFO "I/O APIC #%d Version %d at 0x%X.\n",
  118. m->apicid, m->apicver, m->apicaddr);
  119. if (bad_ioapic(m->apicaddr))
  120. return;
  121. mp_ioapics[nr_ioapics].apicaddr = m->apicaddr;
  122. mp_ioapics[nr_ioapics].apicid = m->apicid;
  123. mp_ioapics[nr_ioapics].type = m->type;
  124. mp_ioapics[nr_ioapics].apicver = m->apicver;
  125. mp_ioapics[nr_ioapics].flags = m->flags;
  126. nr_ioapics++;
  127. }
  128. static void print_MP_intsrc_info(struct mpc_intsrc *m)
  129. {
  130. apic_printk(APIC_VERBOSE, "Int: type %d, pol %d, trig %d, bus %02x,"
  131. " IRQ %02x, APIC ID %x, APIC INT %02x\n",
  132. m->irqtype, m->irqflag & 3, (m->irqflag >> 2) & 3, m->srcbus,
  133. m->srcbusirq, m->dstapic, m->dstirq);
  134. }
  135. static void __init print_mp_irq_info(struct mpc_intsrc *mp_irq)
  136. {
  137. apic_printk(APIC_VERBOSE, "Int: type %d, pol %d, trig %d, bus %02x,"
  138. " IRQ %02x, APIC ID %x, APIC INT %02x\n",
  139. mp_irq->irqtype, mp_irq->irqflag & 3,
  140. (mp_irq->irqflag >> 2) & 3, mp_irq->srcbus,
  141. mp_irq->srcbusirq, mp_irq->dstapic, mp_irq->dstirq);
  142. }
  143. static void __init assign_to_mp_irq(struct mpc_intsrc *m,
  144. struct mpc_intsrc *mp_irq)
  145. {
  146. mp_irq->dstapic = m->dstapic;
  147. mp_irq->type = m->type;
  148. mp_irq->irqtype = m->irqtype;
  149. mp_irq->irqflag = m->irqflag;
  150. mp_irq->srcbus = m->srcbus;
  151. mp_irq->srcbusirq = m->srcbusirq;
  152. mp_irq->dstirq = m->dstirq;
  153. }
  154. static void __init assign_to_mpc_intsrc(struct mpc_intsrc *mp_irq,
  155. struct mpc_intsrc *m)
  156. {
  157. m->dstapic = mp_irq->dstapic;
  158. m->type = mp_irq->type;
  159. m->irqtype = mp_irq->irqtype;
  160. m->irqflag = mp_irq->irqflag;
  161. m->srcbus = mp_irq->srcbus;
  162. m->srcbusirq = mp_irq->srcbusirq;
  163. m->dstirq = mp_irq->dstirq;
  164. }
  165. static int __init mp_irq_mpc_intsrc_cmp(struct mpc_intsrc *mp_irq,
  166. struct mpc_intsrc *m)
  167. {
  168. if (mp_irq->dstapic != m->dstapic)
  169. return 1;
  170. if (mp_irq->type != m->type)
  171. return 2;
  172. if (mp_irq->irqtype != m->irqtype)
  173. return 3;
  174. if (mp_irq->irqflag != m->irqflag)
  175. return 4;
  176. if (mp_irq->srcbus != m->srcbus)
  177. return 5;
  178. if (mp_irq->srcbusirq != m->srcbusirq)
  179. return 6;
  180. if (mp_irq->dstirq != m->dstirq)
  181. return 7;
  182. return 0;
  183. }
  184. static void __init MP_intsrc_info(struct mpc_intsrc *m)
  185. {
  186. int i;
  187. print_MP_intsrc_info(m);
  188. for (i = 0; i < mp_irq_entries; i++) {
  189. if (!mp_irq_mpc_intsrc_cmp(&mp_irqs[i], m))
  190. return;
  191. }
  192. assign_to_mp_irq(m, &mp_irqs[mp_irq_entries]);
  193. if (++mp_irq_entries == MAX_IRQ_SOURCES)
  194. panic("Max # of irq sources exceeded!!\n");
  195. }
  196. #else /* CONFIG_X86_IO_APIC */
  197. static inline void __init MP_bus_info(struct mpc_bus *m) {}
  198. static inline void __init MP_ioapic_info(struct mpc_ioapic *m) {}
  199. static inline void __init MP_intsrc_info(struct mpc_intsrc *m) {}
  200. #endif /* CONFIG_X86_IO_APIC */
  201. static void __init MP_lintsrc_info(struct mpc_lintsrc *m)
  202. {
  203. apic_printk(APIC_VERBOSE, "Lint: type %d, pol %d, trig %d, bus %02x,"
  204. " IRQ %02x, APIC ID %x, APIC LINT %02x\n",
  205. m->irqtype, m->irqflag & 3, (m->irqflag >> 2) & 3, m->srcbusid,
  206. m->srcbusirq, m->destapic, m->destapiclint);
  207. }
  208. /*
  209. * Read/parse the MPC
  210. */
  211. static int __init smp_check_mpc(struct mpc_table *mpc, char *oem, char *str)
  212. {
  213. if (memcmp(mpc->signature, MPC_SIGNATURE, 4)) {
  214. printk(KERN_ERR "MPTABLE: bad signature [%c%c%c%c]!\n",
  215. mpc->signature[0], mpc->signature[1],
  216. mpc->signature[2], mpc->signature[3]);
  217. return 0;
  218. }
  219. if (mpf_checksum((unsigned char *)mpc, mpc->length)) {
  220. printk(KERN_ERR "MPTABLE: checksum error!\n");
  221. return 0;
  222. }
  223. if (mpc->spec != 0x01 && mpc->spec != 0x04) {
  224. printk(KERN_ERR "MPTABLE: bad table version (%d)!!\n",
  225. mpc->spec);
  226. return 0;
  227. }
  228. if (!mpc->lapic) {
  229. printk(KERN_ERR "MPTABLE: null local APIC address!\n");
  230. return 0;
  231. }
  232. memcpy(oem, mpc->oem, 8);
  233. oem[8] = 0;
  234. printk(KERN_INFO "MPTABLE: OEM ID: %s\n", oem);
  235. memcpy(str, mpc->productid, 12);
  236. str[12] = 0;
  237. printk(KERN_INFO "MPTABLE: Product ID: %s\n", str);
  238. printk(KERN_INFO "MPTABLE: APIC at: 0x%X\n", mpc->lapic);
  239. return 1;
  240. }
  241. static void skip_entry(unsigned char **ptr, int *count, int size)
  242. {
  243. *ptr += size;
  244. *count += size;
  245. }
  246. static void __init smp_dump_mptable(struct mpc_table *mpc, unsigned char *mpt)
  247. {
  248. printk(KERN_ERR "Your mptable is wrong, contact your HW vendor!\n"
  249. "type %x\n", *mpt);
  250. print_hex_dump(KERN_ERR, " ", DUMP_PREFIX_ADDRESS, 16,
  251. 1, mpc, mpc->length, 1);
  252. }
  253. void __init default_smp_read_mpc_oem(struct mpc_table *mpc) { }
  254. static int __init smp_read_mpc(struct mpc_table *mpc, unsigned early)
  255. {
  256. char str[16];
  257. char oem[10];
  258. int count = sizeof(*mpc);
  259. unsigned char *mpt = ((unsigned char *)mpc) + count;
  260. if (!smp_check_mpc(mpc, oem, str))
  261. return 0;
  262. #ifdef CONFIG_X86_32
  263. generic_mps_oem_check(mpc, oem, str);
  264. #endif
  265. /* save the local APIC address, it might be non-default */
  266. if (!acpi_lapic)
  267. mp_lapic_addr = mpc->lapic;
  268. if (early)
  269. return 1;
  270. if (mpc->oemptr)
  271. x86_init.mpparse.smp_read_mpc_oem(mpc);
  272. /*
  273. * Now process the configuration blocks.
  274. */
  275. x86_init.mpparse.mpc_record(0);
  276. while (count < mpc->length) {
  277. switch (*mpt) {
  278. case MP_PROCESSOR:
  279. /* ACPI may have already provided this data */
  280. if (!acpi_lapic)
  281. MP_processor_info((struct mpc_cpu *)mpt);
  282. skip_entry(&mpt, &count, sizeof(struct mpc_cpu));
  283. break;
  284. case MP_BUS:
  285. MP_bus_info((struct mpc_bus *)mpt);
  286. skip_entry(&mpt, &count, sizeof(struct mpc_bus));
  287. break;
  288. case MP_IOAPIC:
  289. MP_ioapic_info((struct mpc_ioapic *)mpt);
  290. skip_entry(&mpt, &count, sizeof(struct mpc_ioapic));
  291. break;
  292. case MP_INTSRC:
  293. MP_intsrc_info((struct mpc_intsrc *)mpt);
  294. skip_entry(&mpt, &count, sizeof(struct mpc_intsrc));
  295. break;
  296. case MP_LINTSRC:
  297. MP_lintsrc_info((struct mpc_lintsrc *)mpt);
  298. skip_entry(&mpt, &count, sizeof(struct mpc_lintsrc));
  299. break;
  300. default:
  301. /* wrong mptable */
  302. smp_dump_mptable(mpc, mpt);
  303. count = mpc->length;
  304. break;
  305. }
  306. x86_init.mpparse.mpc_record(1);
  307. }
  308. if (!num_processors)
  309. printk(KERN_ERR "MPTABLE: no processors registered!\n");
  310. return num_processors;
  311. }
  312. #ifdef CONFIG_X86_IO_APIC
  313. static int __init ELCR_trigger(unsigned int irq)
  314. {
  315. unsigned int port;
  316. port = 0x4d0 + (irq >> 3);
  317. return (inb(port) >> (irq & 7)) & 1;
  318. }
  319. static void __init construct_default_ioirq_mptable(int mpc_default_type)
  320. {
  321. struct mpc_intsrc intsrc;
  322. int i;
  323. int ELCR_fallback = 0;
  324. intsrc.type = MP_INTSRC;
  325. intsrc.irqflag = 0; /* conforming */
  326. intsrc.srcbus = 0;
  327. intsrc.dstapic = mp_ioapics[0].apicid;
  328. intsrc.irqtype = mp_INT;
  329. /*
  330. * If true, we have an ISA/PCI system with no IRQ entries
  331. * in the MP table. To prevent the PCI interrupts from being set up
  332. * incorrectly, we try to use the ELCR. The sanity check to see if
  333. * there is good ELCR data is very simple - IRQ0, 1, 2 and 13 can
  334. * never be level sensitive, so we simply see if the ELCR agrees.
  335. * If it does, we assume it's valid.
  336. */
  337. if (mpc_default_type == 5) {
  338. printk(KERN_INFO "ISA/PCI bus type with no IRQ information... "
  339. "falling back to ELCR\n");
  340. if (ELCR_trigger(0) || ELCR_trigger(1) || ELCR_trigger(2) ||
  341. ELCR_trigger(13))
  342. printk(KERN_ERR "ELCR contains invalid data... "
  343. "not using ELCR\n");
  344. else {
  345. printk(KERN_INFO
  346. "Using ELCR to identify PCI interrupts\n");
  347. ELCR_fallback = 1;
  348. }
  349. }
  350. for (i = 0; i < 16; i++) {
  351. switch (mpc_default_type) {
  352. case 2:
  353. if (i == 0 || i == 13)
  354. continue; /* IRQ0 & IRQ13 not connected */
  355. /* fall through */
  356. default:
  357. if (i == 2)
  358. continue; /* IRQ2 is never connected */
  359. }
  360. if (ELCR_fallback) {
  361. /*
  362. * If the ELCR indicates a level-sensitive interrupt, we
  363. * copy that information over to the MP table in the
  364. * irqflag field (level sensitive, active high polarity).
  365. */
  366. if (ELCR_trigger(i))
  367. intsrc.irqflag = 13;
  368. else
  369. intsrc.irqflag = 0;
  370. }
  371. intsrc.srcbusirq = i;
  372. intsrc.dstirq = i ? i : 2; /* IRQ0 to INTIN2 */
  373. MP_intsrc_info(&intsrc);
  374. }
  375. intsrc.irqtype = mp_ExtINT;
  376. intsrc.srcbusirq = 0;
  377. intsrc.dstirq = 0; /* 8259A to INTIN0 */
  378. MP_intsrc_info(&intsrc);
  379. }
  380. static void __init construct_ioapic_table(int mpc_default_type)
  381. {
  382. struct mpc_ioapic ioapic;
  383. struct mpc_bus bus;
  384. bus.type = MP_BUS;
  385. bus.busid = 0;
  386. switch (mpc_default_type) {
  387. default:
  388. printk(KERN_ERR "???\nUnknown standard configuration %d\n",
  389. mpc_default_type);
  390. /* fall through */
  391. case 1:
  392. case 5:
  393. memcpy(bus.bustype, "ISA ", 6);
  394. break;
  395. case 2:
  396. case 6:
  397. case 3:
  398. memcpy(bus.bustype, "EISA ", 6);
  399. break;
  400. case 4:
  401. case 7:
  402. memcpy(bus.bustype, "MCA ", 6);
  403. }
  404. MP_bus_info(&bus);
  405. if (mpc_default_type > 4) {
  406. bus.busid = 1;
  407. memcpy(bus.bustype, "PCI ", 6);
  408. MP_bus_info(&bus);
  409. }
  410. ioapic.type = MP_IOAPIC;
  411. ioapic.apicid = 2;
  412. ioapic.apicver = mpc_default_type > 4 ? 0x10 : 0x01;
  413. ioapic.flags = MPC_APIC_USABLE;
  414. ioapic.apicaddr = IO_APIC_DEFAULT_PHYS_BASE;
  415. MP_ioapic_info(&ioapic);
  416. /*
  417. * We set up most of the low 16 IO-APIC pins according to MPS rules.
  418. */
  419. construct_default_ioirq_mptable(mpc_default_type);
  420. }
  421. #else
  422. static inline void __init construct_ioapic_table(int mpc_default_type) { }
  423. #endif
  424. static inline void __init construct_default_ISA_mptable(int mpc_default_type)
  425. {
  426. struct mpc_cpu processor;
  427. struct mpc_lintsrc lintsrc;
  428. int linttypes[2] = { mp_ExtINT, mp_NMI };
  429. int i;
  430. /*
  431. * local APIC has default address
  432. */
  433. mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
  434. /*
  435. * 2 CPUs, numbered 0 & 1.
  436. */
  437. processor.type = MP_PROCESSOR;
  438. /* Either an integrated APIC or a discrete 82489DX. */
  439. processor.apicver = mpc_default_type > 4 ? 0x10 : 0x01;
  440. processor.cpuflag = CPU_ENABLED;
  441. processor.cpufeature = (boot_cpu_data.x86 << 8) |
  442. (boot_cpu_data.x86_model << 4) | boot_cpu_data.x86_mask;
  443. processor.featureflag = boot_cpu_data.x86_capability[0];
  444. processor.reserved[0] = 0;
  445. processor.reserved[1] = 0;
  446. for (i = 0; i < 2; i++) {
  447. processor.apicid = i;
  448. MP_processor_info(&processor);
  449. }
  450. construct_ioapic_table(mpc_default_type);
  451. lintsrc.type = MP_LINTSRC;
  452. lintsrc.irqflag = 0; /* conforming */
  453. lintsrc.srcbusid = 0;
  454. lintsrc.srcbusirq = 0;
  455. lintsrc.destapic = MP_APIC_ALL;
  456. for (i = 0; i < 2; i++) {
  457. lintsrc.irqtype = linttypes[i];
  458. lintsrc.destapiclint = i;
  459. MP_lintsrc_info(&lintsrc);
  460. }
  461. }
  462. static struct mpf_intel *mpf_found;
  463. static unsigned long __init get_mpc_size(unsigned long physptr)
  464. {
  465. struct mpc_table *mpc;
  466. unsigned long size;
  467. mpc = early_ioremap(physptr, PAGE_SIZE);
  468. size = mpc->length;
  469. early_iounmap(mpc, PAGE_SIZE);
  470. apic_printk(APIC_VERBOSE, " mpc: %lx-%lx\n", physptr, physptr + size);
  471. return size;
  472. }
  473. static int __init check_physptr(struct mpf_intel *mpf, unsigned int early)
  474. {
  475. struct mpc_table *mpc;
  476. unsigned long size;
  477. size = get_mpc_size(mpf->physptr);
  478. mpc = early_ioremap(mpf->physptr, size);
  479. /*
  480. * Read the physical hardware table. Anything here will
  481. * override the defaults.
  482. */
  483. if (!smp_read_mpc(mpc, early)) {
  484. #ifdef CONFIG_X86_LOCAL_APIC
  485. smp_found_config = 0;
  486. #endif
  487. printk(KERN_ERR "BIOS bug, MP table errors detected!...\n"
  488. "... disabling SMP support. (tell your hw vendor)\n");
  489. early_iounmap(mpc, size);
  490. return -1;
  491. }
  492. early_iounmap(mpc, size);
  493. if (early)
  494. return -1;
  495. #ifdef CONFIG_X86_IO_APIC
  496. /*
  497. * If there are no explicit MP IRQ entries, then we are
  498. * broken. We set up most of the low 16 IO-APIC pins to
  499. * ISA defaults and hope it will work.
  500. */
  501. if (!mp_irq_entries) {
  502. struct mpc_bus bus;
  503. printk(KERN_ERR "BIOS bug, no explicit IRQ entries, "
  504. "using default mptable. (tell your hw vendor)\n");
  505. bus.type = MP_BUS;
  506. bus.busid = 0;
  507. memcpy(bus.bustype, "ISA ", 6);
  508. MP_bus_info(&bus);
  509. construct_default_ioirq_mptable(0);
  510. }
  511. #endif
  512. return 0;
  513. }
  514. /*
  515. * Scan the memory blocks for an SMP configuration block.
  516. */
  517. void __init default_get_smp_config(unsigned int early)
  518. {
  519. struct mpf_intel *mpf = mpf_found;
  520. if (!mpf)
  521. return;
  522. if (acpi_lapic && early)
  523. return;
  524. /*
  525. * MPS doesn't support hyperthreading, aka only have
  526. * thread 0 apic id in MPS table
  527. */
  528. if (acpi_lapic && acpi_ioapic)
  529. return;
  530. printk(KERN_INFO "Intel MultiProcessor Specification v1.%d\n",
  531. mpf->specification);
  532. #if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_32)
  533. if (mpf->feature2 & (1 << 7)) {
  534. printk(KERN_INFO " IMCR and PIC compatibility mode.\n");
  535. pic_mode = 1;
  536. } else {
  537. printk(KERN_INFO " Virtual Wire compatibility mode.\n");
  538. pic_mode = 0;
  539. }
  540. #endif
  541. /*
  542. * Now see if we need to read further.
  543. */
  544. if (mpf->feature1 != 0) {
  545. if (early) {
  546. /*
  547. * local APIC has default address
  548. */
  549. mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
  550. return;
  551. }
  552. printk(KERN_INFO "Default MP configuration #%d\n",
  553. mpf->feature1);
  554. construct_default_ISA_mptable(mpf->feature1);
  555. } else if (mpf->physptr) {
  556. if (check_physptr(mpf, early))
  557. return;
  558. } else
  559. BUG();
  560. if (!early)
  561. printk(KERN_INFO "Processors: %d\n", num_processors);
  562. /*
  563. * Only use the first configuration found.
  564. */
  565. }
  566. static void __init smp_reserve_memory(struct mpf_intel *mpf)
  567. {
  568. unsigned long size = get_mpc_size(mpf->physptr);
  569. reserve_early_overlap_ok(mpf->physptr, mpf->physptr+size, "MP-table mpc");
  570. }
  571. static int __init smp_scan_config(unsigned long base, unsigned long length)
  572. {
  573. unsigned int *bp = phys_to_virt(base);
  574. struct mpf_intel *mpf;
  575. unsigned long mem;
  576. apic_printk(APIC_VERBOSE, "Scan SMP from %p for %ld bytes.\n",
  577. bp, length);
  578. BUILD_BUG_ON(sizeof(*mpf) != 16);
  579. while (length > 0) {
  580. mpf = (struct mpf_intel *)bp;
  581. if ((*bp == SMP_MAGIC_IDENT) &&
  582. (mpf->length == 1) &&
  583. !mpf_checksum((unsigned char *)bp, 16) &&
  584. ((mpf->specification == 1)
  585. || (mpf->specification == 4))) {
  586. #ifdef CONFIG_X86_LOCAL_APIC
  587. smp_found_config = 1;
  588. #endif
  589. mpf_found = mpf;
  590. printk(KERN_INFO "found SMP MP-table at [%p] %llx\n",
  591. mpf, (u64)virt_to_phys(mpf));
  592. mem = virt_to_phys(mpf);
  593. reserve_early_overlap_ok(mem, mem + sizeof(*mpf), "MP-table mpf");
  594. if (mpf->physptr)
  595. smp_reserve_memory(mpf);
  596. return 1;
  597. }
  598. bp += 4;
  599. length -= 16;
  600. }
  601. return 0;
  602. }
  603. void __init default_find_smp_config(void)
  604. {
  605. unsigned int address;
  606. /*
  607. * FIXME: Linux assumes you have 640K of base ram..
  608. * this continues the error...
  609. *
  610. * 1) Scan the bottom 1K for a signature
  611. * 2) Scan the top 1K of base RAM
  612. * 3) Scan the 64K of bios
  613. */
  614. if (smp_scan_config(0x0, 0x400) ||
  615. smp_scan_config(639 * 0x400, 0x400) ||
  616. smp_scan_config(0xF0000, 0x10000))
  617. return;
  618. /*
  619. * If it is an SMP machine we should know now, unless the
  620. * configuration is in an EISA/MCA bus machine with an
  621. * extended bios data area.
  622. *
  623. * there is a real-mode segmented pointer pointing to the
  624. * 4K EBDA area at 0x40E, calculate and scan it here.
  625. *
  626. * NOTE! There are Linux loaders that will corrupt the EBDA
  627. * area, and as such this kind of SMP config may be less
  628. * trustworthy, simply because the SMP table may have been
  629. * stomped on during early boot. These loaders are buggy and
  630. * should be fixed.
  631. *
  632. * MP1.4 SPEC states to only scan first 1K of 4K EBDA.
  633. */
  634. address = get_bios_ebda();
  635. if (address)
  636. smp_scan_config(address, 0x400);
  637. }
  638. #ifdef CONFIG_X86_IO_APIC
  639. static u8 __initdata irq_used[MAX_IRQ_SOURCES];
  640. static int __init get_MP_intsrc_index(struct mpc_intsrc *m)
  641. {
  642. int i;
  643. if (m->irqtype != mp_INT)
  644. return 0;
  645. if (m->irqflag != 0x0f)
  646. return 0;
  647. /* not legacy */
  648. for (i = 0; i < mp_irq_entries; i++) {
  649. if (mp_irqs[i].irqtype != mp_INT)
  650. continue;
  651. if (mp_irqs[i].irqflag != 0x0f)
  652. continue;
  653. if (mp_irqs[i].srcbus != m->srcbus)
  654. continue;
  655. if (mp_irqs[i].srcbusirq != m->srcbusirq)
  656. continue;
  657. if (irq_used[i]) {
  658. /* already claimed */
  659. return -2;
  660. }
  661. irq_used[i] = 1;
  662. return i;
  663. }
  664. /* not found */
  665. return -1;
  666. }
  667. #define SPARE_SLOT_NUM 20
  668. static struct mpc_intsrc __initdata *m_spare[SPARE_SLOT_NUM];
  669. static void __init check_irq_src(struct mpc_intsrc *m, int *nr_m_spare)
  670. {
  671. int i;
  672. apic_printk(APIC_VERBOSE, "OLD ");
  673. print_MP_intsrc_info(m);
  674. i = get_MP_intsrc_index(m);
  675. if (i > 0) {
  676. assign_to_mpc_intsrc(&mp_irqs[i], m);
  677. apic_printk(APIC_VERBOSE, "NEW ");
  678. print_mp_irq_info(&mp_irqs[i]);
  679. return;
  680. }
  681. if (!i) {
  682. /* legacy, do nothing */
  683. return;
  684. }
  685. if (*nr_m_spare < SPARE_SLOT_NUM) {
  686. /*
  687. * not found (-1), or duplicated (-2) are invalid entries,
  688. * we need to use the slot later
  689. */
  690. m_spare[*nr_m_spare] = m;
  691. *nr_m_spare += 1;
  692. }
  693. }
  694. #else /* CONFIG_X86_IO_APIC */
  695. static
  696. inline void __init check_irq_src(struct mpc_intsrc *m, int *nr_m_spare) {}
  697. #endif /* CONFIG_X86_IO_APIC */
  698. static int
  699. check_slot(unsigned long mpc_new_phys, unsigned long mpc_new_length, int count)
  700. {
  701. int ret = 0;
  702. if (!mpc_new_phys || count <= mpc_new_length) {
  703. WARN(1, "update_mptable: No spare slots (length: %x)\n", count);
  704. return -1;
  705. }
  706. return ret;
  707. }
  708. static int __init replace_intsrc_all(struct mpc_table *mpc,
  709. unsigned long mpc_new_phys,
  710. unsigned long mpc_new_length)
  711. {
  712. #ifdef CONFIG_X86_IO_APIC
  713. int i;
  714. #endif
  715. int count = sizeof(*mpc);
  716. int nr_m_spare = 0;
  717. unsigned char *mpt = ((unsigned char *)mpc) + count;
  718. printk(KERN_INFO "mpc_length %x\n", mpc->length);
  719. while (count < mpc->length) {
  720. switch (*mpt) {
  721. case MP_PROCESSOR:
  722. skip_entry(&mpt, &count, sizeof(struct mpc_cpu));
  723. break;
  724. case MP_BUS:
  725. skip_entry(&mpt, &count, sizeof(struct mpc_bus));
  726. break;
  727. case MP_IOAPIC:
  728. skip_entry(&mpt, &count, sizeof(struct mpc_ioapic));
  729. break;
  730. case MP_INTSRC:
  731. check_irq_src((struct mpc_intsrc *)mpt, &nr_m_spare);
  732. skip_entry(&mpt, &count, sizeof(struct mpc_intsrc));
  733. break;
  734. case MP_LINTSRC:
  735. skip_entry(&mpt, &count, sizeof(struct mpc_lintsrc));
  736. break;
  737. default:
  738. /* wrong mptable */
  739. smp_dump_mptable(mpc, mpt);
  740. goto out;
  741. }
  742. }
  743. #ifdef CONFIG_X86_IO_APIC
  744. for (i = 0; i < mp_irq_entries; i++) {
  745. if (irq_used[i])
  746. continue;
  747. if (mp_irqs[i].irqtype != mp_INT)
  748. continue;
  749. if (mp_irqs[i].irqflag != 0x0f)
  750. continue;
  751. if (nr_m_spare > 0) {
  752. apic_printk(APIC_VERBOSE, "*NEW* found\n");
  753. nr_m_spare--;
  754. assign_to_mpc_intsrc(&mp_irqs[i], m_spare[nr_m_spare]);
  755. m_spare[nr_m_spare] = NULL;
  756. } else {
  757. struct mpc_intsrc *m = (struct mpc_intsrc *)mpt;
  758. count += sizeof(struct mpc_intsrc);
  759. if (check_slot(mpc_new_phys, mpc_new_length, count) < 0)
  760. goto out;
  761. assign_to_mpc_intsrc(&mp_irqs[i], m);
  762. mpc->length = count;
  763. mpt += sizeof(struct mpc_intsrc);
  764. }
  765. print_mp_irq_info(&mp_irqs[i]);
  766. }
  767. #endif
  768. out:
  769. /* update checksum */
  770. mpc->checksum = 0;
  771. mpc->checksum -= mpf_checksum((unsigned char *)mpc, mpc->length);
  772. return 0;
  773. }
  774. int enable_update_mptable;
  775. static int __init update_mptable_setup(char *str)
  776. {
  777. enable_update_mptable = 1;
  778. #ifdef CONFIG_PCI
  779. pci_routeirq = 1;
  780. #endif
  781. return 0;
  782. }
  783. early_param("update_mptable", update_mptable_setup);
  784. static unsigned long __initdata mpc_new_phys;
  785. static unsigned long mpc_new_length __initdata = 4096;
  786. /* alloc_mptable or alloc_mptable=4k */
  787. static int __initdata alloc_mptable;
  788. static int __init parse_alloc_mptable_opt(char *p)
  789. {
  790. enable_update_mptable = 1;
  791. #ifdef CONFIG_PCI
  792. pci_routeirq = 1;
  793. #endif
  794. alloc_mptable = 1;
  795. if (!p)
  796. return 0;
  797. mpc_new_length = memparse(p, &p);
  798. return 0;
  799. }
  800. early_param("alloc_mptable", parse_alloc_mptable_opt);
  801. void __init early_reserve_e820_mpc_new(void)
  802. {
  803. if (enable_update_mptable && alloc_mptable) {
  804. u64 startt = 0;
  805. mpc_new_phys = early_reserve_e820(startt, mpc_new_length, 4);
  806. }
  807. }
  808. static int __init update_mp_table(void)
  809. {
  810. char str[16];
  811. char oem[10];
  812. struct mpf_intel *mpf;
  813. struct mpc_table *mpc, *mpc_new;
  814. if (!enable_update_mptable)
  815. return 0;
  816. mpf = mpf_found;
  817. if (!mpf)
  818. return 0;
  819. /*
  820. * Now see if we need to go further.
  821. */
  822. if (mpf->feature1 != 0)
  823. return 0;
  824. if (!mpf->physptr)
  825. return 0;
  826. mpc = phys_to_virt(mpf->physptr);
  827. if (!smp_check_mpc(mpc, oem, str))
  828. return 0;
  829. printk(KERN_INFO "mpf: %llx\n", (u64)virt_to_phys(mpf));
  830. printk(KERN_INFO "physptr: %x\n", mpf->physptr);
  831. if (mpc_new_phys && mpc->length > mpc_new_length) {
  832. mpc_new_phys = 0;
  833. printk(KERN_INFO "mpc_new_length is %ld, please use alloc_mptable=8k\n",
  834. mpc_new_length);
  835. }
  836. if (!mpc_new_phys) {
  837. unsigned char old, new;
  838. /* check if we can change the postion */
  839. mpc->checksum = 0;
  840. old = mpf_checksum((unsigned char *)mpc, mpc->length);
  841. mpc->checksum = 0xff;
  842. new = mpf_checksum((unsigned char *)mpc, mpc->length);
  843. if (old == new) {
  844. printk(KERN_INFO "mpc is readonly, please try alloc_mptable instead\n");
  845. return 0;
  846. }
  847. printk(KERN_INFO "use in-positon replacing\n");
  848. } else {
  849. mpf->physptr = mpc_new_phys;
  850. mpc_new = phys_to_virt(mpc_new_phys);
  851. memcpy(mpc_new, mpc, mpc->length);
  852. mpc = mpc_new;
  853. /* check if we can modify that */
  854. if (mpc_new_phys - mpf->physptr) {
  855. struct mpf_intel *mpf_new;
  856. /* steal 16 bytes from [0, 1k) */
  857. printk(KERN_INFO "mpf new: %x\n", 0x400 - 16);
  858. mpf_new = phys_to_virt(0x400 - 16);
  859. memcpy(mpf_new, mpf, 16);
  860. mpf = mpf_new;
  861. mpf->physptr = mpc_new_phys;
  862. }
  863. mpf->checksum = 0;
  864. mpf->checksum -= mpf_checksum((unsigned char *)mpf, 16);
  865. printk(KERN_INFO "physptr new: %x\n", mpf->physptr);
  866. }
  867. /*
  868. * only replace the one with mp_INT and
  869. * MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
  870. * already in mp_irqs , stored by ... and mp_config_acpi_gsi,
  871. * may need pci=routeirq for all coverage
  872. */
  873. replace_intsrc_all(mpc, mpc_new_phys, mpc_new_length);
  874. return 0;
  875. }
  876. late_initcall(update_mp_table);