hw_breakpoint.c 9.1 KB

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  1. /*
  2. * arch/sh/kernel/hw_breakpoint.c
  3. *
  4. * Unified kernel/user-space hardware breakpoint facility for the on-chip UBC.
  5. *
  6. * Copyright (C) 2009 - 2010 Paul Mundt
  7. *
  8. * This file is subject to the terms and conditions of the GNU General Public
  9. * License. See the file "COPYING" in the main directory of this archive
  10. * for more details.
  11. */
  12. #include <linux/init.h>
  13. #include <linux/perf_event.h>
  14. #include <linux/hw_breakpoint.h>
  15. #include <linux/percpu.h>
  16. #include <linux/kallsyms.h>
  17. #include <linux/notifier.h>
  18. #include <linux/kprobes.h>
  19. #include <linux/kdebug.h>
  20. #include <linux/io.h>
  21. #include <linux/clk.h>
  22. #include <asm/hw_breakpoint.h>
  23. #include <asm/mmu_context.h>
  24. #include <asm/ptrace.h>
  25. /*
  26. * Stores the breakpoints currently in use on each breakpoint address
  27. * register for each cpus
  28. */
  29. static DEFINE_PER_CPU(struct perf_event *, bp_per_reg[HBP_NUM]);
  30. /*
  31. * A dummy placeholder for early accesses until the CPUs get a chance to
  32. * register their UBCs later in the boot process.
  33. */
  34. static struct sh_ubc ubc_dummy = { .num_events = 0 };
  35. static struct sh_ubc *sh_ubc __read_mostly = &ubc_dummy;
  36. /*
  37. * Install a perf counter breakpoint.
  38. *
  39. * We seek a free UBC channel and use it for this breakpoint.
  40. *
  41. * Atomic: we hold the counter->ctx->lock and we only handle variables
  42. * and registers local to this cpu.
  43. */
  44. int arch_install_hw_breakpoint(struct perf_event *bp)
  45. {
  46. struct arch_hw_breakpoint *info = counter_arch_bp(bp);
  47. int i;
  48. for (i = 0; i < sh_ubc->num_events; i++) {
  49. struct perf_event **slot = &__get_cpu_var(bp_per_reg[i]);
  50. if (!*slot) {
  51. *slot = bp;
  52. break;
  53. }
  54. }
  55. if (WARN_ONCE(i == sh_ubc->num_events, "Can't find any breakpoint slot"))
  56. return -EBUSY;
  57. clk_enable(sh_ubc->clk);
  58. sh_ubc->enable(info, i);
  59. return 0;
  60. }
  61. /*
  62. * Uninstall the breakpoint contained in the given counter.
  63. *
  64. * First we search the debug address register it uses and then we disable
  65. * it.
  66. *
  67. * Atomic: we hold the counter->ctx->lock and we only handle variables
  68. * and registers local to this cpu.
  69. */
  70. void arch_uninstall_hw_breakpoint(struct perf_event *bp)
  71. {
  72. struct arch_hw_breakpoint *info = counter_arch_bp(bp);
  73. int i;
  74. for (i = 0; i < sh_ubc->num_events; i++) {
  75. struct perf_event **slot = &__get_cpu_var(bp_per_reg[i]);
  76. if (*slot == bp) {
  77. *slot = NULL;
  78. break;
  79. }
  80. }
  81. if (WARN_ONCE(i == sh_ubc->num_events, "Can't find any breakpoint slot"))
  82. return;
  83. sh_ubc->disable(info, i);
  84. clk_disable(sh_ubc->clk);
  85. }
  86. static int get_hbp_len(u16 hbp_len)
  87. {
  88. unsigned int len_in_bytes = 0;
  89. switch (hbp_len) {
  90. case SH_BREAKPOINT_LEN_1:
  91. len_in_bytes = 1;
  92. break;
  93. case SH_BREAKPOINT_LEN_2:
  94. len_in_bytes = 2;
  95. break;
  96. case SH_BREAKPOINT_LEN_4:
  97. len_in_bytes = 4;
  98. break;
  99. case SH_BREAKPOINT_LEN_8:
  100. len_in_bytes = 8;
  101. break;
  102. }
  103. return len_in_bytes;
  104. }
  105. /*
  106. * Check for virtual address in user space.
  107. */
  108. int arch_check_va_in_userspace(unsigned long va, u16 hbp_len)
  109. {
  110. unsigned int len;
  111. len = get_hbp_len(hbp_len);
  112. return (va <= TASK_SIZE - len);
  113. }
  114. /*
  115. * Check for virtual address in kernel space.
  116. */
  117. static int arch_check_va_in_kernelspace(unsigned long va, u8 hbp_len)
  118. {
  119. unsigned int len;
  120. len = get_hbp_len(hbp_len);
  121. return (va >= TASK_SIZE) && ((va + len - 1) >= TASK_SIZE);
  122. }
  123. int arch_bp_generic_fields(int sh_len, int sh_type,
  124. int *gen_len, int *gen_type)
  125. {
  126. /* Len */
  127. switch (sh_len) {
  128. case SH_BREAKPOINT_LEN_1:
  129. *gen_len = HW_BREAKPOINT_LEN_1;
  130. break;
  131. case SH_BREAKPOINT_LEN_2:
  132. *gen_len = HW_BREAKPOINT_LEN_2;
  133. break;
  134. case SH_BREAKPOINT_LEN_4:
  135. *gen_len = HW_BREAKPOINT_LEN_4;
  136. break;
  137. case SH_BREAKPOINT_LEN_8:
  138. *gen_len = HW_BREAKPOINT_LEN_8;
  139. break;
  140. default:
  141. return -EINVAL;
  142. }
  143. /* Type */
  144. switch (sh_type) {
  145. case SH_BREAKPOINT_READ:
  146. *gen_type = HW_BREAKPOINT_R;
  147. case SH_BREAKPOINT_WRITE:
  148. *gen_type = HW_BREAKPOINT_W;
  149. break;
  150. case SH_BREAKPOINT_RW:
  151. *gen_type = HW_BREAKPOINT_W | HW_BREAKPOINT_R;
  152. break;
  153. default:
  154. return -EINVAL;
  155. }
  156. return 0;
  157. }
  158. static int arch_build_bp_info(struct perf_event *bp)
  159. {
  160. struct arch_hw_breakpoint *info = counter_arch_bp(bp);
  161. info->address = bp->attr.bp_addr;
  162. /* Len */
  163. switch (bp->attr.bp_len) {
  164. case HW_BREAKPOINT_LEN_1:
  165. info->len = SH_BREAKPOINT_LEN_1;
  166. break;
  167. case HW_BREAKPOINT_LEN_2:
  168. info->len = SH_BREAKPOINT_LEN_2;
  169. break;
  170. case HW_BREAKPOINT_LEN_4:
  171. info->len = SH_BREAKPOINT_LEN_4;
  172. break;
  173. case HW_BREAKPOINT_LEN_8:
  174. info->len = SH_BREAKPOINT_LEN_8;
  175. break;
  176. default:
  177. return -EINVAL;
  178. }
  179. /* Type */
  180. switch (bp->attr.bp_type) {
  181. case HW_BREAKPOINT_R:
  182. info->type = SH_BREAKPOINT_READ;
  183. break;
  184. case HW_BREAKPOINT_W:
  185. info->type = SH_BREAKPOINT_WRITE;
  186. break;
  187. case HW_BREAKPOINT_W | HW_BREAKPOINT_R:
  188. info->type = SH_BREAKPOINT_RW;
  189. break;
  190. default:
  191. return -EINVAL;
  192. }
  193. return 0;
  194. }
  195. /*
  196. * Validate the arch-specific HW Breakpoint register settings
  197. */
  198. int arch_validate_hwbkpt_settings(struct perf_event *bp,
  199. struct task_struct *tsk)
  200. {
  201. struct arch_hw_breakpoint *info = counter_arch_bp(bp);
  202. unsigned int align;
  203. int ret;
  204. ret = arch_build_bp_info(bp);
  205. if (ret)
  206. return ret;
  207. ret = -EINVAL;
  208. switch (info->len) {
  209. case SH_BREAKPOINT_LEN_1:
  210. align = 0;
  211. break;
  212. case SH_BREAKPOINT_LEN_2:
  213. align = 1;
  214. break;
  215. case SH_BREAKPOINT_LEN_4:
  216. align = 3;
  217. break;
  218. case SH_BREAKPOINT_LEN_8:
  219. align = 7;
  220. break;
  221. default:
  222. return ret;
  223. }
  224. /*
  225. * For kernel-addresses, either the address or symbol name can be
  226. * specified.
  227. */
  228. if (info->name)
  229. info->address = (unsigned long)kallsyms_lookup_name(info->name);
  230. /*
  231. * Check that the low-order bits of the address are appropriate
  232. * for the alignment implied by len.
  233. */
  234. if (info->address & align)
  235. return -EINVAL;
  236. /* Check that the virtual address is in the proper range */
  237. if (tsk) {
  238. if (!arch_check_va_in_userspace(info->address, info->len))
  239. return -EFAULT;
  240. } else {
  241. if (!arch_check_va_in_kernelspace(info->address, info->len))
  242. return -EFAULT;
  243. }
  244. return 0;
  245. }
  246. /*
  247. * Release the user breakpoints used by ptrace
  248. */
  249. void flush_ptrace_hw_breakpoint(struct task_struct *tsk)
  250. {
  251. int i;
  252. struct thread_struct *t = &tsk->thread;
  253. for (i = 0; i < sh_ubc->num_events; i++) {
  254. unregister_hw_breakpoint(t->ptrace_bps[i]);
  255. t->ptrace_bps[i] = NULL;
  256. }
  257. }
  258. static int __kprobes hw_breakpoint_handler(struct die_args *args)
  259. {
  260. int cpu, i, rc = NOTIFY_STOP;
  261. struct perf_event *bp;
  262. unsigned int cmf, resume_mask;
  263. /*
  264. * Do an early return if none of the channels triggered.
  265. */
  266. cmf = sh_ubc->triggered_mask();
  267. if (unlikely(!cmf))
  268. return NOTIFY_DONE;
  269. /*
  270. * By default, resume all of the active channels.
  271. */
  272. resume_mask = sh_ubc->active_mask();
  273. /*
  274. * Disable breakpoints during exception handling.
  275. */
  276. sh_ubc->disable_all();
  277. cpu = get_cpu();
  278. for (i = 0; i < sh_ubc->num_events; i++) {
  279. unsigned long event_mask = (1 << i);
  280. if (likely(!(cmf & event_mask)))
  281. continue;
  282. /*
  283. * The counter may be concurrently released but that can only
  284. * occur from a call_rcu() path. We can then safely fetch
  285. * the breakpoint, use its callback, touch its counter
  286. * while we are in an rcu_read_lock() path.
  287. */
  288. rcu_read_lock();
  289. bp = per_cpu(bp_per_reg[i], cpu);
  290. if (bp)
  291. rc = NOTIFY_DONE;
  292. /*
  293. * Reset the condition match flag to denote completion of
  294. * exception handling.
  295. */
  296. sh_ubc->clear_triggered_mask(event_mask);
  297. /*
  298. * bp can be NULL due to concurrent perf counter
  299. * removing.
  300. */
  301. if (!bp) {
  302. rcu_read_unlock();
  303. break;
  304. }
  305. /*
  306. * Don't restore the channel if the breakpoint is from
  307. * ptrace, as it always operates in one-shot mode.
  308. */
  309. if (bp->overflow_handler == ptrace_triggered)
  310. resume_mask &= ~(1 << i);
  311. perf_bp_event(bp, args->regs);
  312. /* Deliver the signal to userspace */
  313. if (arch_check_va_in_userspace(bp->attr.bp_addr,
  314. bp->attr.bp_len)) {
  315. siginfo_t info;
  316. info.si_signo = args->signr;
  317. info.si_errno = notifier_to_errno(rc);
  318. info.si_code = TRAP_HWBKPT;
  319. force_sig_info(args->signr, &info, current);
  320. }
  321. rcu_read_unlock();
  322. }
  323. if (cmf == 0)
  324. rc = NOTIFY_DONE;
  325. sh_ubc->enable_all(resume_mask);
  326. put_cpu();
  327. return rc;
  328. }
  329. BUILD_TRAP_HANDLER(breakpoint)
  330. {
  331. unsigned long ex = lookup_exception_vector();
  332. TRAP_HANDLER_DECL;
  333. notify_die(DIE_BREAKPOINT, "breakpoint", regs, 0, ex, SIGTRAP);
  334. }
  335. /*
  336. * Handle debug exception notifications.
  337. */
  338. int __kprobes hw_breakpoint_exceptions_notify(struct notifier_block *unused,
  339. unsigned long val, void *data)
  340. {
  341. struct die_args *args = data;
  342. if (val != DIE_BREAKPOINT)
  343. return NOTIFY_DONE;
  344. /*
  345. * If the breakpoint hasn't been triggered by the UBC, it's
  346. * probably from a debugger, so don't do anything more here.
  347. *
  348. * This also permits the UBC interface clock to remain off for
  349. * non-UBC breakpoints, as we don't need to check the triggered
  350. * or active channel masks.
  351. */
  352. if (args->trapnr != sh_ubc->trap_nr)
  353. return NOTIFY_DONE;
  354. return hw_breakpoint_handler(data);
  355. }
  356. void hw_breakpoint_pmu_read(struct perf_event *bp)
  357. {
  358. /* TODO */
  359. }
  360. void hw_breakpoint_pmu_unthrottle(struct perf_event *bp)
  361. {
  362. /* TODO */
  363. }
  364. int register_sh_ubc(struct sh_ubc *ubc)
  365. {
  366. /* Bail if it's already assigned */
  367. if (sh_ubc != &ubc_dummy)
  368. return -EBUSY;
  369. sh_ubc = ubc;
  370. pr_info("HW Breakpoints: %s UBC support registered\n", ubc->name);
  371. WARN_ON(ubc->num_events > HBP_NUM);
  372. return 0;
  373. }