setup.c 23 KB

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  1. /*
  2. * Based on linux/arch/mips/txx9/rbtx4938/setup.c,
  3. * and RBTX49xx patch from CELF patch archive.
  4. *
  5. * 2003-2005 (c) MontaVista Software, Inc.
  6. * (C) Copyright TOSHIBA CORPORATION 2000-2001, 2004-2007
  7. *
  8. * This file is subject to the terms and conditions of the GNU General Public
  9. * License. See the file "COPYING" in the main directory of this archive
  10. * for more details.
  11. */
  12. #include <linux/init.h>
  13. #include <linux/kernel.h>
  14. #include <linux/types.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/string.h>
  17. #include <linux/module.h>
  18. #include <linux/clk.h>
  19. #include <linux/err.h>
  20. #include <linux/gpio.h>
  21. #include <linux/platform_device.h>
  22. #include <linux/serial_core.h>
  23. #include <linux/mtd/physmap.h>
  24. #include <linux/leds.h>
  25. #include <linux/sysdev.h>
  26. #include <linux/slab.h>
  27. #include <asm/bootinfo.h>
  28. #include <asm/time.h>
  29. #include <asm/reboot.h>
  30. #include <asm/r4kcache.h>
  31. #include <asm/sections.h>
  32. #include <asm/txx9/generic.h>
  33. #include <asm/txx9/pci.h>
  34. #include <asm/txx9tmr.h>
  35. #include <asm/txx9/ndfmc.h>
  36. #include <asm/txx9/dmac.h>
  37. #ifdef CONFIG_CPU_TX49XX
  38. #include <asm/txx9/tx4938.h>
  39. #endif
  40. /* EBUSC settings of TX4927, etc. */
  41. struct resource txx9_ce_res[8];
  42. static char txx9_ce_res_name[8][4]; /* "CEn" */
  43. /* pcode, internal register */
  44. unsigned int txx9_pcode;
  45. char txx9_pcode_str[8];
  46. static struct resource txx9_reg_res = {
  47. .name = txx9_pcode_str,
  48. .flags = IORESOURCE_MEM,
  49. };
  50. void __init
  51. txx9_reg_res_init(unsigned int pcode, unsigned long base, unsigned long size)
  52. {
  53. int i;
  54. for (i = 0; i < ARRAY_SIZE(txx9_ce_res); i++) {
  55. sprintf(txx9_ce_res_name[i], "CE%d", i);
  56. txx9_ce_res[i].flags = IORESOURCE_MEM;
  57. txx9_ce_res[i].name = txx9_ce_res_name[i];
  58. }
  59. txx9_pcode = pcode;
  60. sprintf(txx9_pcode_str, "TX%x", pcode);
  61. if (base) {
  62. txx9_reg_res.start = base & 0xfffffffffULL;
  63. txx9_reg_res.end = (base & 0xfffffffffULL) + (size - 1);
  64. request_resource(&iomem_resource, &txx9_reg_res);
  65. }
  66. }
  67. /* clocks */
  68. unsigned int txx9_master_clock;
  69. unsigned int txx9_cpu_clock;
  70. unsigned int txx9_gbus_clock;
  71. #ifdef CONFIG_CPU_TX39XX
  72. /* don't enable by default - see errata */
  73. int txx9_ccfg_toeon __initdata;
  74. #else
  75. int txx9_ccfg_toeon __initdata = 1;
  76. #endif
  77. /* Minimum CLK support */
  78. struct clk *clk_get(struct device *dev, const char *id)
  79. {
  80. if (!strcmp(id, "spi-baseclk"))
  81. return (struct clk *)((unsigned long)txx9_gbus_clock / 2 / 2);
  82. if (!strcmp(id, "imbus_clk"))
  83. return (struct clk *)((unsigned long)txx9_gbus_clock / 2);
  84. return ERR_PTR(-ENOENT);
  85. }
  86. EXPORT_SYMBOL(clk_get);
  87. int clk_enable(struct clk *clk)
  88. {
  89. return 0;
  90. }
  91. EXPORT_SYMBOL(clk_enable);
  92. void clk_disable(struct clk *clk)
  93. {
  94. }
  95. EXPORT_SYMBOL(clk_disable);
  96. unsigned long clk_get_rate(struct clk *clk)
  97. {
  98. return (unsigned long)clk;
  99. }
  100. EXPORT_SYMBOL(clk_get_rate);
  101. void clk_put(struct clk *clk)
  102. {
  103. }
  104. EXPORT_SYMBOL(clk_put);
  105. /* GPIO support */
  106. #ifdef CONFIG_GENERIC_GPIO
  107. int gpio_to_irq(unsigned gpio)
  108. {
  109. return -EINVAL;
  110. }
  111. EXPORT_SYMBOL(gpio_to_irq);
  112. int irq_to_gpio(unsigned irq)
  113. {
  114. return -EINVAL;
  115. }
  116. EXPORT_SYMBOL(irq_to_gpio);
  117. #endif
  118. #define BOARD_VEC(board) extern struct txx9_board_vec board;
  119. #include <asm/txx9/boards.h>
  120. #undef BOARD_VEC
  121. struct txx9_board_vec *txx9_board_vec __initdata;
  122. static char txx9_system_type[32];
  123. static struct txx9_board_vec *board_vecs[] __initdata = {
  124. #define BOARD_VEC(board) &board,
  125. #include <asm/txx9/boards.h>
  126. #undef BOARD_VEC
  127. };
  128. static struct txx9_board_vec *__init find_board_byname(const char *name)
  129. {
  130. int i;
  131. /* search board_vecs table */
  132. for (i = 0; i < ARRAY_SIZE(board_vecs); i++) {
  133. if (strstr(board_vecs[i]->system, name))
  134. return board_vecs[i];
  135. }
  136. return NULL;
  137. }
  138. static void __init prom_init_cmdline(void)
  139. {
  140. int argc;
  141. int *argv32;
  142. int i; /* Always ignore the "-c" at argv[0] */
  143. if (fw_arg0 >= CKSEG0 || fw_arg1 < CKSEG0) {
  144. /*
  145. * argc is not a valid number, or argv32 is not a valid
  146. * pointer
  147. */
  148. argc = 0;
  149. argv32 = NULL;
  150. } else {
  151. argc = (int)fw_arg0;
  152. argv32 = (int *)fw_arg1;
  153. }
  154. arcs_cmdline[0] = '\0';
  155. for (i = 1; i < argc; i++) {
  156. char *str = (char *)(long)argv32[i];
  157. if (i != 1)
  158. strcat(arcs_cmdline, " ");
  159. if (strchr(str, ' ')) {
  160. strcat(arcs_cmdline, "\"");
  161. strcat(arcs_cmdline, str);
  162. strcat(arcs_cmdline, "\"");
  163. } else
  164. strcat(arcs_cmdline, str);
  165. }
  166. }
  167. static int txx9_ic_disable __initdata;
  168. static int txx9_dc_disable __initdata;
  169. #if defined(CONFIG_CPU_TX49XX)
  170. /* flush all cache on very early stage (before 4k_cache_init) */
  171. static void __init early_flush_dcache(void)
  172. {
  173. unsigned int conf = read_c0_config();
  174. unsigned int dc_size = 1 << (12 + ((conf & CONF_DC) >> 6));
  175. unsigned int linesz = 32;
  176. unsigned long addr, end;
  177. end = INDEX_BASE + dc_size / 4;
  178. /* 4way, waybit=0 */
  179. for (addr = INDEX_BASE; addr < end; addr += linesz) {
  180. cache_op(Index_Writeback_Inv_D, addr | 0);
  181. cache_op(Index_Writeback_Inv_D, addr | 1);
  182. cache_op(Index_Writeback_Inv_D, addr | 2);
  183. cache_op(Index_Writeback_Inv_D, addr | 3);
  184. }
  185. }
  186. static void __init txx9_cache_fixup(void)
  187. {
  188. unsigned int conf;
  189. conf = read_c0_config();
  190. /* flush and disable */
  191. if (txx9_ic_disable) {
  192. conf |= TX49_CONF_IC;
  193. write_c0_config(conf);
  194. }
  195. if (txx9_dc_disable) {
  196. early_flush_dcache();
  197. conf |= TX49_CONF_DC;
  198. write_c0_config(conf);
  199. }
  200. /* enable cache */
  201. conf = read_c0_config();
  202. if (!txx9_ic_disable)
  203. conf &= ~TX49_CONF_IC;
  204. if (!txx9_dc_disable)
  205. conf &= ~TX49_CONF_DC;
  206. write_c0_config(conf);
  207. if (conf & TX49_CONF_IC)
  208. pr_info("TX49XX I-Cache disabled.\n");
  209. if (conf & TX49_CONF_DC)
  210. pr_info("TX49XX D-Cache disabled.\n");
  211. }
  212. #elif defined(CONFIG_CPU_TX39XX)
  213. /* flush all cache on very early stage (before tx39_cache_init) */
  214. static void __init early_flush_dcache(void)
  215. {
  216. unsigned int conf = read_c0_config();
  217. unsigned int dc_size = 1 << (10 + ((conf & TX39_CONF_DCS_MASK) >>
  218. TX39_CONF_DCS_SHIFT));
  219. unsigned int linesz = 16;
  220. unsigned long addr, end;
  221. end = INDEX_BASE + dc_size / 2;
  222. /* 2way, waybit=0 */
  223. for (addr = INDEX_BASE; addr < end; addr += linesz) {
  224. cache_op(Index_Writeback_Inv_D, addr | 0);
  225. cache_op(Index_Writeback_Inv_D, addr | 1);
  226. }
  227. }
  228. static void __init txx9_cache_fixup(void)
  229. {
  230. unsigned int conf;
  231. conf = read_c0_config();
  232. /* flush and disable */
  233. if (txx9_ic_disable) {
  234. conf &= ~TX39_CONF_ICE;
  235. write_c0_config(conf);
  236. }
  237. if (txx9_dc_disable) {
  238. early_flush_dcache();
  239. conf &= ~TX39_CONF_DCE;
  240. write_c0_config(conf);
  241. }
  242. /* enable cache */
  243. conf = read_c0_config();
  244. if (!txx9_ic_disable)
  245. conf |= TX39_CONF_ICE;
  246. if (!txx9_dc_disable)
  247. conf |= TX39_CONF_DCE;
  248. write_c0_config(conf);
  249. if (!(conf & TX39_CONF_ICE))
  250. pr_info("TX39XX I-Cache disabled.\n");
  251. if (!(conf & TX39_CONF_DCE))
  252. pr_info("TX39XX D-Cache disabled.\n");
  253. }
  254. #else
  255. static inline void txx9_cache_fixup(void)
  256. {
  257. }
  258. #endif
  259. static void __init preprocess_cmdline(void)
  260. {
  261. static char cmdline[COMMAND_LINE_SIZE] __initdata;
  262. char *s;
  263. strcpy(cmdline, arcs_cmdline);
  264. s = cmdline;
  265. arcs_cmdline[0] = '\0';
  266. while (s && *s) {
  267. char *str = strsep(&s, " ");
  268. if (strncmp(str, "board=", 6) == 0) {
  269. txx9_board_vec = find_board_byname(str + 6);
  270. continue;
  271. } else if (strncmp(str, "masterclk=", 10) == 0) {
  272. unsigned long val;
  273. if (strict_strtoul(str + 10, 10, &val) == 0)
  274. txx9_master_clock = val;
  275. continue;
  276. } else if (strcmp(str, "icdisable") == 0) {
  277. txx9_ic_disable = 1;
  278. continue;
  279. } else if (strcmp(str, "dcdisable") == 0) {
  280. txx9_dc_disable = 1;
  281. continue;
  282. } else if (strcmp(str, "toeoff") == 0) {
  283. txx9_ccfg_toeon = 0;
  284. continue;
  285. } else if (strcmp(str, "toeon") == 0) {
  286. txx9_ccfg_toeon = 1;
  287. continue;
  288. }
  289. if (arcs_cmdline[0])
  290. strcat(arcs_cmdline, " ");
  291. strcat(arcs_cmdline, str);
  292. }
  293. txx9_cache_fixup();
  294. }
  295. static void __init select_board(void)
  296. {
  297. const char *envstr;
  298. /* first, determine by "board=" argument in preprocess_cmdline() */
  299. if (txx9_board_vec)
  300. return;
  301. /* next, determine by "board" envvar */
  302. envstr = prom_getenv("board");
  303. if (envstr) {
  304. txx9_board_vec = find_board_byname(envstr);
  305. if (txx9_board_vec)
  306. return;
  307. }
  308. /* select "default" board */
  309. #ifdef CONFIG_CPU_TX39XX
  310. txx9_board_vec = &jmr3927_vec;
  311. #endif
  312. #ifdef CONFIG_CPU_TX49XX
  313. switch (TX4938_REV_PCODE()) {
  314. #ifdef CONFIG_TOSHIBA_RBTX4927
  315. case 0x4927:
  316. txx9_board_vec = &rbtx4927_vec;
  317. break;
  318. case 0x4937:
  319. txx9_board_vec = &rbtx4937_vec;
  320. break;
  321. #endif
  322. #ifdef CONFIG_TOSHIBA_RBTX4938
  323. case 0x4938:
  324. txx9_board_vec = &rbtx4938_vec;
  325. break;
  326. #endif
  327. #ifdef CONFIG_TOSHIBA_RBTX4939
  328. case 0x4939:
  329. txx9_board_vec = &rbtx4939_vec;
  330. break;
  331. #endif
  332. }
  333. #endif
  334. }
  335. void __init prom_init(void)
  336. {
  337. prom_init_cmdline();
  338. preprocess_cmdline();
  339. select_board();
  340. strcpy(txx9_system_type, txx9_board_vec->system);
  341. txx9_board_vec->prom_init();
  342. }
  343. void __init prom_free_prom_memory(void)
  344. {
  345. unsigned long saddr = PAGE_SIZE;
  346. unsigned long eaddr = __pa_symbol(&_text);
  347. if (saddr < eaddr)
  348. free_init_pages("prom memory", saddr, eaddr);
  349. }
  350. const char *get_system_type(void)
  351. {
  352. return txx9_system_type;
  353. }
  354. const char *__init prom_getenv(const char *name)
  355. {
  356. const s32 *str;
  357. if (fw_arg2 < CKSEG0)
  358. return NULL;
  359. str = (const s32 *)fw_arg2;
  360. /* YAMON style ("name", "value" pairs) */
  361. while (str[0] && str[1]) {
  362. if (!strcmp((const char *)(unsigned long)str[0], name))
  363. return (const char *)(unsigned long)str[1];
  364. str += 2;
  365. }
  366. return NULL;
  367. }
  368. static void __noreturn txx9_machine_halt(void)
  369. {
  370. local_irq_disable();
  371. clear_c0_status(ST0_IM);
  372. while (1) {
  373. if (cpu_wait) {
  374. (*cpu_wait)();
  375. if (cpu_has_counter) {
  376. /*
  377. * Clear counter interrupt while it
  378. * breaks WAIT instruction even if
  379. * masked.
  380. */
  381. write_c0_compare(0);
  382. }
  383. }
  384. }
  385. }
  386. /* Watchdog support */
  387. void __init txx9_wdt_init(unsigned long base)
  388. {
  389. struct resource res = {
  390. .start = base,
  391. .end = base + 0x100 - 1,
  392. .flags = IORESOURCE_MEM,
  393. };
  394. platform_device_register_simple("txx9wdt", -1, &res, 1);
  395. }
  396. void txx9_wdt_now(unsigned long base)
  397. {
  398. struct txx9_tmr_reg __iomem *tmrptr =
  399. ioremap(base, sizeof(struct txx9_tmr_reg));
  400. /* disable watch dog timer */
  401. __raw_writel(TXx9_TMWTMR_WDIS | TXx9_TMWTMR_TWC, &tmrptr->wtmr);
  402. __raw_writel(0, &tmrptr->tcr);
  403. /* kick watchdog */
  404. __raw_writel(TXx9_TMWTMR_TWIE, &tmrptr->wtmr);
  405. __raw_writel(1, &tmrptr->cpra); /* immediate */
  406. __raw_writel(TXx9_TMTCR_TCE | TXx9_TMTCR_CCDE | TXx9_TMTCR_TMODE_WDOG,
  407. &tmrptr->tcr);
  408. }
  409. /* SPI support */
  410. void __init txx9_spi_init(int busid, unsigned long base, int irq)
  411. {
  412. struct resource res[] = {
  413. {
  414. .start = base,
  415. .end = base + 0x20 - 1,
  416. .flags = IORESOURCE_MEM,
  417. }, {
  418. .start = irq,
  419. .flags = IORESOURCE_IRQ,
  420. },
  421. };
  422. platform_device_register_simple("spi_txx9", busid,
  423. res, ARRAY_SIZE(res));
  424. }
  425. void __init txx9_ethaddr_init(unsigned int id, unsigned char *ethaddr)
  426. {
  427. struct platform_device *pdev =
  428. platform_device_alloc("tc35815-mac", id);
  429. if (!pdev ||
  430. platform_device_add_data(pdev, ethaddr, 6) ||
  431. platform_device_add(pdev))
  432. platform_device_put(pdev);
  433. }
  434. void __init txx9_sio_init(unsigned long baseaddr, int irq,
  435. unsigned int line, unsigned int sclk, int nocts)
  436. {
  437. #ifdef CONFIG_SERIAL_TXX9
  438. struct uart_port req;
  439. memset(&req, 0, sizeof(req));
  440. req.line = line;
  441. req.iotype = UPIO_MEM;
  442. req.membase = ioremap(baseaddr, 0x24);
  443. req.mapbase = baseaddr;
  444. req.irq = irq;
  445. if (!nocts)
  446. req.flags |= UPF_BUGGY_UART /*HAVE_CTS_LINE*/;
  447. if (sclk) {
  448. req.flags |= UPF_MAGIC_MULTIPLIER /*USE_SCLK*/;
  449. req.uartclk = sclk;
  450. } else
  451. req.uartclk = TXX9_IMCLK;
  452. early_serial_txx9_setup(&req);
  453. #endif /* CONFIG_SERIAL_TXX9 */
  454. }
  455. #ifdef CONFIG_EARLY_PRINTK
  456. static void __init null_prom_putchar(char c)
  457. {
  458. }
  459. void (*txx9_prom_putchar)(char c) __initdata = null_prom_putchar;
  460. void __init prom_putchar(char c)
  461. {
  462. txx9_prom_putchar(c);
  463. }
  464. static void __iomem *early_txx9_sio_port;
  465. static void __init early_txx9_sio_putchar(char c)
  466. {
  467. #define TXX9_SICISR 0x0c
  468. #define TXX9_SITFIFO 0x1c
  469. #define TXX9_SICISR_TXALS 0x00000002
  470. while (!(__raw_readl(early_txx9_sio_port + TXX9_SICISR) &
  471. TXX9_SICISR_TXALS))
  472. ;
  473. __raw_writel(c, early_txx9_sio_port + TXX9_SITFIFO);
  474. }
  475. void __init txx9_sio_putchar_init(unsigned long baseaddr)
  476. {
  477. early_txx9_sio_port = ioremap(baseaddr, 0x24);
  478. txx9_prom_putchar = early_txx9_sio_putchar;
  479. }
  480. #endif /* CONFIG_EARLY_PRINTK */
  481. /* wrappers */
  482. void __init plat_mem_setup(void)
  483. {
  484. ioport_resource.start = 0;
  485. ioport_resource.end = ~0UL; /* no limit */
  486. iomem_resource.start = 0;
  487. iomem_resource.end = ~0UL; /* no limit */
  488. /* fallback restart/halt routines */
  489. _machine_restart = (void (*)(char *))txx9_machine_halt;
  490. _machine_halt = txx9_machine_halt;
  491. pm_power_off = txx9_machine_halt;
  492. #ifdef CONFIG_PCI
  493. pcibios_plat_setup = txx9_pcibios_setup;
  494. #endif
  495. txx9_board_vec->mem_setup();
  496. }
  497. void __init arch_init_irq(void)
  498. {
  499. txx9_board_vec->irq_setup();
  500. }
  501. void __init plat_time_init(void)
  502. {
  503. #ifdef CONFIG_CPU_TX49XX
  504. mips_hpt_frequency = txx9_cpu_clock / 2;
  505. #endif
  506. txx9_board_vec->time_init();
  507. }
  508. static int __init _txx9_arch_init(void)
  509. {
  510. if (txx9_board_vec->arch_init)
  511. txx9_board_vec->arch_init();
  512. return 0;
  513. }
  514. arch_initcall(_txx9_arch_init);
  515. static int __init _txx9_device_init(void)
  516. {
  517. if (txx9_board_vec->device_init)
  518. txx9_board_vec->device_init();
  519. return 0;
  520. }
  521. device_initcall(_txx9_device_init);
  522. int (*txx9_irq_dispatch)(int pending);
  523. asmlinkage void plat_irq_dispatch(void)
  524. {
  525. int pending = read_c0_status() & read_c0_cause() & ST0_IM;
  526. int irq = txx9_irq_dispatch(pending);
  527. if (likely(irq >= 0))
  528. do_IRQ(irq);
  529. else
  530. spurious_interrupt();
  531. }
  532. /* see include/asm-mips/mach-tx39xx/mangle-port.h, for example. */
  533. #ifdef NEEDS_TXX9_SWIZZLE_ADDR_B
  534. static unsigned long __swizzle_addr_none(unsigned long port)
  535. {
  536. return port;
  537. }
  538. unsigned long (*__swizzle_addr_b)(unsigned long port) = __swizzle_addr_none;
  539. EXPORT_SYMBOL(__swizzle_addr_b);
  540. #endif
  541. #ifdef NEEDS_TXX9_IOSWABW
  542. static u16 ioswabw_default(volatile u16 *a, u16 x)
  543. {
  544. return le16_to_cpu(x);
  545. }
  546. static u16 __mem_ioswabw_default(volatile u16 *a, u16 x)
  547. {
  548. return x;
  549. }
  550. u16 (*ioswabw)(volatile u16 *a, u16 x) = ioswabw_default;
  551. EXPORT_SYMBOL(ioswabw);
  552. u16 (*__mem_ioswabw)(volatile u16 *a, u16 x) = __mem_ioswabw_default;
  553. EXPORT_SYMBOL(__mem_ioswabw);
  554. #endif
  555. void __init txx9_physmap_flash_init(int no, unsigned long addr,
  556. unsigned long size,
  557. const struct physmap_flash_data *pdata)
  558. {
  559. #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  560. struct resource res = {
  561. .start = addr,
  562. .end = addr + size - 1,
  563. .flags = IORESOURCE_MEM,
  564. };
  565. struct platform_device *pdev;
  566. #ifdef CONFIG_MTD_PARTITIONS
  567. static struct mtd_partition parts[2];
  568. struct physmap_flash_data pdata_part;
  569. /* If this area contained boot area, make separate partition */
  570. if (pdata->nr_parts == 0 && !pdata->parts &&
  571. addr < 0x1fc00000 && addr + size > 0x1fc00000 &&
  572. !parts[0].name) {
  573. parts[0].name = "boot";
  574. parts[0].offset = 0x1fc00000 - addr;
  575. parts[0].size = addr + size - 0x1fc00000;
  576. parts[1].name = "user";
  577. parts[1].offset = 0;
  578. parts[1].size = 0x1fc00000 - addr;
  579. pdata_part = *pdata;
  580. pdata_part.nr_parts = ARRAY_SIZE(parts);
  581. pdata_part.parts = parts;
  582. pdata = &pdata_part;
  583. }
  584. #endif
  585. pdev = platform_device_alloc("physmap-flash", no);
  586. if (!pdev ||
  587. platform_device_add_resources(pdev, &res, 1) ||
  588. platform_device_add_data(pdev, pdata, sizeof(*pdata)) ||
  589. platform_device_add(pdev))
  590. platform_device_put(pdev);
  591. #endif
  592. }
  593. void __init txx9_ndfmc_init(unsigned long baseaddr,
  594. const struct txx9ndfmc_platform_data *pdata)
  595. {
  596. #if defined(CONFIG_MTD_NAND_TXX9NDFMC) || \
  597. defined(CONFIG_MTD_NAND_TXX9NDFMC_MODULE)
  598. struct resource res = {
  599. .start = baseaddr,
  600. .end = baseaddr + 0x1000 - 1,
  601. .flags = IORESOURCE_MEM,
  602. };
  603. struct platform_device *pdev = platform_device_alloc("txx9ndfmc", -1);
  604. if (!pdev ||
  605. platform_device_add_resources(pdev, &res, 1) ||
  606. platform_device_add_data(pdev, pdata, sizeof(*pdata)) ||
  607. platform_device_add(pdev))
  608. platform_device_put(pdev);
  609. #endif
  610. }
  611. #if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
  612. static DEFINE_SPINLOCK(txx9_iocled_lock);
  613. #define TXX9_IOCLED_MAXLEDS 8
  614. struct txx9_iocled_data {
  615. struct gpio_chip chip;
  616. u8 cur_val;
  617. void __iomem *mmioaddr;
  618. struct gpio_led_platform_data pdata;
  619. struct gpio_led leds[TXX9_IOCLED_MAXLEDS];
  620. char names[TXX9_IOCLED_MAXLEDS][32];
  621. };
  622. static int txx9_iocled_get(struct gpio_chip *chip, unsigned int offset)
  623. {
  624. struct txx9_iocled_data *data =
  625. container_of(chip, struct txx9_iocled_data, chip);
  626. return data->cur_val & (1 << offset);
  627. }
  628. static void txx9_iocled_set(struct gpio_chip *chip, unsigned int offset,
  629. int value)
  630. {
  631. struct txx9_iocled_data *data =
  632. container_of(chip, struct txx9_iocled_data, chip);
  633. unsigned long flags;
  634. spin_lock_irqsave(&txx9_iocled_lock, flags);
  635. if (value)
  636. data->cur_val |= 1 << offset;
  637. else
  638. data->cur_val &= ~(1 << offset);
  639. writeb(data->cur_val, data->mmioaddr);
  640. mmiowb();
  641. spin_unlock_irqrestore(&txx9_iocled_lock, flags);
  642. }
  643. static int txx9_iocled_dir_in(struct gpio_chip *chip, unsigned int offset)
  644. {
  645. return 0;
  646. }
  647. static int txx9_iocled_dir_out(struct gpio_chip *chip, unsigned int offset,
  648. int value)
  649. {
  650. txx9_iocled_set(chip, offset, value);
  651. return 0;
  652. }
  653. void __init txx9_iocled_init(unsigned long baseaddr,
  654. int basenum, unsigned int num, int lowactive,
  655. const char *color, char **deftriggers)
  656. {
  657. struct txx9_iocled_data *iocled;
  658. struct platform_device *pdev;
  659. int i;
  660. static char *default_triggers[] __initdata = {
  661. "heartbeat",
  662. "ide-disk",
  663. "nand-disk",
  664. NULL,
  665. };
  666. if (!deftriggers)
  667. deftriggers = default_triggers;
  668. iocled = kzalloc(sizeof(*iocled), GFP_KERNEL);
  669. if (!iocled)
  670. return;
  671. iocled->mmioaddr = ioremap(baseaddr, 1);
  672. if (!iocled->mmioaddr)
  673. goto out_free;
  674. iocled->chip.get = txx9_iocled_get;
  675. iocled->chip.set = txx9_iocled_set;
  676. iocled->chip.direction_input = txx9_iocled_dir_in;
  677. iocled->chip.direction_output = txx9_iocled_dir_out;
  678. iocled->chip.label = "iocled";
  679. iocled->chip.base = basenum;
  680. iocled->chip.ngpio = num;
  681. if (gpiochip_add(&iocled->chip))
  682. goto out_unmap;
  683. if (basenum < 0)
  684. basenum = iocled->chip.base;
  685. pdev = platform_device_alloc("leds-gpio", basenum);
  686. if (!pdev)
  687. goto out_gpio;
  688. iocled->pdata.num_leds = num;
  689. iocled->pdata.leds = iocled->leds;
  690. for (i = 0; i < num; i++) {
  691. struct gpio_led *led = &iocled->leds[i];
  692. snprintf(iocled->names[i], sizeof(iocled->names[i]),
  693. "iocled:%s:%u", color, i);
  694. led->name = iocled->names[i];
  695. led->gpio = basenum + i;
  696. led->active_low = lowactive;
  697. if (deftriggers && *deftriggers)
  698. led->default_trigger = *deftriggers++;
  699. }
  700. pdev->dev.platform_data = &iocled->pdata;
  701. if (platform_device_add(pdev))
  702. goto out_pdev;
  703. return;
  704. out_pdev:
  705. platform_device_put(pdev);
  706. out_gpio:
  707. if (gpiochip_remove(&iocled->chip))
  708. return;
  709. out_unmap:
  710. iounmap(iocled->mmioaddr);
  711. out_free:
  712. kfree(iocled);
  713. }
  714. #else /* CONFIG_LEDS_GPIO */
  715. void __init txx9_iocled_init(unsigned long baseaddr,
  716. int basenum, unsigned int num, int lowactive,
  717. const char *color, char **deftriggers)
  718. {
  719. }
  720. #endif /* CONFIG_LEDS_GPIO */
  721. void __init txx9_dmac_init(int id, unsigned long baseaddr, int irq,
  722. const struct txx9dmac_platform_data *pdata)
  723. {
  724. #if defined(CONFIG_TXX9_DMAC) || defined(CONFIG_TXX9_DMAC_MODULE)
  725. struct resource res[] = {
  726. {
  727. .start = baseaddr,
  728. .end = baseaddr + 0x800 - 1,
  729. .flags = IORESOURCE_MEM,
  730. #ifndef CONFIG_MACH_TX49XX
  731. }, {
  732. .start = irq,
  733. .flags = IORESOURCE_IRQ,
  734. #endif
  735. }
  736. };
  737. #ifdef CONFIG_MACH_TX49XX
  738. struct resource chan_res[] = {
  739. {
  740. .flags = IORESOURCE_IRQ,
  741. }
  742. };
  743. #endif
  744. struct platform_device *pdev = platform_device_alloc("txx9dmac", id);
  745. struct txx9dmac_chan_platform_data cpdata;
  746. int i;
  747. if (!pdev ||
  748. platform_device_add_resources(pdev, res, ARRAY_SIZE(res)) ||
  749. platform_device_add_data(pdev, pdata, sizeof(*pdata)) ||
  750. platform_device_add(pdev)) {
  751. platform_device_put(pdev);
  752. return;
  753. }
  754. memset(&cpdata, 0, sizeof(cpdata));
  755. cpdata.dmac_dev = pdev;
  756. for (i = 0; i < TXX9_DMA_MAX_NR_CHANNELS; i++) {
  757. #ifdef CONFIG_MACH_TX49XX
  758. chan_res[0].start = irq + i;
  759. #endif
  760. pdev = platform_device_alloc("txx9dmac-chan",
  761. id * TXX9_DMA_MAX_NR_CHANNELS + i);
  762. if (!pdev ||
  763. #ifdef CONFIG_MACH_TX49XX
  764. platform_device_add_resources(pdev, chan_res,
  765. ARRAY_SIZE(chan_res)) ||
  766. #endif
  767. platform_device_add_data(pdev, &cpdata, sizeof(cpdata)) ||
  768. platform_device_add(pdev))
  769. platform_device_put(pdev);
  770. }
  771. #endif
  772. }
  773. void __init txx9_aclc_init(unsigned long baseaddr, int irq,
  774. unsigned int dmac_id,
  775. unsigned int dma_chan_out,
  776. unsigned int dma_chan_in)
  777. {
  778. #if defined(CONFIG_SND_SOC_TXX9ACLC) || \
  779. defined(CONFIG_SND_SOC_TXX9ACLC_MODULE)
  780. unsigned int dma_base = dmac_id * TXX9_DMA_MAX_NR_CHANNELS;
  781. struct resource res[] = {
  782. {
  783. .start = baseaddr,
  784. .end = baseaddr + 0x100 - 1,
  785. .flags = IORESOURCE_MEM,
  786. }, {
  787. .start = irq,
  788. .flags = IORESOURCE_IRQ,
  789. }, {
  790. .name = "txx9dmac-chan",
  791. .start = dma_base + dma_chan_out,
  792. .flags = IORESOURCE_DMA,
  793. }, {
  794. .name = "txx9dmac-chan",
  795. .start = dma_base + dma_chan_in,
  796. .flags = IORESOURCE_DMA,
  797. }
  798. };
  799. struct platform_device *pdev =
  800. platform_device_alloc("txx9aclc-ac97", -1);
  801. if (!pdev ||
  802. platform_device_add_resources(pdev, res, ARRAY_SIZE(res)) ||
  803. platform_device_add(pdev))
  804. platform_device_put(pdev);
  805. #endif
  806. }
  807. static struct sysdev_class txx9_sramc_sysdev_class;
  808. struct txx9_sramc_sysdev {
  809. struct sys_device dev;
  810. struct bin_attribute bindata_attr;
  811. void __iomem *base;
  812. };
  813. static ssize_t txx9_sram_read(struct kobject *kobj,
  814. struct bin_attribute *bin_attr,
  815. char *buf, loff_t pos, size_t size)
  816. {
  817. struct txx9_sramc_sysdev *dev = bin_attr->private;
  818. size_t ramsize = bin_attr->size;
  819. if (pos >= ramsize)
  820. return 0;
  821. if (pos + size > ramsize)
  822. size = ramsize - pos;
  823. memcpy_fromio(buf, dev->base + pos, size);
  824. return size;
  825. }
  826. static ssize_t txx9_sram_write(struct kobject *kobj,
  827. struct bin_attribute *bin_attr,
  828. char *buf, loff_t pos, size_t size)
  829. {
  830. struct txx9_sramc_sysdev *dev = bin_attr->private;
  831. size_t ramsize = bin_attr->size;
  832. if (pos >= ramsize)
  833. return 0;
  834. if (pos + size > ramsize)
  835. size = ramsize - pos;
  836. memcpy_toio(dev->base + pos, buf, size);
  837. return size;
  838. }
  839. void __init txx9_sramc_init(struct resource *r)
  840. {
  841. struct txx9_sramc_sysdev *dev;
  842. size_t size;
  843. int err;
  844. if (!txx9_sramc_sysdev_class.name) {
  845. txx9_sramc_sysdev_class.name = "txx9_sram";
  846. err = sysdev_class_register(&txx9_sramc_sysdev_class);
  847. if (err) {
  848. txx9_sramc_sysdev_class.name = NULL;
  849. return;
  850. }
  851. }
  852. dev = kzalloc(sizeof(*dev), GFP_KERNEL);
  853. if (!dev)
  854. return;
  855. size = resource_size(r);
  856. dev->base = ioremap(r->start, size);
  857. if (!dev->base)
  858. goto exit;
  859. dev->dev.cls = &txx9_sramc_sysdev_class;
  860. sysfs_bin_attr_init(&dev->bindata_attr);
  861. dev->bindata_attr.attr.name = "bindata";
  862. dev->bindata_attr.attr.mode = S_IRUSR | S_IWUSR;
  863. dev->bindata_attr.read = txx9_sram_read;
  864. dev->bindata_attr.write = txx9_sram_write;
  865. dev->bindata_attr.size = size;
  866. dev->bindata_attr.private = dev;
  867. err = sysdev_register(&dev->dev);
  868. if (err)
  869. goto exit;
  870. err = sysfs_create_bin_file(&dev->dev.kobj, &dev->bindata_attr);
  871. if (err) {
  872. sysdev_unregister(&dev->dev);
  873. goto exit;
  874. }
  875. return;
  876. exit:
  877. if (dev) {
  878. if (dev->base)
  879. iounmap(dev->base);
  880. kfree(dev);
  881. }
  882. }