dma-default.c 8.6 KB

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  1. /*
  2. * This file is subject to the terms and conditions of the GNU General Public
  3. * License. See the file "COPYING" in the main directory of this archive
  4. * for more details.
  5. *
  6. * Copyright (C) 2000 Ani Joshi <ajoshi@unixbox.com>
  7. * Copyright (C) 2000, 2001, 06 Ralf Baechle <ralf@linux-mips.org>
  8. * swiped from i386, and cloned for MIPS by Geert, polished by Ralf.
  9. */
  10. #include <linux/types.h>
  11. #include <linux/dma-mapping.h>
  12. #include <linux/mm.h>
  13. #include <linux/module.h>
  14. #include <linux/scatterlist.h>
  15. #include <linux/string.h>
  16. #include <linux/gfp.h>
  17. #include <asm/cache.h>
  18. #include <asm/io.h>
  19. #include <dma-coherence.h>
  20. static inline unsigned long dma_addr_to_virt(struct device *dev,
  21. dma_addr_t dma_addr)
  22. {
  23. unsigned long addr = plat_dma_addr_to_phys(dev, dma_addr);
  24. return (unsigned long)phys_to_virt(addr);
  25. }
  26. /*
  27. * Warning on the terminology - Linux calls an uncached area coherent;
  28. * MIPS terminology calls memory areas with hardware maintained coherency
  29. * coherent.
  30. */
  31. static inline int cpu_is_noncoherent_r10000(struct device *dev)
  32. {
  33. return !plat_device_is_coherent(dev) &&
  34. (current_cpu_type() == CPU_R10000 ||
  35. current_cpu_type() == CPU_R12000);
  36. }
  37. static gfp_t massage_gfp_flags(const struct device *dev, gfp_t gfp)
  38. {
  39. /* ignore region specifiers */
  40. gfp &= ~(__GFP_DMA | __GFP_DMA32 | __GFP_HIGHMEM);
  41. #ifdef CONFIG_ZONE_DMA
  42. if (dev == NULL)
  43. gfp |= __GFP_DMA;
  44. else if (dev->coherent_dma_mask < DMA_BIT_MASK(24))
  45. gfp |= __GFP_DMA;
  46. else
  47. #endif
  48. #ifdef CONFIG_ZONE_DMA32
  49. if (dev->coherent_dma_mask < DMA_BIT_MASK(32))
  50. gfp |= __GFP_DMA32;
  51. else
  52. #endif
  53. ;
  54. /* Don't invoke OOM killer */
  55. gfp |= __GFP_NORETRY;
  56. return gfp;
  57. }
  58. void *dma_alloc_noncoherent(struct device *dev, size_t size,
  59. dma_addr_t * dma_handle, gfp_t gfp)
  60. {
  61. void *ret;
  62. gfp = massage_gfp_flags(dev, gfp);
  63. ret = (void *) __get_free_pages(gfp, get_order(size));
  64. if (ret != NULL) {
  65. memset(ret, 0, size);
  66. *dma_handle = plat_map_dma_mem(dev, ret, size);
  67. }
  68. return ret;
  69. }
  70. EXPORT_SYMBOL(dma_alloc_noncoherent);
  71. void *dma_alloc_coherent(struct device *dev, size_t size,
  72. dma_addr_t * dma_handle, gfp_t gfp)
  73. {
  74. void *ret;
  75. if (dma_alloc_from_coherent(dev, size, dma_handle, &ret))
  76. return ret;
  77. gfp = massage_gfp_flags(dev, gfp);
  78. ret = (void *) __get_free_pages(gfp, get_order(size));
  79. if (ret) {
  80. memset(ret, 0, size);
  81. *dma_handle = plat_map_dma_mem(dev, ret, size);
  82. if (!plat_device_is_coherent(dev)) {
  83. dma_cache_wback_inv((unsigned long) ret, size);
  84. ret = UNCAC_ADDR(ret);
  85. }
  86. }
  87. return ret;
  88. }
  89. EXPORT_SYMBOL(dma_alloc_coherent);
  90. void dma_free_noncoherent(struct device *dev, size_t size, void *vaddr,
  91. dma_addr_t dma_handle)
  92. {
  93. plat_unmap_dma_mem(dev, dma_handle, size, DMA_BIDIRECTIONAL);
  94. free_pages((unsigned long) vaddr, get_order(size));
  95. }
  96. EXPORT_SYMBOL(dma_free_noncoherent);
  97. void dma_free_coherent(struct device *dev, size_t size, void *vaddr,
  98. dma_addr_t dma_handle)
  99. {
  100. unsigned long addr = (unsigned long) vaddr;
  101. int order = get_order(size);
  102. if (dma_release_from_coherent(dev, order, vaddr))
  103. return;
  104. plat_unmap_dma_mem(dev, dma_handle, size, DMA_BIDIRECTIONAL);
  105. if (!plat_device_is_coherent(dev))
  106. addr = CAC_ADDR(addr);
  107. free_pages(addr, get_order(size));
  108. }
  109. EXPORT_SYMBOL(dma_free_coherent);
  110. static inline void __dma_sync(unsigned long addr, size_t size,
  111. enum dma_data_direction direction)
  112. {
  113. switch (direction) {
  114. case DMA_TO_DEVICE:
  115. dma_cache_wback(addr, size);
  116. break;
  117. case DMA_FROM_DEVICE:
  118. dma_cache_inv(addr, size);
  119. break;
  120. case DMA_BIDIRECTIONAL:
  121. dma_cache_wback_inv(addr, size);
  122. break;
  123. default:
  124. BUG();
  125. }
  126. }
  127. dma_addr_t dma_map_single(struct device *dev, void *ptr, size_t size,
  128. enum dma_data_direction direction)
  129. {
  130. unsigned long addr = (unsigned long) ptr;
  131. if (!plat_device_is_coherent(dev))
  132. __dma_sync(addr, size, direction);
  133. return plat_map_dma_mem(dev, ptr, size);
  134. }
  135. EXPORT_SYMBOL(dma_map_single);
  136. void dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
  137. enum dma_data_direction direction)
  138. {
  139. if (cpu_is_noncoherent_r10000(dev))
  140. __dma_sync(dma_addr_to_virt(dev, dma_addr), size,
  141. direction);
  142. plat_unmap_dma_mem(dev, dma_addr, size, direction);
  143. }
  144. EXPORT_SYMBOL(dma_unmap_single);
  145. int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
  146. enum dma_data_direction direction)
  147. {
  148. int i;
  149. BUG_ON(direction == DMA_NONE);
  150. for (i = 0; i < nents; i++, sg++) {
  151. unsigned long addr;
  152. addr = (unsigned long) sg_virt(sg);
  153. if (!plat_device_is_coherent(dev) && addr)
  154. __dma_sync(addr, sg->length, direction);
  155. sg->dma_address = plat_map_dma_mem(dev,
  156. (void *)addr, sg->length);
  157. }
  158. return nents;
  159. }
  160. EXPORT_SYMBOL(dma_map_sg);
  161. dma_addr_t dma_map_page(struct device *dev, struct page *page,
  162. unsigned long offset, size_t size, enum dma_data_direction direction)
  163. {
  164. BUG_ON(direction == DMA_NONE);
  165. if (!plat_device_is_coherent(dev)) {
  166. unsigned long addr;
  167. addr = (unsigned long) page_address(page) + offset;
  168. __dma_sync(addr, size, direction);
  169. }
  170. return plat_map_dma_mem_page(dev, page) + offset;
  171. }
  172. EXPORT_SYMBOL(dma_map_page);
  173. void dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries,
  174. enum dma_data_direction direction)
  175. {
  176. unsigned long addr;
  177. int i;
  178. BUG_ON(direction == DMA_NONE);
  179. for (i = 0; i < nhwentries; i++, sg++) {
  180. if (!plat_device_is_coherent(dev) &&
  181. direction != DMA_TO_DEVICE) {
  182. addr = (unsigned long) sg_virt(sg);
  183. if (addr)
  184. __dma_sync(addr, sg->length, direction);
  185. }
  186. plat_unmap_dma_mem(dev, sg->dma_address, sg->length, direction);
  187. }
  188. }
  189. EXPORT_SYMBOL(dma_unmap_sg);
  190. void dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle,
  191. size_t size, enum dma_data_direction direction)
  192. {
  193. BUG_ON(direction == DMA_NONE);
  194. if (cpu_is_noncoherent_r10000(dev)) {
  195. unsigned long addr;
  196. addr = dma_addr_to_virt(dev, dma_handle);
  197. __dma_sync(addr, size, direction);
  198. }
  199. }
  200. EXPORT_SYMBOL(dma_sync_single_for_cpu);
  201. void dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle,
  202. size_t size, enum dma_data_direction direction)
  203. {
  204. BUG_ON(direction == DMA_NONE);
  205. plat_extra_sync_for_device(dev);
  206. if (!plat_device_is_coherent(dev)) {
  207. unsigned long addr;
  208. addr = dma_addr_to_virt(dev, dma_handle);
  209. __dma_sync(addr, size, direction);
  210. }
  211. }
  212. EXPORT_SYMBOL(dma_sync_single_for_device);
  213. void dma_sync_single_range_for_cpu(struct device *dev, dma_addr_t dma_handle,
  214. unsigned long offset, size_t size, enum dma_data_direction direction)
  215. {
  216. BUG_ON(direction == DMA_NONE);
  217. if (cpu_is_noncoherent_r10000(dev)) {
  218. unsigned long addr;
  219. addr = dma_addr_to_virt(dev, dma_handle);
  220. __dma_sync(addr + offset, size, direction);
  221. }
  222. }
  223. EXPORT_SYMBOL(dma_sync_single_range_for_cpu);
  224. void dma_sync_single_range_for_device(struct device *dev, dma_addr_t dma_handle,
  225. unsigned long offset, size_t size, enum dma_data_direction direction)
  226. {
  227. BUG_ON(direction == DMA_NONE);
  228. plat_extra_sync_for_device(dev);
  229. if (!plat_device_is_coherent(dev)) {
  230. unsigned long addr;
  231. addr = dma_addr_to_virt(dev, dma_handle);
  232. __dma_sync(addr + offset, size, direction);
  233. }
  234. }
  235. EXPORT_SYMBOL(dma_sync_single_range_for_device);
  236. void dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nelems,
  237. enum dma_data_direction direction)
  238. {
  239. int i;
  240. BUG_ON(direction == DMA_NONE);
  241. /* Make sure that gcc doesn't leave the empty loop body. */
  242. for (i = 0; i < nelems; i++, sg++) {
  243. if (cpu_is_noncoherent_r10000(dev))
  244. __dma_sync((unsigned long)page_address(sg_page(sg)),
  245. sg->length, direction);
  246. }
  247. }
  248. EXPORT_SYMBOL(dma_sync_sg_for_cpu);
  249. void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nelems,
  250. enum dma_data_direction direction)
  251. {
  252. int i;
  253. BUG_ON(direction == DMA_NONE);
  254. /* Make sure that gcc doesn't leave the empty loop body. */
  255. for (i = 0; i < nelems; i++, sg++) {
  256. if (!plat_device_is_coherent(dev))
  257. __dma_sync((unsigned long)page_address(sg_page(sg)),
  258. sg->length, direction);
  259. }
  260. }
  261. EXPORT_SYMBOL(dma_sync_sg_for_device);
  262. int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
  263. {
  264. return plat_dma_mapping_error(dev, dma_addr);
  265. }
  266. EXPORT_SYMBOL(dma_mapping_error);
  267. int dma_supported(struct device *dev, u64 mask)
  268. {
  269. return plat_dma_supported(dev, mask);
  270. }
  271. EXPORT_SYMBOL(dma_supported);
  272. int dma_is_consistent(struct device *dev, dma_addr_t dma_addr)
  273. {
  274. return plat_device_is_coherent(dev);
  275. }
  276. EXPORT_SYMBOL(dma_is_consistent);
  277. void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
  278. enum dma_data_direction direction)
  279. {
  280. BUG_ON(direction == DMA_NONE);
  281. plat_extra_sync_for_device(dev);
  282. if (!plat_device_is_coherent(dev))
  283. __dma_sync((unsigned long)vaddr, size, direction);
  284. }
  285. EXPORT_SYMBOL(dma_cache_sync);