platform.c 4.0 KB

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  1. /*
  2. * DBAu1xxx board platform device registration
  3. *
  4. * Copyright (C) 2009 Manuel Lauss
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  19. */
  20. #include <linux/init.h>
  21. #include <linux/platform_device.h>
  22. #include <asm/mach-au1x00/au1xxx.h>
  23. #include <asm/mach-db1x00/bcsr.h>
  24. #include "../platform.h"
  25. /* DB1xxx PCMCIA interrupt sources:
  26. * CD0/1 GPIO0/3
  27. * STSCHG0/1 GPIO1/4
  28. * CARD0/1 GPIO2/5
  29. * Db1550: 0/1, 21/22, 3/5
  30. */
  31. #define DB1XXX_HAS_PCMCIA
  32. #define F_SWAPPED (bcsr_read(BCSR_STATUS) & BCSR_STATUS_DB1000_SWAPBOOT)
  33. #if defined(CONFIG_MIPS_DB1000)
  34. #define DB1XXX_PCMCIA_CD0 AU1000_GPIO0_INT
  35. #define DB1XXX_PCMCIA_STSCHG0 AU1000_GPIO1_INT
  36. #define DB1XXX_PCMCIA_CARD0 AU1000_GPIO2_INT
  37. #define DB1XXX_PCMCIA_CD1 AU1000_GPIO3_INT
  38. #define DB1XXX_PCMCIA_STSCHG1 AU1000_GPIO4_INT
  39. #define DB1XXX_PCMCIA_CARD1 AU1000_GPIO5_INT
  40. #define BOARD_FLASH_SIZE 0x02000000 /* 32MB */
  41. #define BOARD_FLASH_WIDTH 4 /* 32-bits */
  42. #elif defined(CONFIG_MIPS_DB1100)
  43. #define DB1XXX_PCMCIA_CD0 AU1100_GPIO0_INT
  44. #define DB1XXX_PCMCIA_STSCHG0 AU1100_GPIO1_INT
  45. #define DB1XXX_PCMCIA_CARD0 AU1100_GPIO2_INT
  46. #define DB1XXX_PCMCIA_CD1 AU1100_GPIO3_INT
  47. #define DB1XXX_PCMCIA_STSCHG1 AU1100_GPIO4_INT
  48. #define DB1XXX_PCMCIA_CARD1 AU1100_GPIO5_INT
  49. #define BOARD_FLASH_SIZE 0x02000000 /* 32MB */
  50. #define BOARD_FLASH_WIDTH 4 /* 32-bits */
  51. #elif defined(CONFIG_MIPS_DB1500)
  52. #define DB1XXX_PCMCIA_CD0 AU1500_GPIO0_INT
  53. #define DB1XXX_PCMCIA_STSCHG0 AU1500_GPIO1_INT
  54. #define DB1XXX_PCMCIA_CARD0 AU1500_GPIO2_INT
  55. #define DB1XXX_PCMCIA_CD1 AU1500_GPIO3_INT
  56. #define DB1XXX_PCMCIA_STSCHG1 AU1500_GPIO4_INT
  57. #define DB1XXX_PCMCIA_CARD1 AU1500_GPIO5_INT
  58. #define BOARD_FLASH_SIZE 0x02000000 /* 32MB */
  59. #define BOARD_FLASH_WIDTH 4 /* 32-bits */
  60. #elif defined(CONFIG_MIPS_DB1550)
  61. #define DB1XXX_PCMCIA_CD0 AU1550_GPIO0_INT
  62. #define DB1XXX_PCMCIA_STSCHG0 AU1550_GPIO21_INT
  63. #define DB1XXX_PCMCIA_CARD0 AU1550_GPIO3_INT
  64. #define DB1XXX_PCMCIA_CD1 AU1550_GPIO1_INT
  65. #define DB1XXX_PCMCIA_STSCHG1 AU1550_GPIO22_INT
  66. #define DB1XXX_PCMCIA_CARD1 AU1550_GPIO5_INT
  67. #define BOARD_FLASH_SIZE 0x08000000 /* 128MB */
  68. #define BOARD_FLASH_WIDTH 4 /* 32-bits */
  69. #else
  70. /* other board: no PCMCIA */
  71. #undef DB1XXX_HAS_PCMCIA
  72. #undef F_SWAPPED
  73. #define F_SWAPPED 0
  74. #if defined(CONFIG_MIPS_BOSPORUS)
  75. #define BOARD_FLASH_SIZE 0x01000000 /* 16MB */
  76. #define BOARD_FLASH_WIDTH 2 /* 16-bits */
  77. #elif defined(CONFIG_MIPS_MIRAGE)
  78. #define BOARD_FLASH_SIZE 0x04000000 /* 64MB */
  79. #define BOARD_FLASH_WIDTH 4 /* 32-bits */
  80. #endif
  81. #endif
  82. static int __init db1xxx_dev_init(void)
  83. {
  84. #ifdef DB1XXX_HAS_PCMCIA
  85. db1x_register_pcmcia_socket(PCMCIA_ATTR_PHYS_ADDR,
  86. PCMCIA_ATTR_PHYS_ADDR + 0x000400000 - 1,
  87. PCMCIA_MEM_PHYS_ADDR,
  88. PCMCIA_MEM_PHYS_ADDR + 0x000400000 - 1,
  89. PCMCIA_IO_PHYS_ADDR,
  90. PCMCIA_IO_PHYS_ADDR + 0x000010000 - 1,
  91. DB1XXX_PCMCIA_CARD0,
  92. DB1XXX_PCMCIA_CD0,
  93. /*DB1XXX_PCMCIA_STSCHG0*/0,
  94. 0,
  95. 0);
  96. db1x_register_pcmcia_socket(PCMCIA_ATTR_PHYS_ADDR + 0x004000000,
  97. PCMCIA_ATTR_PHYS_ADDR + 0x004400000 - 1,
  98. PCMCIA_MEM_PHYS_ADDR + 0x004000000,
  99. PCMCIA_MEM_PHYS_ADDR + 0x004400000 - 1,
  100. PCMCIA_IO_PHYS_ADDR + 0x004000000,
  101. PCMCIA_IO_PHYS_ADDR + 0x004010000 - 1,
  102. DB1XXX_PCMCIA_CARD1,
  103. DB1XXX_PCMCIA_CD1,
  104. /*DB1XXX_PCMCIA_STSCHG1*/0,
  105. 0,
  106. 1);
  107. #endif
  108. db1x_register_norflash(BOARD_FLASH_SIZE, BOARD_FLASH_WIDTH, F_SWAPPED);
  109. return 0;
  110. }
  111. device_initcall(db1xxx_dev_init);