cm_bf548.c 27 KB

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  1. /*
  2. * Copyright 2004-2009 Analog Devices Inc.
  3. * 2008-2009 Bluetechnix
  4. * 2005 National ICT Australia (NICTA)
  5. * Aidan Williams <aidan@nicta.com.au>
  6. *
  7. * Licensed under the GPL-2 or later.
  8. */
  9. #include <linux/device.h>
  10. #include <linux/platform_device.h>
  11. #include <linux/mtd/mtd.h>
  12. #include <linux/mtd/partitions.h>
  13. #include <linux/mtd/physmap.h>
  14. #include <linux/spi/spi.h>
  15. #include <linux/spi/flash.h>
  16. #include <linux/irq.h>
  17. #include <linux/interrupt.h>
  18. #include <linux/usb/musb.h>
  19. #include <asm/bfin5xx_spi.h>
  20. #include <asm/dma.h>
  21. #include <asm/gpio.h>
  22. #include <asm/nand.h>
  23. #include <asm/portmux.h>
  24. #include <asm/bfin_sdh.h>
  25. #include <mach/bf54x_keys.h>
  26. #include <asm/dpmc.h>
  27. #include <linux/input.h>
  28. #include <linux/spi/ad7877.h>
  29. /*
  30. * Name the Board for the /proc/cpuinfo
  31. */
  32. const char bfin_board_name[] = "Bluetechnix CM-BF548";
  33. /*
  34. * Driver needs to know address, irq and flag pin.
  35. */
  36. #if defined(CONFIG_FB_BF54X_LQ043) || defined(CONFIG_FB_BF54X_LQ043_MODULE)
  37. #include <mach/bf54x-lq043.h>
  38. static struct bfin_bf54xfb_mach_info bf54x_lq043_data = {
  39. .width = 480,
  40. .height = 272,
  41. .xres = {480, 480, 480},
  42. .yres = {272, 272, 272},
  43. .bpp = {24, 24, 24},
  44. .disp = GPIO_PE3,
  45. };
  46. static struct resource bf54x_lq043_resources[] = {
  47. {
  48. .start = IRQ_EPPI0_ERR,
  49. .end = IRQ_EPPI0_ERR,
  50. .flags = IORESOURCE_IRQ,
  51. },
  52. };
  53. static struct platform_device bf54x_lq043_device = {
  54. .name = "bf54x-lq043",
  55. .id = -1,
  56. .num_resources = ARRAY_SIZE(bf54x_lq043_resources),
  57. .resource = bf54x_lq043_resources,
  58. .dev = {
  59. .platform_data = &bf54x_lq043_data,
  60. },
  61. };
  62. #endif
  63. #if defined(CONFIG_KEYBOARD_BFIN) || defined(CONFIG_KEYBOARD_BFIN_MODULE)
  64. static unsigned int bf548_keymap[] = {
  65. KEYVAL(0, 0, KEY_ENTER),
  66. KEYVAL(0, 1, KEY_HELP),
  67. KEYVAL(0, 2, KEY_0),
  68. KEYVAL(0, 3, KEY_BACKSPACE),
  69. KEYVAL(1, 0, KEY_TAB),
  70. KEYVAL(1, 1, KEY_9),
  71. KEYVAL(1, 2, KEY_8),
  72. KEYVAL(1, 3, KEY_7),
  73. KEYVAL(2, 0, KEY_DOWN),
  74. KEYVAL(2, 1, KEY_6),
  75. KEYVAL(2, 2, KEY_5),
  76. KEYVAL(2, 3, KEY_4),
  77. KEYVAL(3, 0, KEY_UP),
  78. KEYVAL(3, 1, KEY_3),
  79. KEYVAL(3, 2, KEY_2),
  80. KEYVAL(3, 3, KEY_1),
  81. };
  82. static struct bfin_kpad_platform_data bf54x_kpad_data = {
  83. .rows = 4,
  84. .cols = 4,
  85. .keymap = bf548_keymap,
  86. .keymapsize = ARRAY_SIZE(bf548_keymap),
  87. .repeat = 0,
  88. .debounce_time = 5000, /* ns (5ms) */
  89. .coldrive_time = 1000, /* ns (1ms) */
  90. .keyup_test_interval = 50, /* ms (50ms) */
  91. };
  92. static struct resource bf54x_kpad_resources[] = {
  93. {
  94. .start = IRQ_KEY,
  95. .end = IRQ_KEY,
  96. .flags = IORESOURCE_IRQ,
  97. },
  98. };
  99. static struct platform_device bf54x_kpad_device = {
  100. .name = "bf54x-keys",
  101. .id = -1,
  102. .num_resources = ARRAY_SIZE(bf54x_kpad_resources),
  103. .resource = bf54x_kpad_resources,
  104. .dev = {
  105. .platform_data = &bf54x_kpad_data,
  106. },
  107. };
  108. #endif
  109. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  110. static struct platform_device rtc_device = {
  111. .name = "rtc-bfin",
  112. .id = -1,
  113. };
  114. #endif
  115. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  116. #ifdef CONFIG_SERIAL_BFIN_UART0
  117. static struct resource bfin_uart0_resources[] = {
  118. {
  119. .start = UART0_DLL,
  120. .end = UART0_RBR+2,
  121. .flags = IORESOURCE_MEM,
  122. },
  123. {
  124. .start = IRQ_UART0_RX,
  125. .end = IRQ_UART0_RX+1,
  126. .flags = IORESOURCE_IRQ,
  127. },
  128. {
  129. .start = IRQ_UART0_ERROR,
  130. .end = IRQ_UART0_ERROR,
  131. .flags = IORESOURCE_IRQ,
  132. },
  133. {
  134. .start = CH_UART0_TX,
  135. .end = CH_UART0_TX,
  136. .flags = IORESOURCE_DMA,
  137. },
  138. {
  139. .start = CH_UART0_RX,
  140. .end = CH_UART0_RX,
  141. .flags = IORESOURCE_DMA,
  142. },
  143. };
  144. unsigned short bfin_uart0_peripherals[] = {
  145. P_UART0_TX, P_UART0_RX, 0
  146. };
  147. static struct platform_device bfin_uart0_device = {
  148. .name = "bfin-uart",
  149. .id = 0,
  150. .num_resources = ARRAY_SIZE(bfin_uart0_resources),
  151. .resource = bfin_uart0_resources,
  152. .dev = {
  153. .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
  154. },
  155. };
  156. #endif
  157. #ifdef CONFIG_SERIAL_BFIN_UART1
  158. static struct resource bfin_uart1_resources[] = {
  159. {
  160. .start = UART1_DLL,
  161. .end = UART1_RBR+2,
  162. .flags = IORESOURCE_MEM,
  163. },
  164. {
  165. .start = IRQ_UART1_RX,
  166. .end = IRQ_UART1_RX+1,
  167. .flags = IORESOURCE_IRQ,
  168. },
  169. {
  170. .start = IRQ_UART1_ERROR,
  171. .end = IRQ_UART1_ERROR,
  172. .flags = IORESOURCE_IRQ,
  173. },
  174. {
  175. .start = CH_UART1_TX,
  176. .end = CH_UART1_TX,
  177. .flags = IORESOURCE_DMA,
  178. },
  179. {
  180. .start = CH_UART1_RX,
  181. .end = CH_UART1_RX,
  182. .flags = IORESOURCE_DMA,
  183. },
  184. #ifdef CONFIG_BFIN_UART1_CTSRTS
  185. { /* CTS pin -- 0 means not supported */
  186. .start = GPIO_PE10,
  187. .end = GPIO_PE10,
  188. .flags = IORESOURCE_IO,
  189. },
  190. { /* RTS pin -- 0 means not supported */
  191. .start = GPIO_PE9,
  192. .end = GPIO_PE9,
  193. .flags = IORESOURCE_IO,
  194. },
  195. #endif
  196. };
  197. unsigned short bfin_uart1_peripherals[] = {
  198. P_UART1_TX, P_UART1_RX,
  199. #ifdef CONFIG_BFIN_UART1_CTSRTS
  200. P_UART1_RTS, P_UART1_CTS,
  201. #endif
  202. 0
  203. };
  204. static struct platform_device bfin_uart1_device = {
  205. .name = "bfin-uart",
  206. .id = 1,
  207. .num_resources = ARRAY_SIZE(bfin_uart1_resources),
  208. .resource = bfin_uart1_resources,
  209. .dev = {
  210. .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
  211. },
  212. };
  213. #endif
  214. #ifdef CONFIG_SERIAL_BFIN_UART2
  215. static struct resource bfin_uart2_resources[] = {
  216. {
  217. .start = UART2_DLL,
  218. .end = UART2_RBR+2,
  219. .flags = IORESOURCE_MEM,
  220. },
  221. {
  222. .start = IRQ_UART2_RX,
  223. .end = IRQ_UART2_RX+1,
  224. .flags = IORESOURCE_IRQ,
  225. },
  226. {
  227. .start = IRQ_UART2_ERROR,
  228. .end = IRQ_UART2_ERROR,
  229. .flags = IORESOURCE_IRQ,
  230. },
  231. {
  232. .start = CH_UART2_TX,
  233. .end = CH_UART2_TX,
  234. .flags = IORESOURCE_DMA,
  235. },
  236. {
  237. .start = CH_UART2_RX,
  238. .end = CH_UART2_RX,
  239. .flags = IORESOURCE_DMA,
  240. },
  241. };
  242. unsigned short bfin_uart2_peripherals[] = {
  243. P_UART2_TX, P_UART2_RX, 0
  244. };
  245. static struct platform_device bfin_uart2_device = {
  246. .name = "bfin-uart",
  247. .id = 2,
  248. .num_resources = ARRAY_SIZE(bfin_uart2_resources),
  249. .resource = bfin_uart2_resources,
  250. .dev = {
  251. .platform_data = &bfin_uart2_peripherals, /* Passed to driver */
  252. },
  253. };
  254. #endif
  255. #ifdef CONFIG_SERIAL_BFIN_UART3
  256. static struct resource bfin_uart3_resources[] = {
  257. {
  258. .start = UART3_DLL,
  259. .end = UART3_RBR+2,
  260. .flags = IORESOURCE_MEM,
  261. },
  262. {
  263. .start = IRQ_UART3_RX,
  264. .end = IRQ_UART3_RX+1,
  265. .flags = IORESOURCE_IRQ,
  266. },
  267. {
  268. .start = IRQ_UART3_ERROR,
  269. .end = IRQ_UART3_ERROR,
  270. .flags = IORESOURCE_IRQ,
  271. },
  272. {
  273. .start = CH_UART3_TX,
  274. .end = CH_UART3_TX,
  275. .flags = IORESOURCE_DMA,
  276. },
  277. {
  278. .start = CH_UART3_RX,
  279. .end = CH_UART3_RX,
  280. .flags = IORESOURCE_DMA,
  281. },
  282. #ifdef CONFIG_BFIN_UART3_CTSRTS
  283. { /* CTS pin -- 0 means not supported */
  284. .start = GPIO_PB3,
  285. .end = GPIO_PB3,
  286. .flags = IORESOURCE_IO,
  287. },
  288. { /* RTS pin -- 0 means not supported */
  289. .start = GPIO_PB2,
  290. .end = GPIO_PB2,
  291. .flags = IORESOURCE_IO,
  292. },
  293. #endif
  294. };
  295. unsigned short bfin_uart3_peripherals[] = {
  296. P_UART3_TX, P_UART3_RX,
  297. #ifdef CONFIG_BFIN_UART3_CTSRTS
  298. P_UART3_RTS, P_UART3_CTS,
  299. #endif
  300. 0
  301. };
  302. static struct platform_device bfin_uart3_device = {
  303. .name = "bfin-uart",
  304. .id = 3,
  305. .num_resources = ARRAY_SIZE(bfin_uart3_resources),
  306. .resource = bfin_uart3_resources,
  307. .dev = {
  308. .platform_data = &bfin_uart3_peripherals, /* Passed to driver */
  309. },
  310. };
  311. #endif
  312. #endif
  313. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  314. #ifdef CONFIG_BFIN_SIR0
  315. static struct resource bfin_sir0_resources[] = {
  316. {
  317. .start = 0xFFC00400,
  318. .end = 0xFFC004FF,
  319. .flags = IORESOURCE_MEM,
  320. },
  321. {
  322. .start = IRQ_UART0_RX,
  323. .end = IRQ_UART0_RX+1,
  324. .flags = IORESOURCE_IRQ,
  325. },
  326. {
  327. .start = CH_UART0_RX,
  328. .end = CH_UART0_RX+1,
  329. .flags = IORESOURCE_DMA,
  330. },
  331. };
  332. static struct platform_device bfin_sir0_device = {
  333. .name = "bfin_sir",
  334. .id = 0,
  335. .num_resources = ARRAY_SIZE(bfin_sir0_resources),
  336. .resource = bfin_sir0_resources,
  337. };
  338. #endif
  339. #ifdef CONFIG_BFIN_SIR1
  340. static struct resource bfin_sir1_resources[] = {
  341. {
  342. .start = 0xFFC02000,
  343. .end = 0xFFC020FF,
  344. .flags = IORESOURCE_MEM,
  345. },
  346. {
  347. .start = IRQ_UART1_RX,
  348. .end = IRQ_UART1_RX+1,
  349. .flags = IORESOURCE_IRQ,
  350. },
  351. {
  352. .start = CH_UART1_RX,
  353. .end = CH_UART1_RX+1,
  354. .flags = IORESOURCE_DMA,
  355. },
  356. };
  357. static struct platform_device bfin_sir1_device = {
  358. .name = "bfin_sir",
  359. .id = 1,
  360. .num_resources = ARRAY_SIZE(bfin_sir1_resources),
  361. .resource = bfin_sir1_resources,
  362. };
  363. #endif
  364. #ifdef CONFIG_BFIN_SIR2
  365. static struct resource bfin_sir2_resources[] = {
  366. {
  367. .start = 0xFFC02100,
  368. .end = 0xFFC021FF,
  369. .flags = IORESOURCE_MEM,
  370. },
  371. {
  372. .start = IRQ_UART2_RX,
  373. .end = IRQ_UART2_RX+1,
  374. .flags = IORESOURCE_IRQ,
  375. },
  376. {
  377. .start = CH_UART2_RX,
  378. .end = CH_UART2_RX+1,
  379. .flags = IORESOURCE_DMA,
  380. },
  381. };
  382. static struct platform_device bfin_sir2_device = {
  383. .name = "bfin_sir",
  384. .id = 2,
  385. .num_resources = ARRAY_SIZE(bfin_sir2_resources),
  386. .resource = bfin_sir2_resources,
  387. };
  388. #endif
  389. #ifdef CONFIG_BFIN_SIR3
  390. static struct resource bfin_sir3_resources[] = {
  391. {
  392. .start = 0xFFC03100,
  393. .end = 0xFFC031FF,
  394. .flags = IORESOURCE_MEM,
  395. },
  396. {
  397. .start = IRQ_UART3_RX,
  398. .end = IRQ_UART3_RX+1,
  399. .flags = IORESOURCE_IRQ,
  400. },
  401. {
  402. .start = CH_UART3_RX,
  403. .end = CH_UART3_RX+1,
  404. .flags = IORESOURCE_DMA,
  405. },
  406. };
  407. static struct platform_device bfin_sir3_device = {
  408. .name = "bfin_sir",
  409. .id = 3,
  410. .num_resources = ARRAY_SIZE(bfin_sir3_resources),
  411. .resource = bfin_sir3_resources,
  412. };
  413. #endif
  414. #endif
  415. #if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
  416. #include <linux/smsc911x.h>
  417. static struct resource smsc911x_resources[] = {
  418. {
  419. .name = "smsc911x-memory",
  420. .start = 0x24000000,
  421. .end = 0x24000000 + 0xFF,
  422. .flags = IORESOURCE_MEM,
  423. },
  424. {
  425. .start = IRQ_PE6,
  426. .end = IRQ_PE6,
  427. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
  428. },
  429. };
  430. static struct smsc911x_platform_config smsc911x_config = {
  431. .flags = SMSC911X_USE_16BIT,
  432. .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
  433. .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
  434. .phy_interface = PHY_INTERFACE_MODE_MII,
  435. };
  436. static struct platform_device smsc911x_device = {
  437. .name = "smsc911x",
  438. .id = 0,
  439. .num_resources = ARRAY_SIZE(smsc911x_resources),
  440. .resource = smsc911x_resources,
  441. .dev = {
  442. .platform_data = &smsc911x_config,
  443. },
  444. };
  445. #endif
  446. #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
  447. static struct resource musb_resources[] = {
  448. [0] = {
  449. .start = 0xFFC03C00,
  450. .end = 0xFFC040FF,
  451. .flags = IORESOURCE_MEM,
  452. },
  453. [1] = { /* general IRQ */
  454. .start = IRQ_USB_INT0,
  455. .end = IRQ_USB_INT0,
  456. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  457. },
  458. [2] = { /* DMA IRQ */
  459. .start = IRQ_USB_DMA,
  460. .end = IRQ_USB_DMA,
  461. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  462. },
  463. };
  464. static struct musb_hdrc_config musb_config = {
  465. .multipoint = 0,
  466. .dyn_fifo = 0,
  467. .soft_con = 1,
  468. .dma = 1,
  469. .num_eps = 8,
  470. .dma_channels = 8,
  471. .gpio_vrsel = GPIO_PH6,
  472. };
  473. static struct musb_hdrc_platform_data musb_plat = {
  474. #if defined(CONFIG_USB_MUSB_OTG)
  475. .mode = MUSB_OTG,
  476. #elif defined(CONFIG_USB_MUSB_HDRC_HCD)
  477. .mode = MUSB_HOST,
  478. #elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
  479. .mode = MUSB_PERIPHERAL,
  480. #endif
  481. .config = &musb_config,
  482. };
  483. static u64 musb_dmamask = ~(u32)0;
  484. static struct platform_device musb_device = {
  485. .name = "musb_hdrc",
  486. .id = 0,
  487. .dev = {
  488. .dma_mask = &musb_dmamask,
  489. .coherent_dma_mask = 0xffffffff,
  490. .platform_data = &musb_plat,
  491. },
  492. .num_resources = ARRAY_SIZE(musb_resources),
  493. .resource = musb_resources,
  494. };
  495. #endif
  496. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  497. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  498. static struct resource bfin_sport0_uart_resources[] = {
  499. {
  500. .start = SPORT0_TCR1,
  501. .end = SPORT0_MRCS3+4,
  502. .flags = IORESOURCE_MEM,
  503. },
  504. {
  505. .start = IRQ_SPORT0_RX,
  506. .end = IRQ_SPORT0_RX+1,
  507. .flags = IORESOURCE_IRQ,
  508. },
  509. {
  510. .start = IRQ_SPORT0_ERROR,
  511. .end = IRQ_SPORT0_ERROR,
  512. .flags = IORESOURCE_IRQ,
  513. },
  514. };
  515. unsigned short bfin_sport0_peripherals[] = {
  516. P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
  517. P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
  518. };
  519. static struct platform_device bfin_sport0_uart_device = {
  520. .name = "bfin-sport-uart",
  521. .id = 0,
  522. .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
  523. .resource = bfin_sport0_uart_resources,
  524. .dev = {
  525. .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
  526. },
  527. };
  528. #endif
  529. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  530. static struct resource bfin_sport1_uart_resources[] = {
  531. {
  532. .start = SPORT1_TCR1,
  533. .end = SPORT1_MRCS3+4,
  534. .flags = IORESOURCE_MEM,
  535. },
  536. {
  537. .start = IRQ_SPORT1_RX,
  538. .end = IRQ_SPORT1_RX+1,
  539. .flags = IORESOURCE_IRQ,
  540. },
  541. {
  542. .start = IRQ_SPORT1_ERROR,
  543. .end = IRQ_SPORT1_ERROR,
  544. .flags = IORESOURCE_IRQ,
  545. },
  546. };
  547. unsigned short bfin_sport1_peripherals[] = {
  548. P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
  549. P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0
  550. };
  551. static struct platform_device bfin_sport1_uart_device = {
  552. .name = "bfin-sport-uart",
  553. .id = 1,
  554. .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
  555. .resource = bfin_sport1_uart_resources,
  556. .dev = {
  557. .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
  558. },
  559. };
  560. #endif
  561. #ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
  562. static struct resource bfin_sport2_uart_resources[] = {
  563. {
  564. .start = SPORT2_TCR1,
  565. .end = SPORT2_MRCS3+4,
  566. .flags = IORESOURCE_MEM,
  567. },
  568. {
  569. .start = IRQ_SPORT2_RX,
  570. .end = IRQ_SPORT2_RX+1,
  571. .flags = IORESOURCE_IRQ,
  572. },
  573. {
  574. .start = IRQ_SPORT2_ERROR,
  575. .end = IRQ_SPORT2_ERROR,
  576. .flags = IORESOURCE_IRQ,
  577. },
  578. };
  579. unsigned short bfin_sport2_peripherals[] = {
  580. P_SPORT2_TFS, P_SPORT2_DTPRI, P_SPORT2_TSCLK, P_SPORT2_RFS,
  581. P_SPORT2_DRPRI, P_SPORT2_RSCLK, P_SPORT2_DRSEC, P_SPORT2_DTSEC, 0
  582. };
  583. static struct platform_device bfin_sport2_uart_device = {
  584. .name = "bfin-sport-uart",
  585. .id = 2,
  586. .num_resources = ARRAY_SIZE(bfin_sport2_uart_resources),
  587. .resource = bfin_sport2_uart_resources,
  588. .dev = {
  589. .platform_data = &bfin_sport2_peripherals, /* Passed to driver */
  590. },
  591. };
  592. #endif
  593. #ifdef CONFIG_SERIAL_BFIN_SPORT3_UART
  594. static struct resource bfin_sport3_uart_resources[] = {
  595. {
  596. .start = SPORT3_TCR1,
  597. .end = SPORT3_MRCS3+4,
  598. .flags = IORESOURCE_MEM,
  599. },
  600. {
  601. .start = IRQ_SPORT3_RX,
  602. .end = IRQ_SPORT3_RX+1,
  603. .flags = IORESOURCE_IRQ,
  604. },
  605. {
  606. .start = IRQ_SPORT3_ERROR,
  607. .end = IRQ_SPORT3_ERROR,
  608. .flags = IORESOURCE_IRQ,
  609. },
  610. };
  611. unsigned short bfin_sport3_peripherals[] = {
  612. P_SPORT3_TFS, P_SPORT3_DTPRI, P_SPORT3_TSCLK, P_SPORT3_RFS,
  613. P_SPORT3_DRPRI, P_SPORT3_RSCLK, P_SPORT3_DRSEC, P_SPORT3_DTSEC, 0
  614. };
  615. static struct platform_device bfin_sport3_uart_device = {
  616. .name = "bfin-sport-uart",
  617. .id = 3,
  618. .num_resources = ARRAY_SIZE(bfin_sport3_uart_resources),
  619. .resource = bfin_sport3_uart_resources,
  620. .dev = {
  621. .platform_data = &bfin_sport3_peripherals, /* Passed to driver */
  622. },
  623. };
  624. #endif
  625. #endif
  626. #if defined(CONFIG_PATA_BF54X) || defined(CONFIG_PATA_BF54X_MODULE)
  627. static struct resource bfin_atapi_resources[] = {
  628. {
  629. .start = 0xFFC03800,
  630. .end = 0xFFC0386F,
  631. .flags = IORESOURCE_MEM,
  632. },
  633. {
  634. .start = IRQ_ATAPI_ERR,
  635. .end = IRQ_ATAPI_ERR,
  636. .flags = IORESOURCE_IRQ,
  637. },
  638. };
  639. static struct platform_device bfin_atapi_device = {
  640. .name = "pata-bf54x",
  641. .id = -1,
  642. .num_resources = ARRAY_SIZE(bfin_atapi_resources),
  643. .resource = bfin_atapi_resources,
  644. };
  645. #endif
  646. #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
  647. static struct mtd_partition partition_info[] = {
  648. {
  649. .name = "linux kernel(nand)",
  650. .offset = 0,
  651. .size = 4 * 1024 * 1024,
  652. },
  653. {
  654. .name = "file system(nand)",
  655. .offset = 4 * 1024 * 1024,
  656. .size = (256 - 4) * 1024 * 1024,
  657. },
  658. };
  659. static struct bf5xx_nand_platform bf5xx_nand_platform = {
  660. .page_size = NFC_PG_SIZE_256,
  661. .data_width = NFC_NWIDTH_8,
  662. .partitions = partition_info,
  663. .nr_partitions = ARRAY_SIZE(partition_info),
  664. .rd_dly = 3,
  665. .wr_dly = 3,
  666. };
  667. static struct resource bf5xx_nand_resources[] = {
  668. {
  669. .start = 0xFFC03B00,
  670. .end = 0xFFC03B4F,
  671. .flags = IORESOURCE_MEM,
  672. },
  673. {
  674. .start = CH_NFC,
  675. .end = CH_NFC,
  676. .flags = IORESOURCE_IRQ,
  677. },
  678. };
  679. static struct platform_device bf5xx_nand_device = {
  680. .name = "bf5xx-nand",
  681. .id = 0,
  682. .num_resources = ARRAY_SIZE(bf5xx_nand_resources),
  683. .resource = bf5xx_nand_resources,
  684. .dev = {
  685. .platform_data = &bf5xx_nand_platform,
  686. },
  687. };
  688. #endif
  689. #if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
  690. static struct bfin_sd_host bfin_sdh_data = {
  691. .dma_chan = CH_SDH,
  692. .irq_int0 = IRQ_SDH_MASK0,
  693. .pin_req = {P_SD_D0, P_SD_D1, P_SD_D2, P_SD_D3, P_SD_CLK, P_SD_CMD, 0},
  694. };
  695. static struct platform_device bf54x_sdh_device = {
  696. .name = "bfin-sdh",
  697. .id = 0,
  698. .dev = {
  699. .platform_data = &bfin_sdh_data,
  700. },
  701. };
  702. #endif
  703. #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  704. static struct mtd_partition para_partitions[] = {
  705. {
  706. .name = "bootloader(nor)",
  707. .size = 0x40000,
  708. .offset = 0,
  709. }, {
  710. .name = "linux kernel(nor)",
  711. .size = 0x100000,
  712. .offset = MTDPART_OFS_APPEND,
  713. }, {
  714. .name = "file system(nor)",
  715. .size = MTDPART_SIZ_FULL,
  716. .offset = MTDPART_OFS_APPEND,
  717. }
  718. };
  719. static struct physmap_flash_data para_flash_data = {
  720. .width = 2,
  721. .parts = para_partitions,
  722. .nr_parts = ARRAY_SIZE(para_partitions),
  723. };
  724. static struct resource para_flash_resource = {
  725. .start = 0x20000000,
  726. .end = 0x207fffff,
  727. .flags = IORESOURCE_MEM,
  728. };
  729. static struct platform_device para_flash_device = {
  730. .name = "physmap-flash",
  731. .id = 0,
  732. .dev = {
  733. .platform_data = &para_flash_data,
  734. },
  735. .num_resources = 1,
  736. .resource = &para_flash_resource,
  737. };
  738. #endif
  739. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  740. /* all SPI peripherals info goes here */
  741. #if defined(CONFIG_MTD_M25P80) \
  742. || defined(CONFIG_MTD_M25P80_MODULE)
  743. /* SPI flash chip (m25p16) */
  744. static struct mtd_partition bfin_spi_flash_partitions[] = {
  745. {
  746. .name = "bootloader(spi)",
  747. .size = 0x00040000,
  748. .offset = 0,
  749. .mask_flags = MTD_CAP_ROM
  750. }, {
  751. .name = "linux kernel(spi)",
  752. .size = 0x1c0000,
  753. .offset = 0x40000
  754. }
  755. };
  756. static struct flash_platform_data bfin_spi_flash_data = {
  757. .name = "m25p80",
  758. .parts = bfin_spi_flash_partitions,
  759. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  760. .type = "m25p16",
  761. };
  762. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  763. .enable_dma = 0, /* use dma transfer with this chip*/
  764. .bits_per_word = 8,
  765. };
  766. #endif
  767. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  768. static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
  769. .enable_dma = 0,
  770. .bits_per_word = 16,
  771. };
  772. static const struct ad7877_platform_data bfin_ad7877_ts_info = {
  773. .model = 7877,
  774. .vref_delay_usecs = 50, /* internal, no capacitor */
  775. .x_plate_ohms = 419,
  776. .y_plate_ohms = 486,
  777. .pressure_max = 1000,
  778. .pressure_min = 0,
  779. .stopacq_polarity = 1,
  780. .first_conversion_delay = 3,
  781. .acquisition_time = 1,
  782. .averaging = 1,
  783. .pen_down_acc_interval = 1,
  784. };
  785. #endif
  786. #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
  787. static struct bfin5xx_spi_chip spidev_chip_info = {
  788. .enable_dma = 0,
  789. .bits_per_word = 8,
  790. };
  791. #endif
  792. static struct spi_board_info bf54x_spi_board_info[] __initdata = {
  793. #if defined(CONFIG_MTD_M25P80) \
  794. || defined(CONFIG_MTD_M25P80_MODULE)
  795. {
  796. /* the modalias must be the same as spi device driver name */
  797. .modalias = "m25p80", /* Name of spi_driver for this device */
  798. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  799. .bus_num = 0, /* Framework bus number */
  800. .chip_select = 1, /* SPI_SSEL1*/
  801. .platform_data = &bfin_spi_flash_data,
  802. .controller_data = &spi_flash_chip_info,
  803. .mode = SPI_MODE_3,
  804. },
  805. #endif
  806. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  807. {
  808. .modalias = "ad7877",
  809. .platform_data = &bfin_ad7877_ts_info,
  810. .irq = IRQ_PJ11,
  811. .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
  812. .bus_num = 0,
  813. .chip_select = 2,
  814. .controller_data = &spi_ad7877_chip_info,
  815. },
  816. #endif
  817. #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
  818. {
  819. .modalias = "spidev",
  820. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  821. .bus_num = 0,
  822. .chip_select = 1,
  823. .controller_data = &spidev_chip_info,
  824. },
  825. #endif
  826. };
  827. /* SPI (0) */
  828. static struct resource bfin_spi0_resource[] = {
  829. [0] = {
  830. .start = SPI0_REGBASE,
  831. .end = SPI0_REGBASE + 0xFF,
  832. .flags = IORESOURCE_MEM,
  833. },
  834. [1] = {
  835. .start = CH_SPI0,
  836. .end = CH_SPI0,
  837. .flags = IORESOURCE_DMA,
  838. },
  839. [2] = {
  840. .start = IRQ_SPI0,
  841. .end = IRQ_SPI0,
  842. .flags = IORESOURCE_IRQ,
  843. }
  844. };
  845. /* SPI (1) */
  846. static struct resource bfin_spi1_resource[] = {
  847. [0] = {
  848. .start = SPI1_REGBASE,
  849. .end = SPI1_REGBASE + 0xFF,
  850. .flags = IORESOURCE_MEM,
  851. },
  852. [1] = {
  853. .start = CH_SPI1,
  854. .end = CH_SPI1,
  855. .flags = IORESOURCE_DMA,
  856. },
  857. [2] = {
  858. .start = IRQ_SPI1,
  859. .end = IRQ_SPI1,
  860. .flags = IORESOURCE_IRQ,
  861. }
  862. };
  863. /* SPI controller data */
  864. static struct bfin5xx_spi_master bf54x_spi_master_info0 = {
  865. .num_chipselect = 3,
  866. .enable_dma = 1, /* master has the ability to do dma transfer */
  867. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  868. };
  869. static struct platform_device bf54x_spi_master0 = {
  870. .name = "bfin-spi",
  871. .id = 0, /* Bus number */
  872. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  873. .resource = bfin_spi0_resource,
  874. .dev = {
  875. .platform_data = &bf54x_spi_master_info0, /* Passed to driver */
  876. },
  877. };
  878. static struct bfin5xx_spi_master bf54x_spi_master_info1 = {
  879. .num_chipselect = 3,
  880. .enable_dma = 1, /* master has the ability to do dma transfer */
  881. .pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0},
  882. };
  883. static struct platform_device bf54x_spi_master1 = {
  884. .name = "bfin-spi",
  885. .id = 1, /* Bus number */
  886. .num_resources = ARRAY_SIZE(bfin_spi1_resource),
  887. .resource = bfin_spi1_resource,
  888. .dev = {
  889. .platform_data = &bf54x_spi_master_info1, /* Passed to driver */
  890. },
  891. };
  892. #endif /* spi master and devices */
  893. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  894. static struct resource bfin_twi0_resource[] = {
  895. [0] = {
  896. .start = TWI0_REGBASE,
  897. .end = TWI0_REGBASE + 0xFF,
  898. .flags = IORESOURCE_MEM,
  899. },
  900. [1] = {
  901. .start = IRQ_TWI0,
  902. .end = IRQ_TWI0,
  903. .flags = IORESOURCE_IRQ,
  904. },
  905. };
  906. static struct platform_device i2c_bfin_twi0_device = {
  907. .name = "i2c-bfin-twi",
  908. .id = 0,
  909. .num_resources = ARRAY_SIZE(bfin_twi0_resource),
  910. .resource = bfin_twi0_resource,
  911. };
  912. #if !defined(CONFIG_BF542) /* The BF542 only has 1 TWI */
  913. static struct resource bfin_twi1_resource[] = {
  914. [0] = {
  915. .start = TWI1_REGBASE,
  916. .end = TWI1_REGBASE + 0xFF,
  917. .flags = IORESOURCE_MEM,
  918. },
  919. [1] = {
  920. .start = IRQ_TWI1,
  921. .end = IRQ_TWI1,
  922. .flags = IORESOURCE_IRQ,
  923. },
  924. };
  925. static struct platform_device i2c_bfin_twi1_device = {
  926. .name = "i2c-bfin-twi",
  927. .id = 1,
  928. .num_resources = ARRAY_SIZE(bfin_twi1_resource),
  929. .resource = bfin_twi1_resource,
  930. };
  931. #endif
  932. #endif
  933. #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
  934. #include <linux/gpio_keys.h>
  935. static struct gpio_keys_button bfin_gpio_keys_table[] = {
  936. {BTN_0, GPIO_PH7, 1, "gpio-keys: BTN0"},
  937. };
  938. static struct gpio_keys_platform_data bfin_gpio_keys_data = {
  939. .buttons = bfin_gpio_keys_table,
  940. .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
  941. };
  942. static struct platform_device bfin_device_gpiokeys = {
  943. .name = "gpio-keys",
  944. .dev = {
  945. .platform_data = &bfin_gpio_keys_data,
  946. },
  947. };
  948. #endif
  949. static const unsigned int cclk_vlev_datasheet[] =
  950. {
  951. /*
  952. * Internal VLEV BF54XSBBC1533
  953. ****temporarily using these values until data sheet is updated
  954. */
  955. VRPAIR(VLEV_085, 150000000),
  956. VRPAIR(VLEV_090, 250000000),
  957. VRPAIR(VLEV_110, 276000000),
  958. VRPAIR(VLEV_115, 301000000),
  959. VRPAIR(VLEV_120, 525000000),
  960. VRPAIR(VLEV_125, 550000000),
  961. VRPAIR(VLEV_130, 600000000),
  962. };
  963. static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
  964. .tuple_tab = cclk_vlev_datasheet,
  965. .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
  966. .vr_settling_time = 25 /* us */,
  967. };
  968. static struct platform_device bfin_dpmc = {
  969. .name = "bfin dpmc",
  970. .dev = {
  971. .platform_data = &bfin_dmpc_vreg_data,
  972. },
  973. };
  974. static struct platform_device *cm_bf548_devices[] __initdata = {
  975. &bfin_dpmc,
  976. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  977. &rtc_device,
  978. #endif
  979. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  980. #ifdef CONFIG_SERIAL_BFIN_UART0
  981. &bfin_uart0_device,
  982. #endif
  983. #ifdef CONFIG_SERIAL_BFIN_UART1
  984. &bfin_uart1_device,
  985. #endif
  986. #ifdef CONFIG_SERIAL_BFIN_UART2
  987. &bfin_uart2_device,
  988. #endif
  989. #ifdef CONFIG_SERIAL_BFIN_UART3
  990. &bfin_uart3_device,
  991. #endif
  992. #endif
  993. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  994. #ifdef CONFIG_BFIN_SIR0
  995. &bfin_sir0_device,
  996. #endif
  997. #ifdef CONFIG_BFIN_SIR1
  998. &bfin_sir1_device,
  999. #endif
  1000. #ifdef CONFIG_BFIN_SIR2
  1001. &bfin_sir2_device,
  1002. #endif
  1003. #ifdef CONFIG_BFIN_SIR3
  1004. &bfin_sir3_device,
  1005. #endif
  1006. #endif
  1007. #if defined(CONFIG_FB_BF54X_LQ043) || defined(CONFIG_FB_BF54X_LQ043_MODULE)
  1008. &bf54x_lq043_device,
  1009. #endif
  1010. #if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
  1011. &smsc911x_device,
  1012. #endif
  1013. #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
  1014. &musb_device,
  1015. #endif
  1016. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  1017. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  1018. &bfin_sport0_uart_device,
  1019. #endif
  1020. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  1021. &bfin_sport1_uart_device,
  1022. #endif
  1023. #ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
  1024. &bfin_sport2_uart_device,
  1025. #endif
  1026. #ifdef CONFIG_SERIAL_BFIN_SPORT3_UART
  1027. &bfin_sport3_uart_device,
  1028. #endif
  1029. #endif
  1030. #if defined(CONFIG_PATA_BF54X) || defined(CONFIG_PATA_BF54X_MODULE)
  1031. &bfin_atapi_device,
  1032. #endif
  1033. #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
  1034. &bf5xx_nand_device,
  1035. #endif
  1036. #if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
  1037. &bf54x_sdh_device,
  1038. #endif
  1039. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  1040. &bf54x_spi_master0,
  1041. &bf54x_spi_master1,
  1042. #endif
  1043. #if defined(CONFIG_KEYBOARD_BFIN) || defined(CONFIG_KEYBOARD_BFIN_MODULE)
  1044. &bf54x_kpad_device,
  1045. #endif
  1046. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  1047. &i2c_bfin_twi0_device,
  1048. #if !defined(CONFIG_BF542)
  1049. &i2c_bfin_twi1_device,
  1050. #endif
  1051. #endif
  1052. #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
  1053. &bfin_device_gpiokeys,
  1054. #endif
  1055. #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  1056. &para_flash_device,
  1057. #endif
  1058. };
  1059. static int __init cm_bf548_init(void)
  1060. {
  1061. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  1062. platform_add_devices(cm_bf548_devices, ARRAY_SIZE(cm_bf548_devices));
  1063. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  1064. spi_register_board_info(bf54x_spi_board_info,
  1065. ARRAY_SIZE(bf54x_spi_board_info));
  1066. #endif
  1067. return 0;
  1068. }
  1069. arch_initcall(cm_bf548_init);
  1070. static struct platform_device *cm_bf548_early_devices[] __initdata = {
  1071. #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
  1072. #ifdef CONFIG_SERIAL_BFIN_UART0
  1073. &bfin_uart0_device,
  1074. #endif
  1075. #ifdef CONFIG_SERIAL_BFIN_UART1
  1076. &bfin_uart1_device,
  1077. #endif
  1078. #ifdef CONFIG_SERIAL_BFIN_UART2
  1079. &bfin_uart2_device,
  1080. #endif
  1081. #ifdef CONFIG_SERIAL_BFIN_UART3
  1082. &bfin_uart3_device,
  1083. #endif
  1084. #endif
  1085. #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
  1086. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  1087. &bfin_sport0_uart_device,
  1088. #endif
  1089. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  1090. &bfin_sport1_uart_device,
  1091. #endif
  1092. #ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
  1093. &bfin_sport2_uart_device,
  1094. #endif
  1095. #ifdef CONFIG_SERIAL_BFIN_SPORT3_UART
  1096. &bfin_sport3_uart_device,
  1097. #endif
  1098. #endif
  1099. };
  1100. void __init native_machine_early_platform_add_devices(void)
  1101. {
  1102. printk(KERN_INFO "register early platform devices\n");
  1103. early_platform_add_devices(cm_bf548_early_devices,
  1104. ARRAY_SIZE(cm_bf548_early_devices));
  1105. }