pnav10.c 13 KB

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  1. /*
  2. * Copyright 2004-2009 Analog Devices Inc.
  3. * 2005 National ICT Australia (NICTA)
  4. * Aidan Williams <aidan@nicta.com.au>
  5. *
  6. * Licensed under the GPL-2 or later.
  7. */
  8. #include <linux/device.h>
  9. #include <linux/etherdevice.h>
  10. #include <linux/platform_device.h>
  11. #include <linux/mtd/mtd.h>
  12. #include <linux/mtd/partitions.h>
  13. #include <linux/spi/spi.h>
  14. #include <linux/spi/flash.h>
  15. #include <linux/irq.h>
  16. #include <asm/dma.h>
  17. #include <asm/bfin5xx_spi.h>
  18. #include <asm/portmux.h>
  19. #include <linux/spi/ad7877.h>
  20. /*
  21. * Name the Board for the /proc/cpuinfo
  22. */
  23. const char bfin_board_name[] = "ADI PNAV-1.0";
  24. /*
  25. * Driver needs to know address, irq and flag pin.
  26. */
  27. #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
  28. static struct resource bfin_pcmcia_cf_resources[] = {
  29. {
  30. .start = 0x20310000, /* IO PORT */
  31. .end = 0x20312000,
  32. .flags = IORESOURCE_MEM,
  33. }, {
  34. .start = 0x20311000, /* Attribute Memory */
  35. .end = 0x20311FFF,
  36. .flags = IORESOURCE_MEM,
  37. }, {
  38. .start = IRQ_PF4,
  39. .end = IRQ_PF4,
  40. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
  41. }, {
  42. .start = 6, /* Card Detect PF6 */
  43. .end = 6,
  44. .flags = IORESOURCE_IRQ,
  45. },
  46. };
  47. static struct platform_device bfin_pcmcia_cf_device = {
  48. .name = "bfin_cf_pcmcia",
  49. .id = -1,
  50. .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
  51. .resource = bfin_pcmcia_cf_resources,
  52. };
  53. #endif
  54. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  55. static struct platform_device rtc_device = {
  56. .name = "rtc-bfin",
  57. .id = -1,
  58. };
  59. #endif
  60. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  61. #include <linux/smc91x.h>
  62. static struct smc91x_platdata smc91x_info = {
  63. .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
  64. .leda = RPC_LED_100_10,
  65. .ledb = RPC_LED_TX_RX,
  66. };
  67. static struct resource smc91x_resources[] = {
  68. {
  69. .name = "smc91x-regs",
  70. .start = 0x20300300,
  71. .end = 0x20300300 + 16,
  72. .flags = IORESOURCE_MEM,
  73. }, {
  74. .start = IRQ_PF7,
  75. .end = IRQ_PF7,
  76. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  77. },
  78. };
  79. static struct platform_device smc91x_device = {
  80. .name = "smc91x",
  81. .id = 0,
  82. .num_resources = ARRAY_SIZE(smc91x_resources),
  83. .resource = smc91x_resources,
  84. .dev = {
  85. .platform_data = &smc91x_info,
  86. },
  87. };
  88. #endif
  89. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  90. static struct platform_device bfin_mii_bus = {
  91. .name = "bfin_mii_bus",
  92. };
  93. static struct platform_device bfin_mac_device = {
  94. .name = "bfin_mac",
  95. .dev.platform_data = &bfin_mii_bus,
  96. };
  97. #endif
  98. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  99. static struct resource net2272_bfin_resources[] = {
  100. {
  101. .start = 0x20300000,
  102. .end = 0x20300000 + 0x100,
  103. .flags = IORESOURCE_MEM,
  104. }, {
  105. .start = IRQ_PF7,
  106. .end = IRQ_PF7,
  107. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  108. },
  109. };
  110. static struct platform_device net2272_bfin_device = {
  111. .name = "net2272",
  112. .id = -1,
  113. .num_resources = ARRAY_SIZE(net2272_bfin_resources),
  114. .resource = net2272_bfin_resources,
  115. };
  116. #endif
  117. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  118. /* all SPI peripherals info goes here */
  119. #if defined(CONFIG_MTD_M25P80) \
  120. || defined(CONFIG_MTD_M25P80_MODULE)
  121. static struct mtd_partition bfin_spi_flash_partitions[] = {
  122. {
  123. .name = "bootloader(spi)",
  124. .size = 0x00020000,
  125. .offset = 0,
  126. .mask_flags = MTD_CAP_ROM
  127. }, {
  128. .name = "linux kernel(spi)",
  129. .size = 0xe0000,
  130. .offset = 0x20000
  131. }, {
  132. .name = "file system(spi)",
  133. .size = 0x700000,
  134. .offset = 0x00100000,
  135. }
  136. };
  137. static struct flash_platform_data bfin_spi_flash_data = {
  138. .name = "m25p80",
  139. .parts = bfin_spi_flash_partitions,
  140. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  141. .type = "m25p64",
  142. };
  143. /* SPI flash chip (m25p64) */
  144. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  145. .enable_dma = 0, /* use dma transfer with this chip*/
  146. .bits_per_word = 8,
  147. };
  148. #endif
  149. #if defined(CONFIG_BFIN_SPI_ADC) \
  150. || defined(CONFIG_BFIN_SPI_ADC_MODULE)
  151. /* SPI ADC chip */
  152. static struct bfin5xx_spi_chip spi_adc_chip_info = {
  153. .enable_dma = 1, /* use dma transfer with this chip*/
  154. .bits_per_word = 16,
  155. };
  156. #endif
  157. #if defined(CONFIG_SND_BLACKFIN_AD183X) \
  158. || defined(CONFIG_SND_BLACKFIN_AD183X_MODULE)
  159. static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
  160. .enable_dma = 0,
  161. .bits_per_word = 16,
  162. };
  163. #endif
  164. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  165. static struct bfin5xx_spi_chip mmc_spi_chip_info = {
  166. .enable_dma = 0,
  167. .bits_per_word = 8,
  168. };
  169. #endif
  170. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  171. static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
  172. .enable_dma = 0,
  173. .bits_per_word = 16,
  174. };
  175. static const struct ad7877_platform_data bfin_ad7877_ts_info = {
  176. .model = 7877,
  177. .vref_delay_usecs = 50, /* internal, no capacitor */
  178. .x_plate_ohms = 419,
  179. .y_plate_ohms = 486,
  180. .pressure_max = 1000,
  181. .pressure_min = 0,
  182. .stopacq_polarity = 1,
  183. .first_conversion_delay = 3,
  184. .acquisition_time = 1,
  185. .averaging = 1,
  186. .pen_down_acc_interval = 1,
  187. };
  188. #endif
  189. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  190. #if defined(CONFIG_MTD_M25P80) \
  191. || defined(CONFIG_MTD_M25P80_MODULE)
  192. {
  193. /* the modalias must be the same as spi device driver name */
  194. .modalias = "m25p80", /* Name of spi_driver for this device */
  195. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  196. .bus_num = 0, /* Framework bus number */
  197. .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
  198. .platform_data = &bfin_spi_flash_data,
  199. .controller_data = &spi_flash_chip_info,
  200. .mode = SPI_MODE_3,
  201. },
  202. #endif
  203. #if defined(CONFIG_BFIN_SPI_ADC) \
  204. || defined(CONFIG_BFIN_SPI_ADC_MODULE)
  205. {
  206. .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
  207. .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
  208. .bus_num = 0, /* Framework bus number */
  209. .chip_select = 1, /* Framework chip select. */
  210. .platform_data = NULL, /* No spi_driver specific config */
  211. .controller_data = &spi_adc_chip_info,
  212. },
  213. #endif
  214. #if defined(CONFIG_SND_BLACKFIN_AD183X) \
  215. || defined(CONFIG_SND_BLACKFIN_AD183X_MODULE)
  216. {
  217. .modalias = "ad1836",
  218. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  219. .bus_num = 0,
  220. .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
  221. .controller_data = &ad1836_spi_chip_info,
  222. },
  223. #endif
  224. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  225. {
  226. .modalias = "mmc_spi",
  227. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  228. .bus_num = 0,
  229. .chip_select = 5,
  230. .controller_data = &mmc_spi_chip_info,
  231. .mode = SPI_MODE_3,
  232. },
  233. #endif
  234. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  235. {
  236. .modalias = "ad7877",
  237. .platform_data = &bfin_ad7877_ts_info,
  238. .irq = IRQ_PF2,
  239. .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
  240. .bus_num = 0,
  241. .chip_select = 5,
  242. .controller_data = &spi_ad7877_chip_info,
  243. },
  244. #endif
  245. };
  246. /* SPI (0) */
  247. static struct resource bfin_spi0_resource[] = {
  248. [0] = {
  249. .start = SPI0_REGBASE,
  250. .end = SPI0_REGBASE + 0xFF,
  251. .flags = IORESOURCE_MEM,
  252. },
  253. [1] = {
  254. .start = CH_SPI,
  255. .end = CH_SPI,
  256. .flags = IORESOURCE_DMA,
  257. },
  258. [2] = {
  259. .start = IRQ_SPI,
  260. .end = IRQ_SPI,
  261. .flags = IORESOURCE_IRQ,
  262. },
  263. };
  264. /* SPI controller data */
  265. static struct bfin5xx_spi_master bfin_spi0_info = {
  266. .num_chipselect = 8,
  267. .enable_dma = 1, /* master has the ability to do dma transfer */
  268. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  269. };
  270. static struct platform_device bfin_spi0_device = {
  271. .name = "bfin-spi",
  272. .id = 0, /* Bus number */
  273. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  274. .resource = bfin_spi0_resource,
  275. .dev = {
  276. .platform_data = &bfin_spi0_info, /* Passed to driver */
  277. },
  278. };
  279. #endif /* spi master and devices */
  280. #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
  281. static struct platform_device bfin_fb_device = {
  282. .name = "bf537-lq035",
  283. };
  284. #endif
  285. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  286. #ifdef CONFIG_SERIAL_BFIN_UART0
  287. static struct resource bfin_uart0_resources[] = {
  288. {
  289. .start = UART0_THR,
  290. .end = UART0_GCTL+2,
  291. .flags = IORESOURCE_MEM,
  292. },
  293. {
  294. .start = IRQ_UART0_RX,
  295. .end = IRQ_UART0_RX+1,
  296. .flags = IORESOURCE_IRQ,
  297. },
  298. {
  299. .start = IRQ_UART0_ERROR,
  300. .end = IRQ_UART0_ERROR,
  301. .flags = IORESOURCE_IRQ,
  302. },
  303. {
  304. .start = CH_UART0_TX,
  305. .end = CH_UART0_TX,
  306. .flags = IORESOURCE_DMA,
  307. },
  308. {
  309. .start = CH_UART0_RX,
  310. .end = CH_UART0_RX,
  311. .flags = IORESOURCE_DMA,
  312. },
  313. };
  314. unsigned short bfin_uart0_peripherals[] = {
  315. P_UART0_TX, P_UART0_RX, 0
  316. };
  317. static struct platform_device bfin_uart0_device = {
  318. .name = "bfin-uart",
  319. .id = 0,
  320. .num_resources = ARRAY_SIZE(bfin_uart0_resources),
  321. .resource = bfin_uart0_resources,
  322. .dev = {
  323. .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
  324. },
  325. };
  326. #endif
  327. #ifdef CONFIG_SERIAL_BFIN_UART1
  328. static struct resource bfin_uart1_resources[] = {
  329. {
  330. .start = UART1_THR,
  331. .end = UART1_GCTL+2,
  332. .flags = IORESOURCE_MEM,
  333. },
  334. {
  335. .start = IRQ_UART1_RX,
  336. .end = IRQ_UART1_RX+1,
  337. .flags = IORESOURCE_IRQ,
  338. },
  339. {
  340. .start = IRQ_UART1_ERROR,
  341. .end = IRQ_UART1_ERROR,
  342. .flags = IORESOURCE_IRQ,
  343. },
  344. {
  345. .start = CH_UART1_TX,
  346. .end = CH_UART1_TX,
  347. .flags = IORESOURCE_DMA,
  348. },
  349. {
  350. .start = CH_UART1_RX,
  351. .end = CH_UART1_RX,
  352. .flags = IORESOURCE_DMA,
  353. },
  354. };
  355. unsigned short bfin_uart1_peripherals[] = {
  356. P_UART1_TX, P_UART1_RX, 0
  357. };
  358. static struct platform_device bfin_uart1_device = {
  359. .name = "bfin-uart",
  360. .id = 1,
  361. .num_resources = ARRAY_SIZE(bfin_uart1_resources),
  362. .resource = bfin_uart1_resources,
  363. .dev = {
  364. .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
  365. },
  366. };
  367. #endif
  368. #endif
  369. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  370. #ifdef CONFIG_BFIN_SIR0
  371. static struct resource bfin_sir0_resources[] = {
  372. {
  373. .start = 0xFFC00400,
  374. .end = 0xFFC004FF,
  375. .flags = IORESOURCE_MEM,
  376. },
  377. {
  378. .start = IRQ_UART0_RX,
  379. .end = IRQ_UART0_RX+1,
  380. .flags = IORESOURCE_IRQ,
  381. },
  382. {
  383. .start = CH_UART0_RX,
  384. .end = CH_UART0_RX+1,
  385. .flags = IORESOURCE_DMA,
  386. },
  387. };
  388. static struct platform_device bfin_sir0_device = {
  389. .name = "bfin_sir",
  390. .id = 0,
  391. .num_resources = ARRAY_SIZE(bfin_sir0_resources),
  392. .resource = bfin_sir0_resources,
  393. };
  394. #endif
  395. #ifdef CONFIG_BFIN_SIR1
  396. static struct resource bfin_sir1_resources[] = {
  397. {
  398. .start = 0xFFC02000,
  399. .end = 0xFFC020FF,
  400. .flags = IORESOURCE_MEM,
  401. },
  402. {
  403. .start = IRQ_UART1_RX,
  404. .end = IRQ_UART1_RX+1,
  405. .flags = IORESOURCE_IRQ,
  406. },
  407. {
  408. .start = CH_UART1_RX,
  409. .end = CH_UART1_RX+1,
  410. .flags = IORESOURCE_DMA,
  411. },
  412. };
  413. static struct platform_device bfin_sir1_device = {
  414. .name = "bfin_sir",
  415. .id = 1,
  416. .num_resources = ARRAY_SIZE(bfin_sir1_resources),
  417. .resource = bfin_sir1_resources,
  418. };
  419. #endif
  420. #endif
  421. static struct platform_device *stamp_devices[] __initdata = {
  422. #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
  423. &bfin_pcmcia_cf_device,
  424. #endif
  425. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  426. &rtc_device,
  427. #endif
  428. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  429. &smc91x_device,
  430. #endif
  431. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  432. &bfin_mii_bus,
  433. &bfin_mac_device,
  434. #endif
  435. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  436. &net2272_bfin_device,
  437. #endif
  438. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  439. &bfin_spi0_device,
  440. #endif
  441. #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
  442. &bfin_fb_device,
  443. #endif
  444. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  445. #ifdef CONFIG_SERIAL_BFIN_UART0
  446. &bfin_uart0_device,
  447. #endif
  448. #ifdef CONFIG_SERIAL_BFIN_UART1
  449. &bfin_uart1_device,
  450. #endif
  451. #endif
  452. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  453. #ifdef CONFIG_BFIN_SIR0
  454. &bfin_sir0_device,
  455. #endif
  456. #ifdef CONFIG_BFIN_SIR1
  457. &bfin_sir1_device,
  458. #endif
  459. #endif
  460. };
  461. static int __init pnav_init(void)
  462. {
  463. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  464. platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
  465. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  466. spi_register_board_info(bfin_spi_board_info,
  467. ARRAY_SIZE(bfin_spi_board_info));
  468. #endif
  469. return 0;
  470. }
  471. arch_initcall(pnav_init);
  472. static struct platform_device *stamp_early_devices[] __initdata = {
  473. #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
  474. #ifdef CONFIG_SERIAL_BFIN_UART0
  475. &bfin_uart0_device,
  476. #endif
  477. #ifdef CONFIG_SERIAL_BFIN_UART1
  478. &bfin_uart1_device,
  479. #endif
  480. #endif
  481. };
  482. void __init native_machine_early_platform_add_devices(void)
  483. {
  484. printk(KERN_INFO "register early platform devices\n");
  485. early_platform_add_devices(stamp_early_devices,
  486. ARRAY_SIZE(stamp_early_devices));
  487. }
  488. void bfin_get_ether_addr(char *addr)
  489. {
  490. random_ether_addr(addr);
  491. printk(KERN_WARNING "%s:%s: Setting Ethernet MAC to a random one\n", __FILE__, __func__);
  492. }
  493. EXPORT_SYMBOL(bfin_get_ether_addr);