ezkit.c 29 KB

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  1. /*
  2. * Copyright 2004-2009 Analog Devices Inc.
  3. * 2005 National ICT Australia (NICTA)
  4. * Aidan Williams <aidan@nicta.com.au>
  5. *
  6. * Licensed under the GPL-2 or later.
  7. */
  8. #include <linux/device.h>
  9. #include <linux/platform_device.h>
  10. #include <linux/mtd/mtd.h>
  11. #include <linux/mtd/partitions.h>
  12. #include <linux/mtd/physmap.h>
  13. #include <linux/spi/spi.h>
  14. #include <linux/spi/flash.h>
  15. #include <linux/i2c.h>
  16. #include <linux/irq.h>
  17. #include <linux/interrupt.h>
  18. #include <linux/usb/musb.h>
  19. #include <linux/leds.h>
  20. #include <linux/input.h>
  21. #include <asm/dma.h>
  22. #include <asm/bfin5xx_spi.h>
  23. #include <asm/reboot.h>
  24. #include <asm/nand.h>
  25. #include <asm/portmux.h>
  26. #include <asm/dpmc.h>
  27. #include <linux/spi/ad7877.h>
  28. /*
  29. * Name the Board for the /proc/cpuinfo
  30. */
  31. #ifdef CONFIG_BFIN527_EZKIT_V2
  32. const char bfin_board_name[] = "ADI BF527-EZKIT V2";
  33. #else
  34. const char bfin_board_name[] = "ADI BF527-EZKIT";
  35. #endif
  36. /*
  37. * Driver needs to know address, irq and flag pin.
  38. */
  39. #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
  40. #include <linux/usb/isp1760.h>
  41. static struct resource bfin_isp1760_resources[] = {
  42. [0] = {
  43. .start = 0x203C0000,
  44. .end = 0x203C0000 + 0x000fffff,
  45. .flags = IORESOURCE_MEM,
  46. },
  47. [1] = {
  48. .start = IRQ_PF7,
  49. .end = IRQ_PF7,
  50. .flags = IORESOURCE_IRQ,
  51. },
  52. };
  53. static struct isp1760_platform_data isp1760_priv = {
  54. .is_isp1761 = 0,
  55. .bus_width_16 = 1,
  56. .port1_otg = 0,
  57. .analog_oc = 0,
  58. .dack_polarity_high = 0,
  59. .dreq_polarity_high = 0,
  60. };
  61. static struct platform_device bfin_isp1760_device = {
  62. .name = "isp1760",
  63. .id = 0,
  64. .dev = {
  65. .platform_data = &isp1760_priv,
  66. },
  67. .num_resources = ARRAY_SIZE(bfin_isp1760_resources),
  68. .resource = bfin_isp1760_resources,
  69. };
  70. #endif
  71. #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
  72. static struct resource musb_resources[] = {
  73. [0] = {
  74. .start = 0xffc03800,
  75. .end = 0xffc03cff,
  76. .flags = IORESOURCE_MEM,
  77. },
  78. [1] = { /* general IRQ */
  79. .start = IRQ_USB_INT0,
  80. .end = IRQ_USB_INT0,
  81. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  82. },
  83. [2] = { /* DMA IRQ */
  84. .start = IRQ_USB_DMA,
  85. .end = IRQ_USB_DMA,
  86. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  87. },
  88. };
  89. static struct musb_hdrc_config musb_config = {
  90. .multipoint = 0,
  91. .dyn_fifo = 0,
  92. .soft_con = 1,
  93. .dma = 1,
  94. .num_eps = 8,
  95. .dma_channels = 8,
  96. .gpio_vrsel = GPIO_PG13,
  97. };
  98. static struct musb_hdrc_platform_data musb_plat = {
  99. #if defined(CONFIG_USB_MUSB_OTG)
  100. .mode = MUSB_OTG,
  101. #elif defined(CONFIG_USB_MUSB_HDRC_HCD)
  102. .mode = MUSB_HOST,
  103. #elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
  104. .mode = MUSB_PERIPHERAL,
  105. #endif
  106. .config = &musb_config,
  107. };
  108. static u64 musb_dmamask = ~(u32)0;
  109. static struct platform_device musb_device = {
  110. .name = "musb_hdrc",
  111. .id = 0,
  112. .dev = {
  113. .dma_mask = &musb_dmamask,
  114. .coherent_dma_mask = 0xffffffff,
  115. .platform_data = &musb_plat,
  116. },
  117. .num_resources = ARRAY_SIZE(musb_resources),
  118. .resource = musb_resources,
  119. };
  120. #endif
  121. #if defined(CONFIG_FB_BFIN_T350MCQB) || defined(CONFIG_FB_BFIN_T350MCQB_MODULE)
  122. static struct resource bf52x_t350mcqb_resources[] = {
  123. {
  124. .start = IRQ_PPI_ERROR,
  125. .end = IRQ_PPI_ERROR,
  126. .flags = IORESOURCE_IRQ,
  127. },
  128. };
  129. static struct platform_device bf52x_t350mcqb_device = {
  130. .name = "bfin-t350mcqb",
  131. .id = -1,
  132. .num_resources = ARRAY_SIZE(bf52x_t350mcqb_resources),
  133. .resource = bf52x_t350mcqb_resources,
  134. };
  135. #endif
  136. #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
  137. #include <asm/bfin-lq035q1.h>
  138. static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {
  139. .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
  140. .ppi_mode = USE_RGB565_8_BIT_PPI,
  141. };
  142. static struct resource bfin_lq035q1_resources[] = {
  143. {
  144. .start = IRQ_PPI_ERROR,
  145. .end = IRQ_PPI_ERROR,
  146. .flags = IORESOURCE_IRQ,
  147. },
  148. };
  149. static struct platform_device bfin_lq035q1_device = {
  150. .name = "bfin-lq035q1",
  151. .id = -1,
  152. .num_resources = ARRAY_SIZE(bfin_lq035q1_resources),
  153. .resource = bfin_lq035q1_resources,
  154. .dev = {
  155. .platform_data = &bfin_lq035q1_data,
  156. },
  157. };
  158. #endif
  159. #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  160. static struct mtd_partition ezkit_partitions[] = {
  161. {
  162. .name = "bootloader(nor)",
  163. .size = 0x40000,
  164. .offset = 0,
  165. }, {
  166. .name = "linux kernel(nor)",
  167. .size = 0x1C0000,
  168. .offset = MTDPART_OFS_APPEND,
  169. }, {
  170. .name = "file system(nor)",
  171. .size = MTDPART_SIZ_FULL,
  172. .offset = MTDPART_OFS_APPEND,
  173. }
  174. };
  175. static struct physmap_flash_data ezkit_flash_data = {
  176. .width = 2,
  177. .parts = ezkit_partitions,
  178. .nr_parts = ARRAY_SIZE(ezkit_partitions),
  179. };
  180. static struct resource ezkit_flash_resource = {
  181. .start = 0x20000000,
  182. .end = 0x203fffff,
  183. .flags = IORESOURCE_MEM,
  184. };
  185. static struct platform_device ezkit_flash_device = {
  186. .name = "physmap-flash",
  187. .id = 0,
  188. .dev = {
  189. .platform_data = &ezkit_flash_data,
  190. },
  191. .num_resources = 1,
  192. .resource = &ezkit_flash_resource,
  193. };
  194. #endif
  195. #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
  196. static struct mtd_partition partition_info[] = {
  197. {
  198. .name = "linux kernel(nand)",
  199. .offset = 0,
  200. .size = 4 * 1024 * 1024,
  201. },
  202. {
  203. .name = "file system(nand)",
  204. .offset = MTDPART_OFS_APPEND,
  205. .size = MTDPART_SIZ_FULL,
  206. },
  207. };
  208. static struct bf5xx_nand_platform bf5xx_nand_platform = {
  209. .page_size = NFC_PG_SIZE_256,
  210. .data_width = NFC_NWIDTH_8,
  211. .partitions = partition_info,
  212. .nr_partitions = ARRAY_SIZE(partition_info),
  213. .rd_dly = 3,
  214. .wr_dly = 3,
  215. };
  216. static struct resource bf5xx_nand_resources[] = {
  217. {
  218. .start = NFC_CTL,
  219. .end = NFC_DATA_RD + 2,
  220. .flags = IORESOURCE_MEM,
  221. },
  222. {
  223. .start = CH_NFC,
  224. .end = CH_NFC,
  225. .flags = IORESOURCE_IRQ,
  226. },
  227. };
  228. static struct platform_device bf5xx_nand_device = {
  229. .name = "bf5xx-nand",
  230. .id = 0,
  231. .num_resources = ARRAY_SIZE(bf5xx_nand_resources),
  232. .resource = bf5xx_nand_resources,
  233. .dev = {
  234. .platform_data = &bf5xx_nand_platform,
  235. },
  236. };
  237. #endif
  238. #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
  239. static struct resource bfin_pcmcia_cf_resources[] = {
  240. {
  241. .start = 0x20310000, /* IO PORT */
  242. .end = 0x20312000,
  243. .flags = IORESOURCE_MEM,
  244. }, {
  245. .start = 0x20311000, /* Attribute Memory */
  246. .end = 0x20311FFF,
  247. .flags = IORESOURCE_MEM,
  248. }, {
  249. .start = IRQ_PF4,
  250. .end = IRQ_PF4,
  251. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
  252. }, {
  253. .start = 6, /* Card Detect PF6 */
  254. .end = 6,
  255. .flags = IORESOURCE_IRQ,
  256. },
  257. };
  258. static struct platform_device bfin_pcmcia_cf_device = {
  259. .name = "bfin_cf_pcmcia",
  260. .id = -1,
  261. .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
  262. .resource = bfin_pcmcia_cf_resources,
  263. };
  264. #endif
  265. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  266. static struct platform_device rtc_device = {
  267. .name = "rtc-bfin",
  268. .id = -1,
  269. };
  270. #endif
  271. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  272. #include <linux/smc91x.h>
  273. static struct smc91x_platdata smc91x_info = {
  274. .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
  275. .leda = RPC_LED_100_10,
  276. .ledb = RPC_LED_TX_RX,
  277. };
  278. static struct resource smc91x_resources[] = {
  279. {
  280. .name = "smc91x-regs",
  281. .start = 0x20300300,
  282. .end = 0x20300300 + 16,
  283. .flags = IORESOURCE_MEM,
  284. }, {
  285. .start = IRQ_PF7,
  286. .end = IRQ_PF7,
  287. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  288. },
  289. };
  290. static struct platform_device smc91x_device = {
  291. .name = "smc91x",
  292. .id = 0,
  293. .num_resources = ARRAY_SIZE(smc91x_resources),
  294. .resource = smc91x_resources,
  295. .dev = {
  296. .platform_data = &smc91x_info,
  297. },
  298. };
  299. #endif
  300. #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
  301. static struct resource dm9000_resources[] = {
  302. [0] = {
  303. .start = 0x203FB800,
  304. .end = 0x203FB800 + 1,
  305. .flags = IORESOURCE_MEM,
  306. },
  307. [1] = {
  308. .start = 0x203FB800 + 4,
  309. .end = 0x203FB800 + 5,
  310. .flags = IORESOURCE_MEM,
  311. },
  312. [2] = {
  313. .start = IRQ_PF9,
  314. .end = IRQ_PF9,
  315. .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE),
  316. },
  317. };
  318. static struct platform_device dm9000_device = {
  319. .name = "dm9000",
  320. .id = -1,
  321. .num_resources = ARRAY_SIZE(dm9000_resources),
  322. .resource = dm9000_resources,
  323. };
  324. #endif
  325. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  326. static struct platform_device bfin_mii_bus = {
  327. .name = "bfin_mii_bus",
  328. };
  329. static struct platform_device bfin_mac_device = {
  330. .name = "bfin_mac",
  331. .dev.platform_data = &bfin_mii_bus,
  332. };
  333. #endif
  334. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  335. static struct resource net2272_bfin_resources[] = {
  336. {
  337. .start = 0x20300000,
  338. .end = 0x20300000 + 0x100,
  339. .flags = IORESOURCE_MEM,
  340. }, {
  341. .start = IRQ_PF7,
  342. .end = IRQ_PF7,
  343. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  344. },
  345. };
  346. static struct platform_device net2272_bfin_device = {
  347. .name = "net2272",
  348. .id = -1,
  349. .num_resources = ARRAY_SIZE(net2272_bfin_resources),
  350. .resource = net2272_bfin_resources,
  351. };
  352. #endif
  353. #if defined(CONFIG_MTD_M25P80) \
  354. || defined(CONFIG_MTD_M25P80_MODULE)
  355. static struct mtd_partition bfin_spi_flash_partitions[] = {
  356. {
  357. .name = "bootloader(spi)",
  358. .size = 0x00040000,
  359. .offset = 0,
  360. .mask_flags = MTD_CAP_ROM
  361. }, {
  362. .name = "linux kernel(spi)",
  363. .size = MTDPART_SIZ_FULL,
  364. .offset = MTDPART_OFS_APPEND,
  365. }
  366. };
  367. static struct flash_platform_data bfin_spi_flash_data = {
  368. .name = "m25p80",
  369. .parts = bfin_spi_flash_partitions,
  370. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  371. .type = "m25p16",
  372. };
  373. /* SPI flash chip (m25p64) */
  374. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  375. .enable_dma = 0, /* use dma transfer with this chip*/
  376. .bits_per_word = 8,
  377. };
  378. #endif
  379. #if defined(CONFIG_BFIN_SPI_ADC) \
  380. || defined(CONFIG_BFIN_SPI_ADC_MODULE)
  381. /* SPI ADC chip */
  382. static struct bfin5xx_spi_chip spi_adc_chip_info = {
  383. .enable_dma = 1, /* use dma transfer with this chip*/
  384. .bits_per_word = 16,
  385. };
  386. #endif
  387. #if defined(CONFIG_SND_BLACKFIN_AD183X) \
  388. || defined(CONFIG_SND_BLACKFIN_AD183X_MODULE)
  389. static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
  390. .enable_dma = 0,
  391. .bits_per_word = 16,
  392. };
  393. #endif
  394. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  395. static struct bfin5xx_spi_chip mmc_spi_chip_info = {
  396. .enable_dma = 0,
  397. .bits_per_word = 8,
  398. };
  399. #endif
  400. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  401. static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
  402. .enable_dma = 0,
  403. .bits_per_word = 16,
  404. };
  405. static const struct ad7877_platform_data bfin_ad7877_ts_info = {
  406. .model = 7877,
  407. .vref_delay_usecs = 50, /* internal, no capacitor */
  408. .x_plate_ohms = 419,
  409. .y_plate_ohms = 486,
  410. .pressure_max = 1000,
  411. .pressure_min = 0,
  412. .stopacq_polarity = 1,
  413. .first_conversion_delay = 3,
  414. .acquisition_time = 1,
  415. .averaging = 1,
  416. .pen_down_acc_interval = 1,
  417. };
  418. #endif
  419. #if defined(CONFIG_TOUCHSCREEN_AD7879) || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE)
  420. #include <linux/spi/ad7879.h>
  421. static const struct ad7879_platform_data bfin_ad7879_ts_info = {
  422. .model = 7879, /* Model = AD7879 */
  423. .x_plate_ohms = 620, /* 620 Ohm from the touch datasheet */
  424. .pressure_max = 10000,
  425. .pressure_min = 0,
  426. .first_conversion_delay = 3, /* wait 512us before do a first conversion */
  427. .acquisition_time = 1, /* 4us acquisition time per sample */
  428. .median = 2, /* do 8 measurements */
  429. .averaging = 1, /* take the average of 4 middle samples */
  430. .pen_down_acc_interval = 255, /* 9.4 ms */
  431. .gpio_export = 0, /* Export GPIO to gpiolib */
  432. };
  433. #endif
  434. #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
  435. static struct bfin5xx_spi_chip spi_ad7879_chip_info = {
  436. .enable_dma = 0,
  437. .bits_per_word = 16,
  438. };
  439. #endif
  440. #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
  441. static struct bfin5xx_spi_chip spidev_chip_info = {
  442. .enable_dma = 0,
  443. .bits_per_word = 8,
  444. };
  445. #endif
  446. #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
  447. static struct platform_device bfin_i2s = {
  448. .name = "bfin-i2s",
  449. .id = CONFIG_SND_BF5XX_SPORT_NUM,
  450. /* TODO: add platform data here */
  451. };
  452. #endif
  453. #if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
  454. static struct platform_device bfin_tdm = {
  455. .name = "bfin-tdm",
  456. .id = CONFIG_SND_BF5XX_SPORT_NUM,
  457. /* TODO: add platform data here */
  458. };
  459. #endif
  460. #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
  461. static struct bfin5xx_spi_chip lq035q1_spi_chip_info = {
  462. .enable_dma = 0,
  463. .bits_per_word = 8,
  464. };
  465. #endif
  466. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  467. #if defined(CONFIG_MTD_M25P80) \
  468. || defined(CONFIG_MTD_M25P80_MODULE)
  469. {
  470. /* the modalias must be the same as spi device driver name */
  471. .modalias = "m25p80", /* Name of spi_driver for this device */
  472. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  473. .bus_num = 0, /* Framework bus number */
  474. .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
  475. .platform_data = &bfin_spi_flash_data,
  476. .controller_data = &spi_flash_chip_info,
  477. .mode = SPI_MODE_3,
  478. },
  479. #endif
  480. #if defined(CONFIG_BFIN_SPI_ADC) \
  481. || defined(CONFIG_BFIN_SPI_ADC_MODULE)
  482. {
  483. .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
  484. .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
  485. .bus_num = 0, /* Framework bus number */
  486. .chip_select = 1, /* Framework chip select. */
  487. .platform_data = NULL, /* No spi_driver specific config */
  488. .controller_data = &spi_adc_chip_info,
  489. },
  490. #endif
  491. #if defined(CONFIG_SND_BLACKFIN_AD183X) \
  492. || defined(CONFIG_SND_BLACKFIN_AD183X_MODULE)
  493. {
  494. .modalias = "ad1836",
  495. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  496. .bus_num = 0,
  497. .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
  498. .controller_data = &ad1836_spi_chip_info,
  499. },
  500. #endif
  501. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  502. {
  503. .modalias = "mmc_spi",
  504. .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
  505. .bus_num = 0,
  506. .chip_select = 3,
  507. .controller_data = &mmc_spi_chip_info,
  508. .mode = SPI_MODE_0,
  509. },
  510. #endif
  511. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  512. {
  513. .modalias = "ad7877",
  514. .platform_data = &bfin_ad7877_ts_info,
  515. .irq = IRQ_PF8,
  516. .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
  517. .bus_num = 0,
  518. .chip_select = 2,
  519. .controller_data = &spi_ad7877_chip_info,
  520. },
  521. #endif
  522. #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
  523. {
  524. .modalias = "ad7879",
  525. .platform_data = &bfin_ad7879_ts_info,
  526. .irq = IRQ_PF8,
  527. .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
  528. .bus_num = 0,
  529. .chip_select = 3,
  530. .controller_data = &spi_ad7879_chip_info,
  531. .mode = SPI_CPHA | SPI_CPOL,
  532. },
  533. #endif
  534. #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
  535. {
  536. .modalias = "spidev",
  537. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  538. .bus_num = 0,
  539. .chip_select = 1,
  540. .controller_data = &spidev_chip_info,
  541. },
  542. #endif
  543. #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
  544. {
  545. .modalias = "bfin-lq035q1-spi",
  546. .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
  547. .bus_num = 0,
  548. .chip_select = 7,
  549. .controller_data = &lq035q1_spi_chip_info,
  550. .mode = SPI_CPHA | SPI_CPOL,
  551. },
  552. #endif
  553. };
  554. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  555. /* SPI controller data */
  556. static struct bfin5xx_spi_master bfin_spi0_info = {
  557. .num_chipselect = 8,
  558. .enable_dma = 1, /* master has the ability to do dma transfer */
  559. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  560. };
  561. /* SPI (0) */
  562. static struct resource bfin_spi0_resource[] = {
  563. [0] = {
  564. .start = SPI0_REGBASE,
  565. .end = SPI0_REGBASE + 0xFF,
  566. .flags = IORESOURCE_MEM,
  567. },
  568. [1] = {
  569. .start = CH_SPI,
  570. .end = CH_SPI,
  571. .flags = IORESOURCE_DMA,
  572. },
  573. [2] = {
  574. .start = IRQ_SPI,
  575. .end = IRQ_SPI,
  576. .flags = IORESOURCE_IRQ,
  577. },
  578. };
  579. static struct platform_device bfin_spi0_device = {
  580. .name = "bfin-spi",
  581. .id = 0, /* Bus number */
  582. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  583. .resource = bfin_spi0_resource,
  584. .dev = {
  585. .platform_data = &bfin_spi0_info, /* Passed to driver */
  586. },
  587. };
  588. #endif /* spi master and devices */
  589. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  590. #ifdef CONFIG_SERIAL_BFIN_UART0
  591. static struct resource bfin_uart0_resources[] = {
  592. {
  593. .start = UART0_THR,
  594. .end = UART0_GCTL+2,
  595. .flags = IORESOURCE_MEM,
  596. },
  597. {
  598. .start = IRQ_UART0_RX,
  599. .end = IRQ_UART0_RX+1,
  600. .flags = IORESOURCE_IRQ,
  601. },
  602. {
  603. .start = IRQ_UART0_ERROR,
  604. .end = IRQ_UART0_ERROR,
  605. .flags = IORESOURCE_IRQ,
  606. },
  607. {
  608. .start = CH_UART0_TX,
  609. .end = CH_UART0_TX,
  610. .flags = IORESOURCE_DMA,
  611. },
  612. {
  613. .start = CH_UART0_RX,
  614. .end = CH_UART0_RX,
  615. .flags = IORESOURCE_DMA,
  616. },
  617. };
  618. unsigned short bfin_uart0_peripherals[] = {
  619. P_UART0_TX, P_UART0_RX, 0
  620. };
  621. static struct platform_device bfin_uart0_device = {
  622. .name = "bfin-uart",
  623. .id = 0,
  624. .num_resources = ARRAY_SIZE(bfin_uart0_resources),
  625. .resource = bfin_uart0_resources,
  626. .dev = {
  627. .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
  628. },
  629. };
  630. #endif
  631. #ifdef CONFIG_SERIAL_BFIN_UART1
  632. static struct resource bfin_uart1_resources[] = {
  633. {
  634. .start = UART1_THR,
  635. .end = UART1_GCTL+2,
  636. .flags = IORESOURCE_MEM,
  637. },
  638. {
  639. .start = IRQ_UART1_RX,
  640. .end = IRQ_UART1_RX+1,
  641. .flags = IORESOURCE_IRQ,
  642. },
  643. {
  644. .start = IRQ_UART1_ERROR,
  645. .end = IRQ_UART1_ERROR,
  646. .flags = IORESOURCE_IRQ,
  647. },
  648. {
  649. .start = CH_UART1_TX,
  650. .end = CH_UART1_TX,
  651. .flags = IORESOURCE_DMA,
  652. },
  653. {
  654. .start = CH_UART1_RX,
  655. .end = CH_UART1_RX,
  656. .flags = IORESOURCE_DMA,
  657. },
  658. #ifdef CONFIG_BFIN_UART1_CTSRTS
  659. { /* CTS pin */
  660. .start = GPIO_PF9,
  661. .end = GPIO_PF9,
  662. .flags = IORESOURCE_IO,
  663. },
  664. { /* RTS pin */
  665. .start = GPIO_PF10,
  666. .end = GPIO_PF10,
  667. .flags = IORESOURCE_IO,
  668. },
  669. #endif
  670. };
  671. unsigned short bfin_uart1_peripherals[] = {
  672. P_UART1_TX, P_UART1_RX, 0
  673. };
  674. static struct platform_device bfin_uart1_device = {
  675. .name = "bfin-uart",
  676. .id = 1,
  677. .num_resources = ARRAY_SIZE(bfin_uart1_resources),
  678. .resource = bfin_uart1_resources,
  679. .dev = {
  680. .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
  681. },
  682. };
  683. #endif
  684. #endif
  685. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  686. #ifdef CONFIG_BFIN_SIR0
  687. static struct resource bfin_sir0_resources[] = {
  688. {
  689. .start = 0xFFC00400,
  690. .end = 0xFFC004FF,
  691. .flags = IORESOURCE_MEM,
  692. },
  693. {
  694. .start = IRQ_UART0_RX,
  695. .end = IRQ_UART0_RX+1,
  696. .flags = IORESOURCE_IRQ,
  697. },
  698. {
  699. .start = CH_UART0_RX,
  700. .end = CH_UART0_RX+1,
  701. .flags = IORESOURCE_DMA,
  702. },
  703. };
  704. static struct platform_device bfin_sir0_device = {
  705. .name = "bfin_sir",
  706. .id = 0,
  707. .num_resources = ARRAY_SIZE(bfin_sir0_resources),
  708. .resource = bfin_sir0_resources,
  709. };
  710. #endif
  711. #ifdef CONFIG_BFIN_SIR1
  712. static struct resource bfin_sir1_resources[] = {
  713. {
  714. .start = 0xFFC02000,
  715. .end = 0xFFC020FF,
  716. .flags = IORESOURCE_MEM,
  717. },
  718. {
  719. .start = IRQ_UART1_RX,
  720. .end = IRQ_UART1_RX+1,
  721. .flags = IORESOURCE_IRQ,
  722. },
  723. {
  724. .start = CH_UART1_RX,
  725. .end = CH_UART1_RX+1,
  726. .flags = IORESOURCE_DMA,
  727. },
  728. };
  729. static struct platform_device bfin_sir1_device = {
  730. .name = "bfin_sir",
  731. .id = 1,
  732. .num_resources = ARRAY_SIZE(bfin_sir1_resources),
  733. .resource = bfin_sir1_resources,
  734. };
  735. #endif
  736. #endif
  737. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  738. static struct resource bfin_twi0_resource[] = {
  739. [0] = {
  740. .start = TWI0_REGBASE,
  741. .end = TWI0_REGBASE,
  742. .flags = IORESOURCE_MEM,
  743. },
  744. [1] = {
  745. .start = IRQ_TWI,
  746. .end = IRQ_TWI,
  747. .flags = IORESOURCE_IRQ,
  748. },
  749. };
  750. static struct platform_device i2c_bfin_twi_device = {
  751. .name = "i2c-bfin-twi",
  752. .id = 0,
  753. .num_resources = ARRAY_SIZE(bfin_twi0_resource),
  754. .resource = bfin_twi0_resource,
  755. };
  756. #endif
  757. #if defined(CONFIG_PMIC_ADP5520) || defined(CONFIG_PMIC_ADP5520_MODULE)
  758. #include <linux/mfd/adp5520.h>
  759. /*
  760. * ADP5520/5501 LEDs Data
  761. */
  762. static struct led_info adp5520_leds[] = {
  763. {
  764. .name = "adp5520-led1",
  765. .default_trigger = "none",
  766. .flags = FLAG_ID_ADP5520_LED1_ADP5501_LED0 | ADP5520_LED_OFFT_600ms,
  767. },
  768. };
  769. static struct adp5520_leds_platform_data adp5520_leds_data = {
  770. .num_leds = ARRAY_SIZE(adp5520_leds),
  771. .leds = adp5520_leds,
  772. .fade_in = ADP5520_FADE_T_600ms,
  773. .fade_out = ADP5520_FADE_T_600ms,
  774. .led_on_time = ADP5520_LED_ONT_600ms,
  775. };
  776. /*
  777. * ADP5520 Keypad Data
  778. */
  779. static const unsigned short adp5520_keymap[ADP5520_KEYMAPSIZE] = {
  780. [ADP5520_KEY(3, 3)] = KEY_1,
  781. [ADP5520_KEY(2, 3)] = KEY_2,
  782. [ADP5520_KEY(1, 3)] = KEY_3,
  783. [ADP5520_KEY(0, 3)] = KEY_UP,
  784. [ADP5520_KEY(3, 2)] = KEY_4,
  785. [ADP5520_KEY(2, 2)] = KEY_5,
  786. [ADP5520_KEY(1, 2)] = KEY_6,
  787. [ADP5520_KEY(0, 2)] = KEY_DOWN,
  788. [ADP5520_KEY(3, 1)] = KEY_7,
  789. [ADP5520_KEY(2, 1)] = KEY_8,
  790. [ADP5520_KEY(1, 1)] = KEY_9,
  791. [ADP5520_KEY(0, 1)] = KEY_DOT,
  792. [ADP5520_KEY(3, 0)] = KEY_BACKSPACE,
  793. [ADP5520_KEY(2, 0)] = KEY_0,
  794. [ADP5520_KEY(1, 0)] = KEY_HELP,
  795. [ADP5520_KEY(0, 0)] = KEY_ENTER,
  796. };
  797. static struct adp5520_keys_platform_data adp5520_keys_data = {
  798. .rows_en_mask = ADP5520_ROW_R3 | ADP5520_ROW_R2 | ADP5520_ROW_R1 | ADP5520_ROW_R0,
  799. .cols_en_mask = ADP5520_COL_C3 | ADP5520_COL_C2 | ADP5520_COL_C1 | ADP5520_COL_C0,
  800. .keymap = adp5520_keymap,
  801. .keymapsize = ARRAY_SIZE(adp5520_keymap),
  802. .repeat = 0,
  803. };
  804. /*
  805. * ADP5520/5501 Multifuction Device Init Data
  806. */
  807. static struct adp5520_platform_data adp5520_pdev_data = {
  808. .leds = &adp5520_leds_data,
  809. .keys = &adp5520_keys_data,
  810. };
  811. #endif
  812. static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
  813. #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
  814. {
  815. I2C_BOARD_INFO("pcf8574_lcd", 0x22),
  816. },
  817. #endif
  818. #if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
  819. {
  820. I2C_BOARD_INFO("pcf8574_keypad", 0x27),
  821. .irq = IRQ_PF8,
  822. },
  823. #endif
  824. #if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
  825. {
  826. I2C_BOARD_INFO("bfin-adv7393", 0x2B),
  827. },
  828. #endif
  829. #if defined(CONFIG_TOUCHSCREEN_AD7879_I2C) || defined(CONFIG_TOUCHSCREEN_AD7879_I2C_MODULE)
  830. {
  831. I2C_BOARD_INFO("ad7879", 0x2C),
  832. .irq = IRQ_PF8,
  833. .platform_data = (void *)&bfin_ad7879_ts_info,
  834. },
  835. #endif
  836. #if defined(CONFIG_PMIC_ADP5520) || defined(CONFIG_PMIC_ADP5520_MODULE)
  837. {
  838. I2C_BOARD_INFO("pmic-adp5520", 0x32),
  839. .irq = IRQ_PF9,
  840. .platform_data = (void *)&adp5520_pdev_data,
  841. },
  842. #endif
  843. #if defined(CONFIG_SND_SOC_SSM2602) || defined(CONFIG_SND_SOC_SSM2602_MODULE)
  844. {
  845. I2C_BOARD_INFO("ssm2602", 0x1b),
  846. },
  847. #endif
  848. };
  849. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  850. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  851. static struct resource bfin_sport0_uart_resources[] = {
  852. {
  853. .start = SPORT0_TCR1,
  854. .end = SPORT0_MRCS3+4,
  855. .flags = IORESOURCE_MEM,
  856. },
  857. {
  858. .start = IRQ_SPORT0_RX,
  859. .end = IRQ_SPORT0_RX+1,
  860. .flags = IORESOURCE_IRQ,
  861. },
  862. {
  863. .start = IRQ_SPORT0_ERROR,
  864. .end = IRQ_SPORT0_ERROR,
  865. .flags = IORESOURCE_IRQ,
  866. },
  867. };
  868. unsigned short bfin_sport0_peripherals[] = {
  869. P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
  870. P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
  871. };
  872. static struct platform_device bfin_sport0_uart_device = {
  873. .name = "bfin-sport-uart",
  874. .id = 0,
  875. .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
  876. .resource = bfin_sport0_uart_resources,
  877. .dev = {
  878. .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
  879. },
  880. };
  881. #endif
  882. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  883. static struct resource bfin_sport1_uart_resources[] = {
  884. {
  885. .start = SPORT1_TCR1,
  886. .end = SPORT1_MRCS3+4,
  887. .flags = IORESOURCE_MEM,
  888. },
  889. {
  890. .start = IRQ_SPORT1_RX,
  891. .end = IRQ_SPORT1_RX+1,
  892. .flags = IORESOURCE_IRQ,
  893. },
  894. {
  895. .start = IRQ_SPORT1_ERROR,
  896. .end = IRQ_SPORT1_ERROR,
  897. .flags = IORESOURCE_IRQ,
  898. },
  899. };
  900. unsigned short bfin_sport1_peripherals[] = {
  901. P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
  902. P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0
  903. };
  904. static struct platform_device bfin_sport1_uart_device = {
  905. .name = "bfin-sport-uart",
  906. .id = 1,
  907. .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
  908. .resource = bfin_sport1_uart_resources,
  909. .dev = {
  910. .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
  911. },
  912. };
  913. #endif
  914. #endif
  915. #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
  916. #include <linux/gpio_keys.h>
  917. static struct gpio_keys_button bfin_gpio_keys_table[] = {
  918. {BTN_0, GPIO_PG0, 1, "gpio-keys: BTN0"},
  919. {BTN_1, GPIO_PG13, 1, "gpio-keys: BTN1"},
  920. };
  921. static struct gpio_keys_platform_data bfin_gpio_keys_data = {
  922. .buttons = bfin_gpio_keys_table,
  923. .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
  924. };
  925. static struct platform_device bfin_device_gpiokeys = {
  926. .name = "gpio-keys",
  927. .dev = {
  928. .platform_data = &bfin_gpio_keys_data,
  929. },
  930. };
  931. #endif
  932. #if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE)
  933. #include <asm/bfin_rotary.h>
  934. static struct bfin_rotary_platform_data bfin_rotary_data = {
  935. /*.rotary_up_key = KEY_UP,*/
  936. /*.rotary_down_key = KEY_DOWN,*/
  937. .rotary_rel_code = REL_WHEEL,
  938. .rotary_button_key = KEY_ENTER,
  939. .debounce = 10, /* 0..17 */
  940. .mode = ROT_QUAD_ENC | ROT_DEBE,
  941. };
  942. static struct resource bfin_rotary_resources[] = {
  943. {
  944. .start = IRQ_CNT,
  945. .end = IRQ_CNT,
  946. .flags = IORESOURCE_IRQ,
  947. },
  948. };
  949. static struct platform_device bfin_rotary_device = {
  950. .name = "bfin-rotary",
  951. .id = -1,
  952. .num_resources = ARRAY_SIZE(bfin_rotary_resources),
  953. .resource = bfin_rotary_resources,
  954. .dev = {
  955. .platform_data = &bfin_rotary_data,
  956. },
  957. };
  958. #endif
  959. static const unsigned int cclk_vlev_datasheet[] =
  960. {
  961. VRPAIR(VLEV_100, 400000000),
  962. VRPAIR(VLEV_105, 426000000),
  963. VRPAIR(VLEV_110, 500000000),
  964. VRPAIR(VLEV_115, 533000000),
  965. VRPAIR(VLEV_120, 600000000),
  966. };
  967. static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
  968. .tuple_tab = cclk_vlev_datasheet,
  969. .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
  970. .vr_settling_time = 25 /* us */,
  971. };
  972. static struct platform_device bfin_dpmc = {
  973. .name = "bfin dpmc",
  974. .dev = {
  975. .platform_data = &bfin_dmpc_vreg_data,
  976. },
  977. };
  978. static struct platform_device *stamp_devices[] __initdata = {
  979. &bfin_dpmc,
  980. #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
  981. &bf5xx_nand_device,
  982. #endif
  983. #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
  984. &bfin_pcmcia_cf_device,
  985. #endif
  986. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  987. &rtc_device,
  988. #endif
  989. #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
  990. &bfin_isp1760_device,
  991. #endif
  992. #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
  993. &musb_device,
  994. #endif
  995. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  996. &smc91x_device,
  997. #endif
  998. #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
  999. &dm9000_device,
  1000. #endif
  1001. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  1002. &bfin_mii_bus,
  1003. &bfin_mac_device,
  1004. #endif
  1005. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  1006. &net2272_bfin_device,
  1007. #endif
  1008. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  1009. &bfin_spi0_device,
  1010. #endif
  1011. #if defined(CONFIG_FB_BFIN_T350MCQB) || defined(CONFIG_FB_BFIN_T350MCQB_MODULE)
  1012. &bf52x_t350mcqb_device,
  1013. #endif
  1014. #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
  1015. &bfin_lq035q1_device,
  1016. #endif
  1017. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  1018. #ifdef CONFIG_SERIAL_BFIN_UART0
  1019. &bfin_uart0_device,
  1020. #endif
  1021. #ifdef CONFIG_SERIAL_BFIN_UART1
  1022. &bfin_uart1_device,
  1023. #endif
  1024. #endif
  1025. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  1026. #ifdef CONFIG_BFIN_SIR0
  1027. &bfin_sir0_device,
  1028. #endif
  1029. #ifdef CONFIG_BFIN_SIR1
  1030. &bfin_sir1_device,
  1031. #endif
  1032. #endif
  1033. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  1034. &i2c_bfin_twi_device,
  1035. #endif
  1036. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  1037. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  1038. &bfin_sport0_uart_device,
  1039. #endif
  1040. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  1041. &bfin_sport1_uart_device,
  1042. #endif
  1043. #endif
  1044. #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
  1045. &bfin_device_gpiokeys,
  1046. #endif
  1047. #if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE)
  1048. &bfin_rotary_device,
  1049. #endif
  1050. #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  1051. &ezkit_flash_device,
  1052. #endif
  1053. #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
  1054. &bfin_i2s,
  1055. #endif
  1056. #if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
  1057. &bfin_tdm,
  1058. #endif
  1059. };
  1060. static int __init ezkit_init(void)
  1061. {
  1062. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  1063. i2c_register_board_info(0, bfin_i2c_board_info,
  1064. ARRAY_SIZE(bfin_i2c_board_info));
  1065. platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
  1066. spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
  1067. return 0;
  1068. }
  1069. arch_initcall(ezkit_init);
  1070. static struct platform_device *ezkit_early_devices[] __initdata = {
  1071. #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
  1072. #ifdef CONFIG_SERIAL_BFIN_UART0
  1073. &bfin_uart0_device,
  1074. #endif
  1075. #ifdef CONFIG_SERIAL_BFIN_UART1
  1076. &bfin_uart1_device,
  1077. #endif
  1078. #endif
  1079. #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
  1080. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  1081. &bfin_sport0_uart_device,
  1082. #endif
  1083. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  1084. &bfin_sport1_uart_device,
  1085. #endif
  1086. #endif
  1087. };
  1088. void __init native_machine_early_platform_add_devices(void)
  1089. {
  1090. printk(KERN_INFO "register early platform devices\n");
  1091. early_platform_add_devices(ezkit_early_devices,
  1092. ARRAY_SIZE(ezkit_early_devices));
  1093. }
  1094. void native_machine_restart(char *cmd)
  1095. {
  1096. /* workaround reboot hang when booting from SPI */
  1097. if ((bfin_read_SYSCR() & 0x7) == 0x3)
  1098. bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
  1099. }
  1100. void bfin_get_ether_addr(char *addr)
  1101. {
  1102. /* the MAC is stored in OTP memory page 0xDF */
  1103. u32 ret;
  1104. u64 otp_mac;
  1105. u32 (*otp_read)(u32 page, u32 flags, u64 *page_content) = (void *)0xEF00001A;
  1106. ret = otp_read(0xDF, 0x00, &otp_mac);
  1107. if (!(ret & 0x1)) {
  1108. char *otp_mac_p = (char *)&otp_mac;
  1109. for (ret = 0; ret < 6; ++ret)
  1110. addr[ret] = otp_mac_p[5 - ret];
  1111. }
  1112. }
  1113. EXPORT_SYMBOL(bfin_get_ether_addr);