cm_bf527.c 23 KB

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  1. /*
  2. * Copyright 2004-2009 Analog Devices Inc.
  3. * 2008-2009 Bluetechnix
  4. * 2005 National ICT Australia (NICTA)
  5. * Aidan Williams <aidan@nicta.com.au>
  6. *
  7. * Licensed under the GPL-2 or later.
  8. */
  9. #include <linux/device.h>
  10. #include <linux/platform_device.h>
  11. #include <linux/mtd/mtd.h>
  12. #include <linux/mtd/partitions.h>
  13. #include <linux/mtd/physmap.h>
  14. #include <linux/spi/spi.h>
  15. #include <linux/spi/flash.h>
  16. #include <linux/etherdevice.h>
  17. #include <linux/i2c.h>
  18. #include <linux/irq.h>
  19. #include <linux/interrupt.h>
  20. #include <linux/usb/musb.h>
  21. #include <asm/dma.h>
  22. #include <asm/bfin5xx_spi.h>
  23. #include <asm/reboot.h>
  24. #include <asm/nand.h>
  25. #include <asm/portmux.h>
  26. #include <asm/dpmc.h>
  27. #include <linux/spi/ad7877.h>
  28. /*
  29. * Name the Board for the /proc/cpuinfo
  30. */
  31. const char bfin_board_name[] = "Bluetechnix CM-BF527";
  32. /*
  33. * Driver needs to know address, irq and flag pin.
  34. */
  35. #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
  36. #include <linux/usb/isp1760.h>
  37. static struct resource bfin_isp1760_resources[] = {
  38. [0] = {
  39. .start = 0x203C0000,
  40. .end = 0x203C0000 + 0x000fffff,
  41. .flags = IORESOURCE_MEM,
  42. },
  43. [1] = {
  44. .start = IRQ_PF7,
  45. .end = IRQ_PF7,
  46. .flags = IORESOURCE_IRQ,
  47. },
  48. };
  49. static struct isp1760_platform_data isp1760_priv = {
  50. .is_isp1761 = 0,
  51. .bus_width_16 = 1,
  52. .port1_otg = 0,
  53. .analog_oc = 0,
  54. .dack_polarity_high = 0,
  55. .dreq_polarity_high = 0,
  56. };
  57. static struct platform_device bfin_isp1760_device = {
  58. .name = "isp1760",
  59. .id = 0,
  60. .dev = {
  61. .platform_data = &isp1760_priv,
  62. },
  63. .num_resources = ARRAY_SIZE(bfin_isp1760_resources),
  64. .resource = bfin_isp1760_resources,
  65. };
  66. #endif
  67. #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
  68. static struct resource musb_resources[] = {
  69. [0] = {
  70. .start = 0xffc03800,
  71. .end = 0xffc03cff,
  72. .flags = IORESOURCE_MEM,
  73. },
  74. [1] = { /* general IRQ */
  75. .start = IRQ_USB_INT0,
  76. .end = IRQ_USB_INT0,
  77. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  78. },
  79. [2] = { /* DMA IRQ */
  80. .start = IRQ_USB_DMA,
  81. .end = IRQ_USB_DMA,
  82. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  83. },
  84. };
  85. static struct musb_hdrc_config musb_config = {
  86. .multipoint = 0,
  87. .dyn_fifo = 0,
  88. .soft_con = 1,
  89. .dma = 1,
  90. .num_eps = 8,
  91. .dma_channels = 8,
  92. .gpio_vrsel = GPIO_PF11,
  93. };
  94. static struct musb_hdrc_platform_data musb_plat = {
  95. #if defined(CONFIG_USB_MUSB_OTG)
  96. .mode = MUSB_OTG,
  97. #elif defined(CONFIG_USB_MUSB_HDRC_HCD)
  98. .mode = MUSB_HOST,
  99. #elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
  100. .mode = MUSB_PERIPHERAL,
  101. #endif
  102. .config = &musb_config,
  103. };
  104. static u64 musb_dmamask = ~(u32)0;
  105. static struct platform_device musb_device = {
  106. .name = "musb_hdrc",
  107. .id = 0,
  108. .dev = {
  109. .dma_mask = &musb_dmamask,
  110. .coherent_dma_mask = 0xffffffff,
  111. .platform_data = &musb_plat,
  112. },
  113. .num_resources = ARRAY_SIZE(musb_resources),
  114. .resource = musb_resources,
  115. };
  116. #endif
  117. #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
  118. static struct mtd_partition partition_info[] = {
  119. {
  120. .name = "linux kernel(nand)",
  121. .offset = 0,
  122. .size = 4 * 1024 * 1024,
  123. },
  124. {
  125. .name = "file system(nand)",
  126. .offset = MTDPART_OFS_APPEND,
  127. .size = MTDPART_SIZ_FULL,
  128. },
  129. };
  130. static struct bf5xx_nand_platform bf5xx_nand_platform = {
  131. .page_size = NFC_PG_SIZE_256,
  132. .data_width = NFC_NWIDTH_8,
  133. .partitions = partition_info,
  134. .nr_partitions = ARRAY_SIZE(partition_info),
  135. .rd_dly = 3,
  136. .wr_dly = 3,
  137. };
  138. static struct resource bf5xx_nand_resources[] = {
  139. {
  140. .start = NFC_CTL,
  141. .end = NFC_DATA_RD + 2,
  142. .flags = IORESOURCE_MEM,
  143. },
  144. {
  145. .start = CH_NFC,
  146. .end = CH_NFC,
  147. .flags = IORESOURCE_IRQ,
  148. },
  149. };
  150. static struct platform_device bf5xx_nand_device = {
  151. .name = "bf5xx-nand",
  152. .id = 0,
  153. .num_resources = ARRAY_SIZE(bf5xx_nand_resources),
  154. .resource = bf5xx_nand_resources,
  155. .dev = {
  156. .platform_data = &bf5xx_nand_platform,
  157. },
  158. };
  159. #endif
  160. #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
  161. static struct resource bfin_pcmcia_cf_resources[] = {
  162. {
  163. .start = 0x20310000, /* IO PORT */
  164. .end = 0x20312000,
  165. .flags = IORESOURCE_MEM,
  166. }, {
  167. .start = 0x20311000, /* Attribute Memory */
  168. .end = 0x20311FFF,
  169. .flags = IORESOURCE_MEM,
  170. }, {
  171. .start = IRQ_PF4,
  172. .end = IRQ_PF4,
  173. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
  174. }, {
  175. .start = 6, /* Card Detect PF6 */
  176. .end = 6,
  177. .flags = IORESOURCE_IRQ,
  178. },
  179. };
  180. static struct platform_device bfin_pcmcia_cf_device = {
  181. .name = "bfin_cf_pcmcia",
  182. .id = -1,
  183. .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
  184. .resource = bfin_pcmcia_cf_resources,
  185. };
  186. #endif
  187. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  188. static struct platform_device rtc_device = {
  189. .name = "rtc-bfin",
  190. .id = -1,
  191. };
  192. #endif
  193. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  194. #include <linux/smc91x.h>
  195. static struct smc91x_platdata smc91x_info = {
  196. .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
  197. .leda = RPC_LED_100_10,
  198. .ledb = RPC_LED_TX_RX,
  199. };
  200. static struct resource smc91x_resources[] = {
  201. {
  202. .name = "smc91x-regs",
  203. .start = 0x20300300,
  204. .end = 0x20300300 + 16,
  205. .flags = IORESOURCE_MEM,
  206. }, {
  207. .start = IRQ_PF7,
  208. .end = IRQ_PF7,
  209. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  210. },
  211. };
  212. static struct platform_device smc91x_device = {
  213. .name = "smc91x",
  214. .id = 0,
  215. .num_resources = ARRAY_SIZE(smc91x_resources),
  216. .resource = smc91x_resources,
  217. .dev = {
  218. .platform_data = &smc91x_info,
  219. },
  220. };
  221. #endif
  222. #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
  223. static struct resource dm9000_resources[] = {
  224. [0] = {
  225. .start = 0x203FB800,
  226. .end = 0x203FB800 + 1,
  227. .flags = IORESOURCE_MEM,
  228. },
  229. [1] = {
  230. .start = 0x203FB804,
  231. .end = 0x203FB804 + 1,
  232. .flags = IORESOURCE_MEM,
  233. },
  234. [2] = {
  235. .start = IRQ_PF9,
  236. .end = IRQ_PF9,
  237. .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE),
  238. },
  239. };
  240. static struct platform_device dm9000_device = {
  241. .name = "dm9000",
  242. .id = -1,
  243. .num_resources = ARRAY_SIZE(dm9000_resources),
  244. .resource = dm9000_resources,
  245. };
  246. #endif
  247. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  248. static struct platform_device bfin_mii_bus = {
  249. .name = "bfin_mii_bus",
  250. };
  251. static struct platform_device bfin_mac_device = {
  252. .name = "bfin_mac",
  253. .dev.platform_data = &bfin_mii_bus,
  254. };
  255. #endif
  256. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  257. static struct resource net2272_bfin_resources[] = {
  258. {
  259. .start = 0x20300000,
  260. .end = 0x20300000 + 0x100,
  261. .flags = IORESOURCE_MEM,
  262. }, {
  263. .start = IRQ_PF7,
  264. .end = IRQ_PF7,
  265. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  266. },
  267. };
  268. static struct platform_device net2272_bfin_device = {
  269. .name = "net2272",
  270. .id = -1,
  271. .num_resources = ARRAY_SIZE(net2272_bfin_resources),
  272. .resource = net2272_bfin_resources,
  273. };
  274. #endif
  275. #if defined(CONFIG_MTD_M25P80) \
  276. || defined(CONFIG_MTD_M25P80_MODULE)
  277. static struct mtd_partition bfin_spi_flash_partitions[] = {
  278. {
  279. .name = "bootloader(spi)",
  280. .size = 0x00040000,
  281. .offset = 0,
  282. .mask_flags = MTD_CAP_ROM
  283. }, {
  284. .name = "linux kernel(spi)",
  285. .size = MTDPART_SIZ_FULL,
  286. .offset = MTDPART_OFS_APPEND,
  287. }
  288. };
  289. static struct flash_platform_data bfin_spi_flash_data = {
  290. .name = "m25p80",
  291. .parts = bfin_spi_flash_partitions,
  292. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  293. .type = "m25p16",
  294. };
  295. /* SPI flash chip (m25p64) */
  296. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  297. .enable_dma = 0, /* use dma transfer with this chip*/
  298. .bits_per_word = 8,
  299. };
  300. #endif
  301. #if defined(CONFIG_BFIN_SPI_ADC) \
  302. || defined(CONFIG_BFIN_SPI_ADC_MODULE)
  303. /* SPI ADC chip */
  304. static struct bfin5xx_spi_chip spi_adc_chip_info = {
  305. .enable_dma = 1, /* use dma transfer with this chip*/
  306. .bits_per_word = 16,
  307. };
  308. #endif
  309. #if defined(CONFIG_SND_BLACKFIN_AD183X) \
  310. || defined(CONFIG_SND_BLACKFIN_AD183X_MODULE)
  311. static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
  312. .enable_dma = 0,
  313. .bits_per_word = 16,
  314. };
  315. #endif
  316. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  317. static struct bfin5xx_spi_chip mmc_spi_chip_info = {
  318. .enable_dma = 0,
  319. .bits_per_word = 8,
  320. };
  321. #endif
  322. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  323. static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
  324. .enable_dma = 0,
  325. .bits_per_word = 16,
  326. };
  327. static const struct ad7877_platform_data bfin_ad7877_ts_info = {
  328. .model = 7877,
  329. .vref_delay_usecs = 50, /* internal, no capacitor */
  330. .x_plate_ohms = 419,
  331. .y_plate_ohms = 486,
  332. .pressure_max = 1000,
  333. .pressure_min = 0,
  334. .stopacq_polarity = 1,
  335. .first_conversion_delay = 3,
  336. .acquisition_time = 1,
  337. .averaging = 1,
  338. .pen_down_acc_interval = 1,
  339. };
  340. #endif
  341. #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
  342. && defined(CONFIG_SND_SOC_WM8731_SPI)
  343. static struct bfin5xx_spi_chip spi_wm8731_chip_info = {
  344. .enable_dma = 0,
  345. .bits_per_word = 16,
  346. };
  347. #endif
  348. #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
  349. static struct bfin5xx_spi_chip spidev_chip_info = {
  350. .enable_dma = 0,
  351. .bits_per_word = 8,
  352. };
  353. #endif
  354. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  355. #if defined(CONFIG_MTD_M25P80) \
  356. || defined(CONFIG_MTD_M25P80_MODULE)
  357. {
  358. /* the modalias must be the same as spi device driver name */
  359. .modalias = "m25p80", /* Name of spi_driver for this device */
  360. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  361. .bus_num = 0, /* Framework bus number */
  362. .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
  363. .platform_data = &bfin_spi_flash_data,
  364. .controller_data = &spi_flash_chip_info,
  365. .mode = SPI_MODE_3,
  366. },
  367. #endif
  368. #if defined(CONFIG_BFIN_SPI_ADC) \
  369. || defined(CONFIG_BFIN_SPI_ADC_MODULE)
  370. {
  371. .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
  372. .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
  373. .bus_num = 0, /* Framework bus number */
  374. .chip_select = 1, /* Framework chip select. */
  375. .platform_data = NULL, /* No spi_driver specific config */
  376. .controller_data = &spi_adc_chip_info,
  377. },
  378. #endif
  379. #if defined(CONFIG_SND_BLACKFIN_AD183X) \
  380. || defined(CONFIG_SND_BLACKFIN_AD183X_MODULE)
  381. {
  382. .modalias = "ad1836",
  383. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  384. .bus_num = 0,
  385. .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
  386. .controller_data = &ad1836_spi_chip_info,
  387. },
  388. #endif
  389. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  390. {
  391. .modalias = "mmc_spi",
  392. .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
  393. .bus_num = 0,
  394. .chip_select = 5,
  395. .controller_data = &mmc_spi_chip_info,
  396. .mode = SPI_MODE_3,
  397. },
  398. #endif
  399. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  400. {
  401. .modalias = "ad7877",
  402. .platform_data = &bfin_ad7877_ts_info,
  403. .irq = IRQ_PF8,
  404. .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
  405. .bus_num = 0,
  406. .chip_select = 2,
  407. .controller_data = &spi_ad7877_chip_info,
  408. },
  409. #endif
  410. #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
  411. && defined(CONFIG_SND_SOC_WM8731_SPI)
  412. {
  413. .modalias = "wm8731",
  414. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  415. .bus_num = 0,
  416. .chip_select = 5,
  417. .controller_data = &spi_wm8731_chip_info,
  418. .mode = SPI_MODE_0,
  419. },
  420. #endif
  421. #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
  422. {
  423. .modalias = "spidev",
  424. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  425. .bus_num = 0,
  426. .chip_select = 1,
  427. .controller_data = &spidev_chip_info,
  428. },
  429. #endif
  430. };
  431. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  432. /* SPI controller data */
  433. static struct bfin5xx_spi_master bfin_spi0_info = {
  434. .num_chipselect = 8,
  435. .enable_dma = 1, /* master has the ability to do dma transfer */
  436. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  437. };
  438. /* SPI (0) */
  439. static struct resource bfin_spi0_resource[] = {
  440. [0] = {
  441. .start = SPI0_REGBASE,
  442. .end = SPI0_REGBASE + 0xFF,
  443. .flags = IORESOURCE_MEM,
  444. },
  445. [1] = {
  446. .start = CH_SPI,
  447. .end = CH_SPI,
  448. .flags = IORESOURCE_DMA,
  449. },
  450. [2] = {
  451. .start = IRQ_SPI,
  452. .end = IRQ_SPI,
  453. .flags = IORESOURCE_IRQ,
  454. },
  455. };
  456. static struct platform_device bfin_spi0_device = {
  457. .name = "bfin-spi",
  458. .id = 0, /* Bus number */
  459. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  460. .resource = bfin_spi0_resource,
  461. .dev = {
  462. .platform_data = &bfin_spi0_info, /* Passed to driver */
  463. },
  464. };
  465. #endif /* spi master and devices */
  466. #if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
  467. static struct mtd_partition cm_partitions[] = {
  468. {
  469. .name = "bootloader(nor)",
  470. .size = 0x40000,
  471. .offset = 0,
  472. }, {
  473. .name = "linux kernel(nor)",
  474. .size = 0x100000,
  475. .offset = MTDPART_OFS_APPEND,
  476. }, {
  477. .name = "file system(nor)",
  478. .size = MTDPART_SIZ_FULL,
  479. .offset = MTDPART_OFS_APPEND,
  480. }
  481. };
  482. static struct physmap_flash_data cm_flash_data = {
  483. .width = 2,
  484. .parts = cm_partitions,
  485. .nr_parts = ARRAY_SIZE(cm_partitions),
  486. };
  487. static unsigned cm_flash_gpios[] = { GPIO_PH9, GPIO_PG11 };
  488. static struct resource cm_flash_resource[] = {
  489. {
  490. .name = "cfi_probe",
  491. .start = 0x20000000,
  492. .end = 0x201fffff,
  493. .flags = IORESOURCE_MEM,
  494. }, {
  495. .start = (unsigned long)cm_flash_gpios,
  496. .end = ARRAY_SIZE(cm_flash_gpios),
  497. .flags = IORESOURCE_IRQ,
  498. }
  499. };
  500. static struct platform_device cm_flash_device = {
  501. .name = "gpio-addr-flash",
  502. .id = 0,
  503. .dev = {
  504. .platform_data = &cm_flash_data,
  505. },
  506. .num_resources = ARRAY_SIZE(cm_flash_resource),
  507. .resource = cm_flash_resource,
  508. };
  509. #endif
  510. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  511. #ifdef CONFIG_SERIAL_BFIN_UART0
  512. static struct resource bfin_uart0_resources[] = {
  513. {
  514. .start = UART0_THR,
  515. .end = UART0_GCTL+2,
  516. .flags = IORESOURCE_MEM,
  517. },
  518. {
  519. .start = IRQ_UART0_RX,
  520. .end = IRQ_UART0_RX+1,
  521. .flags = IORESOURCE_IRQ,
  522. },
  523. {
  524. .start = IRQ_UART0_ERROR,
  525. .end = IRQ_UART0_ERROR,
  526. .flags = IORESOURCE_IRQ,
  527. },
  528. {
  529. .start = CH_UART0_TX,
  530. .end = CH_UART0_TX,
  531. .flags = IORESOURCE_DMA,
  532. },
  533. {
  534. .start = CH_UART0_RX,
  535. .end = CH_UART0_RX,
  536. .flags = IORESOURCE_DMA,
  537. },
  538. };
  539. unsigned short bfin_uart0_peripherals[] = {
  540. P_UART0_TX, P_UART0_RX, 0
  541. };
  542. static struct platform_device bfin_uart0_device = {
  543. .name = "bfin-uart",
  544. .id = 0,
  545. .num_resources = ARRAY_SIZE(bfin_uart0_resources),
  546. .resource = bfin_uart0_resources,
  547. .dev = {
  548. .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
  549. },
  550. };
  551. #endif
  552. #ifdef CONFIG_SERIAL_BFIN_UART1
  553. static struct resource bfin_uart1_resources[] = {
  554. {
  555. .start = UART1_THR,
  556. .end = UART1_GCTL+2,
  557. .flags = IORESOURCE_MEM,
  558. },
  559. {
  560. .start = IRQ_UART1_RX,
  561. .end = IRQ_UART1_RX+1,
  562. .flags = IORESOURCE_IRQ,
  563. },
  564. {
  565. .start = IRQ_UART1_ERROR,
  566. .end = IRQ_UART1_ERROR,
  567. .flags = IORESOURCE_IRQ,
  568. },
  569. {
  570. .start = CH_UART1_TX,
  571. .end = CH_UART1_TX,
  572. .flags = IORESOURCE_DMA,
  573. },
  574. {
  575. .start = CH_UART1_RX,
  576. .end = CH_UART1_RX,
  577. .flags = IORESOURCE_DMA,
  578. },
  579. #ifdef CONFIG_BFIN_UART1_CTSRTS
  580. { /* CTS pin */
  581. .start = GPIO_PF9,
  582. .end = GPIO_PF9,
  583. .flags = IORESOURCE_IO,
  584. },
  585. { /* RTS pin */
  586. .start = GPIO_PF10,
  587. .end = GPIO_PF10,
  588. .flags = IORESOURCE_IO,
  589. },
  590. #endif
  591. };
  592. unsigned short bfin_uart1_peripherals[] = {
  593. P_UART1_TX, P_UART1_RX, 0
  594. };
  595. static struct platform_device bfin_uart1_device = {
  596. .name = "bfin-uart",
  597. .id = 1,
  598. .num_resources = ARRAY_SIZE(bfin_uart1_resources),
  599. .resource = bfin_uart1_resources,
  600. .dev = {
  601. .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
  602. },
  603. };
  604. #endif
  605. #endif
  606. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  607. #ifdef CONFIG_BFIN_SIR0
  608. static struct resource bfin_sir0_resources[] = {
  609. {
  610. .start = 0xFFC00400,
  611. .end = 0xFFC004FF,
  612. .flags = IORESOURCE_MEM,
  613. },
  614. {
  615. .start = IRQ_UART0_RX,
  616. .end = IRQ_UART0_RX+1,
  617. .flags = IORESOURCE_IRQ,
  618. },
  619. {
  620. .start = CH_UART0_RX,
  621. .end = CH_UART0_RX+1,
  622. .flags = IORESOURCE_DMA,
  623. },
  624. };
  625. static struct platform_device bfin_sir0_device = {
  626. .name = "bfin_sir",
  627. .id = 0,
  628. .num_resources = ARRAY_SIZE(bfin_sir0_resources),
  629. .resource = bfin_sir0_resources,
  630. };
  631. #endif
  632. #ifdef CONFIG_BFIN_SIR1
  633. static struct resource bfin_sir1_resources[] = {
  634. {
  635. .start = 0xFFC02000,
  636. .end = 0xFFC020FF,
  637. .flags = IORESOURCE_MEM,
  638. },
  639. {
  640. .start = IRQ_UART1_RX,
  641. .end = IRQ_UART1_RX+1,
  642. .flags = IORESOURCE_IRQ,
  643. },
  644. {
  645. .start = CH_UART1_RX,
  646. .end = CH_UART1_RX+1,
  647. .flags = IORESOURCE_DMA,
  648. },
  649. };
  650. static struct platform_device bfin_sir1_device = {
  651. .name = "bfin_sir",
  652. .id = 1,
  653. .num_resources = ARRAY_SIZE(bfin_sir1_resources),
  654. .resource = bfin_sir1_resources,
  655. };
  656. #endif
  657. #endif
  658. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  659. static struct resource bfin_twi0_resource[] = {
  660. [0] = {
  661. .start = TWI0_REGBASE,
  662. .end = TWI0_REGBASE,
  663. .flags = IORESOURCE_MEM,
  664. },
  665. [1] = {
  666. .start = IRQ_TWI,
  667. .end = IRQ_TWI,
  668. .flags = IORESOURCE_IRQ,
  669. },
  670. };
  671. static struct platform_device i2c_bfin_twi_device = {
  672. .name = "i2c-bfin-twi",
  673. .id = 0,
  674. .num_resources = ARRAY_SIZE(bfin_twi0_resource),
  675. .resource = bfin_twi0_resource,
  676. };
  677. #endif
  678. static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
  679. #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
  680. {
  681. I2C_BOARD_INFO("pcf8574_lcd", 0x22),
  682. },
  683. #endif
  684. #if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
  685. {
  686. I2C_BOARD_INFO("pcf8574_keypad", 0x27),
  687. .irq = IRQ_PF8,
  688. },
  689. #endif
  690. #if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
  691. {
  692. I2C_BOARD_INFO("bfin-adv7393", 0x2B),
  693. },
  694. #endif
  695. };
  696. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  697. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  698. static struct resource bfin_sport0_uart_resources[] = {
  699. {
  700. .start = SPORT0_TCR1,
  701. .end = SPORT0_MRCS3+4,
  702. .flags = IORESOURCE_MEM,
  703. },
  704. {
  705. .start = IRQ_SPORT0_RX,
  706. .end = IRQ_SPORT0_RX+1,
  707. .flags = IORESOURCE_IRQ,
  708. },
  709. {
  710. .start = IRQ_SPORT0_ERROR,
  711. .end = IRQ_SPORT0_ERROR,
  712. .flags = IORESOURCE_IRQ,
  713. },
  714. };
  715. unsigned short bfin_sport0_peripherals[] = {
  716. P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
  717. P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
  718. };
  719. static struct platform_device bfin_sport0_uart_device = {
  720. .name = "bfin-sport-uart",
  721. .id = 0,
  722. .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
  723. .resource = bfin_sport0_uart_resources,
  724. .dev = {
  725. .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
  726. },
  727. };
  728. #endif
  729. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  730. static struct resource bfin_sport1_uart_resources[] = {
  731. {
  732. .start = SPORT1_TCR1,
  733. .end = SPORT1_MRCS3+4,
  734. .flags = IORESOURCE_MEM,
  735. },
  736. {
  737. .start = IRQ_SPORT1_RX,
  738. .end = IRQ_SPORT1_RX+1,
  739. .flags = IORESOURCE_IRQ,
  740. },
  741. {
  742. .start = IRQ_SPORT1_ERROR,
  743. .end = IRQ_SPORT1_ERROR,
  744. .flags = IORESOURCE_IRQ,
  745. },
  746. };
  747. unsigned short bfin_sport1_peripherals[] = {
  748. P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
  749. P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0
  750. };
  751. static struct platform_device bfin_sport1_uart_device = {
  752. .name = "bfin-sport-uart",
  753. .id = 1,
  754. .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
  755. .resource = bfin_sport1_uart_resources,
  756. .dev = {
  757. .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
  758. },
  759. };
  760. #endif
  761. #endif
  762. #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
  763. #include <linux/input.h>
  764. #include <linux/gpio_keys.h>
  765. static struct gpio_keys_button bfin_gpio_keys_table[] = {
  766. {BTN_0, GPIO_PF14, 1, "gpio-keys: BTN0"},
  767. };
  768. static struct gpio_keys_platform_data bfin_gpio_keys_data = {
  769. .buttons = bfin_gpio_keys_table,
  770. .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
  771. };
  772. static struct platform_device bfin_device_gpiokeys = {
  773. .name = "gpio-keys",
  774. .dev = {
  775. .platform_data = &bfin_gpio_keys_data,
  776. },
  777. };
  778. #endif
  779. static const unsigned int cclk_vlev_datasheet[] =
  780. {
  781. VRPAIR(VLEV_100, 400000000),
  782. VRPAIR(VLEV_105, 426000000),
  783. VRPAIR(VLEV_110, 500000000),
  784. VRPAIR(VLEV_115, 533000000),
  785. VRPAIR(VLEV_120, 600000000),
  786. };
  787. static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
  788. .tuple_tab = cclk_vlev_datasheet,
  789. .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
  790. .vr_settling_time = 25 /* us */,
  791. };
  792. static struct platform_device bfin_dpmc = {
  793. .name = "bfin dpmc",
  794. .dev = {
  795. .platform_data = &bfin_dmpc_vreg_data,
  796. },
  797. };
  798. static struct platform_device *cmbf527_devices[] __initdata = {
  799. &bfin_dpmc,
  800. #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
  801. &bf5xx_nand_device,
  802. #endif
  803. #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
  804. &bfin_pcmcia_cf_device,
  805. #endif
  806. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  807. &rtc_device,
  808. #endif
  809. #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
  810. &bfin_isp1760_device,
  811. #endif
  812. #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
  813. &musb_device,
  814. #endif
  815. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  816. &smc91x_device,
  817. #endif
  818. #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
  819. &dm9000_device,
  820. #endif
  821. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  822. &bfin_mii_bus,
  823. &bfin_mac_device,
  824. #endif
  825. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  826. &net2272_bfin_device,
  827. #endif
  828. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  829. &bfin_spi0_device,
  830. #endif
  831. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  832. #ifdef CONFIG_SERIAL_BFIN_UART0
  833. &bfin_uart0_device,
  834. #endif
  835. #ifdef CONFIG_SERIAL_BFIN_UART1
  836. &bfin_uart1_device,
  837. #endif
  838. #endif
  839. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  840. #ifdef CONFIG_BFIN_SIR0
  841. &bfin_sir0_device,
  842. #endif
  843. #ifdef CONFIG_BFIN_SIR1
  844. &bfin_sir1_device,
  845. #endif
  846. #endif
  847. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  848. &i2c_bfin_twi_device,
  849. #endif
  850. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  851. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  852. &bfin_sport0_uart_device,
  853. #endif
  854. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  855. &bfin_sport1_uart_device,
  856. #endif
  857. #endif
  858. #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
  859. &bfin_device_gpiokeys,
  860. #endif
  861. #if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
  862. &cm_flash_device,
  863. #endif
  864. };
  865. static int __init cm_init(void)
  866. {
  867. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  868. i2c_register_board_info(0, bfin_i2c_board_info,
  869. ARRAY_SIZE(bfin_i2c_board_info));
  870. platform_add_devices(cmbf527_devices, ARRAY_SIZE(cmbf527_devices));
  871. spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
  872. return 0;
  873. }
  874. arch_initcall(cm_init);
  875. static struct platform_device *cmbf527_early_devices[] __initdata = {
  876. #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
  877. #ifdef CONFIG_SERIAL_BFIN_UART0
  878. &bfin_uart0_device,
  879. #endif
  880. #ifdef CONFIG_SERIAL_BFIN_UART1
  881. &bfin_uart1_device,
  882. #endif
  883. #endif
  884. #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
  885. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  886. &bfin_sport0_uart_device,
  887. #endif
  888. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  889. &bfin_sport1_uart_device,
  890. #endif
  891. #endif
  892. };
  893. void __init native_machine_early_platform_add_devices(void)
  894. {
  895. printk(KERN_INFO "register early platform devices\n");
  896. early_platform_add_devices(cmbf527_early_devices,
  897. ARRAY_SIZE(cmbf527_early_devices));
  898. }
  899. void native_machine_restart(char *cmd)
  900. {
  901. /* workaround reboot hang when booting from SPI */
  902. if ((bfin_read_SYSCR() & 0x7) == 0x3)
  903. bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
  904. }
  905. void bfin_get_ether_addr(char *addr)
  906. {
  907. random_ether_addr(addr);
  908. printk(KERN_WARNING "%s:%s: Setting Ethernet MAC to a random one\n", __FILE__, __func__);
  909. }
  910. EXPORT_SYMBOL(bfin_get_ether_addr);