tcm-bf518.c 18 KB

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  1. /*
  2. * Copyright 2004-2009 Analog Devices Inc.
  3. * 2005 National ICT Australia (NICTA)
  4. * Aidan Williams <aidan@nicta.com.au>
  5. *
  6. * Licensed under the GPL-2 or later.
  7. */
  8. #include <linux/device.h>
  9. #include <linux/etherdevice.h>
  10. #include <linux/platform_device.h>
  11. #include <linux/mtd/mtd.h>
  12. #include <linux/mtd/partitions.h>
  13. #include <linux/mtd/physmap.h>
  14. #include <linux/spi/spi.h>
  15. #include <linux/spi/flash.h>
  16. #include <linux/i2c.h>
  17. #include <linux/irq.h>
  18. #include <linux/interrupt.h>
  19. #include <asm/dma.h>
  20. #include <asm/bfin5xx_spi.h>
  21. #include <asm/reboot.h>
  22. #include <asm/portmux.h>
  23. #include <asm/dpmc.h>
  24. #include <asm/bfin_sdh.h>
  25. #include <linux/spi/ad7877.h>
  26. #include <net/dsa.h>
  27. /*
  28. * Name the Board for the /proc/cpuinfo
  29. */
  30. const char bfin_board_name[] = "Bluetechnix TCM-BF518";
  31. /*
  32. * Driver needs to know address, irq and flag pin.
  33. */
  34. #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  35. static struct mtd_partition tcm_partitions[] = {
  36. {
  37. .name = "bootloader(nor)",
  38. .size = 0x40000,
  39. .offset = 0,
  40. },
  41. {
  42. .name = "linux(nor)",
  43. .size = 0x1C0000,
  44. .offset = MTDPART_OFS_APPEND,
  45. }
  46. };
  47. static struct physmap_flash_data tcm_flash_data = {
  48. .width = 2,
  49. .parts = tcm_partitions,
  50. .nr_parts = ARRAY_SIZE(tcm_partitions),
  51. };
  52. static struct resource tcm_flash_resource = {
  53. .start = 0x20000000,
  54. .end = 0x201fffff,
  55. .flags = IORESOURCE_MEM,
  56. };
  57. static struct platform_device tcm_flash_device = {
  58. .name = "physmap-flash",
  59. .id = 0,
  60. .dev = {
  61. .platform_data = &tcm_flash_data,
  62. },
  63. .num_resources = 1,
  64. .resource = &tcm_flash_resource,
  65. };
  66. #endif
  67. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  68. static struct platform_device rtc_device = {
  69. .name = "rtc-bfin",
  70. .id = -1,
  71. };
  72. #endif
  73. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  74. static struct platform_device bfin_mii_bus = {
  75. .name = "bfin_mii_bus",
  76. };
  77. static struct platform_device bfin_mac_device = {
  78. .name = "bfin_mac",
  79. .dev.platform_data = &bfin_mii_bus,
  80. };
  81. #endif
  82. #if defined(CONFIG_MTD_M25P80) \
  83. || defined(CONFIG_MTD_M25P80_MODULE)
  84. static struct mtd_partition bfin_spi_flash_partitions[] = {
  85. {
  86. .name = "bootloader(spi)",
  87. .size = 0x00040000,
  88. .offset = 0,
  89. .mask_flags = MTD_CAP_ROM
  90. }, {
  91. .name = "linux kernel(spi)",
  92. .size = MTDPART_SIZ_FULL,
  93. .offset = MTDPART_OFS_APPEND,
  94. }
  95. };
  96. static struct flash_platform_data bfin_spi_flash_data = {
  97. .name = "m25p80",
  98. .parts = bfin_spi_flash_partitions,
  99. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  100. .type = "m25p16",
  101. };
  102. /* SPI flash chip (m25p64) */
  103. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  104. .enable_dma = 0, /* use dma transfer with this chip*/
  105. .bits_per_word = 8,
  106. };
  107. #endif
  108. #if defined(CONFIG_BFIN_SPI_ADC) \
  109. || defined(CONFIG_BFIN_SPI_ADC_MODULE)
  110. /* SPI ADC chip */
  111. static struct bfin5xx_spi_chip spi_adc_chip_info = {
  112. .enable_dma = 1, /* use dma transfer with this chip*/
  113. .bits_per_word = 16,
  114. };
  115. #endif
  116. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  117. static struct bfin5xx_spi_chip mmc_spi_chip_info = {
  118. .enable_dma = 0,
  119. .bits_per_word = 8,
  120. };
  121. #endif
  122. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  123. static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
  124. .enable_dma = 0,
  125. .bits_per_word = 16,
  126. };
  127. static const struct ad7877_platform_data bfin_ad7877_ts_info = {
  128. .model = 7877,
  129. .vref_delay_usecs = 50, /* internal, no capacitor */
  130. .x_plate_ohms = 419,
  131. .y_plate_ohms = 486,
  132. .pressure_max = 1000,
  133. .pressure_min = 0,
  134. .stopacq_polarity = 1,
  135. .first_conversion_delay = 3,
  136. .acquisition_time = 1,
  137. .averaging = 1,
  138. .pen_down_acc_interval = 1,
  139. };
  140. #endif
  141. #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
  142. && defined(CONFIG_SND_SOC_WM8731_SPI)
  143. static struct bfin5xx_spi_chip spi_wm8731_chip_info = {
  144. .enable_dma = 0,
  145. .bits_per_word = 16,
  146. };
  147. #endif
  148. #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
  149. static struct bfin5xx_spi_chip spidev_chip_info = {
  150. .enable_dma = 0,
  151. .bits_per_word = 8,
  152. };
  153. #endif
  154. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  155. #if defined(CONFIG_MTD_M25P80) \
  156. || defined(CONFIG_MTD_M25P80_MODULE)
  157. {
  158. /* the modalias must be the same as spi device driver name */
  159. .modalias = "m25p80", /* Name of spi_driver for this device */
  160. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  161. .bus_num = 0, /* Framework bus number */
  162. .chip_select = 2, /* SPI0_SSEL2 */
  163. .platform_data = &bfin_spi_flash_data,
  164. .controller_data = &spi_flash_chip_info,
  165. .mode = SPI_MODE_3,
  166. },
  167. #endif
  168. #if defined(CONFIG_BFIN_SPI_ADC) \
  169. || defined(CONFIG_BFIN_SPI_ADC_MODULE)
  170. {
  171. .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
  172. .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
  173. .bus_num = 0, /* Framework bus number */
  174. .chip_select = 1, /* Framework chip select. */
  175. .platform_data = NULL, /* No spi_driver specific config */
  176. .controller_data = &spi_adc_chip_info,
  177. },
  178. #endif
  179. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  180. {
  181. .modalias = "mmc_spi",
  182. .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
  183. .bus_num = 0,
  184. .chip_select = 5,
  185. .controller_data = &mmc_spi_chip_info,
  186. .mode = SPI_MODE_3,
  187. },
  188. #endif
  189. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  190. {
  191. .modalias = "ad7877",
  192. .platform_data = &bfin_ad7877_ts_info,
  193. .irq = IRQ_PF8,
  194. .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
  195. .bus_num = 0,
  196. .chip_select = 2,
  197. .controller_data = &spi_ad7877_chip_info,
  198. },
  199. #endif
  200. #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
  201. && defined(CONFIG_SND_SOC_WM8731_SPI)
  202. {
  203. .modalias = "wm8731",
  204. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  205. .bus_num = 0,
  206. .chip_select = 5,
  207. .controller_data = &spi_wm8731_chip_info,
  208. .mode = SPI_MODE_0,
  209. },
  210. #endif
  211. #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
  212. {
  213. .modalias = "spidev",
  214. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  215. .bus_num = 0,
  216. .chip_select = 1,
  217. .controller_data = &spidev_chip_info,
  218. },
  219. #endif
  220. #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
  221. {
  222. .modalias = "bfin-lq035q1-spi",
  223. .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
  224. .bus_num = 0,
  225. .chip_select = 1,
  226. .controller_data = &lq035q1_spi_chip_info,
  227. .mode = SPI_CPHA | SPI_CPOL,
  228. },
  229. #endif
  230. };
  231. /* SPI controller data */
  232. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  233. /* SPI (0) */
  234. static struct bfin5xx_spi_master bfin_spi0_info = {
  235. .num_chipselect = 6,
  236. .enable_dma = 1, /* master has the ability to do dma transfer */
  237. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  238. };
  239. static struct resource bfin_spi0_resource[] = {
  240. [0] = {
  241. .start = SPI0_REGBASE,
  242. .end = SPI0_REGBASE + 0xFF,
  243. .flags = IORESOURCE_MEM,
  244. },
  245. [1] = {
  246. .start = CH_SPI0,
  247. .end = CH_SPI0,
  248. .flags = IORESOURCE_DMA,
  249. },
  250. [2] = {
  251. .start = IRQ_SPI0,
  252. .end = IRQ_SPI0,
  253. .flags = IORESOURCE_IRQ,
  254. },
  255. };
  256. static struct platform_device bfin_spi0_device = {
  257. .name = "bfin-spi",
  258. .id = 0, /* Bus number */
  259. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  260. .resource = bfin_spi0_resource,
  261. .dev = {
  262. .platform_data = &bfin_spi0_info, /* Passed to driver */
  263. },
  264. };
  265. /* SPI (1) */
  266. static struct bfin5xx_spi_master bfin_spi1_info = {
  267. .num_chipselect = 5,
  268. .enable_dma = 1, /* master has the ability to do dma transfer */
  269. .pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0},
  270. };
  271. static struct resource bfin_spi1_resource[] = {
  272. [0] = {
  273. .start = SPI1_REGBASE,
  274. .end = SPI1_REGBASE + 0xFF,
  275. .flags = IORESOURCE_MEM,
  276. },
  277. [1] = {
  278. .start = CH_SPI1,
  279. .end = CH_SPI1,
  280. .flags = IORESOURCE_DMA,
  281. },
  282. [2] = {
  283. .start = IRQ_SPI1,
  284. .end = IRQ_SPI1,
  285. .flags = IORESOURCE_IRQ,
  286. },
  287. };
  288. static struct platform_device bfin_spi1_device = {
  289. .name = "bfin-spi",
  290. .id = 1, /* Bus number */
  291. .num_resources = ARRAY_SIZE(bfin_spi1_resource),
  292. .resource = bfin_spi1_resource,
  293. .dev = {
  294. .platform_data = &bfin_spi1_info, /* Passed to driver */
  295. },
  296. };
  297. #endif /* spi master and devices */
  298. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  299. #ifdef CONFIG_SERIAL_BFIN_UART0
  300. static struct resource bfin_uart0_resources[] = {
  301. {
  302. .start = UART0_THR,
  303. .end = UART0_GCTL+2,
  304. .flags = IORESOURCE_MEM,
  305. },
  306. {
  307. .start = IRQ_UART0_RX,
  308. .end = IRQ_UART0_RX+1,
  309. .flags = IORESOURCE_IRQ,
  310. },
  311. {
  312. .start = IRQ_UART0_ERROR,
  313. .end = IRQ_UART0_ERROR,
  314. .flags = IORESOURCE_IRQ,
  315. },
  316. {
  317. .start = CH_UART0_TX,
  318. .end = CH_UART0_TX,
  319. .flags = IORESOURCE_DMA,
  320. },
  321. {
  322. .start = CH_UART0_RX,
  323. .end = CH_UART0_RX,
  324. .flags = IORESOURCE_DMA,
  325. },
  326. };
  327. unsigned short bfin_uart0_peripherals[] = {
  328. P_UART0_TX, P_UART0_RX, 0
  329. };
  330. static struct platform_device bfin_uart0_device = {
  331. .name = "bfin-uart",
  332. .id = 0,
  333. .num_resources = ARRAY_SIZE(bfin_uart0_resources),
  334. .resource = bfin_uart0_resources,
  335. .dev = {
  336. .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
  337. },
  338. };
  339. #endif
  340. #ifdef CONFIG_SERIAL_BFIN_UART1
  341. static struct resource bfin_uart1_resources[] = {
  342. {
  343. .start = UART1_THR,
  344. .end = UART1_GCTL+2,
  345. .flags = IORESOURCE_MEM,
  346. },
  347. {
  348. .start = IRQ_UART1_RX,
  349. .end = IRQ_UART1_RX+1,
  350. .flags = IORESOURCE_IRQ,
  351. },
  352. {
  353. .start = IRQ_UART1_ERROR,
  354. .end = IRQ_UART1_ERROR,
  355. .flags = IORESOURCE_IRQ,
  356. },
  357. {
  358. .start = CH_UART1_TX,
  359. .end = CH_UART1_TX,
  360. .flags = IORESOURCE_DMA,
  361. },
  362. {
  363. .start = CH_UART1_RX,
  364. .end = CH_UART1_RX,
  365. .flags = IORESOURCE_DMA,
  366. },
  367. };
  368. unsigned short bfin_uart1_peripherals[] = {
  369. P_UART1_TX, P_UART1_RX, 0
  370. };
  371. static struct platform_device bfin_uart1_device = {
  372. .name = "bfin-uart",
  373. .id = 1,
  374. .num_resources = ARRAY_SIZE(bfin_uart1_resources),
  375. .resource = bfin_uart1_resources,
  376. .dev = {
  377. .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
  378. },
  379. };
  380. #endif
  381. #endif
  382. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  383. #ifdef CONFIG_BFIN_SIR0
  384. static struct resource bfin_sir0_resources[] = {
  385. {
  386. .start = 0xFFC00400,
  387. .end = 0xFFC004FF,
  388. .flags = IORESOURCE_MEM,
  389. },
  390. {
  391. .start = IRQ_UART0_RX,
  392. .end = IRQ_UART0_RX+1,
  393. .flags = IORESOURCE_IRQ,
  394. },
  395. {
  396. .start = CH_UART0_RX,
  397. .end = CH_UART0_RX+1,
  398. .flags = IORESOURCE_DMA,
  399. },
  400. };
  401. static struct platform_device bfin_sir0_device = {
  402. .name = "bfin_sir",
  403. .id = 0,
  404. .num_resources = ARRAY_SIZE(bfin_sir0_resources),
  405. .resource = bfin_sir0_resources,
  406. };
  407. #endif
  408. #ifdef CONFIG_BFIN_SIR1
  409. static struct resource bfin_sir1_resources[] = {
  410. {
  411. .start = 0xFFC02000,
  412. .end = 0xFFC020FF,
  413. .flags = IORESOURCE_MEM,
  414. },
  415. {
  416. .start = IRQ_UART1_RX,
  417. .end = IRQ_UART1_RX+1,
  418. .flags = IORESOURCE_IRQ,
  419. },
  420. {
  421. .start = CH_UART1_RX,
  422. .end = CH_UART1_RX+1,
  423. .flags = IORESOURCE_DMA,
  424. },
  425. };
  426. static struct platform_device bfin_sir1_device = {
  427. .name = "bfin_sir",
  428. .id = 1,
  429. .num_resources = ARRAY_SIZE(bfin_sir1_resources),
  430. .resource = bfin_sir1_resources,
  431. };
  432. #endif
  433. #endif
  434. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  435. static struct resource bfin_twi0_resource[] = {
  436. [0] = {
  437. .start = TWI0_REGBASE,
  438. .end = TWI0_REGBASE,
  439. .flags = IORESOURCE_MEM,
  440. },
  441. [1] = {
  442. .start = IRQ_TWI,
  443. .end = IRQ_TWI,
  444. .flags = IORESOURCE_IRQ,
  445. },
  446. };
  447. static struct platform_device i2c_bfin_twi_device = {
  448. .name = "i2c-bfin-twi",
  449. .id = 0,
  450. .num_resources = ARRAY_SIZE(bfin_twi0_resource),
  451. .resource = bfin_twi0_resource,
  452. };
  453. #endif
  454. static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
  455. #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
  456. {
  457. I2C_BOARD_INFO("pcf8574_lcd", 0x22),
  458. },
  459. #endif
  460. #if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
  461. {
  462. I2C_BOARD_INFO("pcf8574_keypad", 0x27),
  463. .irq = IRQ_PF8,
  464. },
  465. #endif
  466. };
  467. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  468. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  469. static struct resource bfin_sport0_uart_resources[] = {
  470. {
  471. .start = SPORT0_TCR1,
  472. .end = SPORT0_MRCS3+4,
  473. .flags = IORESOURCE_MEM,
  474. },
  475. {
  476. .start = IRQ_SPORT0_RX,
  477. .end = IRQ_SPORT0_RX+1,
  478. .flags = IORESOURCE_IRQ,
  479. },
  480. {
  481. .start = IRQ_SPORT0_ERROR,
  482. .end = IRQ_SPORT0_ERROR,
  483. .flags = IORESOURCE_IRQ,
  484. },
  485. };
  486. unsigned short bfin_sport0_peripherals[] = {
  487. P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
  488. P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
  489. };
  490. static struct platform_device bfin_sport0_uart_device = {
  491. .name = "bfin-sport-uart",
  492. .id = 0,
  493. .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
  494. .resource = bfin_sport0_uart_resources,
  495. .dev = {
  496. .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
  497. },
  498. };
  499. #endif
  500. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  501. static struct resource bfin_sport1_uart_resources[] = {
  502. {
  503. .start = SPORT1_TCR1,
  504. .end = SPORT1_MRCS3+4,
  505. .flags = IORESOURCE_MEM,
  506. },
  507. {
  508. .start = IRQ_SPORT1_RX,
  509. .end = IRQ_SPORT1_RX+1,
  510. .flags = IORESOURCE_IRQ,
  511. },
  512. {
  513. .start = IRQ_SPORT1_ERROR,
  514. .end = IRQ_SPORT1_ERROR,
  515. .flags = IORESOURCE_IRQ,
  516. },
  517. };
  518. unsigned short bfin_sport1_peripherals[] = {
  519. P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
  520. P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0
  521. };
  522. static struct platform_device bfin_sport1_uart_device = {
  523. .name = "bfin-sport-uart",
  524. .id = 1,
  525. .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
  526. .resource = bfin_sport1_uart_resources,
  527. .dev = {
  528. .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
  529. },
  530. };
  531. #endif
  532. #endif
  533. #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
  534. #include <linux/input.h>
  535. #include <linux/gpio_keys.h>
  536. static struct gpio_keys_button bfin_gpio_keys_table[] = {
  537. {BTN_0, GPIO_PG0, 1, "gpio-keys: BTN0"},
  538. {BTN_1, GPIO_PG13, 1, "gpio-keys: BTN1"},
  539. };
  540. static struct gpio_keys_platform_data bfin_gpio_keys_data = {
  541. .buttons = bfin_gpio_keys_table,
  542. .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
  543. };
  544. static struct platform_device bfin_device_gpiokeys = {
  545. .name = "gpio-keys",
  546. .dev = {
  547. .platform_data = &bfin_gpio_keys_data,
  548. },
  549. };
  550. #endif
  551. #if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
  552. static struct bfin_sd_host bfin_sdh_data = {
  553. .dma_chan = CH_RSI,
  554. .irq_int0 = IRQ_RSI_INT0,
  555. .pin_req = {P_RSI_DATA0, P_RSI_DATA1, P_RSI_DATA2, P_RSI_DATA3, P_RSI_CMD, P_RSI_CLK, 0},
  556. };
  557. static struct platform_device bf51x_sdh_device = {
  558. .name = "bfin-sdh",
  559. .id = 0,
  560. .dev = {
  561. .platform_data = &bfin_sdh_data,
  562. },
  563. };
  564. #endif
  565. static const unsigned int cclk_vlev_datasheet[] =
  566. {
  567. VRPAIR(VLEV_100, 400000000),
  568. VRPAIR(VLEV_105, 426000000),
  569. VRPAIR(VLEV_110, 500000000),
  570. VRPAIR(VLEV_115, 533000000),
  571. VRPAIR(VLEV_120, 600000000),
  572. };
  573. static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
  574. .tuple_tab = cclk_vlev_datasheet,
  575. .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
  576. .vr_settling_time = 25 /* us */,
  577. };
  578. static struct platform_device bfin_dpmc = {
  579. .name = "bfin dpmc",
  580. .dev = {
  581. .platform_data = &bfin_dmpc_vreg_data,
  582. },
  583. };
  584. static struct platform_device *tcm_devices[] __initdata = {
  585. &bfin_dpmc,
  586. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  587. &rtc_device,
  588. #endif
  589. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  590. &bfin_mii_bus,
  591. &bfin_mac_device,
  592. #endif
  593. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  594. &bfin_spi0_device,
  595. &bfin_spi1_device,
  596. #endif
  597. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  598. #ifdef CONFIG_SERIAL_BFIN_UART0
  599. &bfin_uart0_device,
  600. #endif
  601. #ifdef CONFIG_SERIAL_BFIN_UART1
  602. &bfin_uart1_device,
  603. #endif
  604. #endif
  605. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  606. #ifdef CONFIG_BFIN_SIR0
  607. &bfin_sir0_device,
  608. #endif
  609. #ifdef CONFIG_BFIN_SIR1
  610. &bfin_sir1_device,
  611. #endif
  612. #endif
  613. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  614. &i2c_bfin_twi_device,
  615. #endif
  616. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  617. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  618. &bfin_sport0_uart_device,
  619. #endif
  620. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  621. &bfin_sport1_uart_device,
  622. #endif
  623. #endif
  624. #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
  625. &bfin_device_gpiokeys,
  626. #endif
  627. #if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
  628. &bf51x_sdh_device,
  629. #endif
  630. #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  631. &tcm_flash_device,
  632. #endif
  633. };
  634. static int __init tcm_init(void)
  635. {
  636. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  637. i2c_register_board_info(0, bfin_i2c_board_info,
  638. ARRAY_SIZE(bfin_i2c_board_info));
  639. platform_add_devices(tcm_devices, ARRAY_SIZE(tcm_devices));
  640. spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
  641. return 0;
  642. }
  643. arch_initcall(tcm_init);
  644. static struct platform_device *tcm_early_devices[] __initdata = {
  645. #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
  646. #ifdef CONFIG_SERIAL_BFIN_UART0
  647. &bfin_uart0_device,
  648. #endif
  649. #ifdef CONFIG_SERIAL_BFIN_UART1
  650. &bfin_uart1_device,
  651. #endif
  652. #endif
  653. #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
  654. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  655. &bfin_sport0_uart_device,
  656. #endif
  657. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  658. &bfin_sport1_uart_device,
  659. #endif
  660. #endif
  661. };
  662. void __init native_machine_early_platform_add_devices(void)
  663. {
  664. printk(KERN_INFO "register early platform devices\n");
  665. early_platform_add_devices(tcm_early_devices,
  666. ARRAY_SIZE(tcm_early_devices));
  667. }
  668. void native_machine_restart(char *cmd)
  669. {
  670. /* workaround reboot hang when booting from SPI */
  671. if ((bfin_read_SYSCR() & 0x7) == 0x3)
  672. bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
  673. }
  674. void bfin_get_ether_addr(char *addr)
  675. {
  676. random_ether_addr(addr);
  677. printk(KERN_WARNING "%s:%s: Setting Ethernet MAC to a random one\n", __FILE__, __func__);
  678. }
  679. EXPORT_SYMBOL(bfin_get_ether_addr);