devs.c 11 KB

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  1. /* linux/arch/arm/plat-s3c24xx/devs.c
  2. *
  3. * Copyright (c) 2004 Simtec Electronics
  4. * Ben Dooks <ben@simtec.co.uk>
  5. *
  6. * Base S3C24XX platform device definitions
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. *
  12. */
  13. #include <linux/kernel.h>
  14. #include <linux/types.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/list.h>
  17. #include <linux/timer.h>
  18. #include <linux/init.h>
  19. #include <linux/serial_core.h>
  20. #include <linux/platform_device.h>
  21. #include <linux/io.h>
  22. #include <linux/slab.h>
  23. #include <asm/mach/arch.h>
  24. #include <asm/mach/map.h>
  25. #include <asm/mach/irq.h>
  26. #include <mach/fb.h>
  27. #include <mach/hardware.h>
  28. #include <mach/dma.h>
  29. #include <mach/irqs.h>
  30. #include <asm/irq.h>
  31. #include <plat/regs-serial.h>
  32. #include <plat/udc.h>
  33. #include <plat/mci.h>
  34. #include <plat/devs.h>
  35. #include <plat/cpu.h>
  36. #include <plat/regs-spi.h>
  37. #include <mach/ts.h>
  38. /* Serial port registrations */
  39. static struct resource s3c2410_uart0_resource[] = {
  40. [0] = {
  41. .start = S3C2410_PA_UART0,
  42. .end = S3C2410_PA_UART0 + 0x3fff,
  43. .flags = IORESOURCE_MEM,
  44. },
  45. [1] = {
  46. .start = IRQ_S3CUART_RX0,
  47. .end = IRQ_S3CUART_ERR0,
  48. .flags = IORESOURCE_IRQ,
  49. }
  50. };
  51. static struct resource s3c2410_uart1_resource[] = {
  52. [0] = {
  53. .start = S3C2410_PA_UART1,
  54. .end = S3C2410_PA_UART1 + 0x3fff,
  55. .flags = IORESOURCE_MEM,
  56. },
  57. [1] = {
  58. .start = IRQ_S3CUART_RX1,
  59. .end = IRQ_S3CUART_ERR1,
  60. .flags = IORESOURCE_IRQ,
  61. }
  62. };
  63. static struct resource s3c2410_uart2_resource[] = {
  64. [0] = {
  65. .start = S3C2410_PA_UART2,
  66. .end = S3C2410_PA_UART2 + 0x3fff,
  67. .flags = IORESOURCE_MEM,
  68. },
  69. [1] = {
  70. .start = IRQ_S3CUART_RX2,
  71. .end = IRQ_S3CUART_ERR2,
  72. .flags = IORESOURCE_IRQ,
  73. }
  74. };
  75. static struct resource s3c2410_uart3_resource[] = {
  76. [0] = {
  77. .start = S3C2443_PA_UART3,
  78. .end = S3C2443_PA_UART3 + 0x3fff,
  79. .flags = IORESOURCE_MEM,
  80. },
  81. [1] = {
  82. .start = IRQ_S3CUART_RX3,
  83. .end = IRQ_S3CUART_ERR3,
  84. .flags = IORESOURCE_IRQ,
  85. },
  86. };
  87. struct s3c24xx_uart_resources s3c2410_uart_resources[] __initdata = {
  88. [0] = {
  89. .resources = s3c2410_uart0_resource,
  90. .nr_resources = ARRAY_SIZE(s3c2410_uart0_resource),
  91. },
  92. [1] = {
  93. .resources = s3c2410_uart1_resource,
  94. .nr_resources = ARRAY_SIZE(s3c2410_uart1_resource),
  95. },
  96. [2] = {
  97. .resources = s3c2410_uart2_resource,
  98. .nr_resources = ARRAY_SIZE(s3c2410_uart2_resource),
  99. },
  100. [3] = {
  101. .resources = s3c2410_uart3_resource,
  102. .nr_resources = ARRAY_SIZE(s3c2410_uart3_resource),
  103. },
  104. };
  105. /* LCD Controller */
  106. static struct resource s3c_lcd_resource[] = {
  107. [0] = {
  108. .start = S3C24XX_PA_LCD,
  109. .end = S3C24XX_PA_LCD + S3C24XX_SZ_LCD - 1,
  110. .flags = IORESOURCE_MEM,
  111. },
  112. [1] = {
  113. .start = IRQ_LCD,
  114. .end = IRQ_LCD,
  115. .flags = IORESOURCE_IRQ,
  116. }
  117. };
  118. static u64 s3c_device_lcd_dmamask = 0xffffffffUL;
  119. struct platform_device s3c_device_lcd = {
  120. .name = "s3c2410-lcd",
  121. .id = -1,
  122. .num_resources = ARRAY_SIZE(s3c_lcd_resource),
  123. .resource = s3c_lcd_resource,
  124. .dev = {
  125. .dma_mask = &s3c_device_lcd_dmamask,
  126. .coherent_dma_mask = 0xffffffffUL
  127. }
  128. };
  129. EXPORT_SYMBOL(s3c_device_lcd);
  130. void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *pd)
  131. {
  132. struct s3c2410fb_mach_info *npd;
  133. npd = kmalloc(sizeof(*npd), GFP_KERNEL);
  134. if (npd) {
  135. memcpy(npd, pd, sizeof(*npd));
  136. s3c_device_lcd.dev.platform_data = npd;
  137. } else {
  138. printk(KERN_ERR "no memory for LCD platform data\n");
  139. }
  140. }
  141. /* Touchscreen */
  142. static struct resource s3c_ts_resource[] = {
  143. [0] = {
  144. .start = S3C24XX_PA_ADC,
  145. .end = S3C24XX_PA_ADC + S3C24XX_SZ_ADC - 1,
  146. .flags = IORESOURCE_MEM,
  147. },
  148. [1] = {
  149. .start = IRQ_TC,
  150. .end = IRQ_TC,
  151. .flags = IORESOURCE_IRQ,
  152. },
  153. };
  154. struct platform_device s3c_device_ts = {
  155. .name = "s3c2410-ts",
  156. .id = -1,
  157. .dev.parent = &s3c_device_adc.dev,
  158. .num_resources = ARRAY_SIZE(s3c_ts_resource),
  159. .resource = s3c_ts_resource,
  160. };
  161. EXPORT_SYMBOL(s3c_device_ts);
  162. static struct s3c2410_ts_mach_info s3c2410ts_info;
  163. void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *hard_s3c2410ts_info)
  164. {
  165. memcpy(&s3c2410ts_info, hard_s3c2410ts_info, sizeof(struct s3c2410_ts_mach_info));
  166. s3c_device_ts.dev.platform_data = &s3c2410ts_info;
  167. }
  168. EXPORT_SYMBOL(s3c24xx_ts_set_platdata);
  169. /* USB Device (Gadget)*/
  170. static struct resource s3c_usbgadget_resource[] = {
  171. [0] = {
  172. .start = S3C24XX_PA_USBDEV,
  173. .end = S3C24XX_PA_USBDEV + S3C24XX_SZ_USBDEV - 1,
  174. .flags = IORESOURCE_MEM,
  175. },
  176. [1] = {
  177. .start = IRQ_USBD,
  178. .end = IRQ_USBD,
  179. .flags = IORESOURCE_IRQ,
  180. }
  181. };
  182. struct platform_device s3c_device_usbgadget = {
  183. .name = "s3c2410-usbgadget",
  184. .id = -1,
  185. .num_resources = ARRAY_SIZE(s3c_usbgadget_resource),
  186. .resource = s3c_usbgadget_resource,
  187. };
  188. EXPORT_SYMBOL(s3c_device_usbgadget);
  189. void __init s3c24xx_udc_set_platdata(struct s3c2410_udc_mach_info *pd)
  190. {
  191. struct s3c2410_udc_mach_info *npd;
  192. npd = kmalloc(sizeof(*npd), GFP_KERNEL);
  193. if (npd) {
  194. memcpy(npd, pd, sizeof(*npd));
  195. s3c_device_usbgadget.dev.platform_data = npd;
  196. } else {
  197. printk(KERN_ERR "no memory for udc platform data\n");
  198. }
  199. }
  200. /* Watchdog */
  201. static struct resource s3c_wdt_resource[] = {
  202. [0] = {
  203. .start = S3C24XX_PA_WATCHDOG,
  204. .end = S3C24XX_PA_WATCHDOG + S3C24XX_SZ_WATCHDOG - 1,
  205. .flags = IORESOURCE_MEM,
  206. },
  207. [1] = {
  208. .start = IRQ_WDT,
  209. .end = IRQ_WDT,
  210. .flags = IORESOURCE_IRQ,
  211. }
  212. };
  213. struct platform_device s3c_device_wdt = {
  214. .name = "s3c2410-wdt",
  215. .id = -1,
  216. .num_resources = ARRAY_SIZE(s3c_wdt_resource),
  217. .resource = s3c_wdt_resource,
  218. };
  219. EXPORT_SYMBOL(s3c_device_wdt);
  220. /* IIS */
  221. static struct resource s3c_iis_resource[] = {
  222. [0] = {
  223. .start = S3C24XX_PA_IIS,
  224. .end = S3C24XX_PA_IIS + S3C24XX_SZ_IIS -1,
  225. .flags = IORESOURCE_MEM,
  226. }
  227. };
  228. static u64 s3c_device_iis_dmamask = 0xffffffffUL;
  229. struct platform_device s3c_device_iis = {
  230. .name = "s3c2410-iis",
  231. .id = -1,
  232. .num_resources = ARRAY_SIZE(s3c_iis_resource),
  233. .resource = s3c_iis_resource,
  234. .dev = {
  235. .dma_mask = &s3c_device_iis_dmamask,
  236. .coherent_dma_mask = 0xffffffffUL
  237. }
  238. };
  239. EXPORT_SYMBOL(s3c_device_iis);
  240. /* RTC */
  241. static struct resource s3c_rtc_resource[] = {
  242. [0] = {
  243. .start = S3C24XX_PA_RTC,
  244. .end = S3C24XX_PA_RTC + 0xff,
  245. .flags = IORESOURCE_MEM,
  246. },
  247. [1] = {
  248. .start = IRQ_RTC,
  249. .end = IRQ_RTC,
  250. .flags = IORESOURCE_IRQ,
  251. },
  252. [2] = {
  253. .start = IRQ_TICK,
  254. .end = IRQ_TICK,
  255. .flags = IORESOURCE_IRQ
  256. }
  257. };
  258. struct platform_device s3c_device_rtc = {
  259. .name = "s3c2410-rtc",
  260. .id = -1,
  261. .num_resources = ARRAY_SIZE(s3c_rtc_resource),
  262. .resource = s3c_rtc_resource,
  263. };
  264. EXPORT_SYMBOL(s3c_device_rtc);
  265. /* ADC */
  266. static struct resource s3c_adc_resource[] = {
  267. [0] = {
  268. .start = S3C24XX_PA_ADC,
  269. .end = S3C24XX_PA_ADC + S3C24XX_SZ_ADC - 1,
  270. .flags = IORESOURCE_MEM,
  271. },
  272. [1] = {
  273. .start = IRQ_TC,
  274. .end = IRQ_TC,
  275. .flags = IORESOURCE_IRQ,
  276. },
  277. [2] = {
  278. .start = IRQ_ADC,
  279. .end = IRQ_ADC,
  280. .flags = IORESOURCE_IRQ,
  281. }
  282. };
  283. struct platform_device s3c_device_adc = {
  284. .name = "s3c24xx-adc",
  285. .id = -1,
  286. .num_resources = ARRAY_SIZE(s3c_adc_resource),
  287. .resource = s3c_adc_resource,
  288. };
  289. /* HWMON */
  290. struct platform_device s3c_device_hwmon = {
  291. .name = "s3c-hwmon",
  292. .id = -1,
  293. .dev.parent = &s3c_device_adc.dev,
  294. };
  295. /* SDI */
  296. static struct resource s3c_sdi_resource[] = {
  297. [0] = {
  298. .start = S3C24XX_PA_SDI,
  299. .end = S3C24XX_PA_SDI + S3C24XX_SZ_SDI - 1,
  300. .flags = IORESOURCE_MEM,
  301. },
  302. [1] = {
  303. .start = IRQ_SDI,
  304. .end = IRQ_SDI,
  305. .flags = IORESOURCE_IRQ,
  306. }
  307. };
  308. struct platform_device s3c_device_sdi = {
  309. .name = "s3c2410-sdi",
  310. .id = -1,
  311. .num_resources = ARRAY_SIZE(s3c_sdi_resource),
  312. .resource = s3c_sdi_resource,
  313. };
  314. EXPORT_SYMBOL(s3c_device_sdi);
  315. void s3c24xx_mci_set_platdata(struct s3c24xx_mci_pdata *pdata)
  316. {
  317. struct s3c24xx_mci_pdata *npd;
  318. npd = kmemdup(pdata, sizeof(struct s3c24xx_mci_pdata), GFP_KERNEL);
  319. if (!npd)
  320. printk(KERN_ERR "%s: no memory to copy pdata", __func__);
  321. s3c_device_sdi.dev.platform_data = npd;
  322. }
  323. /* SPI (0) */
  324. static struct resource s3c_spi0_resource[] = {
  325. [0] = {
  326. .start = S3C24XX_PA_SPI,
  327. .end = S3C24XX_PA_SPI + 0x1f,
  328. .flags = IORESOURCE_MEM,
  329. },
  330. [1] = {
  331. .start = IRQ_SPI0,
  332. .end = IRQ_SPI0,
  333. .flags = IORESOURCE_IRQ,
  334. }
  335. };
  336. static u64 s3c_device_spi0_dmamask = 0xffffffffUL;
  337. struct platform_device s3c_device_spi0 = {
  338. .name = "s3c2410-spi",
  339. .id = 0,
  340. .num_resources = ARRAY_SIZE(s3c_spi0_resource),
  341. .resource = s3c_spi0_resource,
  342. .dev = {
  343. .dma_mask = &s3c_device_spi0_dmamask,
  344. .coherent_dma_mask = 0xffffffffUL
  345. }
  346. };
  347. EXPORT_SYMBOL(s3c_device_spi0);
  348. /* SPI (1) */
  349. static struct resource s3c_spi1_resource[] = {
  350. [0] = {
  351. .start = S3C24XX_PA_SPI + S3C2410_SPI1,
  352. .end = S3C24XX_PA_SPI + S3C2410_SPI1 + 0x1f,
  353. .flags = IORESOURCE_MEM,
  354. },
  355. [1] = {
  356. .start = IRQ_SPI1,
  357. .end = IRQ_SPI1,
  358. .flags = IORESOURCE_IRQ,
  359. }
  360. };
  361. static u64 s3c_device_spi1_dmamask = 0xffffffffUL;
  362. struct platform_device s3c_device_spi1 = {
  363. .name = "s3c2410-spi",
  364. .id = 1,
  365. .num_resources = ARRAY_SIZE(s3c_spi1_resource),
  366. .resource = s3c_spi1_resource,
  367. .dev = {
  368. .dma_mask = &s3c_device_spi1_dmamask,
  369. .coherent_dma_mask = 0xffffffffUL
  370. }
  371. };
  372. EXPORT_SYMBOL(s3c_device_spi1);
  373. #ifdef CONFIG_CPU_S3C2440
  374. /* Camif Controller */
  375. static struct resource s3c_camif_resource[] = {
  376. [0] = {
  377. .start = S3C2440_PA_CAMIF,
  378. .end = S3C2440_PA_CAMIF + S3C2440_SZ_CAMIF - 1,
  379. .flags = IORESOURCE_MEM,
  380. },
  381. [1] = {
  382. .start = IRQ_CAM,
  383. .end = IRQ_CAM,
  384. .flags = IORESOURCE_IRQ,
  385. }
  386. };
  387. static u64 s3c_device_camif_dmamask = 0xffffffffUL;
  388. struct platform_device s3c_device_camif = {
  389. .name = "s3c2440-camif",
  390. .id = -1,
  391. .num_resources = ARRAY_SIZE(s3c_camif_resource),
  392. .resource = s3c_camif_resource,
  393. .dev = {
  394. .dma_mask = &s3c_device_camif_dmamask,
  395. .coherent_dma_mask = 0xffffffffUL
  396. }
  397. };
  398. EXPORT_SYMBOL(s3c_device_camif);
  399. /* AC97 */
  400. static struct resource s3c_ac97_resource[] = {
  401. [0] = {
  402. .start = S3C2440_PA_AC97,
  403. .end = S3C2440_PA_AC97 + S3C2440_SZ_AC97 -1,
  404. .flags = IORESOURCE_MEM,
  405. },
  406. [1] = {
  407. .start = IRQ_S3C244x_AC97,
  408. .end = IRQ_S3C244x_AC97,
  409. .flags = IORESOURCE_IRQ,
  410. },
  411. [2] = {
  412. .name = "PCM out",
  413. .start = DMACH_PCM_OUT,
  414. .end = DMACH_PCM_OUT,
  415. .flags = IORESOURCE_DMA,
  416. },
  417. [3] = {
  418. .name = "PCM in",
  419. .start = DMACH_PCM_IN,
  420. .end = DMACH_PCM_IN,
  421. .flags = IORESOURCE_DMA,
  422. },
  423. [4] = {
  424. .name = "Mic in",
  425. .start = DMACH_MIC_IN,
  426. .end = DMACH_MIC_IN,
  427. .flags = IORESOURCE_DMA,
  428. },
  429. };
  430. static u64 s3c_device_ac97_dmamask = 0xffffffffUL;
  431. struct platform_device s3c_device_ac97 = {
  432. .name = "s3c-ac97",
  433. .id = -1,
  434. .num_resources = ARRAY_SIZE(s3c_ac97_resource),
  435. .resource = s3c_ac97_resource,
  436. .dev = {
  437. .dma_mask = &s3c_device_ac97_dmamask,
  438. .coherent_dma_mask = 0xffffffffUL
  439. }
  440. };
  441. EXPORT_SYMBOL(s3c_device_ac97);
  442. #endif // CONFIG_CPU_S32440