uncompress.h 3.0 KB

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  1. /*
  2. * arch/arm/plat-mxc/include/mach/uncompress.h
  3. *
  4. * Copyright (C) 1999 ARM Limited
  5. * Copyright (C) Shane Nay (shane@minirl.com)
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or
  10. * (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  20. */
  21. #ifndef __ASM_ARCH_MXC_UNCOMPRESS_H__
  22. #define __ASM_ARCH_MXC_UNCOMPRESS_H__
  23. #define __MXC_BOOT_UNCOMPRESS
  24. #include <asm/mach-types.h>
  25. static unsigned long uart_base;
  26. #define UART(x) (*(volatile unsigned long *)(uart_base + (x)))
  27. #define USR2 0x98
  28. #define USR2_TXFE (1<<14)
  29. #define TXR 0x40
  30. #define UCR1 0x80
  31. #define UCR1_UARTEN 1
  32. /*
  33. * The following code assumes the serial port has already been
  34. * initialized by the bootloader. We search for the first enabled
  35. * port in the most probable order. If you didn't setup a port in
  36. * your bootloader then nothing will appear (which might be desired).
  37. *
  38. * This does not append a newline
  39. */
  40. static void putc(int ch)
  41. {
  42. if (!uart_base)
  43. return;
  44. if (!(UART(UCR1) & UCR1_UARTEN))
  45. return;
  46. while (!(UART(USR2) & USR2_TXFE))
  47. barrier();
  48. UART(TXR) = ch;
  49. }
  50. static inline void flush(void)
  51. {
  52. }
  53. #define MX1_UART1_BASE_ADDR 0x00206000
  54. #define MX25_UART1_BASE_ADDR 0x43f90000
  55. #define MX2X_UART1_BASE_ADDR 0x1000a000
  56. #define MX3X_UART1_BASE_ADDR 0x43F90000
  57. #define MX3X_UART2_BASE_ADDR 0x43F94000
  58. #define MX51_UART1_BASE_ADDR 0x73fbc000
  59. static __inline__ void __arch_decomp_setup(unsigned long arch_id)
  60. {
  61. switch (arch_id) {
  62. case MACH_TYPE_MX1ADS:
  63. case MACH_TYPE_SCB9328:
  64. uart_base = MX1_UART1_BASE_ADDR;
  65. break;
  66. case MACH_TYPE_MX25_3DS:
  67. uart_base = MX25_UART1_BASE_ADDR;
  68. break;
  69. case MACH_TYPE_IMX27LITE:
  70. case MACH_TYPE_MX27_3DS:
  71. case MACH_TYPE_MX27ADS:
  72. case MACH_TYPE_PCM038:
  73. case MACH_TYPE_MX21ADS:
  74. case MACH_TYPE_PCA100:
  75. case MACH_TYPE_MXT_TD60:
  76. uart_base = MX2X_UART1_BASE_ADDR;
  77. break;
  78. case MACH_TYPE_MX31LITE:
  79. case MACH_TYPE_ARMADILLO5X0:
  80. case MACH_TYPE_MX31MOBOARD:
  81. case MACH_TYPE_QONG:
  82. case MACH_TYPE_MX31_3DS:
  83. case MACH_TYPE_PCM037:
  84. case MACH_TYPE_MX31ADS:
  85. case MACH_TYPE_MX35_3DS:
  86. case MACH_TYPE_PCM043:
  87. case MACH_TYPE_LILLY1131:
  88. uart_base = MX3X_UART1_BASE_ADDR;
  89. break;
  90. case MACH_TYPE_MAGX_ZN5:
  91. uart_base = MX3X_UART2_BASE_ADDR;
  92. break;
  93. case MACH_TYPE_MX51_BABBAGE:
  94. uart_base = MX51_UART1_BASE_ADDR;
  95. break;
  96. default:
  97. break;
  98. }
  99. }
  100. #define arch_decomp_setup() __arch_decomp_setup(arch_id)
  101. #define arch_decomp_wdog()
  102. #endif /* __ASM_ARCH_MXC_UNCOMPRESS_H__ */