dma-mapping.c 15 KB

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  1. /*
  2. * linux/arch/arm/mm/dma-mapping.c
  3. *
  4. * Copyright (C) 2000-2004 Russell King
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. *
  10. * DMA uncached mapping support.
  11. */
  12. #include <linux/module.h>
  13. #include <linux/mm.h>
  14. #include <linux/gfp.h>
  15. #include <linux/errno.h>
  16. #include <linux/list.h>
  17. #include <linux/init.h>
  18. #include <linux/device.h>
  19. #include <linux/dma-mapping.h>
  20. #include <asm/memory.h>
  21. #include <asm/highmem.h>
  22. #include <asm/cacheflush.h>
  23. #include <asm/tlbflush.h>
  24. #include <asm/sizes.h>
  25. /* Sanity check size */
  26. #if (CONSISTENT_DMA_SIZE % SZ_2M)
  27. #error "CONSISTENT_DMA_SIZE must be multiple of 2MiB"
  28. #endif
  29. #define CONSISTENT_OFFSET(x) (((unsigned long)(x) - CONSISTENT_BASE) >> PAGE_SHIFT)
  30. #define CONSISTENT_PTE_INDEX(x) (((unsigned long)(x) - CONSISTENT_BASE) >> PGDIR_SHIFT)
  31. #define NUM_CONSISTENT_PTES (CONSISTENT_DMA_SIZE >> PGDIR_SHIFT)
  32. static u64 get_coherent_dma_mask(struct device *dev)
  33. {
  34. u64 mask = ISA_DMA_THRESHOLD;
  35. if (dev) {
  36. mask = dev->coherent_dma_mask;
  37. /*
  38. * Sanity check the DMA mask - it must be non-zero, and
  39. * must be able to be satisfied by a DMA allocation.
  40. */
  41. if (mask == 0) {
  42. dev_warn(dev, "coherent DMA mask is unset\n");
  43. return 0;
  44. }
  45. if ((~mask) & ISA_DMA_THRESHOLD) {
  46. dev_warn(dev, "coherent DMA mask %#llx is smaller "
  47. "than system GFP_DMA mask %#llx\n",
  48. mask, (unsigned long long)ISA_DMA_THRESHOLD);
  49. return 0;
  50. }
  51. }
  52. return mask;
  53. }
  54. /*
  55. * Allocate a DMA buffer for 'dev' of size 'size' using the
  56. * specified gfp mask. Note that 'size' must be page aligned.
  57. */
  58. static struct page *__dma_alloc_buffer(struct device *dev, size_t size, gfp_t gfp)
  59. {
  60. unsigned long order = get_order(size);
  61. struct page *page, *p, *e;
  62. void *ptr;
  63. u64 mask = get_coherent_dma_mask(dev);
  64. #ifdef CONFIG_DMA_API_DEBUG
  65. u64 limit = (mask + 1) & ~mask;
  66. if (limit && size >= limit) {
  67. dev_warn(dev, "coherent allocation too big (requested %#x mask %#llx)\n",
  68. size, mask);
  69. return NULL;
  70. }
  71. #endif
  72. if (!mask)
  73. return NULL;
  74. if (mask < 0xffffffffULL)
  75. gfp |= GFP_DMA;
  76. page = alloc_pages(gfp, order);
  77. if (!page)
  78. return NULL;
  79. /*
  80. * Now split the huge page and free the excess pages
  81. */
  82. split_page(page, order);
  83. for (p = page + (size >> PAGE_SHIFT), e = page + (1 << order); p < e; p++)
  84. __free_page(p);
  85. /*
  86. * Ensure that the allocated pages are zeroed, and that any data
  87. * lurking in the kernel direct-mapped region is invalidated.
  88. */
  89. ptr = page_address(page);
  90. memset(ptr, 0, size);
  91. dmac_flush_range(ptr, ptr + size);
  92. outer_flush_range(__pa(ptr), __pa(ptr) + size);
  93. return page;
  94. }
  95. /*
  96. * Free a DMA buffer. 'size' must be page aligned.
  97. */
  98. static void __dma_free_buffer(struct page *page, size_t size)
  99. {
  100. struct page *e = page + (size >> PAGE_SHIFT);
  101. while (page < e) {
  102. __free_page(page);
  103. page++;
  104. }
  105. }
  106. #ifdef CONFIG_MMU
  107. /*
  108. * These are the page tables (2MB each) covering uncached, DMA consistent allocations
  109. */
  110. static pte_t *consistent_pte[NUM_CONSISTENT_PTES];
  111. #include "vmregion.h"
  112. static struct arm_vmregion_head consistent_head = {
  113. .vm_lock = __SPIN_LOCK_UNLOCKED(&consistent_head.vm_lock),
  114. .vm_list = LIST_HEAD_INIT(consistent_head.vm_list),
  115. .vm_start = CONSISTENT_BASE,
  116. .vm_end = CONSISTENT_END,
  117. };
  118. #ifdef CONFIG_HUGETLB_PAGE
  119. #error ARM Coherent DMA allocator does not (yet) support huge TLB
  120. #endif
  121. /*
  122. * Initialise the consistent memory allocation.
  123. */
  124. static int __init consistent_init(void)
  125. {
  126. int ret = 0;
  127. pgd_t *pgd;
  128. pmd_t *pmd;
  129. pte_t *pte;
  130. int i = 0;
  131. u32 base = CONSISTENT_BASE;
  132. do {
  133. pgd = pgd_offset(&init_mm, base);
  134. pmd = pmd_alloc(&init_mm, pgd, base);
  135. if (!pmd) {
  136. printk(KERN_ERR "%s: no pmd tables\n", __func__);
  137. ret = -ENOMEM;
  138. break;
  139. }
  140. WARN_ON(!pmd_none(*pmd));
  141. pte = pte_alloc_kernel(pmd, base);
  142. if (!pte) {
  143. printk(KERN_ERR "%s: no pte tables\n", __func__);
  144. ret = -ENOMEM;
  145. break;
  146. }
  147. consistent_pte[i++] = pte;
  148. base += (1 << PGDIR_SHIFT);
  149. } while (base < CONSISTENT_END);
  150. return ret;
  151. }
  152. core_initcall(consistent_init);
  153. static void *
  154. __dma_alloc_remap(struct page *page, size_t size, gfp_t gfp, pgprot_t prot)
  155. {
  156. struct arm_vmregion *c;
  157. if (!consistent_pte[0]) {
  158. printk(KERN_ERR "%s: not initialised\n", __func__);
  159. dump_stack();
  160. return NULL;
  161. }
  162. /*
  163. * Allocate a virtual address in the consistent mapping region.
  164. */
  165. c = arm_vmregion_alloc(&consistent_head, size,
  166. gfp & ~(__GFP_DMA | __GFP_HIGHMEM));
  167. if (c) {
  168. pte_t *pte;
  169. int idx = CONSISTENT_PTE_INDEX(c->vm_start);
  170. u32 off = CONSISTENT_OFFSET(c->vm_start) & (PTRS_PER_PTE-1);
  171. pte = consistent_pte[idx] + off;
  172. c->vm_pages = page;
  173. do {
  174. BUG_ON(!pte_none(*pte));
  175. set_pte_ext(pte, mk_pte(page, prot), 0);
  176. page++;
  177. pte++;
  178. off++;
  179. if (off >= PTRS_PER_PTE) {
  180. off = 0;
  181. pte = consistent_pte[++idx];
  182. }
  183. } while (size -= PAGE_SIZE);
  184. return (void *)c->vm_start;
  185. }
  186. return NULL;
  187. }
  188. static void __dma_free_remap(void *cpu_addr, size_t size)
  189. {
  190. struct arm_vmregion *c;
  191. unsigned long addr;
  192. pte_t *ptep;
  193. int idx;
  194. u32 off;
  195. c = arm_vmregion_find_remove(&consistent_head, (unsigned long)cpu_addr);
  196. if (!c) {
  197. printk(KERN_ERR "%s: trying to free invalid coherent area: %p\n",
  198. __func__, cpu_addr);
  199. dump_stack();
  200. return;
  201. }
  202. if ((c->vm_end - c->vm_start) != size) {
  203. printk(KERN_ERR "%s: freeing wrong coherent size (%ld != %d)\n",
  204. __func__, c->vm_end - c->vm_start, size);
  205. dump_stack();
  206. size = c->vm_end - c->vm_start;
  207. }
  208. idx = CONSISTENT_PTE_INDEX(c->vm_start);
  209. off = CONSISTENT_OFFSET(c->vm_start) & (PTRS_PER_PTE-1);
  210. ptep = consistent_pte[idx] + off;
  211. addr = c->vm_start;
  212. do {
  213. pte_t pte = ptep_get_and_clear(&init_mm, addr, ptep);
  214. ptep++;
  215. addr += PAGE_SIZE;
  216. off++;
  217. if (off >= PTRS_PER_PTE) {
  218. off = 0;
  219. ptep = consistent_pte[++idx];
  220. }
  221. if (pte_none(pte) || !pte_present(pte))
  222. printk(KERN_CRIT "%s: bad page in kernel page table\n",
  223. __func__);
  224. } while (size -= PAGE_SIZE);
  225. flush_tlb_kernel_range(c->vm_start, c->vm_end);
  226. arm_vmregion_free(&consistent_head, c);
  227. }
  228. #else /* !CONFIG_MMU */
  229. #define __dma_alloc_remap(page, size, gfp, prot) page_address(page)
  230. #define __dma_free_remap(addr, size) do { } while (0)
  231. #endif /* CONFIG_MMU */
  232. static void *
  233. __dma_alloc(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp,
  234. pgprot_t prot)
  235. {
  236. struct page *page;
  237. void *addr;
  238. *handle = ~0;
  239. size = PAGE_ALIGN(size);
  240. page = __dma_alloc_buffer(dev, size, gfp);
  241. if (!page)
  242. return NULL;
  243. if (!arch_is_coherent())
  244. addr = __dma_alloc_remap(page, size, gfp, prot);
  245. else
  246. addr = page_address(page);
  247. if (addr)
  248. *handle = page_to_dma(dev, page);
  249. return addr;
  250. }
  251. /*
  252. * Allocate DMA-coherent memory space and return both the kernel remapped
  253. * virtual and bus address for that space.
  254. */
  255. void *
  256. dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp)
  257. {
  258. void *memory;
  259. if (dma_alloc_from_coherent(dev, size, handle, &memory))
  260. return memory;
  261. return __dma_alloc(dev, size, handle, gfp,
  262. pgprot_dmacoherent(pgprot_kernel));
  263. }
  264. EXPORT_SYMBOL(dma_alloc_coherent);
  265. /*
  266. * Allocate a writecombining region, in much the same way as
  267. * dma_alloc_coherent above.
  268. */
  269. void *
  270. dma_alloc_writecombine(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp)
  271. {
  272. return __dma_alloc(dev, size, handle, gfp,
  273. pgprot_writecombine(pgprot_kernel));
  274. }
  275. EXPORT_SYMBOL(dma_alloc_writecombine);
  276. static int dma_mmap(struct device *dev, struct vm_area_struct *vma,
  277. void *cpu_addr, dma_addr_t dma_addr, size_t size)
  278. {
  279. int ret = -ENXIO;
  280. #ifdef CONFIG_MMU
  281. unsigned long user_size, kern_size;
  282. struct arm_vmregion *c;
  283. user_size = (vma->vm_end - vma->vm_start) >> PAGE_SHIFT;
  284. c = arm_vmregion_find(&consistent_head, (unsigned long)cpu_addr);
  285. if (c) {
  286. unsigned long off = vma->vm_pgoff;
  287. kern_size = (c->vm_end - c->vm_start) >> PAGE_SHIFT;
  288. if (off < kern_size &&
  289. user_size <= (kern_size - off)) {
  290. ret = remap_pfn_range(vma, vma->vm_start,
  291. page_to_pfn(c->vm_pages) + off,
  292. user_size << PAGE_SHIFT,
  293. vma->vm_page_prot);
  294. }
  295. }
  296. #endif /* CONFIG_MMU */
  297. return ret;
  298. }
  299. int dma_mmap_coherent(struct device *dev, struct vm_area_struct *vma,
  300. void *cpu_addr, dma_addr_t dma_addr, size_t size)
  301. {
  302. vma->vm_page_prot = pgprot_dmacoherent(vma->vm_page_prot);
  303. return dma_mmap(dev, vma, cpu_addr, dma_addr, size);
  304. }
  305. EXPORT_SYMBOL(dma_mmap_coherent);
  306. int dma_mmap_writecombine(struct device *dev, struct vm_area_struct *vma,
  307. void *cpu_addr, dma_addr_t dma_addr, size_t size)
  308. {
  309. vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
  310. return dma_mmap(dev, vma, cpu_addr, dma_addr, size);
  311. }
  312. EXPORT_SYMBOL(dma_mmap_writecombine);
  313. /*
  314. * free a page as defined by the above mapping.
  315. * Must not be called with IRQs disabled.
  316. */
  317. void dma_free_coherent(struct device *dev, size_t size, void *cpu_addr, dma_addr_t handle)
  318. {
  319. WARN_ON(irqs_disabled());
  320. if (dma_release_from_coherent(dev, get_order(size), cpu_addr))
  321. return;
  322. size = PAGE_ALIGN(size);
  323. if (!arch_is_coherent())
  324. __dma_free_remap(cpu_addr, size);
  325. __dma_free_buffer(dma_to_page(dev, handle), size);
  326. }
  327. EXPORT_SYMBOL(dma_free_coherent);
  328. /*
  329. * Make an area consistent for devices.
  330. * Note: Drivers should NOT use this function directly, as it will break
  331. * platforms with CONFIG_DMABOUNCE.
  332. * Use the driver DMA support - see dma-mapping.h (dma_sync_*)
  333. */
  334. void ___dma_single_cpu_to_dev(const void *kaddr, size_t size,
  335. enum dma_data_direction dir)
  336. {
  337. unsigned long paddr;
  338. BUG_ON(!virt_addr_valid(kaddr) || !virt_addr_valid(kaddr + size - 1));
  339. dmac_map_area(kaddr, size, dir);
  340. paddr = __pa(kaddr);
  341. if (dir == DMA_FROM_DEVICE) {
  342. outer_inv_range(paddr, paddr + size);
  343. } else {
  344. outer_clean_range(paddr, paddr + size);
  345. }
  346. /* FIXME: non-speculating: flush on bidirectional mappings? */
  347. }
  348. EXPORT_SYMBOL(___dma_single_cpu_to_dev);
  349. void ___dma_single_dev_to_cpu(const void *kaddr, size_t size,
  350. enum dma_data_direction dir)
  351. {
  352. BUG_ON(!virt_addr_valid(kaddr) || !virt_addr_valid(kaddr + size - 1));
  353. /* FIXME: non-speculating: not required */
  354. /* don't bother invalidating if DMA to device */
  355. if (dir != DMA_TO_DEVICE) {
  356. unsigned long paddr = __pa(kaddr);
  357. outer_inv_range(paddr, paddr + size);
  358. }
  359. dmac_unmap_area(kaddr, size, dir);
  360. }
  361. EXPORT_SYMBOL(___dma_single_dev_to_cpu);
  362. static void dma_cache_maint_page(struct page *page, unsigned long offset,
  363. size_t size, enum dma_data_direction dir,
  364. void (*op)(const void *, size_t, int))
  365. {
  366. /*
  367. * A single sg entry may refer to multiple physically contiguous
  368. * pages. But we still need to process highmem pages individually.
  369. * If highmem is not configured then the bulk of this loop gets
  370. * optimized out.
  371. */
  372. size_t left = size;
  373. do {
  374. size_t len = left;
  375. void *vaddr;
  376. if (PageHighMem(page)) {
  377. if (len + offset > PAGE_SIZE) {
  378. if (offset >= PAGE_SIZE) {
  379. page += offset / PAGE_SIZE;
  380. offset %= PAGE_SIZE;
  381. }
  382. len = PAGE_SIZE - offset;
  383. }
  384. vaddr = kmap_high_get(page);
  385. if (vaddr) {
  386. vaddr += offset;
  387. op(vaddr, len, dir);
  388. kunmap_high(page);
  389. } else if (cache_is_vipt()) {
  390. pte_t saved_pte;
  391. vaddr = kmap_high_l1_vipt(page, &saved_pte);
  392. op(vaddr + offset, len, dir);
  393. kunmap_high_l1_vipt(page, saved_pte);
  394. }
  395. } else {
  396. vaddr = page_address(page) + offset;
  397. op(vaddr, len, dir);
  398. }
  399. offset = 0;
  400. page++;
  401. left -= len;
  402. } while (left);
  403. }
  404. void ___dma_page_cpu_to_dev(struct page *page, unsigned long off,
  405. size_t size, enum dma_data_direction dir)
  406. {
  407. unsigned long paddr;
  408. dma_cache_maint_page(page, off, size, dir, dmac_map_area);
  409. paddr = page_to_phys(page) + off;
  410. if (dir == DMA_FROM_DEVICE) {
  411. outer_inv_range(paddr, paddr + size);
  412. } else {
  413. outer_clean_range(paddr, paddr + size);
  414. }
  415. /* FIXME: non-speculating: flush on bidirectional mappings? */
  416. }
  417. EXPORT_SYMBOL(___dma_page_cpu_to_dev);
  418. void ___dma_page_dev_to_cpu(struct page *page, unsigned long off,
  419. size_t size, enum dma_data_direction dir)
  420. {
  421. unsigned long paddr = page_to_phys(page) + off;
  422. /* FIXME: non-speculating: not required */
  423. /* don't bother invalidating if DMA to device */
  424. if (dir != DMA_TO_DEVICE)
  425. outer_inv_range(paddr, paddr + size);
  426. dma_cache_maint_page(page, off, size, dir, dmac_unmap_area);
  427. }
  428. EXPORT_SYMBOL(___dma_page_dev_to_cpu);
  429. /**
  430. * dma_map_sg - map a set of SG buffers for streaming mode DMA
  431. * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
  432. * @sg: list of buffers
  433. * @nents: number of buffers to map
  434. * @dir: DMA transfer direction
  435. *
  436. * Map a set of buffers described by scatterlist in streaming mode for DMA.
  437. * This is the scatter-gather version of the dma_map_single interface.
  438. * Here the scatter gather list elements are each tagged with the
  439. * appropriate dma address and length. They are obtained via
  440. * sg_dma_{address,length}.
  441. *
  442. * Device ownership issues as mentioned for dma_map_single are the same
  443. * here.
  444. */
  445. int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
  446. enum dma_data_direction dir)
  447. {
  448. struct scatterlist *s;
  449. int i, j;
  450. for_each_sg(sg, s, nents, i) {
  451. s->dma_address = dma_map_page(dev, sg_page(s), s->offset,
  452. s->length, dir);
  453. if (dma_mapping_error(dev, s->dma_address))
  454. goto bad_mapping;
  455. }
  456. return nents;
  457. bad_mapping:
  458. for_each_sg(sg, s, i, j)
  459. dma_unmap_page(dev, sg_dma_address(s), sg_dma_len(s), dir);
  460. return 0;
  461. }
  462. EXPORT_SYMBOL(dma_map_sg);
  463. /**
  464. * dma_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
  465. * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
  466. * @sg: list of buffers
  467. * @nents: number of buffers to unmap (returned from dma_map_sg)
  468. * @dir: DMA transfer direction (same as was passed to dma_map_sg)
  469. *
  470. * Unmap a set of streaming mode DMA translations. Again, CPU access
  471. * rules concerning calls here are the same as for dma_unmap_single().
  472. */
  473. void dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nents,
  474. enum dma_data_direction dir)
  475. {
  476. struct scatterlist *s;
  477. int i;
  478. for_each_sg(sg, s, nents, i)
  479. dma_unmap_page(dev, sg_dma_address(s), sg_dma_len(s), dir);
  480. }
  481. EXPORT_SYMBOL(dma_unmap_sg);
  482. /**
  483. * dma_sync_sg_for_cpu
  484. * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
  485. * @sg: list of buffers
  486. * @nents: number of buffers to map (returned from dma_map_sg)
  487. * @dir: DMA transfer direction (same as was passed to dma_map_sg)
  488. */
  489. void dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
  490. int nents, enum dma_data_direction dir)
  491. {
  492. struct scatterlist *s;
  493. int i;
  494. for_each_sg(sg, s, nents, i) {
  495. if (!dmabounce_sync_for_cpu(dev, sg_dma_address(s), 0,
  496. sg_dma_len(s), dir))
  497. continue;
  498. __dma_page_dev_to_cpu(sg_page(s), s->offset,
  499. s->length, dir);
  500. }
  501. }
  502. EXPORT_SYMBOL(dma_sync_sg_for_cpu);
  503. /**
  504. * dma_sync_sg_for_device
  505. * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
  506. * @sg: list of buffers
  507. * @nents: number of buffers to map (returned from dma_map_sg)
  508. * @dir: DMA transfer direction (same as was passed to dma_map_sg)
  509. */
  510. void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
  511. int nents, enum dma_data_direction dir)
  512. {
  513. struct scatterlist *s;
  514. int i;
  515. for_each_sg(sg, s, nents, i) {
  516. if (!dmabounce_sync_for_device(dev, sg_dma_address(s), 0,
  517. sg_dma_len(s), dir))
  518. continue;
  519. __dma_page_cpu_to_dev(sg_page(s), s->offset,
  520. s->length, dir);
  521. }
  522. }
  523. EXPORT_SYMBOL(dma_sync_sg_for_device);