viper.c 22 KB

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  1. /*
  2. * linux/arch/arm/mach-pxa/viper.c
  3. *
  4. * Support for the Arcom VIPER SBC.
  5. *
  6. * Author: Ian Campbell
  7. * Created: Feb 03, 2003
  8. * Copyright: Arcom Control Systems
  9. *
  10. * Maintained by Marc Zyngier <maz@misterjones.org>
  11. * <marc.zyngier@altran.com>
  12. *
  13. * Based on lubbock.c:
  14. * Author: Nicolas Pitre
  15. * Created: Jun 15, 2001
  16. * Copyright: MontaVista Software Inc.
  17. *
  18. * This program is free software; you can redistribute it and/or modify
  19. * it under the terms of the GNU General Public License version 2 as
  20. * published by the Free Software Foundation.
  21. */
  22. #include <linux/types.h>
  23. #include <linux/memory.h>
  24. #include <linux/cpu.h>
  25. #include <linux/cpufreq.h>
  26. #include <linux/delay.h>
  27. #include <linux/fs.h>
  28. #include <linux/init.h>
  29. #include <linux/slab.h>
  30. #include <linux/interrupt.h>
  31. #include <linux/major.h>
  32. #include <linux/module.h>
  33. #include <linux/pm.h>
  34. #include <linux/sched.h>
  35. #include <linux/gpio.h>
  36. #include <linux/i2c-gpio.h>
  37. #include <linux/serial_8250.h>
  38. #include <linux/smc91x.h>
  39. #include <linux/pwm_backlight.h>
  40. #include <linux/usb/isp116x.h>
  41. #include <linux/mtd/mtd.h>
  42. #include <linux/mtd/partitions.h>
  43. #include <linux/mtd/physmap.h>
  44. #include <mach/pxa25x.h>
  45. #include <mach/audio.h>
  46. #include <mach/pxafb.h>
  47. #include <plat/i2c.h>
  48. #include <mach/regs-uart.h>
  49. #include <mach/arcom-pcmcia.h>
  50. #include <mach/viper.h>
  51. #include <asm/setup.h>
  52. #include <asm/mach-types.h>
  53. #include <asm/irq.h>
  54. #include <asm/sizes.h>
  55. #include <asm/mach/arch.h>
  56. #include <asm/mach/map.h>
  57. #include <asm/mach/irq.h>
  58. #include "generic.h"
  59. #include "devices.h"
  60. static unsigned int icr;
  61. static void viper_icr_set_bit(unsigned int bit)
  62. {
  63. icr |= bit;
  64. VIPER_ICR = icr;
  65. }
  66. static void viper_icr_clear_bit(unsigned int bit)
  67. {
  68. icr &= ~bit;
  69. VIPER_ICR = icr;
  70. }
  71. /* This function is used from the pcmcia module to reset the CF */
  72. static void viper_cf_reset(int state)
  73. {
  74. if (state)
  75. viper_icr_set_bit(VIPER_ICR_CF_RST);
  76. else
  77. viper_icr_clear_bit(VIPER_ICR_CF_RST);
  78. }
  79. static struct arcom_pcmcia_pdata viper_pcmcia_info = {
  80. .cd_gpio = VIPER_CF_CD_GPIO,
  81. .rdy_gpio = VIPER_CF_RDY_GPIO,
  82. .pwr_gpio = VIPER_CF_POWER_GPIO,
  83. .reset = viper_cf_reset,
  84. };
  85. static struct platform_device viper_pcmcia_device = {
  86. .name = "viper-pcmcia",
  87. .id = -1,
  88. .dev = {
  89. .platform_data = &viper_pcmcia_info,
  90. },
  91. };
  92. /*
  93. * The CPLD version register was not present on VIPER boards prior to
  94. * v2i1. On v1 boards where the version register is not present we
  95. * will just read back the previous value from the databus.
  96. *
  97. * Therefore we do two reads. The first time we write 0 to the
  98. * (read-only) register before reading and the second time we write
  99. * 0xff first. If the two reads do not match or they read back as 0xff
  100. * or 0x00 then we have version 1 hardware.
  101. */
  102. static u8 viper_hw_version(void)
  103. {
  104. u8 v1, v2;
  105. unsigned long flags;
  106. local_irq_save(flags);
  107. VIPER_VERSION = 0;
  108. v1 = VIPER_VERSION;
  109. VIPER_VERSION = 0xff;
  110. v2 = VIPER_VERSION;
  111. v1 = (v1 != v2 || v1 == 0xff) ? 0 : v1;
  112. local_irq_restore(flags);
  113. return v1;
  114. }
  115. /* CPU sysdev */
  116. static int viper_cpu_suspend(struct sys_device *sysdev, pm_message_t state)
  117. {
  118. viper_icr_set_bit(VIPER_ICR_R_DIS);
  119. return 0;
  120. }
  121. static int viper_cpu_resume(struct sys_device *sysdev)
  122. {
  123. viper_icr_clear_bit(VIPER_ICR_R_DIS);
  124. return 0;
  125. }
  126. static struct sysdev_driver viper_cpu_sysdev_driver = {
  127. .suspend = viper_cpu_suspend,
  128. .resume = viper_cpu_resume,
  129. };
  130. static unsigned int current_voltage_divisor;
  131. /*
  132. * If force is not true then step from existing to new divisor. If
  133. * force is true then jump straight to the new divisor. Stepping is
  134. * used because if the jump in voltage is too large, the VCC can dip
  135. * too low and the regulator cuts out.
  136. *
  137. * force can be used to initialize the divisor to a know state by
  138. * setting the value for the current clock speed, since we are already
  139. * running at that speed we know the voltage should be pretty close so
  140. * the jump won't be too large
  141. */
  142. static void viper_set_core_cpu_voltage(unsigned long khz, int force)
  143. {
  144. int i = 0;
  145. unsigned int divisor = 0;
  146. const char *v;
  147. if (khz < 200000) {
  148. v = "1.0"; divisor = 0xfff;
  149. } else if (khz < 300000) {
  150. v = "1.1"; divisor = 0xde5;
  151. } else {
  152. v = "1.3"; divisor = 0x325;
  153. }
  154. pr_debug("viper: setting CPU core voltage to %sV at %d.%03dMHz\n",
  155. v, (int)khz / 1000, (int)khz % 1000);
  156. #define STEP 0x100
  157. do {
  158. int step;
  159. if (force)
  160. step = divisor;
  161. else if (current_voltage_divisor < divisor - STEP)
  162. step = current_voltage_divisor + STEP;
  163. else if (current_voltage_divisor > divisor + STEP)
  164. step = current_voltage_divisor - STEP;
  165. else
  166. step = divisor;
  167. force = 0;
  168. gpio_set_value(VIPER_PSU_CLK_GPIO, 0);
  169. gpio_set_value(VIPER_PSU_nCS_LD_GPIO, 0);
  170. for (i = 1 << 11 ; i > 0 ; i >>= 1) {
  171. udelay(1);
  172. gpio_set_value(VIPER_PSU_DATA_GPIO, step & i);
  173. udelay(1);
  174. gpio_set_value(VIPER_PSU_CLK_GPIO, 1);
  175. udelay(1);
  176. gpio_set_value(VIPER_PSU_CLK_GPIO, 0);
  177. }
  178. udelay(1);
  179. gpio_set_value(VIPER_PSU_nCS_LD_GPIO, 1);
  180. udelay(1);
  181. gpio_set_value(VIPER_PSU_nCS_LD_GPIO, 0);
  182. current_voltage_divisor = step;
  183. } while (current_voltage_divisor != divisor);
  184. }
  185. /* Interrupt handling */
  186. static unsigned long viper_irq_enabled_mask;
  187. static const int viper_isa_irqs[] = { 3, 4, 5, 6, 7, 10, 11, 12, 9, 14, 15 };
  188. static const int viper_isa_irq_map[] = {
  189. 0, /* ISA irq #0, invalid */
  190. 0, /* ISA irq #1, invalid */
  191. 0, /* ISA irq #2, invalid */
  192. 1 << 0, /* ISA irq #3 */
  193. 1 << 1, /* ISA irq #4 */
  194. 1 << 2, /* ISA irq #5 */
  195. 1 << 3, /* ISA irq #6 */
  196. 1 << 4, /* ISA irq #7 */
  197. 0, /* ISA irq #8, invalid */
  198. 1 << 8, /* ISA irq #9 */
  199. 1 << 5, /* ISA irq #10 */
  200. 1 << 6, /* ISA irq #11 */
  201. 1 << 7, /* ISA irq #12 */
  202. 0, /* ISA irq #13, invalid */
  203. 1 << 9, /* ISA irq #14 */
  204. 1 << 10, /* ISA irq #15 */
  205. };
  206. static inline int viper_irq_to_bitmask(unsigned int irq)
  207. {
  208. return viper_isa_irq_map[irq - PXA_ISA_IRQ(0)];
  209. }
  210. static inline int viper_bit_to_irq(int bit)
  211. {
  212. return viper_isa_irqs[bit] + PXA_ISA_IRQ(0);
  213. }
  214. static void viper_ack_irq(unsigned int irq)
  215. {
  216. int viper_irq = viper_irq_to_bitmask(irq);
  217. if (viper_irq & 0xff)
  218. VIPER_LO_IRQ_STATUS = viper_irq;
  219. else
  220. VIPER_HI_IRQ_STATUS = (viper_irq >> 8);
  221. }
  222. static void viper_mask_irq(unsigned int irq)
  223. {
  224. viper_irq_enabled_mask &= ~(viper_irq_to_bitmask(irq));
  225. }
  226. static void viper_unmask_irq(unsigned int irq)
  227. {
  228. viper_irq_enabled_mask |= viper_irq_to_bitmask(irq);
  229. }
  230. static inline unsigned long viper_irq_pending(void)
  231. {
  232. return (VIPER_HI_IRQ_STATUS << 8 | VIPER_LO_IRQ_STATUS) &
  233. viper_irq_enabled_mask;
  234. }
  235. static void viper_irq_handler(unsigned int irq, struct irq_desc *desc)
  236. {
  237. unsigned long pending;
  238. pending = viper_irq_pending();
  239. do {
  240. /* we're in a chained irq handler,
  241. * so ack the interrupt by hand */
  242. desc->chip->ack(irq);
  243. if (likely(pending)) {
  244. irq = viper_bit_to_irq(__ffs(pending));
  245. generic_handle_irq(irq);
  246. }
  247. pending = viper_irq_pending();
  248. } while (pending);
  249. }
  250. static struct irq_chip viper_irq_chip = {
  251. .name = "ISA",
  252. .ack = viper_ack_irq,
  253. .mask = viper_mask_irq,
  254. .unmask = viper_unmask_irq
  255. };
  256. static void __init viper_init_irq(void)
  257. {
  258. int level;
  259. int isa_irq;
  260. pxa25x_init_irq();
  261. /* setup ISA IRQs */
  262. for (level = 0; level < ARRAY_SIZE(viper_isa_irqs); level++) {
  263. isa_irq = viper_bit_to_irq(level);
  264. set_irq_chip(isa_irq, &viper_irq_chip);
  265. set_irq_handler(isa_irq, handle_edge_irq);
  266. set_irq_flags(isa_irq, IRQF_VALID | IRQF_PROBE);
  267. }
  268. set_irq_chained_handler(gpio_to_irq(VIPER_CPLD_GPIO),
  269. viper_irq_handler);
  270. set_irq_type(gpio_to_irq(VIPER_CPLD_GPIO), IRQ_TYPE_EDGE_BOTH);
  271. }
  272. /* Flat Panel */
  273. static struct pxafb_mode_info fb_mode_info[] = {
  274. {
  275. .pixclock = 157500,
  276. .xres = 320,
  277. .yres = 240,
  278. .bpp = 16,
  279. .hsync_len = 63,
  280. .left_margin = 7,
  281. .right_margin = 13,
  282. .vsync_len = 20,
  283. .upper_margin = 0,
  284. .lower_margin = 0,
  285. .sync = 0,
  286. },
  287. };
  288. static struct pxafb_mach_info fb_info = {
  289. .modes = fb_mode_info,
  290. .num_modes = 1,
  291. .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
  292. };
  293. static int viper_backlight_init(struct device *dev)
  294. {
  295. int ret;
  296. /* GPIO9 and 10 control FB backlight. Initialise to off */
  297. ret = gpio_request(VIPER_BCKLIGHT_EN_GPIO, "Backlight");
  298. if (ret)
  299. goto err_request_bckl;
  300. ret = gpio_request(VIPER_LCD_EN_GPIO, "LCD");
  301. if (ret)
  302. goto err_request_lcd;
  303. ret = gpio_direction_output(VIPER_BCKLIGHT_EN_GPIO, 0);
  304. if (ret)
  305. goto err_dir;
  306. ret = gpio_direction_output(VIPER_LCD_EN_GPIO, 0);
  307. if (ret)
  308. goto err_dir;
  309. return 0;
  310. err_dir:
  311. gpio_free(VIPER_LCD_EN_GPIO);
  312. err_request_lcd:
  313. gpio_free(VIPER_BCKLIGHT_EN_GPIO);
  314. err_request_bckl:
  315. dev_err(dev, "Failed to setup LCD GPIOs\n");
  316. return ret;
  317. }
  318. static int viper_backlight_notify(struct device *dev, int brightness)
  319. {
  320. gpio_set_value(VIPER_LCD_EN_GPIO, !!brightness);
  321. gpio_set_value(VIPER_BCKLIGHT_EN_GPIO, !!brightness);
  322. return brightness;
  323. }
  324. static void viper_backlight_exit(struct device *dev)
  325. {
  326. gpio_free(VIPER_LCD_EN_GPIO);
  327. gpio_free(VIPER_BCKLIGHT_EN_GPIO);
  328. }
  329. static struct platform_pwm_backlight_data viper_backlight_data = {
  330. .pwm_id = 0,
  331. .max_brightness = 100,
  332. .dft_brightness = 100,
  333. .pwm_period_ns = 1000000,
  334. .init = viper_backlight_init,
  335. .notify = viper_backlight_notify,
  336. .exit = viper_backlight_exit,
  337. };
  338. static struct platform_device viper_backlight_device = {
  339. .name = "pwm-backlight",
  340. .dev = {
  341. .parent = &pxa25x_device_pwm0.dev,
  342. .platform_data = &viper_backlight_data,
  343. },
  344. };
  345. /* Ethernet */
  346. static struct resource smc91x_resources[] = {
  347. [0] = {
  348. .name = "smc91x-regs",
  349. .start = VIPER_ETH_PHYS + 0x300,
  350. .end = VIPER_ETH_PHYS + 0x30f,
  351. .flags = IORESOURCE_MEM,
  352. },
  353. [1] = {
  354. .start = gpio_to_irq(VIPER_ETH_GPIO),
  355. .end = gpio_to_irq(VIPER_ETH_GPIO),
  356. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
  357. },
  358. [2] = {
  359. .name = "smc91x-data32",
  360. .start = VIPER_ETH_DATA_PHYS,
  361. .end = VIPER_ETH_DATA_PHYS + 3,
  362. .flags = IORESOURCE_MEM,
  363. },
  364. };
  365. static struct smc91x_platdata viper_smc91x_info = {
  366. .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
  367. .leda = RPC_LED_100_10,
  368. .ledb = RPC_LED_TX_RX,
  369. };
  370. static struct platform_device smc91x_device = {
  371. .name = "smc91x",
  372. .id = -1,
  373. .num_resources = ARRAY_SIZE(smc91x_resources),
  374. .resource = smc91x_resources,
  375. .dev = {
  376. .platform_data = &viper_smc91x_info,
  377. },
  378. };
  379. /* i2c */
  380. static struct i2c_gpio_platform_data i2c_bus_data = {
  381. .sda_pin = VIPER_RTC_I2C_SDA_GPIO,
  382. .scl_pin = VIPER_RTC_I2C_SCL_GPIO,
  383. .udelay = 10,
  384. .timeout = 100,
  385. };
  386. static struct platform_device i2c_bus_device = {
  387. .name = "i2c-gpio",
  388. .id = 1, /* pxa2xx-i2c is bus 0, so start at 1 */
  389. .dev = {
  390. .platform_data = &i2c_bus_data,
  391. }
  392. };
  393. static struct i2c_board_info __initdata viper_i2c_devices[] = {
  394. {
  395. I2C_BOARD_INFO("ds1338", 0x68),
  396. },
  397. };
  398. /*
  399. * Serial configuration:
  400. * You can either have the standard PXA ports driven by the PXA driver,
  401. * or all the ports (PXA + 16850) driven by the 8250 driver.
  402. * Choose your poison.
  403. */
  404. static struct resource viper_serial_resources[] = {
  405. #ifndef CONFIG_SERIAL_PXA
  406. {
  407. .start = 0x40100000,
  408. .end = 0x4010001f,
  409. .flags = IORESOURCE_MEM,
  410. },
  411. {
  412. .start = 0x40200000,
  413. .end = 0x4020001f,
  414. .flags = IORESOURCE_MEM,
  415. },
  416. {
  417. .start = 0x40700000,
  418. .end = 0x4070001f,
  419. .flags = IORESOURCE_MEM,
  420. },
  421. {
  422. .start = VIPER_UARTA_PHYS,
  423. .end = VIPER_UARTA_PHYS + 0xf,
  424. .flags = IORESOURCE_MEM,
  425. },
  426. {
  427. .start = VIPER_UARTB_PHYS,
  428. .end = VIPER_UARTB_PHYS + 0xf,
  429. .flags = IORESOURCE_MEM,
  430. },
  431. #else
  432. {
  433. 0,
  434. },
  435. #endif
  436. };
  437. static struct plat_serial8250_port serial_platform_data[] = {
  438. #ifndef CONFIG_SERIAL_PXA
  439. /* Internal UARTs */
  440. {
  441. .membase = (void *)&FFUART,
  442. .mapbase = __PREG(FFUART),
  443. .irq = IRQ_FFUART,
  444. .uartclk = 921600 * 16,
  445. .regshift = 2,
  446. .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
  447. .iotype = UPIO_MEM,
  448. },
  449. {
  450. .membase = (void *)&BTUART,
  451. .mapbase = __PREG(BTUART),
  452. .irq = IRQ_BTUART,
  453. .uartclk = 921600 * 16,
  454. .regshift = 2,
  455. .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
  456. .iotype = UPIO_MEM,
  457. },
  458. {
  459. .membase = (void *)&STUART,
  460. .mapbase = __PREG(STUART),
  461. .irq = IRQ_STUART,
  462. .uartclk = 921600 * 16,
  463. .regshift = 2,
  464. .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
  465. .iotype = UPIO_MEM,
  466. },
  467. /* External UARTs */
  468. {
  469. .mapbase = VIPER_UARTA_PHYS,
  470. .irq = gpio_to_irq(VIPER_UARTA_GPIO),
  471. .irqflags = IRQF_TRIGGER_RISING,
  472. .uartclk = 1843200,
  473. .regshift = 1,
  474. .iotype = UPIO_MEM,
  475. .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP |
  476. UPF_SKIP_TEST,
  477. },
  478. {
  479. .mapbase = VIPER_UARTB_PHYS,
  480. .irq = gpio_to_irq(VIPER_UARTB_GPIO),
  481. .irqflags = IRQF_TRIGGER_RISING,
  482. .uartclk = 1843200,
  483. .regshift = 1,
  484. .iotype = UPIO_MEM,
  485. .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP |
  486. UPF_SKIP_TEST,
  487. },
  488. #endif
  489. { },
  490. };
  491. static struct platform_device serial_device = {
  492. .name = "serial8250",
  493. .id = 0,
  494. .dev = {
  495. .platform_data = serial_platform_data,
  496. },
  497. .num_resources = ARRAY_SIZE(viper_serial_resources),
  498. .resource = viper_serial_resources,
  499. };
  500. /* USB */
  501. static void isp116x_delay(struct device *dev, int delay)
  502. {
  503. ndelay(delay);
  504. }
  505. static struct resource isp116x_resources[] = {
  506. [0] = { /* DATA */
  507. .start = VIPER_USB_PHYS + 0,
  508. .end = VIPER_USB_PHYS + 1,
  509. .flags = IORESOURCE_MEM,
  510. },
  511. [1] = { /* ADDR */
  512. .start = VIPER_USB_PHYS + 2,
  513. .end = VIPER_USB_PHYS + 3,
  514. .flags = IORESOURCE_MEM,
  515. },
  516. [2] = {
  517. .start = gpio_to_irq(VIPER_USB_GPIO),
  518. .end = gpio_to_irq(VIPER_USB_GPIO),
  519. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
  520. },
  521. };
  522. /* (DataBusWidth16|AnalogOCEnable|DREQOutputPolarity|DownstreamPort15KRSel ) */
  523. static struct isp116x_platform_data isp116x_platform_data = {
  524. /* Enable internal resistors on downstream ports */
  525. .sel15Kres = 1,
  526. /* On-chip overcurrent protection */
  527. .oc_enable = 1,
  528. /* INT output polarity */
  529. .int_act_high = 1,
  530. /* INT edge or level triggered */
  531. .int_edge_triggered = 0,
  532. /* WAKEUP pin connected - NOT SUPPORTED */
  533. /* .remote_wakeup_connected = 0, */
  534. /* Wakeup by devices on usb bus enabled */
  535. .remote_wakeup_enable = 0,
  536. .delay = isp116x_delay,
  537. };
  538. static struct platform_device isp116x_device = {
  539. .name = "isp116x-hcd",
  540. .id = -1,
  541. .num_resources = ARRAY_SIZE(isp116x_resources),
  542. .resource = isp116x_resources,
  543. .dev = {
  544. .platform_data = &isp116x_platform_data,
  545. },
  546. };
  547. /* MTD */
  548. static struct resource mtd_resources[] = {
  549. [0] = { /* RedBoot config + filesystem flash */
  550. .start = VIPER_FLASH_PHYS,
  551. .end = VIPER_FLASH_PHYS + SZ_32M - 1,
  552. .flags = IORESOURCE_MEM,
  553. },
  554. [1] = { /* Boot flash */
  555. .start = VIPER_BOOT_PHYS,
  556. .end = VIPER_BOOT_PHYS + SZ_1M - 1,
  557. .flags = IORESOURCE_MEM,
  558. },
  559. [2] = { /*
  560. * SRAM size is actually 256KB, 8bits, with a sparse mapping
  561. * (each byte is on a 16bit boundary).
  562. */
  563. .start = _VIPER_SRAM_BASE,
  564. .end = _VIPER_SRAM_BASE + SZ_512K - 1,
  565. .flags = IORESOURCE_MEM,
  566. },
  567. };
  568. static struct mtd_partition viper_boot_flash_partition = {
  569. .name = "RedBoot",
  570. .size = SZ_1M,
  571. .offset = 0,
  572. .mask_flags = MTD_WRITEABLE, /* force R/O */
  573. };
  574. static struct physmap_flash_data viper_flash_data[] = {
  575. [0] = {
  576. .width = 2,
  577. .parts = NULL,
  578. .nr_parts = 0,
  579. },
  580. [1] = {
  581. .width = 2,
  582. .parts = &viper_boot_flash_partition,
  583. .nr_parts = 1,
  584. },
  585. };
  586. static struct platform_device viper_mtd_devices[] = {
  587. [0] = {
  588. .name = "physmap-flash",
  589. .id = 0,
  590. .dev = {
  591. .platform_data = &viper_flash_data[0],
  592. },
  593. .resource = &mtd_resources[0],
  594. .num_resources = 1,
  595. },
  596. [1] = {
  597. .name = "physmap-flash",
  598. .id = 1,
  599. .dev = {
  600. .platform_data = &viper_flash_data[1],
  601. },
  602. .resource = &mtd_resources[1],
  603. .num_resources = 1,
  604. },
  605. };
  606. static struct platform_device *viper_devs[] __initdata = {
  607. &smc91x_device,
  608. &i2c_bus_device,
  609. &serial_device,
  610. &isp116x_device,
  611. &viper_mtd_devices[0],
  612. &viper_mtd_devices[1],
  613. &viper_backlight_device,
  614. &viper_pcmcia_device,
  615. };
  616. static mfp_cfg_t viper_pin_config[] __initdata = {
  617. /* Chip selects */
  618. GPIO15_nCS_1,
  619. GPIO78_nCS_2,
  620. GPIO79_nCS_3,
  621. GPIO80_nCS_4,
  622. GPIO33_nCS_5,
  623. /* AC97 */
  624. GPIO28_AC97_BITCLK,
  625. GPIO29_AC97_SDATA_IN_0,
  626. GPIO30_AC97_SDATA_OUT,
  627. GPIO31_AC97_SYNC,
  628. /* FP Backlight */
  629. GPIO9_GPIO, /* VIPER_BCKLIGHT_EN_GPIO */
  630. GPIO10_GPIO, /* VIPER_LCD_EN_GPIO */
  631. GPIO16_PWM0_OUT,
  632. /* Ethernet PHY Ready */
  633. GPIO18_RDY,
  634. /* Serial shutdown */
  635. GPIO12_GPIO | MFP_LPM_DRIVE_HIGH, /* VIPER_UART_SHDN_GPIO */
  636. /* Compact-Flash / PC104 */
  637. GPIO48_nPOE,
  638. GPIO49_nPWE,
  639. GPIO50_nPIOR,
  640. GPIO51_nPIOW,
  641. GPIO52_nPCE_1,
  642. GPIO53_nPCE_2,
  643. GPIO54_nPSKTSEL,
  644. GPIO55_nPREG,
  645. GPIO56_nPWAIT,
  646. GPIO57_nIOIS16,
  647. GPIO8_GPIO, /* VIPER_CF_RDY_GPIO */
  648. GPIO32_GPIO, /* VIPER_CF_CD_GPIO */
  649. GPIO82_GPIO, /* VIPER_CF_POWER_GPIO */
  650. /* Integrated UPS control */
  651. GPIO20_GPIO, /* VIPER_UPS_GPIO */
  652. /* Vcc regulator control */
  653. GPIO6_GPIO, /* VIPER_PSU_DATA_GPIO */
  654. GPIO11_GPIO, /* VIPER_PSU_CLK_GPIO */
  655. GPIO19_GPIO, /* VIPER_PSU_nCS_LD_GPIO */
  656. /* i2c busses */
  657. GPIO26_GPIO, /* VIPER_TPM_I2C_SDA_GPIO */
  658. GPIO27_GPIO, /* VIPER_TPM_I2C_SCL_GPIO */
  659. GPIO83_GPIO, /* VIPER_RTC_I2C_SDA_GPIO */
  660. GPIO84_GPIO, /* VIPER_RTC_I2C_SCL_GPIO */
  661. /* PC/104 Interrupt */
  662. GPIO1_GPIO | WAKEUP_ON_EDGE_RISE, /* VIPER_CPLD_GPIO */
  663. };
  664. static unsigned long viper_tpm;
  665. static int __init viper_tpm_setup(char *str)
  666. {
  667. strict_strtoul(str, 10, &viper_tpm);
  668. return 1;
  669. }
  670. __setup("tpm=", viper_tpm_setup);
  671. static void __init viper_tpm_init(void)
  672. {
  673. struct platform_device *tpm_device;
  674. struct i2c_gpio_platform_data i2c_tpm_data = {
  675. .sda_pin = VIPER_TPM_I2C_SDA_GPIO,
  676. .scl_pin = VIPER_TPM_I2C_SCL_GPIO,
  677. .udelay = 10,
  678. .timeout = 100,
  679. };
  680. char *errstr;
  681. /* Allocate TPM i2c bus if requested */
  682. if (!viper_tpm)
  683. return;
  684. tpm_device = platform_device_alloc("i2c-gpio", 2);
  685. if (tpm_device) {
  686. if (!platform_device_add_data(tpm_device,
  687. &i2c_tpm_data,
  688. sizeof(i2c_tpm_data))) {
  689. if (platform_device_add(tpm_device)) {
  690. errstr = "register TPM i2c bus";
  691. goto error_free_tpm;
  692. }
  693. } else {
  694. errstr = "allocate TPM i2c bus data";
  695. goto error_free_tpm;
  696. }
  697. } else {
  698. errstr = "allocate TPM i2c device";
  699. goto error_tpm;
  700. }
  701. return;
  702. error_free_tpm:
  703. kfree(tpm_device);
  704. error_tpm:
  705. pr_err("viper: Couldn't %s, giving up\n", errstr);
  706. }
  707. static void __init viper_init_vcore_gpios(void)
  708. {
  709. if (gpio_request(VIPER_PSU_DATA_GPIO, "PSU data"))
  710. goto err_request_data;
  711. if (gpio_request(VIPER_PSU_CLK_GPIO, "PSU clock"))
  712. goto err_request_clk;
  713. if (gpio_request(VIPER_PSU_nCS_LD_GPIO, "PSU cs"))
  714. goto err_request_cs;
  715. if (gpio_direction_output(VIPER_PSU_DATA_GPIO, 0) ||
  716. gpio_direction_output(VIPER_PSU_CLK_GPIO, 0) ||
  717. gpio_direction_output(VIPER_PSU_nCS_LD_GPIO, 0))
  718. goto err_dir;
  719. /* c/should assume redboot set the correct level ??? */
  720. viper_set_core_cpu_voltage(get_clk_frequency_khz(0), 1);
  721. return;
  722. err_dir:
  723. gpio_free(VIPER_PSU_nCS_LD_GPIO);
  724. err_request_cs:
  725. gpio_free(VIPER_PSU_CLK_GPIO);
  726. err_request_clk:
  727. gpio_free(VIPER_PSU_DATA_GPIO);
  728. err_request_data:
  729. pr_err("viper: Failed to setup vcore control GPIOs\n");
  730. }
  731. static void __init viper_init_serial_gpio(void)
  732. {
  733. if (gpio_request(VIPER_UART_SHDN_GPIO, "UARTs shutdown"))
  734. goto err_request;
  735. if (gpio_direction_output(VIPER_UART_SHDN_GPIO, 0))
  736. goto err_dir;
  737. return;
  738. err_dir:
  739. gpio_free(VIPER_UART_SHDN_GPIO);
  740. err_request:
  741. pr_err("viper: Failed to setup UART shutdown GPIO\n");
  742. }
  743. #ifdef CONFIG_CPU_FREQ
  744. static int viper_cpufreq_notifier(struct notifier_block *nb,
  745. unsigned long val, void *data)
  746. {
  747. struct cpufreq_freqs *freq = data;
  748. /* TODO: Adjust timings??? */
  749. switch (val) {
  750. case CPUFREQ_PRECHANGE:
  751. if (freq->old < freq->new) {
  752. /* we are getting faster so raise the voltage
  753. * before we change freq */
  754. viper_set_core_cpu_voltage(freq->new, 0);
  755. }
  756. break;
  757. case CPUFREQ_POSTCHANGE:
  758. if (freq->old > freq->new) {
  759. /* we are slowing down so drop the power
  760. * after we change freq */
  761. viper_set_core_cpu_voltage(freq->new, 0);
  762. }
  763. break;
  764. case CPUFREQ_RESUMECHANGE:
  765. viper_set_core_cpu_voltage(freq->new, 0);
  766. break;
  767. default:
  768. /* ignore */
  769. break;
  770. }
  771. return 0;
  772. }
  773. static struct notifier_block viper_cpufreq_notifier_block = {
  774. .notifier_call = viper_cpufreq_notifier
  775. };
  776. static void __init viper_init_cpufreq(void)
  777. {
  778. if (cpufreq_register_notifier(&viper_cpufreq_notifier_block,
  779. CPUFREQ_TRANSITION_NOTIFIER))
  780. pr_err("viper: Failed to setup cpufreq notifier\n");
  781. }
  782. #else
  783. static inline void viper_init_cpufreq(void) {}
  784. #endif
  785. static void viper_power_off(void)
  786. {
  787. pr_notice("Shutting off UPS\n");
  788. gpio_set_value(VIPER_UPS_GPIO, 1);
  789. /* Spin to death... */
  790. while (1);
  791. }
  792. static void __init viper_init(void)
  793. {
  794. u8 version;
  795. pm_power_off = viper_power_off;
  796. pxa2xx_mfp_config(ARRAY_AND_SIZE(viper_pin_config));
  797. pxa_set_ffuart_info(NULL);
  798. pxa_set_btuart_info(NULL);
  799. pxa_set_stuart_info(NULL);
  800. /* Wake-up serial console */
  801. viper_init_serial_gpio();
  802. set_pxa_fb_info(&fb_info);
  803. /* v1 hardware cannot use the datacs line */
  804. version = viper_hw_version();
  805. if (version == 0)
  806. smc91x_device.num_resources--;
  807. pxa_set_i2c_info(NULL);
  808. platform_add_devices(viper_devs, ARRAY_SIZE(viper_devs));
  809. viper_init_vcore_gpios();
  810. viper_init_cpufreq();
  811. sysdev_driver_register(&cpu_sysdev_class, &viper_cpu_sysdev_driver);
  812. if (version) {
  813. pr_info("viper: hardware v%di%d detected. "
  814. "CPLD revision %d.\n",
  815. VIPER_BOARD_VERSION(version),
  816. VIPER_BOARD_ISSUE(version),
  817. VIPER_CPLD_REVISION(version));
  818. system_rev = (VIPER_BOARD_VERSION(version) << 8) |
  819. (VIPER_BOARD_ISSUE(version) << 4) |
  820. VIPER_CPLD_REVISION(version);
  821. } else {
  822. pr_info("viper: No version register.\n");
  823. }
  824. i2c_register_board_info(1, ARRAY_AND_SIZE(viper_i2c_devices));
  825. viper_tpm_init();
  826. pxa_set_ac97_info(NULL);
  827. }
  828. static struct map_desc viper_io_desc[] __initdata = {
  829. {
  830. .virtual = VIPER_CPLD_BASE,
  831. .pfn = __phys_to_pfn(VIPER_CPLD_PHYS),
  832. .length = 0x00300000,
  833. .type = MT_DEVICE,
  834. },
  835. {
  836. .virtual = VIPER_PC104IO_BASE,
  837. .pfn = __phys_to_pfn(0x30000000),
  838. .length = 0x00800000,
  839. .type = MT_DEVICE,
  840. },
  841. };
  842. static void __init viper_map_io(void)
  843. {
  844. pxa_map_io();
  845. iotable_init(viper_io_desc, ARRAY_SIZE(viper_io_desc));
  846. PCFR |= PCFR_OPDE;
  847. }
  848. MACHINE_START(VIPER, "Arcom/Eurotech VIPER SBC")
  849. /* Maintainer: Marc Zyngier <maz@misterjones.org> */
  850. .phys_io = 0x40000000,
  851. .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
  852. .boot_params = 0xa0000100,
  853. .map_io = viper_map_io,
  854. .init_irq = viper_init_irq,
  855. .timer = &pxa_timer,
  856. .init_machine = viper_init,
  857. MACHINE_END