mach-kzm_arm11_01.c 6.7 KB

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  1. /*
  2. * KZM-ARM11-01 support
  3. * Copyright (C) 2009 Yoichi Yuasa <yuasa@linux-mips.org>
  4. *
  5. * based on code for MX31ADS,
  6. * Copyright (C) 2000 Deep Blue Solutions Ltd
  7. * Copyright (C) 2002 Shane Nay (shane@minirl.com)
  8. * Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved.
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License as published by
  12. * the Free Software Foundation; either version 2 of the License, or
  13. * (at your option) any later version.
  14. *
  15. * This program is distributed in the hope that it will be useful,
  16. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. * GNU General Public License for more details.
  19. *
  20. * You should have received a copy of the GNU General Public License
  21. * along with this program; if not, write to the Free Software
  22. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  23. */
  24. #include <linux/gpio.h>
  25. #include <linux/init.h>
  26. #include <linux/platform_device.h>
  27. #include <linux/serial_8250.h>
  28. #include <linux/smsc911x.h>
  29. #include <linux/types.h>
  30. #include <asm/irq.h>
  31. #include <asm/mach-types.h>
  32. #include <asm/setup.h>
  33. #include <asm/mach/arch.h>
  34. #include <asm/mach/irq.h>
  35. #include <asm/mach/map.h>
  36. #include <asm/mach/time.h>
  37. #include <mach/board-kzmarm11.h>
  38. #include <mach/clock.h>
  39. #include <mach/common.h>
  40. #include <mach/imx-uart.h>
  41. #include <mach/iomux-mx3.h>
  42. #include <mach/memory.h>
  43. #include "devices.h"
  44. #define KZM_ARM11_IO_ADDRESS(x) ( \
  45. IMX_IO_ADDRESS(x, MX31_CS4) ?: \
  46. IMX_IO_ADDRESS(x, MX31_CS5) ?: \
  47. MX31_IO_ADDRESS(x))
  48. #if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
  49. /*
  50. * KZM-ARM11-01 has an external UART on FPGA
  51. */
  52. static struct plat_serial8250_port serial_platform_data[] = {
  53. {
  54. .membase = KZM_ARM11_IO_ADDRESS(KZM_ARM11_16550),
  55. .mapbase = KZM_ARM11_16550,
  56. .irq = IOMUX_TO_IRQ(MX31_PIN_GPIO1_1),
  57. .irqflags = IRQ_TYPE_EDGE_RISING,
  58. .uartclk = 14745600,
  59. .regshift = 0,
  60. .iotype = UPIO_MEM,
  61. .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
  62. UPF_BUGGY_UART,
  63. },
  64. {},
  65. };
  66. static struct resource serial8250_resources[] = {
  67. {
  68. .start = KZM_ARM11_16550,
  69. .end = KZM_ARM11_16550 + 0x10,
  70. .flags = IORESOURCE_MEM,
  71. },
  72. {
  73. .start = IOMUX_TO_IRQ(MX31_PIN_GPIO1_1),
  74. .end = IOMUX_TO_IRQ(MX31_PIN_GPIO1_1),
  75. .flags = IORESOURCE_IRQ,
  76. },
  77. };
  78. static struct platform_device serial_device = {
  79. .name = "serial8250",
  80. .id = PLAT8250_DEV_PLATFORM,
  81. .dev = {
  82. .platform_data = serial_platform_data,
  83. },
  84. .num_resources = ARRAY_SIZE(serial8250_resources),
  85. .resource = serial8250_resources,
  86. };
  87. static int __init kzm_init_ext_uart(void)
  88. {
  89. u8 tmp;
  90. /*
  91. * GPIO 1-1: external UART interrupt line
  92. */
  93. mxc_iomux_mode(IOMUX_MODE(MX31_PIN_GPIO1_1, IOMUX_CONFIG_GPIO));
  94. gpio_request(IOMUX_TO_GPIO(MX31_PIN_GPIO1_1), "ext-uart-int");
  95. gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_GPIO1_1));
  96. /*
  97. * Unmask UART interrupt
  98. */
  99. tmp = __raw_readb(KZM_ARM11_IO_ADDRESS(KZM_ARM11_CTL1));
  100. tmp |= 0x2;
  101. __raw_writeb(tmp, KZM_ARM11_IO_ADDRESS(KZM_ARM11_CTL1));
  102. return platform_device_register(&serial_device);
  103. }
  104. #else
  105. static inline int kzm_init_ext_uart(void)
  106. {
  107. return 0;
  108. }
  109. #endif
  110. /*
  111. * SMSC LAN9118
  112. */
  113. #if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
  114. static struct smsc911x_platform_config kzm_smsc9118_config = {
  115. .phy_interface = PHY_INTERFACE_MODE_MII,
  116. .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH,
  117. .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
  118. .flags = SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS,
  119. };
  120. static struct resource kzm_smsc9118_resources[] = {
  121. {
  122. .start = MX31_CS5_BASE_ADDR,
  123. .end = MX31_CS5_BASE_ADDR + SZ_128K - 1,
  124. .flags = IORESOURCE_MEM,
  125. },
  126. {
  127. .start = IOMUX_TO_IRQ(MX31_PIN_GPIO1_2),
  128. .end = IOMUX_TO_IRQ(MX31_PIN_GPIO1_2),
  129. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
  130. },
  131. };
  132. static struct platform_device kzm_smsc9118_device = {
  133. .name = "smsc911x",
  134. .id = -1,
  135. .num_resources = ARRAY_SIZE(kzm_smsc9118_resources),
  136. .resource = kzm_smsc9118_resources,
  137. .dev = {
  138. .platform_data = &kzm_smsc9118_config,
  139. },
  140. };
  141. static int __init kzm_init_smsc9118(void)
  142. {
  143. /*
  144. * GPIO 1-2: SMSC9118 interrupt line
  145. */
  146. mxc_iomux_mode(IOMUX_MODE(MX31_PIN_GPIO1_2, IOMUX_CONFIG_GPIO));
  147. gpio_request(IOMUX_TO_GPIO(MX31_PIN_GPIO1_2), "smsc9118-int");
  148. gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_GPIO1_2));
  149. return platform_device_register(&kzm_smsc9118_device);
  150. }
  151. #else
  152. static inline int kzm_init_smsc9118(void)
  153. {
  154. return 0;
  155. }
  156. #endif
  157. #if defined(CONFIG_SERIAL_IMX) || defined(CONFIG_SERIAL_IMX_MODULE)
  158. static struct imxuart_platform_data uart_pdata = {
  159. .flags = IMXUART_HAVE_RTSCTS,
  160. };
  161. static void __init kzm_init_imx_uart(void)
  162. {
  163. mxc_register_device(&mxc_uart_device0, &uart_pdata);
  164. mxc_register_device(&mxc_uart_device1, &uart_pdata);
  165. }
  166. #else
  167. static inline void kzm_init_imx_uart(void)
  168. {
  169. }
  170. #endif
  171. static int kzm_pins[] __initdata = {
  172. MX31_PIN_CTS1__CTS1,
  173. MX31_PIN_RTS1__RTS1,
  174. MX31_PIN_TXD1__TXD1,
  175. MX31_PIN_RXD1__RXD1,
  176. MX31_PIN_DCD_DCE1__DCD_DCE1,
  177. MX31_PIN_RI_DCE1__RI_DCE1,
  178. MX31_PIN_DSR_DCE1__DSR_DCE1,
  179. MX31_PIN_DTR_DCE1__DTR_DCE1,
  180. MX31_PIN_CTS2__CTS2,
  181. MX31_PIN_RTS2__RTS2,
  182. MX31_PIN_TXD2__TXD2,
  183. MX31_PIN_RXD2__RXD2,
  184. MX31_PIN_DCD_DTE1__DCD_DTE2,
  185. MX31_PIN_RI_DTE1__RI_DTE2,
  186. MX31_PIN_DSR_DTE1__DSR_DTE2,
  187. MX31_PIN_DTR_DTE1__DTR_DTE2,
  188. };
  189. /*
  190. * Board specific initialization.
  191. */
  192. static void __init kzm_board_init(void)
  193. {
  194. mxc_iomux_setup_multiple_pins(kzm_pins,
  195. ARRAY_SIZE(kzm_pins), "kzm");
  196. kzm_init_ext_uart();
  197. kzm_init_smsc9118();
  198. kzm_init_imx_uart();
  199. pr_info("Clock input source is 26MHz\n");
  200. }
  201. /*
  202. * This structure defines static mappings for the kzm-arm11-01 board.
  203. */
  204. static struct map_desc kzm_io_desc[] __initdata = {
  205. {
  206. .virtual = MX31_CS4_BASE_ADDR_VIRT,
  207. .pfn = __phys_to_pfn(MX31_CS4_BASE_ADDR),
  208. .length = MX31_CS4_SIZE,
  209. .type = MT_DEVICE
  210. },
  211. {
  212. .virtual = MX31_CS5_BASE_ADDR_VIRT,
  213. .pfn = __phys_to_pfn(MX31_CS5_BASE_ADDR),
  214. .length = MX31_CS5_SIZE,
  215. .type = MT_DEVICE
  216. },
  217. };
  218. /*
  219. * Set up static virtual mappings.
  220. */
  221. static void __init kzm_map_io(void)
  222. {
  223. mx31_map_io();
  224. iotable_init(kzm_io_desc, ARRAY_SIZE(kzm_io_desc));
  225. }
  226. static void __init kzm_timer_init(void)
  227. {
  228. mx31_clocks_init(26000000);
  229. }
  230. static struct sys_timer kzm_timer = {
  231. .init = kzm_timer_init,
  232. };
  233. /*
  234. * The following uses standard kernel macros define in arch.h in order to
  235. * initialize __mach_desc_KZM_ARM11_01 data structure.
  236. */
  237. MACHINE_START(KZM_ARM11_01, "Kyoto Microcomputer Co., Ltd. KZM-ARM11-01")
  238. .phys_io = MX31_AIPS1_BASE_ADDR,
  239. .io_pg_offst = (MX31_AIPS1_BASE_ADDR_VIRT >> 18) & 0xfffc,
  240. .boot_params = MX3x_PHYS_OFFSET + 0x100,
  241. .map_io = kzm_map_io,
  242. .init_irq = mx31_init_irq,
  243. .init_machine = kzm_board_init,
  244. .timer = &kzm_timer,
  245. MACHINE_END