mach-armadillo5x0.c 15 KB

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  1. /*
  2. * armadillo5x0.c
  3. *
  4. * Copyright 2009 Alberto Panizzo <maramaopercheseimorto@gmail.com>
  5. * updates in http://alberdroid.blogspot.com/
  6. *
  7. * Based on Atmark Techno, Inc. armadillo 500 BSP 2008
  8. * Based on mx31ads.c and pcm037.c Great Work!
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License as published by
  12. * the Free Software Foundation; either version 2 of the License, or
  13. * (at your option) any later version.
  14. *
  15. * This program is distributed in the hope that it will be useful,
  16. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. * GNU General Public License for more details.
  19. *
  20. * You should have received a copy of the GNU General Public License
  21. * along with this program; if not, write to the Free Software
  22. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
  23. * MA 02110-1301, USA.
  24. */
  25. #include <linux/types.h>
  26. #include <linux/init.h>
  27. #include <linux/clk.h>
  28. #include <linux/platform_device.h>
  29. #include <linux/gpio.h>
  30. #include <linux/smsc911x.h>
  31. #include <linux/interrupt.h>
  32. #include <linux/irq.h>
  33. #include <linux/mtd/physmap.h>
  34. #include <linux/io.h>
  35. #include <linux/input.h>
  36. #include <linux/gpio_keys.h>
  37. #include <linux/i2c.h>
  38. #include <linux/usb/otg.h>
  39. #include <linux/usb/ulpi.h>
  40. #include <linux/delay.h>
  41. #include <mach/hardware.h>
  42. #include <asm/mach-types.h>
  43. #include <asm/mach/arch.h>
  44. #include <asm/mach/time.h>
  45. #include <asm/memory.h>
  46. #include <asm/mach/map.h>
  47. #include <mach/common.h>
  48. #include <mach/imx-uart.h>
  49. #include <mach/iomux-mx3.h>
  50. #include <mach/board-armadillo5x0.h>
  51. #include <mach/mmc.h>
  52. #include <mach/ipu.h>
  53. #include <mach/mx3fb.h>
  54. #include <mach/mxc_nand.h>
  55. #include <mach/mxc_ehci.h>
  56. #include <mach/ulpi.h>
  57. #include "devices.h"
  58. #include "crm_regs.h"
  59. static int armadillo5x0_pins[] = {
  60. /* UART1 */
  61. MX31_PIN_CTS1__CTS1,
  62. MX31_PIN_RTS1__RTS1,
  63. MX31_PIN_TXD1__TXD1,
  64. MX31_PIN_RXD1__RXD1,
  65. /* UART2 */
  66. MX31_PIN_CTS2__CTS2,
  67. MX31_PIN_RTS2__RTS2,
  68. MX31_PIN_TXD2__TXD2,
  69. MX31_PIN_RXD2__RXD2,
  70. /* LAN9118_IRQ */
  71. IOMUX_MODE(MX31_PIN_GPIO1_0, IOMUX_CONFIG_GPIO),
  72. /* SDHC1 */
  73. MX31_PIN_SD1_DATA3__SD1_DATA3,
  74. MX31_PIN_SD1_DATA2__SD1_DATA2,
  75. MX31_PIN_SD1_DATA1__SD1_DATA1,
  76. MX31_PIN_SD1_DATA0__SD1_DATA0,
  77. MX31_PIN_SD1_CLK__SD1_CLK,
  78. MX31_PIN_SD1_CMD__SD1_CMD,
  79. /* Framebuffer */
  80. MX31_PIN_LD0__LD0,
  81. MX31_PIN_LD1__LD1,
  82. MX31_PIN_LD2__LD2,
  83. MX31_PIN_LD3__LD3,
  84. MX31_PIN_LD4__LD4,
  85. MX31_PIN_LD5__LD5,
  86. MX31_PIN_LD6__LD6,
  87. MX31_PIN_LD7__LD7,
  88. MX31_PIN_LD8__LD8,
  89. MX31_PIN_LD9__LD9,
  90. MX31_PIN_LD10__LD10,
  91. MX31_PIN_LD11__LD11,
  92. MX31_PIN_LD12__LD12,
  93. MX31_PIN_LD13__LD13,
  94. MX31_PIN_LD14__LD14,
  95. MX31_PIN_LD15__LD15,
  96. MX31_PIN_LD16__LD16,
  97. MX31_PIN_LD17__LD17,
  98. MX31_PIN_VSYNC3__VSYNC3,
  99. MX31_PIN_HSYNC__HSYNC,
  100. MX31_PIN_FPSHIFT__FPSHIFT,
  101. MX31_PIN_DRDY0__DRDY0,
  102. IOMUX_MODE(MX31_PIN_LCS1, IOMUX_CONFIG_GPIO), /*ADV7125_PSAVE*/
  103. /* I2C2 */
  104. MX31_PIN_CSPI2_MOSI__SCL,
  105. MX31_PIN_CSPI2_MISO__SDA,
  106. /* OTG */
  107. MX31_PIN_USBOTG_DATA0__USBOTG_DATA0,
  108. MX31_PIN_USBOTG_DATA1__USBOTG_DATA1,
  109. MX31_PIN_USBOTG_DATA2__USBOTG_DATA2,
  110. MX31_PIN_USBOTG_DATA3__USBOTG_DATA3,
  111. MX31_PIN_USBOTG_DATA4__USBOTG_DATA4,
  112. MX31_PIN_USBOTG_DATA5__USBOTG_DATA5,
  113. MX31_PIN_USBOTG_DATA6__USBOTG_DATA6,
  114. MX31_PIN_USBOTG_DATA7__USBOTG_DATA7,
  115. MX31_PIN_USBOTG_CLK__USBOTG_CLK,
  116. MX31_PIN_USBOTG_DIR__USBOTG_DIR,
  117. MX31_PIN_USBOTG_NXT__USBOTG_NXT,
  118. MX31_PIN_USBOTG_STP__USBOTG_STP,
  119. /* USB host 2 */
  120. IOMUX_MODE(MX31_PIN_USBH2_CLK, IOMUX_CONFIG_FUNC),
  121. IOMUX_MODE(MX31_PIN_USBH2_DIR, IOMUX_CONFIG_FUNC),
  122. IOMUX_MODE(MX31_PIN_USBH2_NXT, IOMUX_CONFIG_FUNC),
  123. IOMUX_MODE(MX31_PIN_USBH2_STP, IOMUX_CONFIG_FUNC),
  124. IOMUX_MODE(MX31_PIN_USBH2_DATA0, IOMUX_CONFIG_FUNC),
  125. IOMUX_MODE(MX31_PIN_USBH2_DATA1, IOMUX_CONFIG_FUNC),
  126. IOMUX_MODE(MX31_PIN_STXD3, IOMUX_CONFIG_FUNC),
  127. IOMUX_MODE(MX31_PIN_SRXD3, IOMUX_CONFIG_FUNC),
  128. IOMUX_MODE(MX31_PIN_SCK3, IOMUX_CONFIG_FUNC),
  129. IOMUX_MODE(MX31_PIN_SFS3, IOMUX_CONFIG_FUNC),
  130. IOMUX_MODE(MX31_PIN_STXD6, IOMUX_CONFIG_FUNC),
  131. IOMUX_MODE(MX31_PIN_SRXD6, IOMUX_CONFIG_FUNC),
  132. };
  133. /* USB */
  134. #if defined(CONFIG_USB_ULPI)
  135. #define OTG_RESET IOMUX_TO_GPIO(MX31_PIN_STXD4)
  136. #define USBH2_RESET IOMUX_TO_GPIO(MX31_PIN_SCK6)
  137. #define USBH2_CS IOMUX_TO_GPIO(MX31_PIN_GPIO1_3)
  138. #define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
  139. PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
  140. static int usbotg_init(struct platform_device *pdev)
  141. {
  142. int err;
  143. mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA0, USB_PAD_CFG);
  144. mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA1, USB_PAD_CFG);
  145. mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA2, USB_PAD_CFG);
  146. mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA3, USB_PAD_CFG);
  147. mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA4, USB_PAD_CFG);
  148. mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA5, USB_PAD_CFG);
  149. mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA6, USB_PAD_CFG);
  150. mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA7, USB_PAD_CFG);
  151. mxc_iomux_set_pad(MX31_PIN_USBOTG_CLK, USB_PAD_CFG);
  152. mxc_iomux_set_pad(MX31_PIN_USBOTG_DIR, USB_PAD_CFG);
  153. mxc_iomux_set_pad(MX31_PIN_USBOTG_NXT, USB_PAD_CFG);
  154. mxc_iomux_set_pad(MX31_PIN_USBOTG_STP, USB_PAD_CFG);
  155. /* Chip already enabled by hardware */
  156. /* OTG phy reset*/
  157. err = gpio_request(OTG_RESET, "USB-OTG-RESET");
  158. if (err) {
  159. pr_err("Failed to request the usb otg reset gpio\n");
  160. return err;
  161. }
  162. err = gpio_direction_output(OTG_RESET, 1/*HIGH*/);
  163. if (err) {
  164. pr_err("Failed to reset the usb otg phy\n");
  165. goto otg_free_reset;
  166. }
  167. gpio_set_value(OTG_RESET, 0/*LOW*/);
  168. mdelay(5);
  169. gpio_set_value(OTG_RESET, 1/*HIGH*/);
  170. return 0;
  171. otg_free_reset:
  172. gpio_free(OTG_RESET);
  173. return err;
  174. }
  175. static int usbh2_init(struct platform_device *pdev)
  176. {
  177. int err;
  178. mxc_iomux_set_pad(MX31_PIN_USBH2_CLK, USB_PAD_CFG);
  179. mxc_iomux_set_pad(MX31_PIN_USBH2_DIR, USB_PAD_CFG);
  180. mxc_iomux_set_pad(MX31_PIN_USBH2_NXT, USB_PAD_CFG);
  181. mxc_iomux_set_pad(MX31_PIN_USBH2_STP, USB_PAD_CFG);
  182. mxc_iomux_set_pad(MX31_PIN_USBH2_DATA0, USB_PAD_CFG);
  183. mxc_iomux_set_pad(MX31_PIN_USBH2_DATA1, USB_PAD_CFG);
  184. mxc_iomux_set_pad(MX31_PIN_SRXD6, USB_PAD_CFG);
  185. mxc_iomux_set_pad(MX31_PIN_STXD6, USB_PAD_CFG);
  186. mxc_iomux_set_pad(MX31_PIN_SFS3, USB_PAD_CFG);
  187. mxc_iomux_set_pad(MX31_PIN_SCK3, USB_PAD_CFG);
  188. mxc_iomux_set_pad(MX31_PIN_SRXD3, USB_PAD_CFG);
  189. mxc_iomux_set_pad(MX31_PIN_STXD3, USB_PAD_CFG);
  190. mxc_iomux_set_gpr(MUX_PGP_UH2, true);
  191. /* Enable the chip */
  192. err = gpio_request(USBH2_CS, "USB-H2-CS");
  193. if (err) {
  194. pr_err("Failed to request the usb host 2 CS gpio\n");
  195. return err;
  196. }
  197. err = gpio_direction_output(USBH2_CS, 0/*Enabled*/);
  198. if (err) {
  199. pr_err("Failed to drive the usb host 2 CS gpio\n");
  200. goto h2_free_cs;
  201. }
  202. /* H2 phy reset*/
  203. err = gpio_request(USBH2_RESET, "USB-H2-RESET");
  204. if (err) {
  205. pr_err("Failed to request the usb host 2 reset gpio\n");
  206. goto h2_free_cs;
  207. }
  208. err = gpio_direction_output(USBH2_RESET, 1/*HIGH*/);
  209. if (err) {
  210. pr_err("Failed to reset the usb host 2 phy\n");
  211. goto h2_free_reset;
  212. }
  213. gpio_set_value(USBH2_RESET, 0/*LOW*/);
  214. mdelay(5);
  215. gpio_set_value(USBH2_RESET, 1/*HIGH*/);
  216. return 0;
  217. h2_free_reset:
  218. gpio_free(USBH2_RESET);
  219. h2_free_cs:
  220. gpio_free(USBH2_CS);
  221. return err;
  222. }
  223. static struct mxc_usbh_platform_data usbotg_pdata = {
  224. .init = usbotg_init,
  225. .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT,
  226. .flags = MXC_EHCI_POWER_PINS_ENABLED | MXC_EHCI_INTERFACE_DIFF_UNI,
  227. };
  228. static struct mxc_usbh_platform_data usbh2_pdata = {
  229. .init = usbh2_init,
  230. .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT,
  231. .flags = MXC_EHCI_POWER_PINS_ENABLED | MXC_EHCI_INTERFACE_DIFF_UNI,
  232. };
  233. #endif /* CONFIG_USB_ULPI */
  234. /* RTC over I2C*/
  235. #define ARMADILLO5X0_RTC_GPIO IOMUX_TO_GPIO(MX31_PIN_SRXD4)
  236. static struct i2c_board_info armadillo5x0_i2c_rtc = {
  237. I2C_BOARD_INFO("s35390a", 0x30),
  238. };
  239. /* GPIO BUTTONS */
  240. static struct gpio_keys_button armadillo5x0_buttons[] = {
  241. {
  242. .code = KEY_ENTER, /*28*/
  243. .gpio = IOMUX_TO_GPIO(MX31_PIN_SCLK0),
  244. .active_low = 1,
  245. .desc = "menu",
  246. .wakeup = 1,
  247. }, {
  248. .code = KEY_BACK, /*158*/
  249. .gpio = IOMUX_TO_GPIO(MX31_PIN_SRST0),
  250. .active_low = 1,
  251. .desc = "back",
  252. .wakeup = 1,
  253. }
  254. };
  255. static struct gpio_keys_platform_data armadillo5x0_button_data = {
  256. .buttons = armadillo5x0_buttons,
  257. .nbuttons = ARRAY_SIZE(armadillo5x0_buttons),
  258. };
  259. static struct platform_device armadillo5x0_button_device = {
  260. .name = "gpio-keys",
  261. .id = -1,
  262. .num_resources = 0,
  263. .dev = {
  264. .platform_data = &armadillo5x0_button_data,
  265. }
  266. };
  267. /*
  268. * NAND Flash
  269. */
  270. static struct mxc_nand_platform_data armadillo5x0_nand_flash_pdata = {
  271. .width = 1,
  272. .hw_ecc = 1,
  273. };
  274. /*
  275. * MTD NOR Flash
  276. */
  277. static struct mtd_partition armadillo5x0_nor_flash_partitions[] = {
  278. {
  279. .name = "nor.bootloader",
  280. .offset = 0x00000000,
  281. .size = 4*32*1024,
  282. }, {
  283. .name = "nor.kernel",
  284. .offset = MTDPART_OFS_APPEND,
  285. .size = 16*128*1024,
  286. }, {
  287. .name = "nor.userland",
  288. .offset = MTDPART_OFS_APPEND,
  289. .size = 110*128*1024,
  290. }, {
  291. .name = "nor.config",
  292. .offset = MTDPART_OFS_APPEND,
  293. .size = 1*128*1024,
  294. },
  295. };
  296. static struct physmap_flash_data armadillo5x0_nor_flash_pdata = {
  297. .width = 2,
  298. .parts = armadillo5x0_nor_flash_partitions,
  299. .nr_parts = ARRAY_SIZE(armadillo5x0_nor_flash_partitions),
  300. };
  301. static struct resource armadillo5x0_nor_flash_resource = {
  302. .flags = IORESOURCE_MEM,
  303. .start = MX31_CS0_BASE_ADDR,
  304. .end = MX31_CS0_BASE_ADDR + SZ_64M - 1,
  305. };
  306. static struct platform_device armadillo5x0_nor_flash = {
  307. .name = "physmap-flash",
  308. .id = -1,
  309. .num_resources = 1,
  310. .resource = &armadillo5x0_nor_flash_resource,
  311. };
  312. /*
  313. * FB support
  314. */
  315. static const struct fb_videomode fb_modedb[] = {
  316. { /* 640x480 @ 60 Hz */
  317. .name = "CRT-VGA",
  318. .refresh = 60,
  319. .xres = 640,
  320. .yres = 480,
  321. .pixclock = 39721,
  322. .left_margin = 35,
  323. .right_margin = 115,
  324. .upper_margin = 43,
  325. .lower_margin = 1,
  326. .hsync_len = 10,
  327. .vsync_len = 1,
  328. .sync = FB_SYNC_OE_ACT_HIGH,
  329. .vmode = FB_VMODE_NONINTERLACED,
  330. .flag = 0,
  331. }, {/* 800x600 @ 56 Hz */
  332. .name = "CRT-SVGA",
  333. .refresh = 56,
  334. .xres = 800,
  335. .yres = 600,
  336. .pixclock = 30000,
  337. .left_margin = 30,
  338. .right_margin = 108,
  339. .upper_margin = 13,
  340. .lower_margin = 10,
  341. .hsync_len = 10,
  342. .vsync_len = 1,
  343. .sync = FB_SYNC_OE_ACT_HIGH | FB_SYNC_HOR_HIGH_ACT |
  344. FB_SYNC_VERT_HIGH_ACT,
  345. .vmode = FB_VMODE_NONINTERLACED,
  346. .flag = 0,
  347. },
  348. };
  349. static struct ipu_platform_data mx3_ipu_data = {
  350. .irq_base = MXC_IPU_IRQ_START,
  351. };
  352. static struct mx3fb_platform_data mx3fb_pdata = {
  353. .dma_dev = &mx3_ipu.dev,
  354. .name = "CRT-VGA",
  355. .mode = fb_modedb,
  356. .num_modes = ARRAY_SIZE(fb_modedb),
  357. };
  358. /*
  359. * SDHC 1
  360. * MMC support
  361. */
  362. static int armadillo5x0_sdhc1_get_ro(struct device *dev)
  363. {
  364. return gpio_get_value(IOMUX_TO_GPIO(MX31_PIN_ATA_RESET_B));
  365. }
  366. static int armadillo5x0_sdhc1_init(struct device *dev,
  367. irq_handler_t detect_irq, void *data)
  368. {
  369. int ret;
  370. int gpio_det, gpio_wp;
  371. gpio_det = IOMUX_TO_GPIO(MX31_PIN_ATA_DMACK);
  372. gpio_wp = IOMUX_TO_GPIO(MX31_PIN_ATA_RESET_B);
  373. ret = gpio_request(gpio_det, "sdhc-card-detect");
  374. if (ret)
  375. return ret;
  376. gpio_direction_input(gpio_det);
  377. ret = gpio_request(gpio_wp, "sdhc-write-protect");
  378. if (ret)
  379. goto err_gpio_free;
  380. gpio_direction_input(gpio_wp);
  381. /* When supported the trigger type have to be BOTH */
  382. ret = request_irq(IOMUX_TO_IRQ(MX31_PIN_ATA_DMACK), detect_irq,
  383. IRQF_DISABLED | IRQF_TRIGGER_FALLING,
  384. "sdhc-detect", data);
  385. if (ret)
  386. goto err_gpio_free_2;
  387. return 0;
  388. err_gpio_free_2:
  389. gpio_free(gpio_wp);
  390. err_gpio_free:
  391. gpio_free(gpio_det);
  392. return ret;
  393. }
  394. static void armadillo5x0_sdhc1_exit(struct device *dev, void *data)
  395. {
  396. free_irq(IOMUX_TO_IRQ(MX31_PIN_ATA_DMACK), data);
  397. gpio_free(IOMUX_TO_GPIO(MX31_PIN_ATA_DMACK));
  398. gpio_free(IOMUX_TO_GPIO(MX31_PIN_ATA_RESET_B));
  399. }
  400. static struct imxmmc_platform_data sdhc_pdata = {
  401. .get_ro = armadillo5x0_sdhc1_get_ro,
  402. .init = armadillo5x0_sdhc1_init,
  403. .exit = armadillo5x0_sdhc1_exit,
  404. };
  405. /*
  406. * SMSC 9118
  407. * Network support
  408. */
  409. static struct resource armadillo5x0_smc911x_resources[] = {
  410. {
  411. .start = MX31_CS3_BASE_ADDR,
  412. .end = MX31_CS3_BASE_ADDR + SZ_32M - 1,
  413. .flags = IORESOURCE_MEM,
  414. }, {
  415. .start = IOMUX_TO_IRQ(MX31_PIN_GPIO1_0),
  416. .end = IOMUX_TO_IRQ(MX31_PIN_GPIO1_0),
  417. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
  418. },
  419. };
  420. static struct smsc911x_platform_config smsc911x_info = {
  421. .flags = SMSC911X_USE_16BIT,
  422. .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
  423. .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
  424. };
  425. static struct platform_device armadillo5x0_smc911x_device = {
  426. .name = "smsc911x",
  427. .id = -1,
  428. .num_resources = ARRAY_SIZE(armadillo5x0_smc911x_resources),
  429. .resource = armadillo5x0_smc911x_resources,
  430. .dev = {
  431. .platform_data = &smsc911x_info,
  432. },
  433. };
  434. /* UART device data */
  435. static struct imxuart_platform_data uart_pdata = {
  436. .flags = IMXUART_HAVE_RTSCTS,
  437. };
  438. static struct platform_device *devices[] __initdata = {
  439. &armadillo5x0_smc911x_device,
  440. &mxc_i2c_device1,
  441. &armadillo5x0_button_device,
  442. };
  443. /*
  444. * Perform board specific initializations
  445. */
  446. static void __init armadillo5x0_init(void)
  447. {
  448. mxc_iomux_setup_multiple_pins(armadillo5x0_pins,
  449. ARRAY_SIZE(armadillo5x0_pins), "armadillo5x0");
  450. platform_add_devices(devices, ARRAY_SIZE(devices));
  451. /* Register UART */
  452. mxc_register_device(&mxc_uart_device0, &uart_pdata);
  453. mxc_register_device(&mxc_uart_device1, &uart_pdata);
  454. /* SMSC9118 IRQ pin */
  455. gpio_direction_input(MX31_PIN_GPIO1_0);
  456. /* Register SDHC */
  457. mxc_register_device(&mxcsdhc_device0, &sdhc_pdata);
  458. /* Register FB */
  459. mxc_register_device(&mx3_ipu, &mx3_ipu_data);
  460. mxc_register_device(&mx3_fb, &mx3fb_pdata);
  461. /* Register NOR Flash */
  462. mxc_register_device(&armadillo5x0_nor_flash,
  463. &armadillo5x0_nor_flash_pdata);
  464. /* Register NAND Flash */
  465. mxc_register_device(&mxc_nand_device, &armadillo5x0_nand_flash_pdata);
  466. /* set NAND page size to 2k if not configured via boot mode pins */
  467. __raw_writel(__raw_readl(MXC_CCM_RCSR) | (1 << 30), MXC_CCM_RCSR);
  468. /* RTC */
  469. /* Get RTC IRQ and register the chip */
  470. if (gpio_request(ARMADILLO5X0_RTC_GPIO, "rtc") == 0) {
  471. if (gpio_direction_input(ARMADILLO5X0_RTC_GPIO) == 0)
  472. armadillo5x0_i2c_rtc.irq = gpio_to_irq(ARMADILLO5X0_RTC_GPIO);
  473. else
  474. gpio_free(ARMADILLO5X0_RTC_GPIO);
  475. }
  476. if (armadillo5x0_i2c_rtc.irq == 0)
  477. pr_warning("armadillo5x0_init: failed to get RTC IRQ\n");
  478. i2c_register_board_info(1, &armadillo5x0_i2c_rtc, 1);
  479. /* USB */
  480. #if defined(CONFIG_USB_ULPI)
  481. usbotg_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
  482. USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT);
  483. usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
  484. USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT);
  485. mxc_register_device(&mxc_otg_host, &usbotg_pdata);
  486. mxc_register_device(&mxc_usbh2, &usbh2_pdata);
  487. #endif
  488. }
  489. static void __init armadillo5x0_timer_init(void)
  490. {
  491. mx31_clocks_init(26000000);
  492. }
  493. static struct sys_timer armadillo5x0_timer = {
  494. .init = armadillo5x0_timer_init,
  495. };
  496. MACHINE_START(ARMADILLO5X0, "Armadillo-500")
  497. /* Maintainer: Alberto Panizzo */
  498. .phys_io = MX31_AIPS1_BASE_ADDR,
  499. .io_pg_offst = (MX31_AIPS1_BASE_ADDR_VIRT >> 18) & 0xfffc,
  500. .boot_params = MX3x_PHYS_OFFSET + 0x100,
  501. .map_io = mx31_map_io,
  502. .init_irq = mx31_init_irq,
  503. .timer = &armadillo5x0_timer,
  504. .init_machine = armadillo5x0_init,
  505. MACHINE_END