cdce949.c 6.1 KB

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  1. /*
  2. * TI CDCE949 clock synthesizer driver
  3. *
  4. * Note: This implementation assumes an input of 27MHz to the CDCE.
  5. * This is by no means constrained by CDCE hardware although the datasheet
  6. * does use this as an example for all illustrations and more importantly:
  7. * that is the crystal input on boards it is currently used on.
  8. *
  9. * Copyright (C) 2009 Texas Instruments Incorporated. http://www.ti.com/
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License version 2 as
  13. * published by the Free Software Foundation.
  14. *
  15. */
  16. #include <linux/kernel.h>
  17. #include <linux/clk.h>
  18. #include <linux/platform_device.h>
  19. #include <linux/i2c.h>
  20. #include <mach/clock.h>
  21. #include "clock.h"
  22. static struct i2c_client *cdce_i2c_client;
  23. static DEFINE_MUTEX(cdce_mutex);
  24. /* CDCE register descriptor */
  25. struct cdce_reg {
  26. u8 addr;
  27. u8 val;
  28. };
  29. /* Per-Output (Y1, Y2 etc.) frequency descriptor */
  30. struct cdce_freq {
  31. /* Frequency in KHz */
  32. unsigned long frequency;
  33. /*
  34. * List of registers to program to obtain a particular frequency.
  35. * 0x0 in register address and value is the end of list marker.
  36. */
  37. struct cdce_reg *reglist;
  38. };
  39. #define CDCE_FREQ_TABLE_ENTRY(line, out) \
  40. { \
  41. .reglist = cdce_y ##line## _ ##out, \
  42. .frequency = out, \
  43. }
  44. /* List of CDCE outputs */
  45. struct cdce_output {
  46. /* List of frequencies on this output */
  47. struct cdce_freq *freq_table;
  48. /* Number of possible frequencies */
  49. int size;
  50. };
  51. /*
  52. * Finding out the values to program into CDCE949 registers for a particular
  53. * frequency output is not a simple calculation. Have a look at the datasheet
  54. * for the details. There is desktop software available to help users with
  55. * the calculations. Here, we just depend on the output of that software
  56. * (or hand calculations) instead trying to runtime calculate the register
  57. * values and inflicting misery on ourselves.
  58. */
  59. static struct cdce_reg cdce_y1_148500[] = {
  60. { 0x13, 0x00 },
  61. /* program PLL1_0 multiplier */
  62. { 0x18, 0xaf },
  63. { 0x19, 0x50 },
  64. { 0x1a, 0x02 },
  65. { 0x1b, 0xc9 },
  66. /* program PLL1_11 multiplier */
  67. { 0x1c, 0x00 },
  68. { 0x1d, 0x40 },
  69. { 0x1e, 0x02 },
  70. { 0x1f, 0xc9 },
  71. /* output state selection */
  72. { 0x15, 0x00 },
  73. { 0x14, 0xef },
  74. /* switch MUX to PLL1 output */
  75. { 0x14, 0x6f },
  76. { 0x16, 0x06 },
  77. /* set P2DIV divider, P3DIV and input crystal */
  78. { 0x17, 0x06 },
  79. { 0x01, 0x00 },
  80. { 0x05, 0x48 },
  81. { 0x02, 0x80 },
  82. /* enable and disable PLL */
  83. { 0x02, 0xbc },
  84. { 0x03, 0x01 },
  85. { },
  86. };
  87. static struct cdce_reg cdce_y1_74250[] = {
  88. { 0x13, 0x00 },
  89. { 0x18, 0xaf },
  90. { 0x19, 0x50 },
  91. { 0x1a, 0x02 },
  92. { 0x1b, 0xc9 },
  93. { 0x1c, 0x00 },
  94. { 0x1d, 0x40 },
  95. { 0x1e, 0x02 },
  96. { 0x1f, 0xc9 },
  97. /* output state selection */
  98. { 0x15, 0x00 },
  99. { 0x14, 0xef },
  100. /* switch MUX to PLL1 output */
  101. { 0x14, 0x6f },
  102. { 0x16, 0x06 },
  103. /* set P2DIV divider, P3DIV and input crystal */
  104. { 0x17, 0x06 },
  105. { 0x01, 0x00 },
  106. { 0x05, 0x48 },
  107. { 0x02, 0x80 },
  108. /* enable and disable PLL */
  109. { 0x02, 0xbc },
  110. { 0x03, 0x02 },
  111. { },
  112. };
  113. static struct cdce_reg cdce_y1_27000[] = {
  114. { 0x13, 0x00 },
  115. { 0x18, 0x00 },
  116. { 0x19, 0x40 },
  117. { 0x1a, 0x02 },
  118. { 0x1b, 0x08 },
  119. { 0x1c, 0x00 },
  120. { 0x1d, 0x40 },
  121. { 0x1e, 0x02 },
  122. { 0x1f, 0x08 },
  123. { 0x15, 0x02 },
  124. { 0x14, 0xed },
  125. { 0x16, 0x01 },
  126. { 0x17, 0x01 },
  127. { 0x01, 0x00 },
  128. { 0x05, 0x50 },
  129. { 0x02, 0xb4 },
  130. { 0x03, 0x01 },
  131. { },
  132. };
  133. static struct cdce_freq cdce_y1_freqs[] = {
  134. CDCE_FREQ_TABLE_ENTRY(1, 148500),
  135. CDCE_FREQ_TABLE_ENTRY(1, 74250),
  136. CDCE_FREQ_TABLE_ENTRY(1, 27000),
  137. };
  138. static struct cdce_reg cdce_y5_13500[] = {
  139. { 0x27, 0x08 },
  140. { 0x28, 0x00 },
  141. { 0x29, 0x40 },
  142. { 0x2a, 0x02 },
  143. { 0x2b, 0x08 },
  144. { 0x24, 0x6f },
  145. { },
  146. };
  147. static struct cdce_reg cdce_y5_16875[] = {
  148. { 0x27, 0x08 },
  149. { 0x28, 0x9f },
  150. { 0x29, 0xb0 },
  151. { 0x2a, 0x02 },
  152. { 0x2b, 0x89 },
  153. { 0x24, 0x6f },
  154. { },
  155. };
  156. static struct cdce_reg cdce_y5_27000[] = {
  157. { 0x27, 0x04 },
  158. { 0x28, 0x00 },
  159. { 0x29, 0x40 },
  160. { 0x2a, 0x02 },
  161. { 0x2b, 0x08 },
  162. { 0x24, 0x6f },
  163. { },
  164. };
  165. static struct cdce_reg cdce_y5_54000[] = {
  166. { 0x27, 0x04 },
  167. { 0x28, 0xff },
  168. { 0x29, 0x80 },
  169. { 0x2a, 0x02 },
  170. { 0x2b, 0x07 },
  171. { 0x24, 0x6f },
  172. { },
  173. };
  174. static struct cdce_reg cdce_y5_81000[] = {
  175. { 0x27, 0x02 },
  176. { 0x28, 0xbf },
  177. { 0x29, 0xa0 },
  178. { 0x2a, 0x03 },
  179. { 0x2b, 0x0a },
  180. { 0x24, 0x6f },
  181. { },
  182. };
  183. static struct cdce_freq cdce_y5_freqs[] = {
  184. CDCE_FREQ_TABLE_ENTRY(5, 13500),
  185. CDCE_FREQ_TABLE_ENTRY(5, 16875),
  186. CDCE_FREQ_TABLE_ENTRY(5, 27000),
  187. CDCE_FREQ_TABLE_ENTRY(5, 54000),
  188. CDCE_FREQ_TABLE_ENTRY(5, 81000),
  189. };
  190. static struct cdce_output output_list[] = {
  191. [1] = { cdce_y1_freqs, ARRAY_SIZE(cdce_y1_freqs) },
  192. [5] = { cdce_y5_freqs, ARRAY_SIZE(cdce_y5_freqs) },
  193. };
  194. int cdce_set_rate(struct clk *clk, unsigned long rate)
  195. {
  196. int i, ret = 0;
  197. struct cdce_freq *freq_table = output_list[clk->lpsc].freq_table;
  198. struct cdce_reg *regs = NULL;
  199. if (!cdce_i2c_client)
  200. return -ENODEV;
  201. if (!freq_table)
  202. return -EINVAL;
  203. for (i = 0; i < output_list[clk->lpsc].size; i++) {
  204. if (freq_table[i].frequency == rate / 1000) {
  205. regs = freq_table[i].reglist;
  206. break;
  207. }
  208. }
  209. if (!regs)
  210. return -EINVAL;
  211. mutex_lock(&cdce_mutex);
  212. for (i = 0; regs[i].addr; i++) {
  213. ret = i2c_smbus_write_byte_data(cdce_i2c_client,
  214. regs[i].addr | 0x80, regs[i].val);
  215. if (ret)
  216. break;
  217. }
  218. mutex_unlock(&cdce_mutex);
  219. if (!ret)
  220. clk->rate = rate;
  221. return ret;
  222. }
  223. static int cdce_probe(struct i2c_client *client,
  224. const struct i2c_device_id *id)
  225. {
  226. cdce_i2c_client = client;
  227. return 0;
  228. }
  229. static int __devexit cdce_remove(struct i2c_client *client)
  230. {
  231. cdce_i2c_client = NULL;
  232. return 0;
  233. }
  234. static const struct i2c_device_id cdce_id[] = {
  235. {"cdce949", 0},
  236. {},
  237. };
  238. MODULE_DEVICE_TABLE(i2c, cdce_id);
  239. static struct i2c_driver cdce_driver = {
  240. .driver = {
  241. .owner = THIS_MODULE,
  242. .name = "cdce949",
  243. },
  244. .probe = cdce_probe,
  245. .remove = __devexit_p(cdce_remove),
  246. .id_table = cdce_id,
  247. };
  248. static int __init cdce_init(void)
  249. {
  250. return i2c_add_driver(&cdce_driver);
  251. }
  252. subsys_initcall(cdce_init);
  253. static void __exit cdce_exit(void)
  254. {
  255. i2c_del_driver(&cdce_driver);
  256. }
  257. module_exit(cdce_exit);
  258. MODULE_AUTHOR("Texas Instruments");
  259. MODULE_DESCRIPTION("CDCE949 clock synthesizer driver");
  260. MODULE_LICENSE("GPL v2");