cxgb3i_ddp.c 20 KB

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  1. /*
  2. * cxgb3i_ddp.c: Chelsio S3xx iSCSI DDP Manager.
  3. *
  4. * Copyright (c) 2008 Chelsio Communications, Inc.
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation.
  9. *
  10. * Written by: Karen Xie (kxie@chelsio.com)
  11. */
  12. #include <linux/skbuff.h>
  13. #include <linux/scatterlist.h>
  14. /* from cxgb3 LLD */
  15. #include "common.h"
  16. #include "t3_cpl.h"
  17. #include "t3cdev.h"
  18. #include "cxgb3_ctl_defs.h"
  19. #include "cxgb3_offload.h"
  20. #include "firmware_exports.h"
  21. #include "cxgb3i_ddp.h"
  22. #define DRV_MODULE_NAME "cxgb3i_ddp"
  23. #define DRV_MODULE_VERSION "1.0.0"
  24. #define DRV_MODULE_RELDATE "Dec. 1, 2008"
  25. static char version[] =
  26. "Chelsio S3xx iSCSI DDP " DRV_MODULE_NAME
  27. " v" DRV_MODULE_VERSION " (" DRV_MODULE_RELDATE ")\n";
  28. MODULE_AUTHOR("Karen Xie <kxie@chelsio.com>");
  29. MODULE_DESCRIPTION("cxgb3i ddp pagepod manager");
  30. MODULE_LICENSE("GPL");
  31. MODULE_VERSION(DRV_MODULE_VERSION);
  32. #define ddp_log_error(fmt...) printk(KERN_ERR "cxgb3i_ddp: ERR! " fmt)
  33. #define ddp_log_warn(fmt...) printk(KERN_WARNING "cxgb3i_ddp: WARN! " fmt)
  34. #define ddp_log_info(fmt...) printk(KERN_INFO "cxgb3i_ddp: " fmt)
  35. #ifdef __DEBUG_CXGB3I_DDP__
  36. #define ddp_log_debug(fmt, args...) \
  37. printk(KERN_INFO "cxgb3i_ddp: %s - " fmt, __func__ , ## args)
  38. #else
  39. #define ddp_log_debug(fmt...)
  40. #endif
  41. /*
  42. * iSCSI Direct Data Placement
  43. *
  44. * T3 h/w can directly place the iSCSI Data-In or Data-Out PDU's payload into
  45. * pre-posted final destination host-memory buffers based on the Initiator
  46. * Task Tag (ITT) in Data-In or Target Task Tag (TTT) in Data-Out PDUs.
  47. *
  48. * The host memory address is programmed into h/w in the format of pagepod
  49. * entries.
  50. * The location of the pagepod entry is encoded into ddp tag which is used or
  51. * is the base for ITT/TTT.
  52. */
  53. #define DDP_PGIDX_MAX 4
  54. #define DDP_THRESHOLD 2048
  55. static unsigned char ddp_page_order[DDP_PGIDX_MAX] = {0, 1, 2, 4};
  56. static unsigned char ddp_page_shift[DDP_PGIDX_MAX] = {12, 13, 14, 16};
  57. static unsigned char page_idx = DDP_PGIDX_MAX;
  58. /*
  59. * functions to program the pagepod in h/w
  60. */
  61. static inline void ulp_mem_io_set_hdr(struct sk_buff *skb, unsigned int addr)
  62. {
  63. struct ulp_mem_io *req = (struct ulp_mem_io *)skb->head;
  64. req->wr.wr_lo = 0;
  65. req->wr.wr_hi = htonl(V_WR_OP(FW_WROPCODE_BYPASS));
  66. req->cmd_lock_addr = htonl(V_ULP_MEMIO_ADDR(addr >> 5) |
  67. V_ULPTX_CMD(ULP_MEM_WRITE));
  68. req->len = htonl(V_ULP_MEMIO_DATA_LEN(PPOD_SIZE >> 5) |
  69. V_ULPTX_NFLITS((PPOD_SIZE >> 3) + 1));
  70. }
  71. static int set_ddp_map(struct cxgb3i_ddp_info *ddp, struct pagepod_hdr *hdr,
  72. unsigned int idx, unsigned int npods,
  73. struct cxgb3i_gather_list *gl)
  74. {
  75. unsigned int pm_addr = (idx << PPOD_SIZE_SHIFT) + ddp->llimit;
  76. int i;
  77. for (i = 0; i < npods; i++, idx++, pm_addr += PPOD_SIZE) {
  78. struct sk_buff *skb = ddp->gl_skb[idx];
  79. struct pagepod *ppod;
  80. int j, pidx;
  81. /* hold on to the skb until we clear the ddp mapping */
  82. skb_get(skb);
  83. ulp_mem_io_set_hdr(skb, pm_addr);
  84. ppod = (struct pagepod *)
  85. (skb->head + sizeof(struct ulp_mem_io));
  86. memcpy(&(ppod->hdr), hdr, sizeof(struct pagepod));
  87. for (pidx = 4 * i, j = 0; j < 5; ++j, ++pidx)
  88. ppod->addr[j] = pidx < gl->nelem ?
  89. cpu_to_be64(gl->phys_addr[pidx]) : 0UL;
  90. skb->priority = CPL_PRIORITY_CONTROL;
  91. cxgb3_ofld_send(ddp->tdev, skb);
  92. }
  93. return 0;
  94. }
  95. static void clear_ddp_map(struct cxgb3i_ddp_info *ddp, unsigned int tag,
  96. unsigned int idx, unsigned int npods)
  97. {
  98. unsigned int pm_addr = (idx << PPOD_SIZE_SHIFT) + ddp->llimit;
  99. int i;
  100. for (i = 0; i < npods; i++, idx++, pm_addr += PPOD_SIZE) {
  101. struct sk_buff *skb = ddp->gl_skb[idx];
  102. if (!skb) {
  103. ddp_log_error("ddp tag 0x%x, 0x%x, %d/%u, skb NULL.\n",
  104. tag, idx, i, npods);
  105. continue;
  106. }
  107. ddp->gl_skb[idx] = NULL;
  108. memset((skb->head + sizeof(struct ulp_mem_io)), 0, PPOD_SIZE);
  109. ulp_mem_io_set_hdr(skb, pm_addr);
  110. skb->priority = CPL_PRIORITY_CONTROL;
  111. cxgb3_ofld_send(ddp->tdev, skb);
  112. }
  113. }
  114. static inline int ddp_find_unused_entries(struct cxgb3i_ddp_info *ddp,
  115. int start, int max, int count,
  116. struct cxgb3i_gather_list *gl)
  117. {
  118. unsigned int i, j;
  119. spin_lock(&ddp->map_lock);
  120. for (i = start; i <= max;) {
  121. for (j = 0; j < count; j++) {
  122. if (ddp->gl_map[i + j])
  123. break;
  124. }
  125. if (j == count) {
  126. for (j = 0; j < count; j++)
  127. ddp->gl_map[i + j] = gl;
  128. spin_unlock(&ddp->map_lock);
  129. return i;
  130. }
  131. i += j + 1;
  132. }
  133. spin_unlock(&ddp->map_lock);
  134. return -EBUSY;
  135. }
  136. static inline void ddp_unmark_entries(struct cxgb3i_ddp_info *ddp,
  137. int start, int count)
  138. {
  139. spin_lock(&ddp->map_lock);
  140. memset(&ddp->gl_map[start], 0,
  141. count * sizeof(struct cxgb3i_gather_list *));
  142. spin_unlock(&ddp->map_lock);
  143. }
  144. static inline void ddp_free_gl_skb(struct cxgb3i_ddp_info *ddp,
  145. int idx, int count)
  146. {
  147. int i;
  148. for (i = 0; i < count; i++, idx++)
  149. if (ddp->gl_skb[idx]) {
  150. kfree_skb(ddp->gl_skb[idx]);
  151. ddp->gl_skb[idx] = NULL;
  152. }
  153. }
  154. static inline int ddp_alloc_gl_skb(struct cxgb3i_ddp_info *ddp, int idx,
  155. int count, gfp_t gfp)
  156. {
  157. int i;
  158. for (i = 0; i < count; i++) {
  159. struct sk_buff *skb = alloc_skb(sizeof(struct ulp_mem_io) +
  160. PPOD_SIZE, gfp);
  161. if (skb) {
  162. ddp->gl_skb[idx + i] = skb;
  163. skb_put(skb, sizeof(struct ulp_mem_io) + PPOD_SIZE);
  164. } else {
  165. ddp_free_gl_skb(ddp, idx, i);
  166. return -ENOMEM;
  167. }
  168. }
  169. return 0;
  170. }
  171. /**
  172. * cxgb3i_ddp_find_page_index - return ddp page index for a given page size
  173. * @pgsz: page size
  174. * return the ddp page index, if no match is found return DDP_PGIDX_MAX.
  175. */
  176. int cxgb3i_ddp_find_page_index(unsigned long pgsz)
  177. {
  178. int i;
  179. for (i = 0; i < DDP_PGIDX_MAX; i++) {
  180. if (pgsz == (1UL << ddp_page_shift[i]))
  181. return i;
  182. }
  183. ddp_log_debug("ddp page size 0x%lx not supported.\n", pgsz);
  184. return DDP_PGIDX_MAX;
  185. }
  186. EXPORT_SYMBOL_GPL(cxgb3i_ddp_find_page_index);
  187. static inline void ddp_gl_unmap(struct pci_dev *pdev,
  188. struct cxgb3i_gather_list *gl)
  189. {
  190. int i;
  191. for (i = 0; i < gl->nelem; i++)
  192. pci_unmap_page(pdev, gl->phys_addr[i], PAGE_SIZE,
  193. PCI_DMA_FROMDEVICE);
  194. }
  195. static inline int ddp_gl_map(struct pci_dev *pdev,
  196. struct cxgb3i_gather_list *gl)
  197. {
  198. int i;
  199. for (i = 0; i < gl->nelem; i++) {
  200. gl->phys_addr[i] = pci_map_page(pdev, gl->pages[i], 0,
  201. PAGE_SIZE,
  202. PCI_DMA_FROMDEVICE);
  203. if (unlikely(pci_dma_mapping_error(pdev, gl->phys_addr[i])))
  204. goto unmap;
  205. }
  206. return i;
  207. unmap:
  208. if (i) {
  209. unsigned int nelem = gl->nelem;
  210. gl->nelem = i;
  211. ddp_gl_unmap(pdev, gl);
  212. gl->nelem = nelem;
  213. }
  214. return -ENOMEM;
  215. }
  216. /**
  217. * cxgb3i_ddp_make_gl - build ddp page buffer list
  218. * @xferlen: total buffer length
  219. * @sgl: page buffer scatter-gather list
  220. * @sgcnt: # of page buffers
  221. * @pdev: pci_dev, used for pci map
  222. * @gfp: allocation mode
  223. *
  224. * construct a ddp page buffer list from the scsi scattergather list.
  225. * coalesce buffers as much as possible, and obtain dma addresses for
  226. * each page.
  227. *
  228. * Return the cxgb3i_gather_list constructed from the page buffers if the
  229. * memory can be used for ddp. Return NULL otherwise.
  230. */
  231. struct cxgb3i_gather_list *cxgb3i_ddp_make_gl(unsigned int xferlen,
  232. struct scatterlist *sgl,
  233. unsigned int sgcnt,
  234. struct pci_dev *pdev,
  235. gfp_t gfp)
  236. {
  237. struct cxgb3i_gather_list *gl;
  238. struct scatterlist *sg = sgl;
  239. struct page *sgpage = sg_page(sg);
  240. unsigned int sglen = sg->length;
  241. unsigned int sgoffset = sg->offset;
  242. unsigned int npages = (xferlen + sgoffset + PAGE_SIZE - 1) >>
  243. PAGE_SHIFT;
  244. int i = 1, j = 0;
  245. if (xferlen < DDP_THRESHOLD) {
  246. ddp_log_debug("xfer %u < threshold %u, no ddp.\n",
  247. xferlen, DDP_THRESHOLD);
  248. return NULL;
  249. }
  250. gl = kzalloc(sizeof(struct cxgb3i_gather_list) +
  251. npages * (sizeof(dma_addr_t) + sizeof(struct page *)),
  252. gfp);
  253. if (!gl)
  254. return NULL;
  255. gl->pages = (struct page **)&gl->phys_addr[npages];
  256. gl->length = xferlen;
  257. gl->offset = sgoffset;
  258. gl->pages[0] = sgpage;
  259. sg = sg_next(sg);
  260. while (sg) {
  261. struct page *page = sg_page(sg);
  262. if (sgpage == page && sg->offset == sgoffset + sglen)
  263. sglen += sg->length;
  264. else {
  265. /* make sure the sgl is fit for ddp:
  266. * each has the same page size, and
  267. * all of the middle pages are used completely
  268. */
  269. if ((j && sgoffset) ||
  270. ((i != sgcnt - 1) &&
  271. ((sglen + sgoffset) & ~PAGE_MASK)))
  272. goto error_out;
  273. j++;
  274. if (j == gl->nelem || sg->offset)
  275. goto error_out;
  276. gl->pages[j] = page;
  277. sglen = sg->length;
  278. sgoffset = sg->offset;
  279. sgpage = page;
  280. }
  281. i++;
  282. sg = sg_next(sg);
  283. }
  284. gl->nelem = ++j;
  285. if (ddp_gl_map(pdev, gl) < 0)
  286. goto error_out;
  287. return gl;
  288. error_out:
  289. kfree(gl);
  290. return NULL;
  291. }
  292. EXPORT_SYMBOL_GPL(cxgb3i_ddp_make_gl);
  293. /**
  294. * cxgb3i_ddp_release_gl - release a page buffer list
  295. * @gl: a ddp page buffer list
  296. * @pdev: pci_dev used for pci_unmap
  297. * free a ddp page buffer list resulted from cxgb3i_ddp_make_gl().
  298. */
  299. void cxgb3i_ddp_release_gl(struct cxgb3i_gather_list *gl,
  300. struct pci_dev *pdev)
  301. {
  302. ddp_gl_unmap(pdev, gl);
  303. kfree(gl);
  304. }
  305. EXPORT_SYMBOL_GPL(cxgb3i_ddp_release_gl);
  306. /**
  307. * cxgb3i_ddp_tag_reserve - set up ddp for a data transfer
  308. * @tdev: t3cdev adapter
  309. * @tid: connection id
  310. * @tformat: tag format
  311. * @tagp: contains s/w tag initially, will be updated with ddp/hw tag
  312. * @gl: the page momory list
  313. * @gfp: allocation mode
  314. *
  315. * ddp setup for a given page buffer list and construct the ddp tag.
  316. * return 0 if success, < 0 otherwise.
  317. */
  318. int cxgb3i_ddp_tag_reserve(struct t3cdev *tdev, unsigned int tid,
  319. struct cxgb3i_tag_format *tformat, u32 *tagp,
  320. struct cxgb3i_gather_list *gl, gfp_t gfp)
  321. {
  322. struct cxgb3i_ddp_info *ddp = tdev->ulp_iscsi;
  323. struct pagepod_hdr hdr;
  324. unsigned int npods;
  325. int idx = -1, idx_max;
  326. int err = -ENOMEM;
  327. u32 sw_tag = *tagp;
  328. u32 tag;
  329. if (page_idx >= DDP_PGIDX_MAX || !ddp || !gl || !gl->nelem ||
  330. gl->length < DDP_THRESHOLD) {
  331. ddp_log_debug("pgidx %u, xfer %u/%u, NO ddp.\n",
  332. page_idx, gl->length, DDP_THRESHOLD);
  333. return -EINVAL;
  334. }
  335. npods = (gl->nelem + PPOD_PAGES_MAX - 1) >> PPOD_PAGES_SHIFT;
  336. idx_max = ddp->nppods - npods + 1;
  337. if (ddp->idx_last == ddp->nppods)
  338. idx = ddp_find_unused_entries(ddp, 0, idx_max, npods, gl);
  339. else {
  340. idx = ddp_find_unused_entries(ddp, ddp->idx_last + 1,
  341. idx_max, npods, gl);
  342. if (idx < 0 && ddp->idx_last >= npods)
  343. idx = ddp_find_unused_entries(ddp, 0,
  344. ddp->idx_last - npods + 1,
  345. npods, gl);
  346. }
  347. if (idx < 0) {
  348. ddp_log_debug("xferlen %u, gl %u, npods %u NO DDP.\n",
  349. gl->length, gl->nelem, npods);
  350. return idx;
  351. }
  352. err = ddp_alloc_gl_skb(ddp, idx, npods, gfp);
  353. if (err < 0)
  354. goto unmark_entries;
  355. tag = cxgb3i_ddp_tag_base(tformat, sw_tag);
  356. tag |= idx << PPOD_IDX_SHIFT;
  357. hdr.rsvd = 0;
  358. hdr.vld_tid = htonl(F_PPOD_VALID | V_PPOD_TID(tid));
  359. hdr.pgsz_tag_clr = htonl(tag & ddp->rsvd_tag_mask);
  360. hdr.maxoffset = htonl(gl->length);
  361. hdr.pgoffset = htonl(gl->offset);
  362. err = set_ddp_map(ddp, &hdr, idx, npods, gl);
  363. if (err < 0)
  364. goto free_gl_skb;
  365. ddp->idx_last = idx;
  366. ddp_log_debug("xfer %u, gl %u,%u, tid 0x%x, 0x%x -> 0x%x(%u,%u).\n",
  367. gl->length, gl->nelem, gl->offset, tid, sw_tag, tag,
  368. idx, npods);
  369. *tagp = tag;
  370. return 0;
  371. free_gl_skb:
  372. ddp_free_gl_skb(ddp, idx, npods);
  373. unmark_entries:
  374. ddp_unmark_entries(ddp, idx, npods);
  375. return err;
  376. }
  377. EXPORT_SYMBOL_GPL(cxgb3i_ddp_tag_reserve);
  378. /**
  379. * cxgb3i_ddp_tag_release - release a ddp tag
  380. * @tdev: t3cdev adapter
  381. * @tag: ddp tag
  382. * ddp cleanup for a given ddp tag and release all the resources held
  383. */
  384. void cxgb3i_ddp_tag_release(struct t3cdev *tdev, u32 tag)
  385. {
  386. struct cxgb3i_ddp_info *ddp = tdev->ulp_iscsi;
  387. u32 idx;
  388. if (!ddp) {
  389. ddp_log_error("release ddp tag 0x%x, ddp NULL.\n", tag);
  390. return;
  391. }
  392. idx = (tag >> PPOD_IDX_SHIFT) & ddp->idx_mask;
  393. if (idx < ddp->nppods) {
  394. struct cxgb3i_gather_list *gl = ddp->gl_map[idx];
  395. unsigned int npods;
  396. if (!gl || !gl->nelem) {
  397. ddp_log_error("release 0x%x, idx 0x%x, gl 0x%p, %u.\n",
  398. tag, idx, gl, gl ? gl->nelem : 0);
  399. return;
  400. }
  401. npods = (gl->nelem + PPOD_PAGES_MAX - 1) >> PPOD_PAGES_SHIFT;
  402. ddp_log_debug("ddp tag 0x%x, release idx 0x%x, npods %u.\n",
  403. tag, idx, npods);
  404. clear_ddp_map(ddp, tag, idx, npods);
  405. ddp_unmark_entries(ddp, idx, npods);
  406. cxgb3i_ddp_release_gl(gl, ddp->pdev);
  407. } else
  408. ddp_log_error("ddp tag 0x%x, idx 0x%x > max 0x%x.\n",
  409. tag, idx, ddp->nppods);
  410. }
  411. EXPORT_SYMBOL_GPL(cxgb3i_ddp_tag_release);
  412. static int setup_conn_pgidx(struct t3cdev *tdev, unsigned int tid, int pg_idx,
  413. int reply)
  414. {
  415. struct sk_buff *skb = alloc_skb(sizeof(struct cpl_set_tcb_field),
  416. GFP_KERNEL);
  417. struct cpl_set_tcb_field *req;
  418. u64 val = pg_idx < DDP_PGIDX_MAX ? pg_idx : 0;
  419. if (!skb)
  420. return -ENOMEM;
  421. /* set up ulp submode and page size */
  422. req = (struct cpl_set_tcb_field *)skb_put(skb, sizeof(*req));
  423. req->wr.wr_hi = htonl(V_WR_OP(FW_WROPCODE_FORWARD));
  424. OPCODE_TID(req) = htonl(MK_OPCODE_TID(CPL_SET_TCB_FIELD, tid));
  425. req->reply = V_NO_REPLY(reply ? 0 : 1);
  426. req->cpu_idx = 0;
  427. req->word = htons(31);
  428. req->mask = cpu_to_be64(0xF0000000);
  429. req->val = cpu_to_be64(val << 28);
  430. skb->priority = CPL_PRIORITY_CONTROL;
  431. cxgb3_ofld_send(tdev, skb);
  432. return 0;
  433. }
  434. /**
  435. * cxgb3i_setup_conn_host_pagesize - setup the conn.'s ddp page size
  436. * @tdev: t3cdev adapter
  437. * @tid: connection id
  438. * @reply: request reply from h/w
  439. * set up the ddp page size based on the host PAGE_SIZE for a connection
  440. * identified by tid
  441. */
  442. int cxgb3i_setup_conn_host_pagesize(struct t3cdev *tdev, unsigned int tid,
  443. int reply)
  444. {
  445. return setup_conn_pgidx(tdev, tid, page_idx, reply);
  446. }
  447. EXPORT_SYMBOL_GPL(cxgb3i_setup_conn_host_pagesize);
  448. /**
  449. * cxgb3i_setup_conn_pagesize - setup the conn.'s ddp page size
  450. * @tdev: t3cdev adapter
  451. * @tid: connection id
  452. * @reply: request reply from h/w
  453. * @pgsz: ddp page size
  454. * set up the ddp page size for a connection identified by tid
  455. */
  456. int cxgb3i_setup_conn_pagesize(struct t3cdev *tdev, unsigned int tid,
  457. int reply, unsigned long pgsz)
  458. {
  459. int pgidx = cxgb3i_ddp_find_page_index(pgsz);
  460. return setup_conn_pgidx(tdev, tid, pgidx, reply);
  461. }
  462. EXPORT_SYMBOL_GPL(cxgb3i_setup_conn_pagesize);
  463. /**
  464. * cxgb3i_setup_conn_digest - setup conn. digest setting
  465. * @tdev: t3cdev adapter
  466. * @tid: connection id
  467. * @hcrc: header digest enabled
  468. * @dcrc: data digest enabled
  469. * @reply: request reply from h/w
  470. * set up the iscsi digest settings for a connection identified by tid
  471. */
  472. int cxgb3i_setup_conn_digest(struct t3cdev *tdev, unsigned int tid,
  473. int hcrc, int dcrc, int reply)
  474. {
  475. struct sk_buff *skb = alloc_skb(sizeof(struct cpl_set_tcb_field),
  476. GFP_KERNEL);
  477. struct cpl_set_tcb_field *req;
  478. u64 val = (hcrc ? 1 : 0) | (dcrc ? 2 : 0);
  479. if (!skb)
  480. return -ENOMEM;
  481. /* set up ulp submode and page size */
  482. req = (struct cpl_set_tcb_field *)skb_put(skb, sizeof(*req));
  483. req->wr.wr_hi = htonl(V_WR_OP(FW_WROPCODE_FORWARD));
  484. OPCODE_TID(req) = htonl(MK_OPCODE_TID(CPL_SET_TCB_FIELD, tid));
  485. req->reply = V_NO_REPLY(reply ? 0 : 1);
  486. req->cpu_idx = 0;
  487. req->word = htons(31);
  488. req->mask = cpu_to_be64(0x0F000000);
  489. req->val = cpu_to_be64(val << 24);
  490. skb->priority = CPL_PRIORITY_CONTROL;
  491. cxgb3_ofld_send(tdev, skb);
  492. return 0;
  493. }
  494. EXPORT_SYMBOL_GPL(cxgb3i_setup_conn_digest);
  495. /**
  496. * cxgb3i_adapter_ddp_info - read the adapter's ddp information
  497. * @tdev: t3cdev adapter
  498. * @tformat: tag format
  499. * @txsz: max tx pdu payload size, filled in by this func.
  500. * @rxsz: max rx pdu payload size, filled in by this func.
  501. * setup the tag format for a given iscsi entity
  502. */
  503. int cxgb3i_adapter_ddp_info(struct t3cdev *tdev,
  504. struct cxgb3i_tag_format *tformat,
  505. unsigned int *txsz, unsigned int *rxsz)
  506. {
  507. struct cxgb3i_ddp_info *ddp;
  508. unsigned char idx_bits;
  509. if (!tformat)
  510. return -EINVAL;
  511. if (!tdev->ulp_iscsi)
  512. return -EINVAL;
  513. ddp = (struct cxgb3i_ddp_info *)tdev->ulp_iscsi;
  514. idx_bits = 32 - tformat->sw_bits;
  515. tformat->rsvd_bits = ddp->idx_bits;
  516. tformat->rsvd_shift = PPOD_IDX_SHIFT;
  517. tformat->rsvd_mask = (1 << tformat->rsvd_bits) - 1;
  518. ddp_log_info("tag format: sw %u, rsvd %u,%u, mask 0x%x.\n",
  519. tformat->sw_bits, tformat->rsvd_bits,
  520. tformat->rsvd_shift, tformat->rsvd_mask);
  521. *txsz = min_t(unsigned int, ULP2_MAX_PDU_PAYLOAD,
  522. ddp->max_txsz - ISCSI_PDU_NONPAYLOAD_LEN);
  523. *rxsz = min_t(unsigned int, ULP2_MAX_PDU_PAYLOAD,
  524. ddp->max_rxsz - ISCSI_PDU_NONPAYLOAD_LEN);
  525. ddp_log_info("max payload size: %u/%u, %u/%u.\n",
  526. *txsz, ddp->max_txsz, *rxsz, ddp->max_rxsz);
  527. return 0;
  528. }
  529. EXPORT_SYMBOL_GPL(cxgb3i_adapter_ddp_info);
  530. /**
  531. * ddp_release - release the cxgb3 adapter's ddp resource
  532. * @tdev: t3cdev adapter
  533. * release all the resource held by the ddp pagepod manager for a given
  534. * adapter if needed
  535. */
  536. static void ddp_release(struct t3cdev *tdev)
  537. {
  538. int i = 0;
  539. struct cxgb3i_ddp_info *ddp = (struct cxgb3i_ddp_info *)tdev->ulp_iscsi;
  540. ddp_log_info("t3dev 0x%p, release ddp 0x%p.\n", tdev, ddp);
  541. if (ddp) {
  542. tdev->ulp_iscsi = NULL;
  543. while (i < ddp->nppods) {
  544. struct cxgb3i_gather_list *gl = ddp->gl_map[i];
  545. if (gl) {
  546. int npods = (gl->nelem + PPOD_PAGES_MAX - 1)
  547. >> PPOD_PAGES_SHIFT;
  548. ddp_log_info("t3dev 0x%p, ddp %d + %d.\n",
  549. tdev, i, npods);
  550. kfree(gl);
  551. ddp_free_gl_skb(ddp, i, npods);
  552. i += npods;
  553. } else
  554. i++;
  555. }
  556. cxgb3i_free_big_mem(ddp);
  557. }
  558. }
  559. /**
  560. * ddp_init - initialize the cxgb3 adapter's ddp resource
  561. * @tdev: t3cdev adapter
  562. * initialize the ddp pagepod manager for a given adapter
  563. */
  564. static void ddp_init(struct t3cdev *tdev)
  565. {
  566. struct cxgb3i_ddp_info *ddp;
  567. struct ulp_iscsi_info uinfo;
  568. unsigned int ppmax, bits;
  569. int i, err;
  570. static int vers_printed;
  571. if (tdev->ulp_iscsi) {
  572. ddp_log_warn("t3dev 0x%p, ddp 0x%p already set up.\n",
  573. tdev, tdev->ulp_iscsi);
  574. return;
  575. }
  576. if (!vers_printed) {
  577. printk(KERN_INFO "%s", version);
  578. vers_printed = 1;
  579. }
  580. err = tdev->ctl(tdev, ULP_ISCSI_GET_PARAMS, &uinfo);
  581. if (err < 0) {
  582. ddp_log_error("%s, failed to get iscsi param err=%d.\n",
  583. tdev->name, err);
  584. return;
  585. }
  586. ppmax = (uinfo.ulimit - uinfo.llimit + 1) >> PPOD_SIZE_SHIFT;
  587. bits = __ilog2_u32(ppmax) + 1;
  588. if (bits > PPOD_IDX_MAX_SIZE)
  589. bits = PPOD_IDX_MAX_SIZE;
  590. ppmax = (1 << (bits - 1)) - 1;
  591. ddp = cxgb3i_alloc_big_mem(sizeof(struct cxgb3i_ddp_info) +
  592. ppmax *
  593. (sizeof(struct cxgb3i_gather_list *) +
  594. sizeof(struct sk_buff *)),
  595. GFP_KERNEL);
  596. if (!ddp) {
  597. ddp_log_warn("%s unable to alloc ddp 0x%d, ddp disabled.\n",
  598. tdev->name, ppmax);
  599. return;
  600. }
  601. ddp->gl_map = (struct cxgb3i_gather_list **)(ddp + 1);
  602. ddp->gl_skb = (struct sk_buff **)(((char *)ddp->gl_map) +
  603. ppmax *
  604. sizeof(struct cxgb3i_gather_list *));
  605. spin_lock_init(&ddp->map_lock);
  606. ddp->tdev = tdev;
  607. ddp->pdev = uinfo.pdev;
  608. ddp->max_txsz = min_t(unsigned int, uinfo.max_txsz, ULP2_MAX_PKT_SIZE);
  609. ddp->max_rxsz = min_t(unsigned int, uinfo.max_rxsz, ULP2_MAX_PKT_SIZE);
  610. ddp->llimit = uinfo.llimit;
  611. ddp->ulimit = uinfo.ulimit;
  612. ddp->nppods = ppmax;
  613. ddp->idx_last = ppmax;
  614. ddp->idx_bits = bits;
  615. ddp->idx_mask = (1 << bits) - 1;
  616. ddp->rsvd_tag_mask = (1 << (bits + PPOD_IDX_SHIFT)) - 1;
  617. uinfo.tagmask = ddp->idx_mask << PPOD_IDX_SHIFT;
  618. for (i = 0; i < DDP_PGIDX_MAX; i++)
  619. uinfo.pgsz_factor[i] = ddp_page_order[i];
  620. uinfo.ulimit = uinfo.llimit + (ppmax << PPOD_SIZE_SHIFT);
  621. err = tdev->ctl(tdev, ULP_ISCSI_SET_PARAMS, &uinfo);
  622. if (err < 0) {
  623. ddp_log_warn("%s unable to set iscsi param err=%d, "
  624. "ddp disabled.\n", tdev->name, err);
  625. goto free_ddp_map;
  626. }
  627. tdev->ulp_iscsi = ddp;
  628. ddp_log_info("tdev 0x%p, nppods %u, bits %u, mask 0x%x,0x%x pkt %u/%u,"
  629. " %u/%u.\n",
  630. tdev, ppmax, ddp->idx_bits, ddp->idx_mask,
  631. ddp->rsvd_tag_mask, ddp->max_txsz, uinfo.max_txsz,
  632. ddp->max_rxsz, uinfo.max_rxsz);
  633. return;
  634. free_ddp_map:
  635. cxgb3i_free_big_mem(ddp);
  636. }
  637. static struct cxgb3_client t3c_ddp_client = {
  638. .name = "iscsiddp_cxgb3",
  639. .add = ddp_init,
  640. .remove = ddp_release,
  641. };
  642. /**
  643. * cxgb3i_ddp_init_module - module init entry point
  644. * initialize any driver wide global data structures and register with the
  645. * cxgb3 module
  646. */
  647. static int __init cxgb3i_ddp_init_module(void)
  648. {
  649. page_idx = cxgb3i_ddp_find_page_index(PAGE_SIZE);
  650. ddp_log_info("system PAGE_SIZE %lu, ddp idx %u.\n",
  651. PAGE_SIZE, page_idx);
  652. cxgb3_register_client(&t3c_ddp_client);
  653. return 0;
  654. }
  655. /**
  656. * cxgb3i_ddp_exit_module - module cleanup/exit entry point
  657. * go through the ddp list, unregister with the cxgb3 module and release
  658. * any resource held.
  659. */
  660. static void __exit cxgb3i_ddp_exit_module(void)
  661. {
  662. cxgb3_unregister_client(&t3c_ddp_client);
  663. }
  664. module_init(cxgb3i_ddp_init_module);
  665. module_exit(cxgb3i_ddp_exit_module);