mach-crag6410.c 17 KB

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  1. /* linux/arch/arm/mach-s3c64xx/mach-crag6410.c
  2. *
  3. * Copyright 2011 Wolfson Microelectronics plc
  4. * Mark Brown <broonie@opensource.wolfsonmicro.com>
  5. *
  6. * Copyright 2011 Simtec Electronics
  7. * Ben Dooks <ben@simtec.co.uk>
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. */
  13. #include <linux/kernel.h>
  14. #include <linux/list.h>
  15. #include <linux/serial_core.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/fb.h>
  18. #include <linux/io.h>
  19. #include <linux/init.h>
  20. #include <linux/gpio.h>
  21. #include <linux/delay.h>
  22. #include <linux/regulator/machine.h>
  23. #include <linux/regulator/fixed.h>
  24. #include <linux/pwm_backlight.h>
  25. #include <linux/dm9000.h>
  26. #include <linux/gpio_keys.h>
  27. #include <linux/basic_mmio_gpio.h>
  28. #include <linux/spi/spi.h>
  29. #include <linux/i2c/pca953x.h>
  30. #include <video/platform_lcd.h>
  31. #include <linux/mfd/wm831x/core.h>
  32. #include <linux/mfd/wm831x/pdata.h>
  33. #include <linux/mfd/wm831x/irq.h>
  34. #include <linux/mfd/wm831x/gpio.h>
  35. #include <asm/hardware/vic.h>
  36. #include <asm/mach/arch.h>
  37. #include <asm/mach-types.h>
  38. #include <mach/hardware.h>
  39. #include <mach/map.h>
  40. #include <mach/regs-sys.h>
  41. #include <mach/regs-gpio.h>
  42. #include <mach/regs-modem.h>
  43. #include <mach/crag6410.h>
  44. #include <mach/regs-gpio-memport.h>
  45. #include <plat/s3c6410.h>
  46. #include <plat/regs-serial.h>
  47. #include <plat/regs-fb-v4.h>
  48. #include <plat/fb.h>
  49. #include <plat/sdhci.h>
  50. #include <plat/gpio-cfg.h>
  51. #include <plat/s3c64xx-spi.h>
  52. #include <plat/keypad.h>
  53. #include <plat/clock.h>
  54. #include <plat/devs.h>
  55. #include <plat/cpu.h>
  56. #include <plat/adc.h>
  57. #include <plat/iic.h>
  58. #include <plat/pm.h>
  59. /* serial port setup */
  60. #define UCON (S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK)
  61. #define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB)
  62. #define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)
  63. static struct s3c2410_uartcfg crag6410_uartcfgs[] __initdata = {
  64. [0] = {
  65. .hwport = 0,
  66. .flags = 0,
  67. .ucon = UCON,
  68. .ulcon = ULCON,
  69. .ufcon = UFCON,
  70. },
  71. [1] = {
  72. .hwport = 1,
  73. .flags = 0,
  74. .ucon = UCON,
  75. .ulcon = ULCON,
  76. .ufcon = UFCON,
  77. },
  78. [2] = {
  79. .hwport = 2,
  80. .flags = 0,
  81. .ucon = UCON,
  82. .ulcon = ULCON,
  83. .ufcon = UFCON,
  84. },
  85. [3] = {
  86. .hwport = 3,
  87. .flags = 0,
  88. .ucon = UCON,
  89. .ulcon = ULCON,
  90. .ufcon = UFCON,
  91. },
  92. };
  93. static struct platform_pwm_backlight_data crag6410_backlight_data = {
  94. .pwm_id = 0,
  95. .max_brightness = 1000,
  96. .dft_brightness = 600,
  97. .pwm_period_ns = 100000, /* about 1kHz */
  98. };
  99. static struct platform_device crag6410_backlight_device = {
  100. .name = "pwm-backlight",
  101. .id = -1,
  102. .dev = {
  103. .parent = &s3c_device_timer[0].dev,
  104. .platform_data = &crag6410_backlight_data,
  105. },
  106. };
  107. static void crag6410_lcd_power_set(struct plat_lcd_data *pd, unsigned int power)
  108. {
  109. pr_debug("%s: setting power %d\n", __func__, power);
  110. if (power) {
  111. gpio_set_value(S3C64XX_GPB(0), 1);
  112. msleep(1);
  113. s3c_gpio_cfgpin(S3C64XX_GPF(14), S3C_GPIO_SFN(2));
  114. } else {
  115. gpio_direction_output(S3C64XX_GPF(14), 0);
  116. gpio_set_value(S3C64XX_GPB(0), 0);
  117. }
  118. }
  119. static struct platform_device crag6410_lcd_powerdev = {
  120. .name = "platform-lcd",
  121. .id = -1,
  122. .dev.parent = &s3c_device_fb.dev,
  123. .dev.platform_data = &(struct plat_lcd_data) {
  124. .set_power = crag6410_lcd_power_set,
  125. },
  126. };
  127. /* 640x480 URT */
  128. static struct s3c_fb_pd_win crag6410_fb_win0 = {
  129. /* this is to ensure we use win0 */
  130. .win_mode = {
  131. .left_margin = 150,
  132. .right_margin = 80,
  133. .upper_margin = 40,
  134. .lower_margin = 5,
  135. .hsync_len = 40,
  136. .vsync_len = 5,
  137. .xres = 640,
  138. .yres = 480,
  139. },
  140. .max_bpp = 32,
  141. .default_bpp = 16,
  142. .virtual_y = 480 * 2,
  143. .virtual_x = 640,
  144. };
  145. /* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */
  146. static struct s3c_fb_platdata crag6410_lcd_pdata __initdata = {
  147. .setup_gpio = s3c64xx_fb_gpio_setup_24bpp,
  148. .win[0] = &crag6410_fb_win0,
  149. .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
  150. .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
  151. };
  152. /* 2x6 keypad */
  153. static uint32_t crag6410_keymap[] __initdata = {
  154. /* KEY(row, col, keycode) */
  155. KEY(0, 0, KEY_VOLUMEUP),
  156. KEY(0, 1, KEY_HOME),
  157. KEY(0, 2, KEY_VOLUMEDOWN),
  158. KEY(0, 3, KEY_HELP),
  159. KEY(0, 4, KEY_MENU),
  160. KEY(0, 5, KEY_MEDIA),
  161. KEY(1, 0, 232),
  162. KEY(1, 1, KEY_DOWN),
  163. KEY(1, 2, KEY_LEFT),
  164. KEY(1, 3, KEY_UP),
  165. KEY(1, 4, KEY_RIGHT),
  166. KEY(1, 5, KEY_CAMERA),
  167. };
  168. static struct matrix_keymap_data crag6410_keymap_data __initdata = {
  169. .keymap = crag6410_keymap,
  170. .keymap_size = ARRAY_SIZE(crag6410_keymap),
  171. };
  172. static struct samsung_keypad_platdata crag6410_keypad_data __initdata = {
  173. .keymap_data = &crag6410_keymap_data,
  174. .rows = 2,
  175. .cols = 6,
  176. };
  177. static struct gpio_keys_button crag6410_gpio_keys[] = {
  178. [0] = {
  179. .code = KEY_SUSPEND,
  180. .gpio = S3C64XX_GPL(10), /* EINT 18 */
  181. .type = EV_KEY,
  182. .wakeup = 1,
  183. .active_low = 1,
  184. },
  185. [1] = {
  186. .code = SW_FRONT_PROXIMITY,
  187. .gpio = S3C64XX_GPN(11), /* EINT 11 */
  188. .type = EV_SW,
  189. },
  190. };
  191. static struct gpio_keys_platform_data crag6410_gpio_keydata = {
  192. .buttons = crag6410_gpio_keys,
  193. .nbuttons = ARRAY_SIZE(crag6410_gpio_keys),
  194. };
  195. static struct platform_device crag6410_gpio_keydev = {
  196. .name = "gpio-keys",
  197. .id = 0,
  198. .dev.platform_data = &crag6410_gpio_keydata,
  199. };
  200. static struct resource crag6410_dm9k_resource[] = {
  201. [0] = {
  202. .start = S3C64XX_PA_XM0CSN5,
  203. .end = S3C64XX_PA_XM0CSN5 + 1,
  204. .flags = IORESOURCE_MEM,
  205. },
  206. [1] = {
  207. .start = S3C64XX_PA_XM0CSN5 + (1 << 8),
  208. .end = S3C64XX_PA_XM0CSN5 + (1 << 8) + 1,
  209. .flags = IORESOURCE_MEM,
  210. },
  211. [2] = {
  212. .start = S3C_EINT(17),
  213. .end = S3C_EINT(17),
  214. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  215. },
  216. };
  217. static struct dm9000_plat_data mini6410_dm9k_pdata = {
  218. .flags = DM9000_PLATF_16BITONLY,
  219. };
  220. static struct platform_device crag6410_dm9k_device = {
  221. .name = "dm9000",
  222. .id = -1,
  223. .num_resources = ARRAY_SIZE(crag6410_dm9k_resource),
  224. .resource = crag6410_dm9k_resource,
  225. .dev.platform_data = &mini6410_dm9k_pdata,
  226. };
  227. static struct resource crag6410_mmgpio_resource[] = {
  228. [0] = {
  229. .start = S3C64XX_PA_XM0CSN4 + 1,
  230. .end = S3C64XX_PA_XM0CSN4 + 1,
  231. .flags = IORESOURCE_MEM,
  232. },
  233. };
  234. static struct platform_device crag6410_mmgpio = {
  235. .name = "basic-mmio-gpio",
  236. .id = -1,
  237. .resource = crag6410_mmgpio_resource,
  238. .num_resources = ARRAY_SIZE(crag6410_mmgpio_resource),
  239. .dev.platform_data = &(struct bgpio_pdata) {
  240. .base = -1,
  241. },
  242. };
  243. static struct platform_device speyside_device = {
  244. .name = "speyside",
  245. .id = -1,
  246. };
  247. static struct platform_device lowland_device = {
  248. .name = "lowland",
  249. .id = -1,
  250. };
  251. static struct platform_device speyside_wm8962_device = {
  252. .name = "speyside-wm8962",
  253. .id = -1,
  254. };
  255. static struct regulator_consumer_supply wallvdd_consumers[] = {
  256. REGULATOR_SUPPLY("SPKVDD1", "1-001a"),
  257. REGULATOR_SUPPLY("SPKVDD2", "1-001a"),
  258. REGULATOR_SUPPLY("SPKVDDL", "1-001a"),
  259. REGULATOR_SUPPLY("SPKVDDR", "1-001a"),
  260. };
  261. static struct regulator_init_data wallvdd_data = {
  262. .constraints = {
  263. .always_on = 1,
  264. },
  265. .num_consumer_supplies = ARRAY_SIZE(wallvdd_consumers),
  266. .consumer_supplies = wallvdd_consumers,
  267. };
  268. static struct fixed_voltage_config wallvdd_pdata = {
  269. .supply_name = "WALLVDD",
  270. .microvolts = 5000000,
  271. .init_data = &wallvdd_data,
  272. .gpio = -EINVAL,
  273. };
  274. static struct platform_device wallvdd_device = {
  275. .name = "reg-fixed-voltage",
  276. .id = -1,
  277. .dev = {
  278. .platform_data = &wallvdd_pdata,
  279. },
  280. };
  281. static struct platform_device *crag6410_devices[] __initdata = {
  282. &s3c_device_hsmmc0,
  283. &s3c_device_hsmmc1,
  284. &s3c_device_hsmmc2,
  285. &s3c_device_i2c0,
  286. &s3c_device_i2c1,
  287. &s3c_device_fb,
  288. &s3c_device_ohci,
  289. &s3c_device_usb_hsotg,
  290. &s3c_device_timer[0],
  291. &s3c64xx_device_iis0,
  292. &s3c64xx_device_iis1,
  293. &samsung_asoc_dma,
  294. &samsung_device_keypad,
  295. &crag6410_gpio_keydev,
  296. &crag6410_dm9k_device,
  297. &s3c64xx_device_spi0,
  298. &crag6410_mmgpio,
  299. &crag6410_lcd_powerdev,
  300. &crag6410_backlight_device,
  301. &speyside_device,
  302. &speyside_wm8962_device,
  303. &lowland_device,
  304. &wallvdd_device,
  305. };
  306. static struct pca953x_platform_data crag6410_pca_data = {
  307. .gpio_base = PCA935X_GPIO_BASE,
  308. .irq_base = 0,
  309. };
  310. /* VDDARM is controlled by DVS1 connected to GPK(0) */
  311. static struct wm831x_buckv_pdata vddarm_pdata = {
  312. .dvs_control_src = 1,
  313. .dvs_gpio = S3C64XX_GPK(0),
  314. };
  315. static struct regulator_consumer_supply vddarm_consumers[] __initdata = {
  316. REGULATOR_SUPPLY("vddarm", NULL),
  317. };
  318. static struct regulator_init_data vddarm __initdata = {
  319. .constraints = {
  320. .name = "VDDARM",
  321. .min_uV = 1000000,
  322. .max_uV = 1300000,
  323. .always_on = 1,
  324. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
  325. },
  326. .num_consumer_supplies = ARRAY_SIZE(vddarm_consumers),
  327. .consumer_supplies = vddarm_consumers,
  328. .supply_regulator = "WALLVDD",
  329. .driver_data = &vddarm_pdata,
  330. };
  331. static struct regulator_init_data vddint __initdata = {
  332. .constraints = {
  333. .name = "VDDINT",
  334. .min_uV = 1000000,
  335. .max_uV = 1200000,
  336. .always_on = 1,
  337. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
  338. },
  339. };
  340. static struct regulator_init_data vddmem __initdata = {
  341. .constraints = {
  342. .name = "VDDMEM",
  343. .always_on = 1,
  344. },
  345. };
  346. static struct regulator_init_data vddsys __initdata = {
  347. .constraints = {
  348. .name = "VDDSYS,VDDEXT,VDDPCM,VDDSS",
  349. .always_on = 1,
  350. },
  351. };
  352. static struct regulator_consumer_supply vddmmc_consumers[] __initdata = {
  353. REGULATOR_SUPPLY("vmmc", "s3c-sdhci.0"),
  354. REGULATOR_SUPPLY("vmmc", "s3c-sdhci.1"),
  355. REGULATOR_SUPPLY("vmmc", "s3c-sdhci.2"),
  356. };
  357. static struct regulator_init_data vddmmc __initdata = {
  358. .constraints = {
  359. .name = "VDDMMC,UH",
  360. .always_on = 1,
  361. },
  362. .num_consumer_supplies = ARRAY_SIZE(vddmmc_consumers),
  363. .consumer_supplies = vddmmc_consumers,
  364. .supply_regulator = "WALLVDD",
  365. };
  366. static struct regulator_init_data vddotgi __initdata = {
  367. .constraints = {
  368. .name = "VDDOTGi",
  369. .always_on = 1,
  370. },
  371. .supply_regulator = "WALLVDD",
  372. };
  373. static struct regulator_init_data vddotg __initdata = {
  374. .constraints = {
  375. .name = "VDDOTG",
  376. .always_on = 1,
  377. },
  378. .supply_regulator = "WALLVDD",
  379. };
  380. static struct regulator_init_data vddhi __initdata = {
  381. .constraints = {
  382. .name = "VDDHI",
  383. .always_on = 1,
  384. },
  385. .supply_regulator = "WALLVDD",
  386. };
  387. static struct regulator_init_data vddadc __initdata = {
  388. .constraints = {
  389. .name = "VDDADC,VDDDAC",
  390. .always_on = 1,
  391. },
  392. .supply_regulator = "WALLVDD",
  393. };
  394. static struct regulator_init_data vddmem0 __initdata = {
  395. .constraints = {
  396. .name = "VDDMEM0",
  397. .always_on = 1,
  398. },
  399. .supply_regulator = "WALLVDD",
  400. };
  401. static struct regulator_init_data vddpll __initdata = {
  402. .constraints = {
  403. .name = "VDDPLL",
  404. .always_on = 1,
  405. },
  406. .supply_regulator = "WALLVDD",
  407. };
  408. static struct regulator_init_data vddlcd __initdata = {
  409. .constraints = {
  410. .name = "VDDLCD",
  411. .always_on = 1,
  412. },
  413. .supply_regulator = "WALLVDD",
  414. };
  415. static struct regulator_init_data vddalive __initdata = {
  416. .constraints = {
  417. .name = "VDDALIVE",
  418. .always_on = 1,
  419. },
  420. .supply_regulator = "WALLVDD",
  421. };
  422. static struct wm831x_backup_pdata banff_backup_pdata __initdata = {
  423. .charger_enable = 1,
  424. .vlim = 2500, /* mV */
  425. .ilim = 200, /* uA */
  426. };
  427. static struct wm831x_status_pdata banff_red_led __initdata = {
  428. .name = "banff:red:",
  429. .default_src = WM831X_STATUS_MANUAL,
  430. };
  431. static struct wm831x_status_pdata banff_green_led __initdata = {
  432. .name = "banff:green:",
  433. .default_src = WM831X_STATUS_MANUAL,
  434. };
  435. static struct wm831x_touch_pdata touch_pdata __initdata = {
  436. .data_irq = S3C_EINT(26),
  437. .pd_irq = S3C_EINT(27),
  438. };
  439. static struct wm831x_pdata crag_pmic_pdata __initdata = {
  440. .wm831x_num = 1,
  441. .irq_base = BANFF_PMIC_IRQ_BASE,
  442. .gpio_base = GPIO_BOARD_START + 8,
  443. .backup = &banff_backup_pdata,
  444. .gpio_defaults = {
  445. /* GPIO5: DVS1_REQ - CMOS, DBVDD, active high */
  446. [4] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA | 0x8,
  447. /* GPIO11: Touchscreen data - CMOS, DBVDD, active high*/
  448. [10] = WM831X_GPN_POL | WM831X_GPN_ENA | 0x6,
  449. /* GPIO12: Touchscreen pen down - CMOS, DBVDD, active high*/
  450. [11] = WM831X_GPN_POL | WM831X_GPN_ENA | 0x7,
  451. },
  452. .dcdc = {
  453. &vddarm, /* DCDC1 */
  454. &vddint, /* DCDC2 */
  455. &vddmem, /* DCDC3 */
  456. },
  457. .ldo = {
  458. &vddsys, /* LDO1 */
  459. &vddmmc, /* LDO2 */
  460. NULL, /* LDO3 */
  461. &vddotgi, /* LDO4 */
  462. &vddotg, /* LDO5 */
  463. &vddhi, /* LDO6 */
  464. &vddadc, /* LDO7 */
  465. &vddmem0, /* LDO8 */
  466. &vddpll, /* LDO9 */
  467. &vddlcd, /* LDO10 */
  468. &vddalive, /* LDO11 */
  469. },
  470. .status = {
  471. &banff_green_led,
  472. &banff_red_led,
  473. },
  474. .touch = &touch_pdata,
  475. };
  476. static struct i2c_board_info i2c_devs0[] __initdata = {
  477. { I2C_BOARD_INFO("24c08", 0x50), },
  478. { I2C_BOARD_INFO("tca6408", 0x20),
  479. .platform_data = &crag6410_pca_data,
  480. },
  481. { I2C_BOARD_INFO("wm8312", 0x34),
  482. .platform_data = &crag_pmic_pdata,
  483. .irq = S3C_EINT(23),
  484. },
  485. };
  486. static struct s3c2410_platform_i2c i2c0_pdata = {
  487. .frequency = 400000,
  488. };
  489. static struct regulator_init_data pvdd_1v2 __initdata = {
  490. .constraints = {
  491. .name = "PVDD_1V2",
  492. .always_on = 1,
  493. },
  494. };
  495. static struct regulator_consumer_supply pvdd_1v8_consumers[] __initdata = {
  496. REGULATOR_SUPPLY("LDOVDD", "1-001a"),
  497. REGULATOR_SUPPLY("PLLVDD", "1-001a"),
  498. REGULATOR_SUPPLY("DBVDD", "1-001a"),
  499. REGULATOR_SUPPLY("DBVDD1", "1-001a"),
  500. REGULATOR_SUPPLY("DBVDD2", "1-001a"),
  501. REGULATOR_SUPPLY("DBVDD3", "1-001a"),
  502. REGULATOR_SUPPLY("CPVDD", "1-001a"),
  503. REGULATOR_SUPPLY("AVDD2", "1-001a"),
  504. REGULATOR_SUPPLY("DCVDD", "1-001a"),
  505. REGULATOR_SUPPLY("AVDD", "1-001a"),
  506. };
  507. static struct regulator_init_data pvdd_1v8 __initdata = {
  508. .constraints = {
  509. .name = "PVDD_1V8",
  510. .always_on = 1,
  511. },
  512. .consumer_supplies = pvdd_1v8_consumers,
  513. .num_consumer_supplies = ARRAY_SIZE(pvdd_1v8_consumers),
  514. };
  515. static struct regulator_consumer_supply pvdd_3v3_consumers[] __initdata = {
  516. REGULATOR_SUPPLY("MICVDD", "1-001a"),
  517. REGULATOR_SUPPLY("AVDD1", "1-001a"),
  518. };
  519. static struct regulator_init_data pvdd_3v3 __initdata = {
  520. .constraints = {
  521. .name = "PVDD_3V3",
  522. .always_on = 1,
  523. },
  524. .consumer_supplies = pvdd_3v3_consumers,
  525. .num_consumer_supplies = ARRAY_SIZE(pvdd_3v3_consumers),
  526. };
  527. static struct wm831x_pdata glenfarclas_pmic_pdata __initdata = {
  528. .wm831x_num = 2,
  529. .irq_base = GLENFARCLAS_PMIC_IRQ_BASE,
  530. .gpio_base = GLENFARCLAS_PMIC_GPIO_BASE,
  531. .gpio_defaults = {
  532. /* GPIO1-3: IRQ inputs, rising edge triggered, CMOS */
  533. [0] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA,
  534. [1] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA,
  535. [2] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA,
  536. },
  537. .dcdc = {
  538. &pvdd_1v2, /* DCDC1 */
  539. &pvdd_1v8, /* DCDC2 */
  540. &pvdd_3v3, /* DCDC3 */
  541. },
  542. .disable_touch = true,
  543. };
  544. static struct i2c_board_info i2c_devs1[] __initdata = {
  545. { I2C_BOARD_INFO("wm8311", 0x34),
  546. .irq = S3C_EINT(0),
  547. .platform_data = &glenfarclas_pmic_pdata },
  548. { I2C_BOARD_INFO("wlf-gf-module", 0x24) },
  549. { I2C_BOARD_INFO("wlf-gf-module", 0x25) },
  550. { I2C_BOARD_INFO("wlf-gf-module", 0x26) },
  551. { I2C_BOARD_INFO("wm1250-ev1", 0x27) },
  552. };
  553. static void __init crag6410_map_io(void)
  554. {
  555. s3c64xx_init_io(NULL, 0);
  556. s3c24xx_init_clocks(12000000);
  557. s3c24xx_init_uarts(crag6410_uartcfgs, ARRAY_SIZE(crag6410_uartcfgs));
  558. /* LCD type and Bypass set by bootloader */
  559. }
  560. static struct s3c_sdhci_platdata crag6410_hsmmc2_pdata = {
  561. .max_width = 4,
  562. .cd_type = S3C_SDHCI_CD_PERMANENT,
  563. };
  564. static struct s3c_sdhci_platdata crag6410_hsmmc1_pdata = {
  565. .max_width = 4,
  566. .cd_type = S3C_SDHCI_CD_GPIO,
  567. .ext_cd_gpio = S3C64XX_GPF(11),
  568. };
  569. static void crag6410_cfg_sdhci0(struct platform_device *dev, int width)
  570. {
  571. /* Set all the necessary GPG pins to special-function 2 */
  572. s3c_gpio_cfgrange_nopull(S3C64XX_GPG(0), 2 + width, S3C_GPIO_SFN(2));
  573. /* force card-detected for prototype 0 */
  574. s3c_gpio_setpull(S3C64XX_GPG(6), S3C_GPIO_PULL_DOWN);
  575. }
  576. static struct s3c_sdhci_platdata crag6410_hsmmc0_pdata = {
  577. .max_width = 4,
  578. .cd_type = S3C_SDHCI_CD_INTERNAL,
  579. .cfg_gpio = crag6410_cfg_sdhci0,
  580. };
  581. static void __init crag6410_machine_init(void)
  582. {
  583. /* Open drain IRQs need pullups */
  584. s3c_gpio_setpull(S3C64XX_GPM(0), S3C_GPIO_PULL_UP);
  585. s3c_gpio_setpull(S3C64XX_GPN(0), S3C_GPIO_PULL_UP);
  586. gpio_request(S3C64XX_GPB(0), "LCD power");
  587. gpio_direction_output(S3C64XX_GPB(0), 0);
  588. gpio_request(S3C64XX_GPF(14), "LCD PWM");
  589. gpio_direction_output(S3C64XX_GPF(14), 0); /* turn off */
  590. gpio_request(S3C64XX_GPB(1), "SD power");
  591. gpio_direction_output(S3C64XX_GPB(1), 0);
  592. gpio_request(S3C64XX_GPF(10), "nRESETSEL");
  593. gpio_direction_output(S3C64XX_GPF(10), 1);
  594. s3c_sdhci0_set_platdata(&crag6410_hsmmc0_pdata);
  595. s3c_sdhci1_set_platdata(&crag6410_hsmmc1_pdata);
  596. s3c_sdhci2_set_platdata(&crag6410_hsmmc2_pdata);
  597. s3c_i2c0_set_platdata(&i2c0_pdata);
  598. s3c_i2c1_set_platdata(NULL);
  599. s3c_fb_set_platdata(&crag6410_lcd_pdata);
  600. i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0));
  601. i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
  602. samsung_keypad_set_platdata(&crag6410_keypad_data);
  603. platform_add_devices(crag6410_devices, ARRAY_SIZE(crag6410_devices));
  604. regulator_has_full_constraints();
  605. s3c_pm_init();
  606. }
  607. MACHINE_START(WLF_CRAGG_6410, "Wolfson Cragganmore 6410")
  608. /* Maintainer: Mark Brown <broonie@opensource.wolfsonmicro.com> */
  609. .atag_offset = 0x100,
  610. .init_irq = s3c6410_init_irq,
  611. .handle_irq = vic_handle_irq,
  612. .map_io = crag6410_map_io,
  613. .init_machine = crag6410_machine_init,
  614. .timer = &s3c24xx_timer,
  615. MACHINE_END