processor.h 9.9 KB

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  1. /*
  2. * Copyright 2010 Tilera Corporation. All Rights Reserved.
  3. *
  4. * This program is free software; you can redistribute it and/or
  5. * modify it under the terms of the GNU General Public License
  6. * as published by the Free Software Foundation, version 2.
  7. *
  8. * This program is distributed in the hope that it will be useful, but
  9. * WITHOUT ANY WARRANTY; without even the implied warranty of
  10. * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  11. * NON INFRINGEMENT. See the GNU General Public License for
  12. * more details.
  13. */
  14. #ifndef _ASM_TILE_PROCESSOR_H
  15. #define _ASM_TILE_PROCESSOR_H
  16. #ifndef __ASSEMBLY__
  17. /*
  18. * NOTE: we don't include <linux/ptrace.h> or <linux/percpu.h> as one
  19. * normally would, due to #include dependencies.
  20. */
  21. #include <linux/types.h>
  22. #include <asm/ptrace.h>
  23. #include <asm/percpu.h>
  24. #include <arch/chip.h>
  25. #include <arch/spr_def.h>
  26. struct task_struct;
  27. struct thread_struct;
  28. typedef struct {
  29. unsigned long seg;
  30. } mm_segment_t;
  31. /*
  32. * Default implementation of macro that returns current
  33. * instruction pointer ("program counter").
  34. */
  35. void *current_text_addr(void);
  36. #if CHIP_HAS_TILE_DMA()
  37. /* Capture the state of a suspended DMA. */
  38. struct tile_dma_state {
  39. int enabled;
  40. unsigned long src;
  41. unsigned long dest;
  42. unsigned long strides;
  43. unsigned long chunk_size;
  44. unsigned long src_chunk;
  45. unsigned long dest_chunk;
  46. unsigned long byte;
  47. unsigned long status;
  48. };
  49. /*
  50. * A mask of the DMA status register for selecting only the 'running'
  51. * and 'done' bits.
  52. */
  53. #define DMA_STATUS_MASK \
  54. (SPR_DMA_STATUS__RUNNING_MASK | SPR_DMA_STATUS__DONE_MASK)
  55. #endif
  56. /*
  57. * Track asynchronous TLB events (faults and access violations)
  58. * that occur while we are in kernel mode from DMA or the SN processor.
  59. */
  60. struct async_tlb {
  61. short fault_num; /* original fault number; 0 if none */
  62. char is_fault; /* was it a fault (vs an access violation) */
  63. char is_write; /* for fault: was it caused by a write? */
  64. unsigned long address; /* what address faulted? */
  65. };
  66. #ifdef CONFIG_HARDWALL
  67. struct hardwall_info;
  68. #endif
  69. struct thread_struct {
  70. /* kernel stack pointer */
  71. unsigned long ksp;
  72. /* kernel PC */
  73. unsigned long pc;
  74. /* starting user stack pointer (for page migration) */
  75. unsigned long usp0;
  76. /* pid of process that created this one */
  77. pid_t creator_pid;
  78. #if CHIP_HAS_TILE_DMA()
  79. /* DMA info for suspended threads (byte == 0 means no DMA state) */
  80. struct tile_dma_state tile_dma_state;
  81. #endif
  82. /* User EX_CONTEXT registers */
  83. unsigned long ex_context[2];
  84. /* User SYSTEM_SAVE registers */
  85. unsigned long system_save[4];
  86. /* User interrupt mask */
  87. unsigned long long interrupt_mask;
  88. /* User interrupt-control 0 state */
  89. unsigned long intctrl_0;
  90. #if CHIP_HAS_PROC_STATUS_SPR()
  91. /* Any other miscellaneous processor state bits */
  92. unsigned long proc_status;
  93. #endif
  94. #ifdef CONFIG_HARDWALL
  95. /* Is this task tied to an activated hardwall? */
  96. struct hardwall_info *hardwall;
  97. /* Chains this task into the list at hardwall->list. */
  98. struct list_head hardwall_list;
  99. #endif
  100. #if CHIP_HAS_TILE_DMA()
  101. /* Async DMA TLB fault information */
  102. struct async_tlb dma_async_tlb;
  103. #endif
  104. #if CHIP_HAS_SN_PROC()
  105. /* Was static network processor when we were switched out? */
  106. int sn_proc_running;
  107. /* Async SNI TLB fault information */
  108. struct async_tlb sn_async_tlb;
  109. #endif
  110. };
  111. #endif /* !__ASSEMBLY__ */
  112. /*
  113. * Start with "sp" this many bytes below the top of the kernel stack.
  114. * This preserves the invariant that a called function may write to *sp.
  115. */
  116. #define STACK_TOP_DELTA 8
  117. /*
  118. * When entering the kernel via a fault, start with the top of the
  119. * pt_regs structure this many bytes below the top of the page.
  120. * This aligns the pt_regs structure optimally for cache-line access.
  121. */
  122. #ifdef __tilegx__
  123. #define KSTK_PTREGS_GAP 48
  124. #else
  125. #define KSTK_PTREGS_GAP 56
  126. #endif
  127. #ifndef __ASSEMBLY__
  128. #ifdef __tilegx__
  129. #define TASK_SIZE_MAX (MEM_LOW_END + 1)
  130. #else
  131. #define TASK_SIZE_MAX PAGE_OFFSET
  132. #endif
  133. /* TASK_SIZE and related variables are always checked in "current" context. */
  134. #ifdef CONFIG_COMPAT
  135. #define COMPAT_TASK_SIZE (1UL << 31)
  136. #define TASK_SIZE ((current_thread_info()->status & TS_COMPAT) ?\
  137. COMPAT_TASK_SIZE : TASK_SIZE_MAX)
  138. #else
  139. #define TASK_SIZE TASK_SIZE_MAX
  140. #endif
  141. /* We provide a minimal "vdso" a la x86; just the sigreturn code for now. */
  142. #define VDSO_BASE (TASK_SIZE - PAGE_SIZE)
  143. #define STACK_TOP VDSO_BASE
  144. /* STACK_TOP_MAX is used temporarily in execve and should not check COMPAT. */
  145. #define STACK_TOP_MAX TASK_SIZE_MAX
  146. /*
  147. * This decides where the kernel will search for a free chunk of vm
  148. * space during mmap's, if it is using bottom-up mapping.
  149. */
  150. #define TASK_UNMAPPED_BASE (PAGE_ALIGN(TASK_SIZE / 3))
  151. #define HAVE_ARCH_PICK_MMAP_LAYOUT
  152. #define INIT_THREAD { \
  153. .ksp = (unsigned long)init_stack + THREAD_SIZE - STACK_TOP_DELTA, \
  154. .interrupt_mask = -1ULL \
  155. }
  156. /* Kernel stack top for the task that first boots on this cpu. */
  157. DECLARE_PER_CPU(unsigned long, boot_sp);
  158. /* PC to boot from on this cpu. */
  159. DECLARE_PER_CPU(unsigned long, boot_pc);
  160. /* Do necessary setup to start up a newly executed thread. */
  161. static inline void start_thread(struct pt_regs *regs,
  162. unsigned long pc, unsigned long usp)
  163. {
  164. regs->pc = pc;
  165. regs->sp = usp;
  166. }
  167. /* Free all resources held by a thread. */
  168. static inline void release_thread(struct task_struct *dead_task)
  169. {
  170. /* Nothing for now */
  171. }
  172. /* Prepare to copy thread state - unlazy all lazy status. */
  173. #define prepare_to_copy(tsk) do { } while (0)
  174. extern int kernel_thread(int (*fn)(void *), void *arg, unsigned long flags);
  175. /*
  176. * Return saved (kernel) PC of a blocked thread.
  177. * Only used in a printk() in kernel/sched.c, so don't work too hard.
  178. */
  179. #define thread_saved_pc(t) ((t)->thread.pc)
  180. unsigned long get_wchan(struct task_struct *p);
  181. /* Return initial ksp value for given task. */
  182. #define task_ksp0(task) ((unsigned long)(task)->stack + THREAD_SIZE)
  183. /* Return some info about the user process TASK. */
  184. #define KSTK_TOP(task) (task_ksp0(task) - STACK_TOP_DELTA)
  185. #define task_pt_regs(task) \
  186. ((struct pt_regs *)(task_ksp0(task) - KSTK_PTREGS_GAP) - 1)
  187. #define task_sp(task) (task_pt_regs(task)->sp)
  188. #define task_pc(task) (task_pt_regs(task)->pc)
  189. /* Aliases for pc and sp (used in fs/proc/array.c) */
  190. #define KSTK_EIP(task) task_pc(task)
  191. #define KSTK_ESP(task) task_sp(task)
  192. /* Standard format for printing registers and other word-size data. */
  193. #ifdef __tilegx__
  194. # define REGFMT "0x%016lx"
  195. #else
  196. # define REGFMT "0x%08lx"
  197. #endif
  198. /*
  199. * Do some slow action (e.g. read a slow SPR).
  200. * Note that this must also have compiler-barrier semantics since
  201. * it may be used in a busy loop reading memory.
  202. */
  203. static inline void cpu_relax(void)
  204. {
  205. __insn_mfspr(SPR_PASS);
  206. barrier();
  207. }
  208. struct siginfo;
  209. extern void arch_coredump_signal(struct siginfo *, struct pt_regs *);
  210. #define arch_coredump_signal arch_coredump_signal
  211. /* Info on this processor (see fs/proc/cpuinfo.c) */
  212. struct seq_operations;
  213. extern const struct seq_operations cpuinfo_op;
  214. /* Provide information about the chip model. */
  215. extern char chip_model[64];
  216. /* Data on which physical memory controller corresponds to which NUMA node. */
  217. extern int node_controller[];
  218. /* Do we dump information to the console when a user application crashes? */
  219. extern int show_crashinfo;
  220. #if CHIP_HAS_CBOX_HOME_MAP()
  221. /* Does the heap allocator return hash-for-home pages by default? */
  222. extern int hash_default;
  223. /* Should kernel stack pages be hash-for-home? */
  224. extern int kstack_hash;
  225. #else
  226. #define hash_default 0
  227. #define kstack_hash 0
  228. #endif
  229. /* Are we using huge pages in the TLB for kernel data? */
  230. extern int kdata_huge;
  231. /*
  232. * Note that with OLOC the prefetch will return an unused read word to
  233. * the issuing tile, which will cause some MDN traffic. Benchmarking
  234. * should be done to see whether this outweighs prefetching.
  235. */
  236. #define ARCH_HAS_PREFETCH
  237. #define ARCH_HAS_PREFETCHW
  238. #define ARCH_HAS_SPINLOCK_PREFETCH
  239. #define prefetch(ptr) __builtin_prefetch((ptr), 0, 3)
  240. #define prefetchw(ptr) __builtin_prefetch((ptr), 1, 3)
  241. #ifdef CONFIG_SMP
  242. #define spin_lock_prefetch(ptr) prefetchw(ptr)
  243. #else
  244. /* Nothing to prefetch. */
  245. #define spin_lock_prefetch(lock) do { } while (0)
  246. #endif
  247. #else /* __ASSEMBLY__ */
  248. /* Do some slow action (e.g. read a slow SPR). */
  249. #define CPU_RELAX mfspr zero, SPR_PASS
  250. #endif /* !__ASSEMBLY__ */
  251. /* Assembly code assumes that the PL is in the low bits. */
  252. #if SPR_EX_CONTEXT_1_1__PL_SHIFT != 0
  253. # error Fix assembly assumptions about PL
  254. #endif
  255. /* We sometimes use these macros for EX_CONTEXT_0_1 as well. */
  256. #if SPR_EX_CONTEXT_1_1__PL_SHIFT != SPR_EX_CONTEXT_0_1__PL_SHIFT || \
  257. SPR_EX_CONTEXT_1_1__PL_RMASK != SPR_EX_CONTEXT_0_1__PL_RMASK || \
  258. SPR_EX_CONTEXT_1_1__ICS_SHIFT != SPR_EX_CONTEXT_0_1__ICS_SHIFT || \
  259. SPR_EX_CONTEXT_1_1__ICS_RMASK != SPR_EX_CONTEXT_0_1__ICS_RMASK
  260. # error Fix assumptions that EX1 macros work for both PL0 and PL1
  261. #endif
  262. /* Allow pulling apart and recombining the PL and ICS bits in EX_CONTEXT. */
  263. #define EX1_PL(ex1) \
  264. (((ex1) >> SPR_EX_CONTEXT_1_1__PL_SHIFT) & SPR_EX_CONTEXT_1_1__PL_RMASK)
  265. #define EX1_ICS(ex1) \
  266. (((ex1) >> SPR_EX_CONTEXT_1_1__ICS_SHIFT) & SPR_EX_CONTEXT_1_1__ICS_RMASK)
  267. #define PL_ICS_EX1(pl, ics) \
  268. (((pl) << SPR_EX_CONTEXT_1_1__PL_SHIFT) | \
  269. ((ics) << SPR_EX_CONTEXT_1_1__ICS_SHIFT))
  270. /*
  271. * Provide symbolic constants for PLs.
  272. * Note that assembly code assumes that USER_PL is zero.
  273. */
  274. #define USER_PL 0
  275. #define KERNEL_PL 1
  276. /* SYSTEM_SAVE_1_0 holds the current cpu number ORed with ksp0. */
  277. #define CPU_LOG_MASK_VALUE 12
  278. #define CPU_MASK_VALUE ((1 << CPU_LOG_MASK_VALUE) - 1)
  279. #if CONFIG_NR_CPUS > CPU_MASK_VALUE
  280. # error Too many cpus!
  281. #endif
  282. #define raw_smp_processor_id() \
  283. ((int)__insn_mfspr(SPR_SYSTEM_SAVE_1_0) & CPU_MASK_VALUE)
  284. #define get_current_ksp0() \
  285. (__insn_mfspr(SPR_SYSTEM_SAVE_1_0) & ~CPU_MASK_VALUE)
  286. #define next_current_ksp0(task) ({ \
  287. unsigned long __ksp0 = task_ksp0(task); \
  288. int __cpu = raw_smp_processor_id(); \
  289. BUG_ON(__ksp0 & CPU_MASK_VALUE); \
  290. __ksp0 | __cpu; \
  291. })
  292. #endif /* _ASM_TILE_PROCESSOR_H */