qla_init.c 120 KB

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  1. /*
  2. * QLogic Fibre Channel HBA Driver
  3. * Copyright (c) 2003-2008 QLogic Corporation
  4. *
  5. * See LICENSE.qla2xxx for copyright and licensing details.
  6. */
  7. #include "qla_def.h"
  8. #include "qla_gbl.h"
  9. #include <linux/delay.h>
  10. #include <linux/vmalloc.h>
  11. #include "qla_devtbl.h"
  12. #ifdef CONFIG_SPARC
  13. #include <asm/prom.h>
  14. #endif
  15. /*
  16. * QLogic ISP2x00 Hardware Support Function Prototypes.
  17. */
  18. static int qla2x00_isp_firmware(scsi_qla_host_t *);
  19. static int qla2x00_setup_chip(scsi_qla_host_t *);
  20. static int qla2x00_init_rings(scsi_qla_host_t *);
  21. static int qla2x00_fw_ready(scsi_qla_host_t *);
  22. static int qla2x00_configure_hba(scsi_qla_host_t *);
  23. static int qla2x00_configure_loop(scsi_qla_host_t *);
  24. static int qla2x00_configure_local_loop(scsi_qla_host_t *);
  25. static int qla2x00_configure_fabric(scsi_qla_host_t *);
  26. static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *, struct list_head *);
  27. static int qla2x00_device_resync(scsi_qla_host_t *);
  28. static int qla2x00_fabric_dev_login(scsi_qla_host_t *, fc_port_t *,
  29. uint16_t *);
  30. static int qla2x00_restart_isp(scsi_qla_host_t *);
  31. static int qla2x00_find_new_loop_id(scsi_qla_host_t *, fc_port_t *);
  32. static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *);
  33. static int qla84xx_init_chip(scsi_qla_host_t *);
  34. static int qla25xx_init_queues(struct qla_hw_data *);
  35. /****************************************************************************/
  36. /* QLogic ISP2x00 Hardware Support Functions. */
  37. /****************************************************************************/
  38. /*
  39. * qla2x00_initialize_adapter
  40. * Initialize board.
  41. *
  42. * Input:
  43. * ha = adapter block pointer.
  44. *
  45. * Returns:
  46. * 0 = success
  47. */
  48. int
  49. qla2x00_initialize_adapter(scsi_qla_host_t *vha)
  50. {
  51. int rval;
  52. struct qla_hw_data *ha = vha->hw;
  53. struct req_que *req = ha->req_q_map[0];
  54. /* Clear adapter flags. */
  55. vha->flags.online = 0;
  56. ha->flags.chip_reset_done = 0;
  57. vha->flags.reset_active = 0;
  58. atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
  59. atomic_set(&vha->loop_state, LOOP_DOWN);
  60. vha->device_flags = DFLG_NO_CABLE;
  61. vha->dpc_flags = 0;
  62. vha->flags.management_server_logged_in = 0;
  63. vha->marker_needed = 0;
  64. ha->isp_abort_cnt = 0;
  65. ha->beacon_blink_led = 0;
  66. set_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags);
  67. set_bit(0, ha->req_qid_map);
  68. set_bit(0, ha->rsp_qid_map);
  69. qla_printk(KERN_INFO, ha, "Configuring PCI space...\n");
  70. rval = ha->isp_ops->pci_config(vha);
  71. if (rval) {
  72. DEBUG2(printk("scsi(%ld): Unable to configure PCI space.\n",
  73. vha->host_no));
  74. return (rval);
  75. }
  76. ha->isp_ops->reset_chip(vha);
  77. rval = qla2xxx_get_flash_info(vha);
  78. if (rval) {
  79. DEBUG2(printk("scsi(%ld): Unable to validate FLASH data.\n",
  80. vha->host_no));
  81. return (rval);
  82. }
  83. ha->isp_ops->get_flash_version(vha, req->ring);
  84. qla_printk(KERN_INFO, ha, "Configure NVRAM parameters...\n");
  85. ha->isp_ops->nvram_config(vha);
  86. if (ha->flags.disable_serdes) {
  87. /* Mask HBA via NVRAM settings? */
  88. qla_printk(KERN_INFO, ha, "Masking HBA WWPN "
  89. "%02x%02x%02x%02x%02x%02x%02x%02x (via NVRAM).\n",
  90. vha->port_name[0], vha->port_name[1],
  91. vha->port_name[2], vha->port_name[3],
  92. vha->port_name[4], vha->port_name[5],
  93. vha->port_name[6], vha->port_name[7]);
  94. return QLA_FUNCTION_FAILED;
  95. }
  96. qla_printk(KERN_INFO, ha, "Verifying loaded RISC code...\n");
  97. if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) {
  98. rval = ha->isp_ops->chip_diag(vha);
  99. if (rval)
  100. return (rval);
  101. rval = qla2x00_setup_chip(vha);
  102. if (rval)
  103. return (rval);
  104. }
  105. if (IS_QLA84XX(ha)) {
  106. ha->cs84xx = qla84xx_get_chip(vha);
  107. if (!ha->cs84xx) {
  108. qla_printk(KERN_ERR, ha,
  109. "Unable to configure ISP84XX.\n");
  110. return QLA_FUNCTION_FAILED;
  111. }
  112. }
  113. rval = qla2x00_init_rings(vha);
  114. ha->flags.chip_reset_done = 1;
  115. return (rval);
  116. }
  117. /**
  118. * qla2100_pci_config() - Setup ISP21xx PCI configuration registers.
  119. * @ha: HA context
  120. *
  121. * Returns 0 on success.
  122. */
  123. int
  124. qla2100_pci_config(scsi_qla_host_t *vha)
  125. {
  126. uint16_t w;
  127. unsigned long flags;
  128. struct qla_hw_data *ha = vha->hw;
  129. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  130. pci_set_master(ha->pdev);
  131. pci_try_set_mwi(ha->pdev);
  132. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  133. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  134. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  135. pci_disable_rom(ha->pdev);
  136. /* Get PCI bus information. */
  137. spin_lock_irqsave(&ha->hardware_lock, flags);
  138. ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
  139. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  140. return QLA_SUCCESS;
  141. }
  142. /**
  143. * qla2300_pci_config() - Setup ISP23xx PCI configuration registers.
  144. * @ha: HA context
  145. *
  146. * Returns 0 on success.
  147. */
  148. int
  149. qla2300_pci_config(scsi_qla_host_t *vha)
  150. {
  151. uint16_t w;
  152. unsigned long flags = 0;
  153. uint32_t cnt;
  154. struct qla_hw_data *ha = vha->hw;
  155. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  156. pci_set_master(ha->pdev);
  157. pci_try_set_mwi(ha->pdev);
  158. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  159. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  160. if (IS_QLA2322(ha) || IS_QLA6322(ha))
  161. w &= ~PCI_COMMAND_INTX_DISABLE;
  162. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  163. /*
  164. * If this is a 2300 card and not 2312, reset the
  165. * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately,
  166. * the 2310 also reports itself as a 2300 so we need to get the
  167. * fb revision level -- a 6 indicates it really is a 2300 and
  168. * not a 2310.
  169. */
  170. if (IS_QLA2300(ha)) {
  171. spin_lock_irqsave(&ha->hardware_lock, flags);
  172. /* Pause RISC. */
  173. WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
  174. for (cnt = 0; cnt < 30000; cnt++) {
  175. if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) != 0)
  176. break;
  177. udelay(10);
  178. }
  179. /* Select FPM registers. */
  180. WRT_REG_WORD(&reg->ctrl_status, 0x20);
  181. RD_REG_WORD(&reg->ctrl_status);
  182. /* Get the fb rev level */
  183. ha->fb_rev = RD_FB_CMD_REG(ha, reg);
  184. if (ha->fb_rev == FPM_2300)
  185. pci_clear_mwi(ha->pdev);
  186. /* Deselect FPM registers. */
  187. WRT_REG_WORD(&reg->ctrl_status, 0x0);
  188. RD_REG_WORD(&reg->ctrl_status);
  189. /* Release RISC module. */
  190. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  191. for (cnt = 0; cnt < 30000; cnt++) {
  192. if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) == 0)
  193. break;
  194. udelay(10);
  195. }
  196. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  197. }
  198. pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
  199. pci_disable_rom(ha->pdev);
  200. /* Get PCI bus information. */
  201. spin_lock_irqsave(&ha->hardware_lock, flags);
  202. ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
  203. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  204. return QLA_SUCCESS;
  205. }
  206. /**
  207. * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers.
  208. * @ha: HA context
  209. *
  210. * Returns 0 on success.
  211. */
  212. int
  213. qla24xx_pci_config(scsi_qla_host_t *vha)
  214. {
  215. uint16_t w;
  216. unsigned long flags = 0;
  217. struct qla_hw_data *ha = vha->hw;
  218. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  219. pci_set_master(ha->pdev);
  220. pci_try_set_mwi(ha->pdev);
  221. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  222. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  223. w &= ~PCI_COMMAND_INTX_DISABLE;
  224. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  225. pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
  226. /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */
  227. if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX))
  228. pcix_set_mmrbc(ha->pdev, 2048);
  229. /* PCIe -- adjust Maximum Read Request Size (2048). */
  230. if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP))
  231. pcie_set_readrq(ha->pdev, 2048);
  232. pci_disable_rom(ha->pdev);
  233. ha->chip_revision = ha->pdev->revision;
  234. /* Get PCI bus information. */
  235. spin_lock_irqsave(&ha->hardware_lock, flags);
  236. ha->pci_attr = RD_REG_DWORD(&reg->ctrl_status);
  237. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  238. return QLA_SUCCESS;
  239. }
  240. /**
  241. * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers.
  242. * @ha: HA context
  243. *
  244. * Returns 0 on success.
  245. */
  246. int
  247. qla25xx_pci_config(scsi_qla_host_t *vha)
  248. {
  249. uint16_t w;
  250. struct qla_hw_data *ha = vha->hw;
  251. pci_set_master(ha->pdev);
  252. pci_try_set_mwi(ha->pdev);
  253. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  254. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  255. w &= ~PCI_COMMAND_INTX_DISABLE;
  256. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  257. /* PCIe -- adjust Maximum Read Request Size (2048). */
  258. if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP))
  259. pcie_set_readrq(ha->pdev, 2048);
  260. pci_disable_rom(ha->pdev);
  261. ha->chip_revision = ha->pdev->revision;
  262. return QLA_SUCCESS;
  263. }
  264. /**
  265. * qla2x00_isp_firmware() - Choose firmware image.
  266. * @ha: HA context
  267. *
  268. * Returns 0 on success.
  269. */
  270. static int
  271. qla2x00_isp_firmware(scsi_qla_host_t *vha)
  272. {
  273. int rval;
  274. uint16_t loop_id, topo, sw_cap;
  275. uint8_t domain, area, al_pa;
  276. struct qla_hw_data *ha = vha->hw;
  277. /* Assume loading risc code */
  278. rval = QLA_FUNCTION_FAILED;
  279. if (ha->flags.disable_risc_code_load) {
  280. DEBUG2(printk("scsi(%ld): RISC CODE NOT loaded\n",
  281. vha->host_no));
  282. qla_printk(KERN_INFO, ha, "RISC CODE NOT loaded\n");
  283. /* Verify checksum of loaded RISC code. */
  284. rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address);
  285. if (rval == QLA_SUCCESS) {
  286. /* And, verify we are not in ROM code. */
  287. rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa,
  288. &area, &domain, &topo, &sw_cap);
  289. }
  290. }
  291. if (rval) {
  292. DEBUG2_3(printk("scsi(%ld): **** Load RISC code ****\n",
  293. vha->host_no));
  294. }
  295. return (rval);
  296. }
  297. /**
  298. * qla2x00_reset_chip() - Reset ISP chip.
  299. * @ha: HA context
  300. *
  301. * Returns 0 on success.
  302. */
  303. void
  304. qla2x00_reset_chip(scsi_qla_host_t *vha)
  305. {
  306. unsigned long flags = 0;
  307. struct qla_hw_data *ha = vha->hw;
  308. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  309. uint32_t cnt;
  310. uint16_t cmd;
  311. ha->isp_ops->disable_intrs(ha);
  312. spin_lock_irqsave(&ha->hardware_lock, flags);
  313. /* Turn off master enable */
  314. cmd = 0;
  315. pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd);
  316. cmd &= ~PCI_COMMAND_MASTER;
  317. pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
  318. if (!IS_QLA2100(ha)) {
  319. /* Pause RISC. */
  320. WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
  321. if (IS_QLA2200(ha) || IS_QLA2300(ha)) {
  322. for (cnt = 0; cnt < 30000; cnt++) {
  323. if ((RD_REG_WORD(&reg->hccr) &
  324. HCCR_RISC_PAUSE) != 0)
  325. break;
  326. udelay(100);
  327. }
  328. } else {
  329. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  330. udelay(10);
  331. }
  332. /* Select FPM registers. */
  333. WRT_REG_WORD(&reg->ctrl_status, 0x20);
  334. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  335. /* FPM Soft Reset. */
  336. WRT_REG_WORD(&reg->fpm_diag_config, 0x100);
  337. RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
  338. /* Toggle Fpm Reset. */
  339. if (!IS_QLA2200(ha)) {
  340. WRT_REG_WORD(&reg->fpm_diag_config, 0x0);
  341. RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
  342. }
  343. /* Select frame buffer registers. */
  344. WRT_REG_WORD(&reg->ctrl_status, 0x10);
  345. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  346. /* Reset frame buffer FIFOs. */
  347. if (IS_QLA2200(ha)) {
  348. WRT_FB_CMD_REG(ha, reg, 0xa000);
  349. RD_FB_CMD_REG(ha, reg); /* PCI Posting. */
  350. } else {
  351. WRT_FB_CMD_REG(ha, reg, 0x00fc);
  352. /* Read back fb_cmd until zero or 3 seconds max */
  353. for (cnt = 0; cnt < 3000; cnt++) {
  354. if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0)
  355. break;
  356. udelay(100);
  357. }
  358. }
  359. /* Select RISC module registers. */
  360. WRT_REG_WORD(&reg->ctrl_status, 0);
  361. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  362. /* Reset RISC processor. */
  363. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  364. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  365. /* Release RISC processor. */
  366. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  367. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  368. }
  369. WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
  370. WRT_REG_WORD(&reg->hccr, HCCR_CLR_HOST_INT);
  371. /* Reset ISP chip. */
  372. WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
  373. /* Wait for RISC to recover from reset. */
  374. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  375. /*
  376. * It is necessary to for a delay here since the card doesn't
  377. * respond to PCI reads during a reset. On some architectures
  378. * this will result in an MCA.
  379. */
  380. udelay(20);
  381. for (cnt = 30000; cnt; cnt--) {
  382. if ((RD_REG_WORD(&reg->ctrl_status) &
  383. CSR_ISP_SOFT_RESET) == 0)
  384. break;
  385. udelay(100);
  386. }
  387. } else
  388. udelay(10);
  389. /* Reset RISC processor. */
  390. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  391. WRT_REG_WORD(&reg->semaphore, 0);
  392. /* Release RISC processor. */
  393. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  394. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  395. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  396. for (cnt = 0; cnt < 30000; cnt++) {
  397. if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY)
  398. break;
  399. udelay(100);
  400. }
  401. } else
  402. udelay(100);
  403. /* Turn on master enable */
  404. cmd |= PCI_COMMAND_MASTER;
  405. pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
  406. /* Disable RISC pause on FPM parity error. */
  407. if (!IS_QLA2100(ha)) {
  408. WRT_REG_WORD(&reg->hccr, HCCR_DISABLE_PARITY_PAUSE);
  409. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  410. }
  411. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  412. }
  413. /**
  414. * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC.
  415. * @ha: HA context
  416. *
  417. * Returns 0 on success.
  418. */
  419. static inline void
  420. qla24xx_reset_risc(scsi_qla_host_t *vha)
  421. {
  422. unsigned long flags = 0;
  423. struct qla_hw_data *ha = vha->hw;
  424. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  425. uint32_t cnt, d2;
  426. uint16_t wd;
  427. spin_lock_irqsave(&ha->hardware_lock, flags);
  428. /* Reset RISC. */
  429. WRT_REG_DWORD(&reg->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
  430. for (cnt = 0; cnt < 30000; cnt++) {
  431. if ((RD_REG_DWORD(&reg->ctrl_status) & CSRX_DMA_ACTIVE) == 0)
  432. break;
  433. udelay(10);
  434. }
  435. WRT_REG_DWORD(&reg->ctrl_status,
  436. CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
  437. pci_read_config_word(ha->pdev, PCI_COMMAND, &wd);
  438. udelay(100);
  439. /* Wait for firmware to complete NVRAM accesses. */
  440. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  441. for (cnt = 10000 ; cnt && d2; cnt--) {
  442. udelay(5);
  443. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  444. barrier();
  445. }
  446. /* Wait for soft-reset to complete. */
  447. d2 = RD_REG_DWORD(&reg->ctrl_status);
  448. for (cnt = 6000000 ; cnt && (d2 & CSRX_ISP_SOFT_RESET); cnt--) {
  449. udelay(5);
  450. d2 = RD_REG_DWORD(&reg->ctrl_status);
  451. barrier();
  452. }
  453. WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
  454. RD_REG_DWORD(&reg->hccr);
  455. WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
  456. RD_REG_DWORD(&reg->hccr);
  457. WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_RESET);
  458. RD_REG_DWORD(&reg->hccr);
  459. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  460. for (cnt = 6000000 ; cnt && d2; cnt--) {
  461. udelay(5);
  462. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  463. barrier();
  464. }
  465. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  466. if (IS_NOPOLLING_TYPE(ha))
  467. ha->isp_ops->enable_intrs(ha);
  468. }
  469. /**
  470. * qla24xx_reset_chip() - Reset ISP24xx chip.
  471. * @ha: HA context
  472. *
  473. * Returns 0 on success.
  474. */
  475. void
  476. qla24xx_reset_chip(scsi_qla_host_t *vha)
  477. {
  478. struct qla_hw_data *ha = vha->hw;
  479. ha->isp_ops->disable_intrs(ha);
  480. /* Perform RISC reset. */
  481. qla24xx_reset_risc(vha);
  482. }
  483. /**
  484. * qla2x00_chip_diag() - Test chip for proper operation.
  485. * @ha: HA context
  486. *
  487. * Returns 0 on success.
  488. */
  489. int
  490. qla2x00_chip_diag(scsi_qla_host_t *vha)
  491. {
  492. int rval;
  493. struct qla_hw_data *ha = vha->hw;
  494. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  495. unsigned long flags = 0;
  496. uint16_t data;
  497. uint32_t cnt;
  498. uint16_t mb[5];
  499. struct req_que *req = ha->req_q_map[0];
  500. /* Assume a failed state */
  501. rval = QLA_FUNCTION_FAILED;
  502. DEBUG3(printk("scsi(%ld): Testing device at %lx.\n",
  503. vha->host_no, (u_long)&reg->flash_address));
  504. spin_lock_irqsave(&ha->hardware_lock, flags);
  505. /* Reset ISP chip. */
  506. WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
  507. /*
  508. * We need to have a delay here since the card will not respond while
  509. * in reset causing an MCA on some architectures.
  510. */
  511. udelay(20);
  512. data = qla2x00_debounce_register(&reg->ctrl_status);
  513. for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) {
  514. udelay(5);
  515. data = RD_REG_WORD(&reg->ctrl_status);
  516. barrier();
  517. }
  518. if (!cnt)
  519. goto chip_diag_failed;
  520. DEBUG3(printk("scsi(%ld): Reset register cleared by chip reset\n",
  521. vha->host_no));
  522. /* Reset RISC processor. */
  523. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  524. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  525. /* Workaround for QLA2312 PCI parity error */
  526. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  527. data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0));
  528. for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) {
  529. udelay(5);
  530. data = RD_MAILBOX_REG(ha, reg, 0);
  531. barrier();
  532. }
  533. } else
  534. udelay(10);
  535. if (!cnt)
  536. goto chip_diag_failed;
  537. /* Check product ID of chip */
  538. DEBUG3(printk("scsi(%ld): Checking product ID of chip\n", vha->host_no));
  539. mb[1] = RD_MAILBOX_REG(ha, reg, 1);
  540. mb[2] = RD_MAILBOX_REG(ha, reg, 2);
  541. mb[3] = RD_MAILBOX_REG(ha, reg, 3);
  542. mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4));
  543. if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) ||
  544. mb[3] != PROD_ID_3) {
  545. qla_printk(KERN_WARNING, ha,
  546. "Wrong product ID = 0x%x,0x%x,0x%x\n", mb[1], mb[2], mb[3]);
  547. goto chip_diag_failed;
  548. }
  549. ha->product_id[0] = mb[1];
  550. ha->product_id[1] = mb[2];
  551. ha->product_id[2] = mb[3];
  552. ha->product_id[3] = mb[4];
  553. /* Adjust fw RISC transfer size */
  554. if (req->length > 1024)
  555. ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024;
  556. else
  557. ha->fw_transfer_size = REQUEST_ENTRY_SIZE *
  558. req->length;
  559. if (IS_QLA2200(ha) &&
  560. RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) {
  561. /* Limit firmware transfer size with a 2200A */
  562. DEBUG3(printk("scsi(%ld): Found QLA2200A chip.\n",
  563. vha->host_no));
  564. ha->device_type |= DT_ISP2200A;
  565. ha->fw_transfer_size = 128;
  566. }
  567. /* Wrap Incoming Mailboxes Test. */
  568. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  569. DEBUG3(printk("scsi(%ld): Checking mailboxes.\n", vha->host_no));
  570. rval = qla2x00_mbx_reg_test(vha);
  571. if (rval) {
  572. DEBUG(printk("scsi(%ld): Failed mailbox send register test\n",
  573. vha->host_no));
  574. qla_printk(KERN_WARNING, ha,
  575. "Failed mailbox send register test\n");
  576. }
  577. else {
  578. /* Flag a successful rval */
  579. rval = QLA_SUCCESS;
  580. }
  581. spin_lock_irqsave(&ha->hardware_lock, flags);
  582. chip_diag_failed:
  583. if (rval)
  584. DEBUG2_3(printk("scsi(%ld): Chip diagnostics **** FAILED "
  585. "****\n", vha->host_no));
  586. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  587. return (rval);
  588. }
  589. /**
  590. * qla24xx_chip_diag() - Test ISP24xx for proper operation.
  591. * @ha: HA context
  592. *
  593. * Returns 0 on success.
  594. */
  595. int
  596. qla24xx_chip_diag(scsi_qla_host_t *vha)
  597. {
  598. int rval;
  599. struct qla_hw_data *ha = vha->hw;
  600. struct req_que *req = ha->req_q_map[0];
  601. /* Perform RISC reset. */
  602. qla24xx_reset_risc(vha);
  603. ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length;
  604. rval = qla2x00_mbx_reg_test(vha);
  605. if (rval) {
  606. DEBUG(printk("scsi(%ld): Failed mailbox send register test\n",
  607. vha->host_no));
  608. qla_printk(KERN_WARNING, ha,
  609. "Failed mailbox send register test\n");
  610. } else {
  611. /* Flag a successful rval */
  612. rval = QLA_SUCCESS;
  613. }
  614. return rval;
  615. }
  616. void
  617. qla2x00_alloc_fw_dump(scsi_qla_host_t *vha)
  618. {
  619. int rval;
  620. uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size,
  621. eft_size, fce_size, mq_size;
  622. dma_addr_t tc_dma;
  623. void *tc;
  624. struct qla_hw_data *ha = vha->hw;
  625. struct req_que *req = ha->req_q_map[0];
  626. struct rsp_que *rsp = ha->rsp_q_map[0];
  627. if (ha->fw_dump) {
  628. qla_printk(KERN_WARNING, ha,
  629. "Firmware dump previously allocated.\n");
  630. return;
  631. }
  632. ha->fw_dumped = 0;
  633. fixed_size = mem_size = eft_size = fce_size = mq_size = 0;
  634. if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
  635. fixed_size = sizeof(struct qla2100_fw_dump);
  636. } else if (IS_QLA23XX(ha)) {
  637. fixed_size = offsetof(struct qla2300_fw_dump, data_ram);
  638. mem_size = (ha->fw_memory_size - 0x11000 + 1) *
  639. sizeof(uint16_t);
  640. } else if (IS_FWI2_CAPABLE(ha)) {
  641. if (IS_QLA81XX(ha))
  642. fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem);
  643. else if (IS_QLA25XX(ha))
  644. fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem);
  645. else
  646. fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem);
  647. mem_size = (ha->fw_memory_size - 0x100000 + 1) *
  648. sizeof(uint32_t);
  649. if (ha->mqenable)
  650. mq_size = sizeof(struct qla2xxx_mq_chain);
  651. /* Allocate memory for Fibre Channel Event Buffer. */
  652. if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha))
  653. goto try_eft;
  654. tc = dma_alloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma,
  655. GFP_KERNEL);
  656. if (!tc) {
  657. qla_printk(KERN_WARNING, ha, "Unable to allocate "
  658. "(%d KB) for FCE.\n", FCE_SIZE / 1024);
  659. goto try_eft;
  660. }
  661. memset(tc, 0, FCE_SIZE);
  662. rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS,
  663. ha->fce_mb, &ha->fce_bufs);
  664. if (rval) {
  665. qla_printk(KERN_WARNING, ha, "Unable to initialize "
  666. "FCE (%d).\n", rval);
  667. dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc,
  668. tc_dma);
  669. ha->flags.fce_enabled = 0;
  670. goto try_eft;
  671. }
  672. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for FCE...\n",
  673. FCE_SIZE / 1024);
  674. fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE;
  675. ha->flags.fce_enabled = 1;
  676. ha->fce_dma = tc_dma;
  677. ha->fce = tc;
  678. try_eft:
  679. /* Allocate memory for Extended Trace Buffer. */
  680. tc = dma_alloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma,
  681. GFP_KERNEL);
  682. if (!tc) {
  683. qla_printk(KERN_WARNING, ha, "Unable to allocate "
  684. "(%d KB) for EFT.\n", EFT_SIZE / 1024);
  685. goto cont_alloc;
  686. }
  687. memset(tc, 0, EFT_SIZE);
  688. rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS);
  689. if (rval) {
  690. qla_printk(KERN_WARNING, ha, "Unable to initialize "
  691. "EFT (%d).\n", rval);
  692. dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc,
  693. tc_dma);
  694. goto cont_alloc;
  695. }
  696. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for EFT...\n",
  697. EFT_SIZE / 1024);
  698. eft_size = EFT_SIZE;
  699. ha->eft_dma = tc_dma;
  700. ha->eft = tc;
  701. }
  702. cont_alloc:
  703. req_q_size = req->length * sizeof(request_t);
  704. rsp_q_size = rsp->length * sizeof(response_t);
  705. dump_size = offsetof(struct qla2xxx_fw_dump, isp);
  706. dump_size += fixed_size + mem_size + req_q_size + rsp_q_size + eft_size;
  707. ha->chain_offset = dump_size;
  708. dump_size += mq_size + fce_size;
  709. ha->fw_dump = vmalloc(dump_size);
  710. if (!ha->fw_dump) {
  711. qla_printk(KERN_WARNING, ha, "Unable to allocate (%d KB) for "
  712. "firmware dump!!!\n", dump_size / 1024);
  713. if (ha->eft) {
  714. dma_free_coherent(&ha->pdev->dev, eft_size, ha->eft,
  715. ha->eft_dma);
  716. ha->eft = NULL;
  717. ha->eft_dma = 0;
  718. }
  719. return;
  720. }
  721. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for firmware dump...\n",
  722. dump_size / 1024);
  723. ha->fw_dump_len = dump_size;
  724. ha->fw_dump->signature[0] = 'Q';
  725. ha->fw_dump->signature[1] = 'L';
  726. ha->fw_dump->signature[2] = 'G';
  727. ha->fw_dump->signature[3] = 'C';
  728. ha->fw_dump->version = __constant_htonl(1);
  729. ha->fw_dump->fixed_size = htonl(fixed_size);
  730. ha->fw_dump->mem_size = htonl(mem_size);
  731. ha->fw_dump->req_q_size = htonl(req_q_size);
  732. ha->fw_dump->rsp_q_size = htonl(rsp_q_size);
  733. ha->fw_dump->eft_size = htonl(eft_size);
  734. ha->fw_dump->eft_addr_l = htonl(LSD(ha->eft_dma));
  735. ha->fw_dump->eft_addr_h = htonl(MSD(ha->eft_dma));
  736. ha->fw_dump->header_size =
  737. htonl(offsetof(struct qla2xxx_fw_dump, isp));
  738. }
  739. /**
  740. * qla2x00_setup_chip() - Load and start RISC firmware.
  741. * @ha: HA context
  742. *
  743. * Returns 0 on success.
  744. */
  745. static int
  746. qla2x00_setup_chip(scsi_qla_host_t *vha)
  747. {
  748. int rval;
  749. uint32_t srisc_address = 0;
  750. struct qla_hw_data *ha = vha->hw;
  751. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  752. unsigned long flags;
  753. uint16_t fw_major_version;
  754. if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
  755. /* Disable SRAM, Instruction RAM and GP RAM parity. */
  756. spin_lock_irqsave(&ha->hardware_lock, flags);
  757. WRT_REG_WORD(&reg->hccr, (HCCR_ENABLE_PARITY + 0x0));
  758. RD_REG_WORD(&reg->hccr);
  759. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  760. }
  761. /* Load firmware sequences */
  762. rval = ha->isp_ops->load_risc(vha, &srisc_address);
  763. if (rval == QLA_SUCCESS) {
  764. DEBUG(printk("scsi(%ld): Verifying Checksum of loaded RISC "
  765. "code.\n", vha->host_no));
  766. rval = qla2x00_verify_checksum(vha, srisc_address);
  767. if (rval == QLA_SUCCESS) {
  768. /* Start firmware execution. */
  769. DEBUG(printk("scsi(%ld): Checksum OK, start "
  770. "firmware.\n", vha->host_no));
  771. rval = qla2x00_execute_fw(vha, srisc_address);
  772. /* Retrieve firmware information. */
  773. if (rval == QLA_SUCCESS) {
  774. fw_major_version = ha->fw_major_version;
  775. rval = qla2x00_get_fw_version(vha,
  776. &ha->fw_major_version,
  777. &ha->fw_minor_version,
  778. &ha->fw_subminor_version,
  779. &ha->fw_attributes, &ha->fw_memory_size,
  780. ha->mpi_version, &ha->mpi_capabilities,
  781. ha->phy_version);
  782. if (rval != QLA_SUCCESS)
  783. goto failed;
  784. ha->flags.npiv_supported = 0;
  785. if (IS_QLA2XXX_MIDTYPE(ha) &&
  786. (ha->fw_attributes & BIT_2)) {
  787. ha->flags.npiv_supported = 1;
  788. if ((!ha->max_npiv_vports) ||
  789. ((ha->max_npiv_vports + 1) %
  790. MIN_MULTI_ID_FABRIC))
  791. ha->max_npiv_vports =
  792. MIN_MULTI_ID_FABRIC - 1;
  793. }
  794. qla2x00_get_resource_cnts(vha, NULL,
  795. &ha->fw_xcb_count, NULL, NULL,
  796. &ha->max_npiv_vports);
  797. if (!fw_major_version && ql2xallocfwdump)
  798. qla2x00_alloc_fw_dump(vha);
  799. }
  800. } else {
  801. DEBUG2(printk(KERN_INFO
  802. "scsi(%ld): ISP Firmware failed checksum.\n",
  803. vha->host_no));
  804. }
  805. }
  806. if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
  807. /* Enable proper parity. */
  808. spin_lock_irqsave(&ha->hardware_lock, flags);
  809. if (IS_QLA2300(ha))
  810. /* SRAM parity */
  811. WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x1);
  812. else
  813. /* SRAM, Instruction RAM and GP RAM parity */
  814. WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x7);
  815. RD_REG_WORD(&reg->hccr);
  816. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  817. }
  818. if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) {
  819. uint32_t size;
  820. rval = qla81xx_fac_get_sector_size(vha, &size);
  821. if (rval == QLA_SUCCESS) {
  822. ha->flags.fac_supported = 1;
  823. ha->fdt_block_size = size << 2;
  824. } else {
  825. qla_printk(KERN_ERR, ha,
  826. "Unsupported FAC firmware (%d.%02d.%02d).\n",
  827. ha->fw_major_version, ha->fw_minor_version,
  828. ha->fw_subminor_version);
  829. }
  830. }
  831. failed:
  832. if (rval) {
  833. DEBUG2_3(printk("scsi(%ld): Setup chip **** FAILED ****.\n",
  834. vha->host_no));
  835. }
  836. return (rval);
  837. }
  838. /**
  839. * qla2x00_init_response_q_entries() - Initializes response queue entries.
  840. * @ha: HA context
  841. *
  842. * Beginning of request ring has initialization control block already built
  843. * by nvram config routine.
  844. *
  845. * Returns 0 on success.
  846. */
  847. void
  848. qla2x00_init_response_q_entries(struct rsp_que *rsp)
  849. {
  850. uint16_t cnt;
  851. response_t *pkt;
  852. rsp->ring_ptr = rsp->ring;
  853. rsp->ring_index = 0;
  854. rsp->status_srb = NULL;
  855. pkt = rsp->ring_ptr;
  856. for (cnt = 0; cnt < rsp->length; cnt++) {
  857. pkt->signature = RESPONSE_PROCESSED;
  858. pkt++;
  859. }
  860. }
  861. /**
  862. * qla2x00_update_fw_options() - Read and process firmware options.
  863. * @ha: HA context
  864. *
  865. * Returns 0 on success.
  866. */
  867. void
  868. qla2x00_update_fw_options(scsi_qla_host_t *vha)
  869. {
  870. uint16_t swing, emphasis, tx_sens, rx_sens;
  871. struct qla_hw_data *ha = vha->hw;
  872. memset(ha->fw_options, 0, sizeof(ha->fw_options));
  873. qla2x00_get_fw_options(vha, ha->fw_options);
  874. if (IS_QLA2100(ha) || IS_QLA2200(ha))
  875. return;
  876. /* Serial Link options. */
  877. DEBUG3(printk("scsi(%ld): Serial link options:\n",
  878. vha->host_no));
  879. DEBUG3(qla2x00_dump_buffer((uint8_t *)&ha->fw_seriallink_options,
  880. sizeof(ha->fw_seriallink_options)));
  881. ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING;
  882. if (ha->fw_seriallink_options[3] & BIT_2) {
  883. ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING;
  884. /* 1G settings */
  885. swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0);
  886. emphasis = (ha->fw_seriallink_options[2] &
  887. (BIT_4 | BIT_3)) >> 3;
  888. tx_sens = ha->fw_seriallink_options[0] &
  889. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  890. rx_sens = (ha->fw_seriallink_options[0] &
  891. (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
  892. ha->fw_options[10] = (emphasis << 14) | (swing << 8);
  893. if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
  894. if (rx_sens == 0x0)
  895. rx_sens = 0x3;
  896. ha->fw_options[10] |= (tx_sens << 4) | rx_sens;
  897. } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
  898. ha->fw_options[10] |= BIT_5 |
  899. ((rx_sens & (BIT_1 | BIT_0)) << 2) |
  900. (tx_sens & (BIT_1 | BIT_0));
  901. /* 2G settings */
  902. swing = (ha->fw_seriallink_options[2] &
  903. (BIT_7 | BIT_6 | BIT_5)) >> 5;
  904. emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0);
  905. tx_sens = ha->fw_seriallink_options[1] &
  906. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  907. rx_sens = (ha->fw_seriallink_options[1] &
  908. (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
  909. ha->fw_options[11] = (emphasis << 14) | (swing << 8);
  910. if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
  911. if (rx_sens == 0x0)
  912. rx_sens = 0x3;
  913. ha->fw_options[11] |= (tx_sens << 4) | rx_sens;
  914. } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
  915. ha->fw_options[11] |= BIT_5 |
  916. ((rx_sens & (BIT_1 | BIT_0)) << 2) |
  917. (tx_sens & (BIT_1 | BIT_0));
  918. }
  919. /* FCP2 options. */
  920. /* Return command IOCBs without waiting for an ABTS to complete. */
  921. ha->fw_options[3] |= BIT_13;
  922. /* LED scheme. */
  923. if (ha->flags.enable_led_scheme)
  924. ha->fw_options[2] |= BIT_12;
  925. /* Detect ISP6312. */
  926. if (IS_QLA6312(ha))
  927. ha->fw_options[2] |= BIT_13;
  928. /* Update firmware options. */
  929. qla2x00_set_fw_options(vha, ha->fw_options);
  930. }
  931. void
  932. qla24xx_update_fw_options(scsi_qla_host_t *vha)
  933. {
  934. int rval;
  935. struct qla_hw_data *ha = vha->hw;
  936. /* Update Serial Link options. */
  937. if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0)
  938. return;
  939. rval = qla2x00_set_serdes_params(vha,
  940. le16_to_cpu(ha->fw_seriallink_options24[1]),
  941. le16_to_cpu(ha->fw_seriallink_options24[2]),
  942. le16_to_cpu(ha->fw_seriallink_options24[3]));
  943. if (rval != QLA_SUCCESS) {
  944. qla_printk(KERN_WARNING, ha,
  945. "Unable to update Serial Link options (%x).\n", rval);
  946. }
  947. }
  948. void
  949. qla2x00_config_rings(struct scsi_qla_host *vha)
  950. {
  951. struct qla_hw_data *ha = vha->hw;
  952. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  953. struct req_que *req = ha->req_q_map[0];
  954. struct rsp_que *rsp = ha->rsp_q_map[0];
  955. /* Setup ring parameters in initialization control block. */
  956. ha->init_cb->request_q_outpointer = __constant_cpu_to_le16(0);
  957. ha->init_cb->response_q_inpointer = __constant_cpu_to_le16(0);
  958. ha->init_cb->request_q_length = cpu_to_le16(req->length);
  959. ha->init_cb->response_q_length = cpu_to_le16(rsp->length);
  960. ha->init_cb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
  961. ha->init_cb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
  962. ha->init_cb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
  963. ha->init_cb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
  964. WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0);
  965. WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0);
  966. WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0);
  967. WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0);
  968. RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */
  969. }
  970. void
  971. qla24xx_config_rings(struct scsi_qla_host *vha)
  972. {
  973. struct qla_hw_data *ha = vha->hw;
  974. device_reg_t __iomem *reg = ISP_QUE_REG(ha, 0);
  975. struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp;
  976. struct qla_msix_entry *msix;
  977. struct init_cb_24xx *icb;
  978. uint16_t rid = 0;
  979. struct req_que *req = ha->req_q_map[0];
  980. struct rsp_que *rsp = ha->rsp_q_map[0];
  981. /* Setup ring parameters in initialization control block. */
  982. icb = (struct init_cb_24xx *)ha->init_cb;
  983. icb->request_q_outpointer = __constant_cpu_to_le16(0);
  984. icb->response_q_inpointer = __constant_cpu_to_le16(0);
  985. icb->request_q_length = cpu_to_le16(req->length);
  986. icb->response_q_length = cpu_to_le16(rsp->length);
  987. icb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
  988. icb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
  989. icb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
  990. icb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
  991. if (ha->mqenable) {
  992. icb->qos = __constant_cpu_to_le16(QLA_DEFAULT_QUE_QOS);
  993. icb->rid = __constant_cpu_to_le16(rid);
  994. if (ha->flags.msix_enabled) {
  995. msix = &ha->msix_entries[1];
  996. DEBUG2_17(printk(KERN_INFO
  997. "Registering vector 0x%x for base que\n", msix->entry));
  998. icb->msix = cpu_to_le16(msix->entry);
  999. }
  1000. /* Use alternate PCI bus number */
  1001. if (MSB(rid))
  1002. icb->firmware_options_2 |=
  1003. __constant_cpu_to_le32(BIT_19);
  1004. /* Use alternate PCI devfn */
  1005. if (LSB(rid))
  1006. icb->firmware_options_2 |=
  1007. __constant_cpu_to_le32(BIT_18);
  1008. icb->firmware_options_2 &= __constant_cpu_to_le32(~BIT_22);
  1009. icb->firmware_options_2 |= __constant_cpu_to_le32(BIT_23);
  1010. WRT_REG_DWORD(&reg->isp25mq.req_q_in, 0);
  1011. WRT_REG_DWORD(&reg->isp25mq.req_q_out, 0);
  1012. WRT_REG_DWORD(&reg->isp25mq.rsp_q_in, 0);
  1013. WRT_REG_DWORD(&reg->isp25mq.rsp_q_out, 0);
  1014. } else {
  1015. WRT_REG_DWORD(&reg->isp24.req_q_in, 0);
  1016. WRT_REG_DWORD(&reg->isp24.req_q_out, 0);
  1017. WRT_REG_DWORD(&reg->isp24.rsp_q_in, 0);
  1018. WRT_REG_DWORD(&reg->isp24.rsp_q_out, 0);
  1019. }
  1020. /* PCI posting */
  1021. RD_REG_DWORD(&ioreg->hccr);
  1022. }
  1023. /**
  1024. * qla2x00_init_rings() - Initializes firmware.
  1025. * @ha: HA context
  1026. *
  1027. * Beginning of request ring has initialization control block already built
  1028. * by nvram config routine.
  1029. *
  1030. * Returns 0 on success.
  1031. */
  1032. static int
  1033. qla2x00_init_rings(scsi_qla_host_t *vha)
  1034. {
  1035. int rval;
  1036. unsigned long flags = 0;
  1037. int cnt, que;
  1038. struct qla_hw_data *ha = vha->hw;
  1039. struct req_que *req;
  1040. struct rsp_que *rsp;
  1041. struct scsi_qla_host *vp;
  1042. struct mid_init_cb_24xx *mid_init_cb =
  1043. (struct mid_init_cb_24xx *) ha->init_cb;
  1044. spin_lock_irqsave(&ha->hardware_lock, flags);
  1045. /* Clear outstanding commands array. */
  1046. for (que = 0; que < ha->max_req_queues; que++) {
  1047. req = ha->req_q_map[que];
  1048. if (!req)
  1049. continue;
  1050. for (cnt = 1; cnt < MAX_OUTSTANDING_COMMANDS; cnt++)
  1051. req->outstanding_cmds[cnt] = NULL;
  1052. req->current_outstanding_cmd = 1;
  1053. /* Initialize firmware. */
  1054. req->ring_ptr = req->ring;
  1055. req->ring_index = 0;
  1056. req->cnt = req->length;
  1057. }
  1058. for (que = 0; que < ha->max_rsp_queues; que++) {
  1059. rsp = ha->rsp_q_map[que];
  1060. if (!rsp)
  1061. continue;
  1062. /* Initialize response queue entries */
  1063. qla2x00_init_response_q_entries(rsp);
  1064. }
  1065. /* Clear RSCN queue. */
  1066. list_for_each_entry(vp, &ha->vp_list, list) {
  1067. vp->rscn_in_ptr = 0;
  1068. vp->rscn_out_ptr = 0;
  1069. }
  1070. ha->isp_ops->config_rings(vha);
  1071. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1072. /* Update any ISP specific firmware options before initialization. */
  1073. ha->isp_ops->update_fw_options(vha);
  1074. DEBUG(printk("scsi(%ld): Issue init firmware.\n", vha->host_no));
  1075. if (ha->flags.npiv_supported) {
  1076. if (ha->operating_mode == LOOP)
  1077. ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1;
  1078. mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports);
  1079. }
  1080. if (IS_FWI2_CAPABLE(ha)) {
  1081. mid_init_cb->options = __constant_cpu_to_le16(BIT_1);
  1082. mid_init_cb->init_cb.execution_throttle =
  1083. cpu_to_le16(ha->fw_xcb_count);
  1084. }
  1085. rval = qla2x00_init_firmware(vha, ha->init_cb_size);
  1086. if (rval) {
  1087. DEBUG2_3(printk("scsi(%ld): Init firmware **** FAILED ****.\n",
  1088. vha->host_no));
  1089. } else {
  1090. DEBUG3(printk("scsi(%ld): Init firmware -- success.\n",
  1091. vha->host_no));
  1092. }
  1093. return (rval);
  1094. }
  1095. /**
  1096. * qla2x00_fw_ready() - Waits for firmware ready.
  1097. * @ha: HA context
  1098. *
  1099. * Returns 0 on success.
  1100. */
  1101. static int
  1102. qla2x00_fw_ready(scsi_qla_host_t *vha)
  1103. {
  1104. int rval;
  1105. unsigned long wtime, mtime, cs84xx_time;
  1106. uint16_t min_wait; /* Minimum wait time if loop is down */
  1107. uint16_t wait_time; /* Wait time if loop is coming ready */
  1108. uint16_t state[3];
  1109. struct qla_hw_data *ha = vha->hw;
  1110. rval = QLA_SUCCESS;
  1111. /* 20 seconds for loop down. */
  1112. min_wait = 20;
  1113. /*
  1114. * Firmware should take at most one RATOV to login, plus 5 seconds for
  1115. * our own processing.
  1116. */
  1117. if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) {
  1118. wait_time = min_wait;
  1119. }
  1120. /* Min wait time if loop down */
  1121. mtime = jiffies + (min_wait * HZ);
  1122. /* wait time before firmware ready */
  1123. wtime = jiffies + (wait_time * HZ);
  1124. /* Wait for ISP to finish LIP */
  1125. if (!vha->flags.init_done)
  1126. qla_printk(KERN_INFO, ha, "Waiting for LIP to complete...\n");
  1127. DEBUG3(printk("scsi(%ld): Waiting for LIP to complete...\n",
  1128. vha->host_no));
  1129. do {
  1130. rval = qla2x00_get_firmware_state(vha, state);
  1131. if (rval == QLA_SUCCESS) {
  1132. if (state[0] < FSTATE_LOSS_OF_SYNC) {
  1133. vha->device_flags &= ~DFLG_NO_CABLE;
  1134. }
  1135. if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) {
  1136. DEBUG16(printk("scsi(%ld): fw_state=%x "
  1137. "84xx=%x.\n", vha->host_no, state[0],
  1138. state[2]));
  1139. if ((state[2] & FSTATE_LOGGED_IN) &&
  1140. (state[2] & FSTATE_WAITING_FOR_VERIFY)) {
  1141. DEBUG16(printk("scsi(%ld): Sending "
  1142. "verify iocb.\n", vha->host_no));
  1143. cs84xx_time = jiffies;
  1144. rval = qla84xx_init_chip(vha);
  1145. if (rval != QLA_SUCCESS)
  1146. break;
  1147. /* Add time taken to initialize. */
  1148. cs84xx_time = jiffies - cs84xx_time;
  1149. wtime += cs84xx_time;
  1150. mtime += cs84xx_time;
  1151. DEBUG16(printk("scsi(%ld): Increasing "
  1152. "wait time by %ld. New time %ld\n",
  1153. vha->host_no, cs84xx_time, wtime));
  1154. }
  1155. } else if (state[0] == FSTATE_READY) {
  1156. DEBUG(printk("scsi(%ld): F/W Ready - OK \n",
  1157. vha->host_no));
  1158. qla2x00_get_retry_cnt(vha, &ha->retry_count,
  1159. &ha->login_timeout, &ha->r_a_tov);
  1160. rval = QLA_SUCCESS;
  1161. break;
  1162. }
  1163. rval = QLA_FUNCTION_FAILED;
  1164. if (atomic_read(&vha->loop_down_timer) &&
  1165. state[0] != FSTATE_READY) {
  1166. /* Loop down. Timeout on min_wait for states
  1167. * other than Wait for Login.
  1168. */
  1169. if (time_after_eq(jiffies, mtime)) {
  1170. qla_printk(KERN_INFO, ha,
  1171. "Cable is unplugged...\n");
  1172. vha->device_flags |= DFLG_NO_CABLE;
  1173. break;
  1174. }
  1175. }
  1176. } else {
  1177. /* Mailbox cmd failed. Timeout on min_wait. */
  1178. if (time_after_eq(jiffies, mtime))
  1179. break;
  1180. }
  1181. if (time_after_eq(jiffies, wtime))
  1182. break;
  1183. /* Delay for a while */
  1184. msleep(500);
  1185. DEBUG3(printk("scsi(%ld): fw_state=%x curr time=%lx.\n",
  1186. vha->host_no, state[0], jiffies));
  1187. } while (1);
  1188. DEBUG(printk("scsi(%ld): fw_state=%x curr time=%lx.\n",
  1189. vha->host_no, state[0], jiffies));
  1190. if (rval) {
  1191. DEBUG2_3(printk("scsi(%ld): Firmware ready **** FAILED ****.\n",
  1192. vha->host_no));
  1193. }
  1194. return (rval);
  1195. }
  1196. /*
  1197. * qla2x00_configure_hba
  1198. * Setup adapter context.
  1199. *
  1200. * Input:
  1201. * ha = adapter state pointer.
  1202. *
  1203. * Returns:
  1204. * 0 = success
  1205. *
  1206. * Context:
  1207. * Kernel context.
  1208. */
  1209. static int
  1210. qla2x00_configure_hba(scsi_qla_host_t *vha)
  1211. {
  1212. int rval;
  1213. uint16_t loop_id;
  1214. uint16_t topo;
  1215. uint16_t sw_cap;
  1216. uint8_t al_pa;
  1217. uint8_t area;
  1218. uint8_t domain;
  1219. char connect_type[22];
  1220. struct qla_hw_data *ha = vha->hw;
  1221. /* Get host addresses. */
  1222. rval = qla2x00_get_adapter_id(vha,
  1223. &loop_id, &al_pa, &area, &domain, &topo, &sw_cap);
  1224. if (rval != QLA_SUCCESS) {
  1225. if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) ||
  1226. (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) {
  1227. DEBUG2(printk("%s(%ld) Loop is in a transition state\n",
  1228. __func__, vha->host_no));
  1229. } else {
  1230. qla_printk(KERN_WARNING, ha,
  1231. "ERROR -- Unable to get host loop ID.\n");
  1232. set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  1233. }
  1234. return (rval);
  1235. }
  1236. if (topo == 4) {
  1237. qla_printk(KERN_INFO, ha,
  1238. "Cannot get topology - retrying.\n");
  1239. return (QLA_FUNCTION_FAILED);
  1240. }
  1241. vha->loop_id = loop_id;
  1242. /* initialize */
  1243. ha->min_external_loopid = SNS_FIRST_LOOP_ID;
  1244. ha->operating_mode = LOOP;
  1245. ha->switch_cap = 0;
  1246. switch (topo) {
  1247. case 0:
  1248. DEBUG3(printk("scsi(%ld): HBA in NL topology.\n",
  1249. vha->host_no));
  1250. ha->current_topology = ISP_CFG_NL;
  1251. strcpy(connect_type, "(Loop)");
  1252. break;
  1253. case 1:
  1254. DEBUG3(printk("scsi(%ld): HBA in FL topology.\n",
  1255. vha->host_no));
  1256. ha->switch_cap = sw_cap;
  1257. ha->current_topology = ISP_CFG_FL;
  1258. strcpy(connect_type, "(FL_Port)");
  1259. break;
  1260. case 2:
  1261. DEBUG3(printk("scsi(%ld): HBA in N P2P topology.\n",
  1262. vha->host_no));
  1263. ha->operating_mode = P2P;
  1264. ha->current_topology = ISP_CFG_N;
  1265. strcpy(connect_type, "(N_Port-to-N_Port)");
  1266. break;
  1267. case 3:
  1268. DEBUG3(printk("scsi(%ld): HBA in F P2P topology.\n",
  1269. vha->host_no));
  1270. ha->switch_cap = sw_cap;
  1271. ha->operating_mode = P2P;
  1272. ha->current_topology = ISP_CFG_F;
  1273. strcpy(connect_type, "(F_Port)");
  1274. break;
  1275. default:
  1276. DEBUG3(printk("scsi(%ld): HBA in unknown topology %x. "
  1277. "Using NL.\n",
  1278. vha->host_no, topo));
  1279. ha->current_topology = ISP_CFG_NL;
  1280. strcpy(connect_type, "(Loop)");
  1281. break;
  1282. }
  1283. /* Save Host port and loop ID. */
  1284. /* byte order - Big Endian */
  1285. vha->d_id.b.domain = domain;
  1286. vha->d_id.b.area = area;
  1287. vha->d_id.b.al_pa = al_pa;
  1288. if (!vha->flags.init_done)
  1289. qla_printk(KERN_INFO, ha,
  1290. "Topology - %s, Host Loop address 0x%x\n",
  1291. connect_type, vha->loop_id);
  1292. if (rval) {
  1293. DEBUG2_3(printk("scsi(%ld): FAILED.\n", vha->host_no));
  1294. } else {
  1295. DEBUG3(printk("scsi(%ld): exiting normally.\n", vha->host_no));
  1296. }
  1297. return(rval);
  1298. }
  1299. static inline void
  1300. qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len,
  1301. char *def)
  1302. {
  1303. char *st, *en;
  1304. uint16_t index;
  1305. struct qla_hw_data *ha = vha->hw;
  1306. int use_tbl = !IS_QLA25XX(ha) && !IS_QLA81XX(ha);
  1307. if (memcmp(model, BINZERO, len) != 0) {
  1308. strncpy(ha->model_number, model, len);
  1309. st = en = ha->model_number;
  1310. en += len - 1;
  1311. while (en > st) {
  1312. if (*en != 0x20 && *en != 0x00)
  1313. break;
  1314. *en-- = '\0';
  1315. }
  1316. index = (ha->pdev->subsystem_device & 0xff);
  1317. if (use_tbl &&
  1318. ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
  1319. index < QLA_MODEL_NAMES)
  1320. strncpy(ha->model_desc,
  1321. qla2x00_model_name[index * 2 + 1],
  1322. sizeof(ha->model_desc) - 1);
  1323. } else {
  1324. index = (ha->pdev->subsystem_device & 0xff);
  1325. if (use_tbl &&
  1326. ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
  1327. index < QLA_MODEL_NAMES) {
  1328. strcpy(ha->model_number,
  1329. qla2x00_model_name[index * 2]);
  1330. strncpy(ha->model_desc,
  1331. qla2x00_model_name[index * 2 + 1],
  1332. sizeof(ha->model_desc) - 1);
  1333. } else {
  1334. strcpy(ha->model_number, def);
  1335. }
  1336. }
  1337. if (IS_FWI2_CAPABLE(ha))
  1338. qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc,
  1339. sizeof(ha->model_desc));
  1340. }
  1341. /* On sparc systems, obtain port and node WWN from firmware
  1342. * properties.
  1343. */
  1344. static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv)
  1345. {
  1346. #ifdef CONFIG_SPARC
  1347. struct qla_hw_data *ha = vha->hw;
  1348. struct pci_dev *pdev = ha->pdev;
  1349. struct device_node *dp = pci_device_to_OF_node(pdev);
  1350. const u8 *val;
  1351. int len;
  1352. val = of_get_property(dp, "port-wwn", &len);
  1353. if (val && len >= WWN_SIZE)
  1354. memcpy(nv->port_name, val, WWN_SIZE);
  1355. val = of_get_property(dp, "node-wwn", &len);
  1356. if (val && len >= WWN_SIZE)
  1357. memcpy(nv->node_name, val, WWN_SIZE);
  1358. #endif
  1359. }
  1360. /*
  1361. * NVRAM configuration for ISP 2xxx
  1362. *
  1363. * Input:
  1364. * ha = adapter block pointer.
  1365. *
  1366. * Output:
  1367. * initialization control block in response_ring
  1368. * host adapters parameters in host adapter block
  1369. *
  1370. * Returns:
  1371. * 0 = success.
  1372. */
  1373. int
  1374. qla2x00_nvram_config(scsi_qla_host_t *vha)
  1375. {
  1376. int rval;
  1377. uint8_t chksum = 0;
  1378. uint16_t cnt;
  1379. uint8_t *dptr1, *dptr2;
  1380. struct qla_hw_data *ha = vha->hw;
  1381. init_cb_t *icb = ha->init_cb;
  1382. nvram_t *nv = ha->nvram;
  1383. uint8_t *ptr = ha->nvram;
  1384. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  1385. rval = QLA_SUCCESS;
  1386. /* Determine NVRAM starting address. */
  1387. ha->nvram_size = sizeof(nvram_t);
  1388. ha->nvram_base = 0;
  1389. if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha))
  1390. if ((RD_REG_WORD(&reg->ctrl_status) >> 14) == 1)
  1391. ha->nvram_base = 0x80;
  1392. /* Get NVRAM data and calculate checksum. */
  1393. ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size);
  1394. for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++)
  1395. chksum += *ptr++;
  1396. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", vha->host_no));
  1397. DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size));
  1398. /* Bad NVRAM data, set defaults parameters. */
  1399. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' ||
  1400. nv->id[2] != 'P' || nv->id[3] != ' ' || nv->nvram_version < 1) {
  1401. /* Reset NVRAM data. */
  1402. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  1403. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  1404. nv->nvram_version);
  1405. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  1406. "invalid -- WWPN) defaults.\n");
  1407. /*
  1408. * Set default initialization control block.
  1409. */
  1410. memset(nv, 0, ha->nvram_size);
  1411. nv->parameter_block_version = ICB_VERSION;
  1412. if (IS_QLA23XX(ha)) {
  1413. nv->firmware_options[0] = BIT_2 | BIT_1;
  1414. nv->firmware_options[1] = BIT_7 | BIT_5;
  1415. nv->add_firmware_options[0] = BIT_5;
  1416. nv->add_firmware_options[1] = BIT_5 | BIT_4;
  1417. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  1418. nv->special_options[1] = BIT_7;
  1419. } else if (IS_QLA2200(ha)) {
  1420. nv->firmware_options[0] = BIT_2 | BIT_1;
  1421. nv->firmware_options[1] = BIT_7 | BIT_5;
  1422. nv->add_firmware_options[0] = BIT_5;
  1423. nv->add_firmware_options[1] = BIT_5 | BIT_4;
  1424. nv->frame_payload_size = __constant_cpu_to_le16(1024);
  1425. } else if (IS_QLA2100(ha)) {
  1426. nv->firmware_options[0] = BIT_3 | BIT_1;
  1427. nv->firmware_options[1] = BIT_5;
  1428. nv->frame_payload_size = __constant_cpu_to_le16(1024);
  1429. }
  1430. nv->max_iocb_allocation = __constant_cpu_to_le16(256);
  1431. nv->execution_throttle = __constant_cpu_to_le16(16);
  1432. nv->retry_count = 8;
  1433. nv->retry_delay = 1;
  1434. nv->port_name[0] = 33;
  1435. nv->port_name[3] = 224;
  1436. nv->port_name[4] = 139;
  1437. qla2xxx_nvram_wwn_from_ofw(vha, nv);
  1438. nv->login_timeout = 4;
  1439. /*
  1440. * Set default host adapter parameters
  1441. */
  1442. nv->host_p[1] = BIT_2;
  1443. nv->reset_delay = 5;
  1444. nv->port_down_retry_count = 8;
  1445. nv->max_luns_per_target = __constant_cpu_to_le16(8);
  1446. nv->link_down_timeout = 60;
  1447. rval = 1;
  1448. }
  1449. #if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2)
  1450. /*
  1451. * The SN2 does not provide BIOS emulation which means you can't change
  1452. * potentially bogus BIOS settings. Force the use of default settings
  1453. * for link rate and frame size. Hope that the rest of the settings
  1454. * are valid.
  1455. */
  1456. if (ia64_platform_is("sn2")) {
  1457. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  1458. if (IS_QLA23XX(ha))
  1459. nv->special_options[1] = BIT_7;
  1460. }
  1461. #endif
  1462. /* Reset Initialization control block */
  1463. memset(icb, 0, ha->init_cb_size);
  1464. /*
  1465. * Setup driver NVRAM options.
  1466. */
  1467. nv->firmware_options[0] |= (BIT_6 | BIT_1);
  1468. nv->firmware_options[0] &= ~(BIT_5 | BIT_4);
  1469. nv->firmware_options[1] |= (BIT_5 | BIT_0);
  1470. nv->firmware_options[1] &= ~BIT_4;
  1471. if (IS_QLA23XX(ha)) {
  1472. nv->firmware_options[0] |= BIT_2;
  1473. nv->firmware_options[0] &= ~BIT_3;
  1474. nv->add_firmware_options[1] |= BIT_5 | BIT_4;
  1475. if (IS_QLA2300(ha)) {
  1476. if (ha->fb_rev == FPM_2310) {
  1477. strcpy(ha->model_number, "QLA2310");
  1478. } else {
  1479. strcpy(ha->model_number, "QLA2300");
  1480. }
  1481. } else {
  1482. qla2x00_set_model_info(vha, nv->model_number,
  1483. sizeof(nv->model_number), "QLA23xx");
  1484. }
  1485. } else if (IS_QLA2200(ha)) {
  1486. nv->firmware_options[0] |= BIT_2;
  1487. /*
  1488. * 'Point-to-point preferred, else loop' is not a safe
  1489. * connection mode setting.
  1490. */
  1491. if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) ==
  1492. (BIT_5 | BIT_4)) {
  1493. /* Force 'loop preferred, else point-to-point'. */
  1494. nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4);
  1495. nv->add_firmware_options[0] |= BIT_5;
  1496. }
  1497. strcpy(ha->model_number, "QLA22xx");
  1498. } else /*if (IS_QLA2100(ha))*/ {
  1499. strcpy(ha->model_number, "QLA2100");
  1500. }
  1501. /*
  1502. * Copy over NVRAM RISC parameter block to initialization control block.
  1503. */
  1504. dptr1 = (uint8_t *)icb;
  1505. dptr2 = (uint8_t *)&nv->parameter_block_version;
  1506. cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version;
  1507. while (cnt--)
  1508. *dptr1++ = *dptr2++;
  1509. /* Copy 2nd half. */
  1510. dptr1 = (uint8_t *)icb->add_firmware_options;
  1511. cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options;
  1512. while (cnt--)
  1513. *dptr1++ = *dptr2++;
  1514. /* Use alternate WWN? */
  1515. if (nv->host_p[1] & BIT_7) {
  1516. memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
  1517. memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
  1518. }
  1519. /* Prepare nodename */
  1520. if ((icb->firmware_options[1] & BIT_6) == 0) {
  1521. /*
  1522. * Firmware will apply the following mask if the nodename was
  1523. * not provided.
  1524. */
  1525. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  1526. icb->node_name[0] &= 0xF0;
  1527. }
  1528. /*
  1529. * Set host adapter parameters.
  1530. */
  1531. if (nv->host_p[0] & BIT_7)
  1532. ql2xextended_error_logging = 1;
  1533. ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0);
  1534. /* Always load RISC code on non ISP2[12]00 chips. */
  1535. if (!IS_QLA2100(ha) && !IS_QLA2200(ha))
  1536. ha->flags.disable_risc_code_load = 0;
  1537. ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0);
  1538. ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0);
  1539. ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0);
  1540. ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0;
  1541. ha->flags.disable_serdes = 0;
  1542. ha->operating_mode =
  1543. (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4;
  1544. memcpy(ha->fw_seriallink_options, nv->seriallink_options,
  1545. sizeof(ha->fw_seriallink_options));
  1546. /* save HBA serial number */
  1547. ha->serial0 = icb->port_name[5];
  1548. ha->serial1 = icb->port_name[6];
  1549. ha->serial2 = icb->port_name[7];
  1550. memcpy(vha->node_name, icb->node_name, WWN_SIZE);
  1551. memcpy(vha->port_name, icb->port_name, WWN_SIZE);
  1552. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  1553. ha->retry_count = nv->retry_count;
  1554. /* Set minimum login_timeout to 4 seconds. */
  1555. if (nv->login_timeout < ql2xlogintimeout)
  1556. nv->login_timeout = ql2xlogintimeout;
  1557. if (nv->login_timeout < 4)
  1558. nv->login_timeout = 4;
  1559. ha->login_timeout = nv->login_timeout;
  1560. icb->login_timeout = nv->login_timeout;
  1561. /* Set minimum RATOV to 100 tenths of a second. */
  1562. ha->r_a_tov = 100;
  1563. ha->loop_reset_delay = nv->reset_delay;
  1564. /* Link Down Timeout = 0:
  1565. *
  1566. * When Port Down timer expires we will start returning
  1567. * I/O's to OS with "DID_NO_CONNECT".
  1568. *
  1569. * Link Down Timeout != 0:
  1570. *
  1571. * The driver waits for the link to come up after link down
  1572. * before returning I/Os to OS with "DID_NO_CONNECT".
  1573. */
  1574. if (nv->link_down_timeout == 0) {
  1575. ha->loop_down_abort_time =
  1576. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  1577. } else {
  1578. ha->link_down_timeout = nv->link_down_timeout;
  1579. ha->loop_down_abort_time =
  1580. (LOOP_DOWN_TIME - ha->link_down_timeout);
  1581. }
  1582. /*
  1583. * Need enough time to try and get the port back.
  1584. */
  1585. ha->port_down_retry_count = nv->port_down_retry_count;
  1586. if (qlport_down_retry)
  1587. ha->port_down_retry_count = qlport_down_retry;
  1588. /* Set login_retry_count */
  1589. ha->login_retry_count = nv->retry_count;
  1590. if (ha->port_down_retry_count == nv->port_down_retry_count &&
  1591. ha->port_down_retry_count > 3)
  1592. ha->login_retry_count = ha->port_down_retry_count;
  1593. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  1594. ha->login_retry_count = ha->port_down_retry_count;
  1595. if (ql2xloginretrycount)
  1596. ha->login_retry_count = ql2xloginretrycount;
  1597. icb->lun_enables = __constant_cpu_to_le16(0);
  1598. icb->command_resource_count = 0;
  1599. icb->immediate_notify_resource_count = 0;
  1600. icb->timeout = __constant_cpu_to_le16(0);
  1601. if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
  1602. /* Enable RIO */
  1603. icb->firmware_options[0] &= ~BIT_3;
  1604. icb->add_firmware_options[0] &=
  1605. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1606. icb->add_firmware_options[0] |= BIT_2;
  1607. icb->response_accumulation_timer = 3;
  1608. icb->interrupt_delay_timer = 5;
  1609. vha->flags.process_response_queue = 1;
  1610. } else {
  1611. /* Enable ZIO. */
  1612. if (!vha->flags.init_done) {
  1613. ha->zio_mode = icb->add_firmware_options[0] &
  1614. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1615. ha->zio_timer = icb->interrupt_delay_timer ?
  1616. icb->interrupt_delay_timer: 2;
  1617. }
  1618. icb->add_firmware_options[0] &=
  1619. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1620. vha->flags.process_response_queue = 0;
  1621. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  1622. ha->zio_mode = QLA_ZIO_MODE_6;
  1623. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer "
  1624. "delay (%d us).\n", vha->host_no, ha->zio_mode,
  1625. ha->zio_timer * 100));
  1626. qla_printk(KERN_INFO, ha,
  1627. "ZIO mode %d enabled; timer delay (%d us).\n",
  1628. ha->zio_mode, ha->zio_timer * 100);
  1629. icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode;
  1630. icb->interrupt_delay_timer = (uint8_t)ha->zio_timer;
  1631. vha->flags.process_response_queue = 1;
  1632. }
  1633. }
  1634. if (rval) {
  1635. DEBUG2_3(printk(KERN_WARNING
  1636. "scsi(%ld): NVRAM configuration failed!\n", vha->host_no));
  1637. }
  1638. return (rval);
  1639. }
  1640. static void
  1641. qla2x00_rport_del(void *data)
  1642. {
  1643. fc_port_t *fcport = data;
  1644. struct fc_rport *rport;
  1645. spin_lock_irq(fcport->vha->host->host_lock);
  1646. rport = fcport->drport;
  1647. fcport->drport = NULL;
  1648. spin_unlock_irq(fcport->vha->host->host_lock);
  1649. if (rport)
  1650. fc_remote_port_delete(rport);
  1651. }
  1652. /**
  1653. * qla2x00_alloc_fcport() - Allocate a generic fcport.
  1654. * @ha: HA context
  1655. * @flags: allocation flags
  1656. *
  1657. * Returns a pointer to the allocated fcport, or NULL, if none available.
  1658. */
  1659. static fc_port_t *
  1660. qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags)
  1661. {
  1662. fc_port_t *fcport;
  1663. fcport = kzalloc(sizeof(fc_port_t), flags);
  1664. if (!fcport)
  1665. return NULL;
  1666. /* Setup fcport template structure. */
  1667. fcport->vha = vha;
  1668. fcport->vp_idx = vha->vp_idx;
  1669. fcport->port_type = FCT_UNKNOWN;
  1670. fcport->loop_id = FC_NO_LOOP_ID;
  1671. atomic_set(&fcport->state, FCS_UNCONFIGURED);
  1672. fcport->supported_classes = FC_COS_UNSPECIFIED;
  1673. return fcport;
  1674. }
  1675. /*
  1676. * qla2x00_configure_loop
  1677. * Updates Fibre Channel Device Database with what is actually on loop.
  1678. *
  1679. * Input:
  1680. * ha = adapter block pointer.
  1681. *
  1682. * Returns:
  1683. * 0 = success.
  1684. * 1 = error.
  1685. * 2 = database was full and device was not configured.
  1686. */
  1687. static int
  1688. qla2x00_configure_loop(scsi_qla_host_t *vha)
  1689. {
  1690. int rval;
  1691. unsigned long flags, save_flags;
  1692. struct qla_hw_data *ha = vha->hw;
  1693. rval = QLA_SUCCESS;
  1694. /* Get Initiator ID */
  1695. if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) {
  1696. rval = qla2x00_configure_hba(vha);
  1697. if (rval != QLA_SUCCESS) {
  1698. DEBUG(printk("scsi(%ld): Unable to configure HBA.\n",
  1699. vha->host_no));
  1700. return (rval);
  1701. }
  1702. }
  1703. save_flags = flags = vha->dpc_flags;
  1704. DEBUG(printk("scsi(%ld): Configure loop -- dpc flags =0x%lx\n",
  1705. vha->host_no, flags));
  1706. /*
  1707. * If we have both an RSCN and PORT UPDATE pending then handle them
  1708. * both at the same time.
  1709. */
  1710. clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  1711. clear_bit(RSCN_UPDATE, &vha->dpc_flags);
  1712. /* Determine what we need to do */
  1713. if (ha->current_topology == ISP_CFG_FL &&
  1714. (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
  1715. vha->flags.rscn_queue_overflow = 1;
  1716. set_bit(RSCN_UPDATE, &flags);
  1717. } else if (ha->current_topology == ISP_CFG_F &&
  1718. (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
  1719. vha->flags.rscn_queue_overflow = 1;
  1720. set_bit(RSCN_UPDATE, &flags);
  1721. clear_bit(LOCAL_LOOP_UPDATE, &flags);
  1722. } else if (ha->current_topology == ISP_CFG_N) {
  1723. clear_bit(RSCN_UPDATE, &flags);
  1724. } else if (!vha->flags.online ||
  1725. (test_bit(ABORT_ISP_ACTIVE, &flags))) {
  1726. vha->flags.rscn_queue_overflow = 1;
  1727. set_bit(RSCN_UPDATE, &flags);
  1728. set_bit(LOCAL_LOOP_UPDATE, &flags);
  1729. }
  1730. if (test_bit(LOCAL_LOOP_UPDATE, &flags)) {
  1731. if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  1732. rval = QLA_FUNCTION_FAILED;
  1733. else
  1734. rval = qla2x00_configure_local_loop(vha);
  1735. }
  1736. if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) {
  1737. if (LOOP_TRANSITION(vha))
  1738. rval = QLA_FUNCTION_FAILED;
  1739. else
  1740. rval = qla2x00_configure_fabric(vha);
  1741. }
  1742. if (rval == QLA_SUCCESS) {
  1743. if (atomic_read(&vha->loop_down_timer) ||
  1744. test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
  1745. rval = QLA_FUNCTION_FAILED;
  1746. } else {
  1747. atomic_set(&vha->loop_state, LOOP_READY);
  1748. DEBUG(printk("scsi(%ld): LOOP READY\n", vha->host_no));
  1749. }
  1750. }
  1751. if (rval) {
  1752. DEBUG2_3(printk("%s(%ld): *** FAILED ***\n",
  1753. __func__, vha->host_no));
  1754. } else {
  1755. DEBUG3(printk("%s: exiting normally\n", __func__));
  1756. }
  1757. /* Restore state if a resync event occurred during processing */
  1758. if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
  1759. if (test_bit(LOCAL_LOOP_UPDATE, &save_flags))
  1760. set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  1761. if (test_bit(RSCN_UPDATE, &save_flags)) {
  1762. set_bit(RSCN_UPDATE, &vha->dpc_flags);
  1763. vha->flags.rscn_queue_overflow = 1;
  1764. }
  1765. }
  1766. return (rval);
  1767. }
  1768. /*
  1769. * qla2x00_configure_local_loop
  1770. * Updates Fibre Channel Device Database with local loop devices.
  1771. *
  1772. * Input:
  1773. * ha = adapter block pointer.
  1774. *
  1775. * Returns:
  1776. * 0 = success.
  1777. */
  1778. static int
  1779. qla2x00_configure_local_loop(scsi_qla_host_t *vha)
  1780. {
  1781. int rval, rval2;
  1782. int found_devs;
  1783. int found;
  1784. fc_port_t *fcport, *new_fcport;
  1785. uint16_t index;
  1786. uint16_t entries;
  1787. char *id_iter;
  1788. uint16_t loop_id;
  1789. uint8_t domain, area, al_pa;
  1790. struct qla_hw_data *ha = vha->hw;
  1791. found_devs = 0;
  1792. new_fcport = NULL;
  1793. entries = MAX_FIBRE_DEVICES;
  1794. DEBUG3(printk("scsi(%ld): Getting FCAL position map\n", vha->host_no));
  1795. DEBUG3(qla2x00_get_fcal_position_map(vha, NULL));
  1796. /* Get list of logged in devices. */
  1797. memset(ha->gid_list, 0, GID_LIST_SIZE);
  1798. rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma,
  1799. &entries);
  1800. if (rval != QLA_SUCCESS)
  1801. goto cleanup_allocation;
  1802. DEBUG3(printk("scsi(%ld): Entries in ID list (%d)\n",
  1803. vha->host_no, entries));
  1804. DEBUG3(qla2x00_dump_buffer((uint8_t *)ha->gid_list,
  1805. entries * sizeof(struct gid_list_info)));
  1806. /* Allocate temporary fcport for any new fcports discovered. */
  1807. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  1808. if (new_fcport == NULL) {
  1809. rval = QLA_MEMORY_ALLOC_FAILED;
  1810. goto cleanup_allocation;
  1811. }
  1812. new_fcport->flags &= ~FCF_FABRIC_DEVICE;
  1813. /*
  1814. * Mark local devices that were present with FCF_DEVICE_LOST for now.
  1815. */
  1816. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  1817. if (atomic_read(&fcport->state) == FCS_ONLINE &&
  1818. fcport->port_type != FCT_BROADCAST &&
  1819. (fcport->flags & FCF_FABRIC_DEVICE) == 0) {
  1820. DEBUG(printk("scsi(%ld): Marking port lost, "
  1821. "loop_id=0x%04x\n",
  1822. vha->host_no, fcport->loop_id));
  1823. atomic_set(&fcport->state, FCS_DEVICE_LOST);
  1824. }
  1825. }
  1826. /* Add devices to port list. */
  1827. id_iter = (char *)ha->gid_list;
  1828. for (index = 0; index < entries; index++) {
  1829. domain = ((struct gid_list_info *)id_iter)->domain;
  1830. area = ((struct gid_list_info *)id_iter)->area;
  1831. al_pa = ((struct gid_list_info *)id_iter)->al_pa;
  1832. if (IS_QLA2100(ha) || IS_QLA2200(ha))
  1833. loop_id = (uint16_t)
  1834. ((struct gid_list_info *)id_iter)->loop_id_2100;
  1835. else
  1836. loop_id = le16_to_cpu(
  1837. ((struct gid_list_info *)id_iter)->loop_id);
  1838. id_iter += ha->gid_list_info_size;
  1839. /* Bypass reserved domain fields. */
  1840. if ((domain & 0xf0) == 0xf0)
  1841. continue;
  1842. /* Bypass if not same domain and area of adapter. */
  1843. if (area && domain &&
  1844. (area != vha->d_id.b.area || domain != vha->d_id.b.domain))
  1845. continue;
  1846. /* Bypass invalid local loop ID. */
  1847. if (loop_id > LAST_LOCAL_LOOP_ID)
  1848. continue;
  1849. /* Fill in member data. */
  1850. new_fcport->d_id.b.domain = domain;
  1851. new_fcport->d_id.b.area = area;
  1852. new_fcport->d_id.b.al_pa = al_pa;
  1853. new_fcport->loop_id = loop_id;
  1854. new_fcport->vp_idx = vha->vp_idx;
  1855. rval2 = qla2x00_get_port_database(vha, new_fcport, 0);
  1856. if (rval2 != QLA_SUCCESS) {
  1857. DEBUG2(printk("scsi(%ld): Failed to retrieve fcport "
  1858. "information -- get_port_database=%x, "
  1859. "loop_id=0x%04x\n",
  1860. vha->host_no, rval2, new_fcport->loop_id));
  1861. DEBUG2(printk("scsi(%ld): Scheduling resync...\n",
  1862. vha->host_no));
  1863. set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  1864. continue;
  1865. }
  1866. /* Check for matching device in port list. */
  1867. found = 0;
  1868. fcport = NULL;
  1869. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  1870. if (memcmp(new_fcport->port_name, fcport->port_name,
  1871. WWN_SIZE))
  1872. continue;
  1873. fcport->flags &= ~FCF_FABRIC_DEVICE;
  1874. fcport->loop_id = new_fcport->loop_id;
  1875. fcport->port_type = new_fcport->port_type;
  1876. fcport->d_id.b24 = new_fcport->d_id.b24;
  1877. memcpy(fcport->node_name, new_fcport->node_name,
  1878. WWN_SIZE);
  1879. found++;
  1880. break;
  1881. }
  1882. if (!found) {
  1883. /* New device, add to fcports list. */
  1884. if (vha->vp_idx) {
  1885. new_fcport->vha = vha;
  1886. new_fcport->vp_idx = vha->vp_idx;
  1887. }
  1888. list_add_tail(&new_fcport->list, &vha->vp_fcports);
  1889. /* Allocate a new replacement fcport. */
  1890. fcport = new_fcport;
  1891. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  1892. if (new_fcport == NULL) {
  1893. rval = QLA_MEMORY_ALLOC_FAILED;
  1894. goto cleanup_allocation;
  1895. }
  1896. new_fcport->flags &= ~FCF_FABRIC_DEVICE;
  1897. }
  1898. /* Base iIDMA settings on HBA port speed. */
  1899. fcport->fp_speed = ha->link_data_rate;
  1900. qla2x00_update_fcport(vha, fcport);
  1901. found_devs++;
  1902. }
  1903. cleanup_allocation:
  1904. kfree(new_fcport);
  1905. if (rval != QLA_SUCCESS) {
  1906. DEBUG2(printk("scsi(%ld): Configure local loop error exit: "
  1907. "rval=%x\n", vha->host_no, rval));
  1908. }
  1909. return (rval);
  1910. }
  1911. static void
  1912. qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
  1913. {
  1914. #define LS_UNKNOWN 2
  1915. static char *link_speeds[] = { "1", "2", "?", "4", "8", "10" };
  1916. char *link_speed;
  1917. int rval;
  1918. uint16_t mb[6];
  1919. struct qla_hw_data *ha = vha->hw;
  1920. if (!IS_IIDMA_CAPABLE(ha))
  1921. return;
  1922. if (fcport->fp_speed == PORT_SPEED_UNKNOWN ||
  1923. fcport->fp_speed > ha->link_data_rate)
  1924. return;
  1925. rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed,
  1926. mb);
  1927. if (rval != QLA_SUCCESS) {
  1928. DEBUG2(printk("scsi(%ld): Unable to adjust iIDMA "
  1929. "%02x%02x%02x%02x%02x%02x%02x%02x -- %04x %x %04x %04x.\n",
  1930. vha->host_no, fcport->port_name[0], fcport->port_name[1],
  1931. fcport->port_name[2], fcport->port_name[3],
  1932. fcport->port_name[4], fcport->port_name[5],
  1933. fcport->port_name[6], fcport->port_name[7], rval,
  1934. fcport->fp_speed, mb[0], mb[1]));
  1935. } else {
  1936. link_speed = link_speeds[LS_UNKNOWN];
  1937. if (fcport->fp_speed < 5)
  1938. link_speed = link_speeds[fcport->fp_speed];
  1939. else if (fcport->fp_speed == 0x13)
  1940. link_speed = link_speeds[5];
  1941. DEBUG2(qla_printk(KERN_INFO, ha,
  1942. "iIDMA adjusted to %s GB/s on "
  1943. "%02x%02x%02x%02x%02x%02x%02x%02x.\n",
  1944. link_speed, fcport->port_name[0],
  1945. fcport->port_name[1], fcport->port_name[2],
  1946. fcport->port_name[3], fcport->port_name[4],
  1947. fcport->port_name[5], fcport->port_name[6],
  1948. fcport->port_name[7]));
  1949. }
  1950. }
  1951. static void
  1952. qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport)
  1953. {
  1954. struct fc_rport_identifiers rport_ids;
  1955. struct fc_rport *rport;
  1956. struct qla_hw_data *ha = vha->hw;
  1957. if (fcport->drport)
  1958. qla2x00_rport_del(fcport);
  1959. rport_ids.node_name = wwn_to_u64(fcport->node_name);
  1960. rport_ids.port_name = wwn_to_u64(fcport->port_name);
  1961. rport_ids.port_id = fcport->d_id.b.domain << 16 |
  1962. fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa;
  1963. rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
  1964. fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids);
  1965. if (!rport) {
  1966. qla_printk(KERN_WARNING, ha,
  1967. "Unable to allocate fc remote port!\n");
  1968. return;
  1969. }
  1970. spin_lock_irq(fcport->vha->host->host_lock);
  1971. *((fc_port_t **)rport->dd_data) = fcport;
  1972. spin_unlock_irq(fcport->vha->host->host_lock);
  1973. rport->supported_classes = fcport->supported_classes;
  1974. rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
  1975. if (fcport->port_type == FCT_INITIATOR)
  1976. rport_ids.roles |= FC_RPORT_ROLE_FCP_INITIATOR;
  1977. if (fcport->port_type == FCT_TARGET)
  1978. rport_ids.roles |= FC_RPORT_ROLE_FCP_TARGET;
  1979. fc_remote_port_rolechg(rport, rport_ids.roles);
  1980. }
  1981. /*
  1982. * qla2x00_update_fcport
  1983. * Updates device on list.
  1984. *
  1985. * Input:
  1986. * ha = adapter block pointer.
  1987. * fcport = port structure pointer.
  1988. *
  1989. * Return:
  1990. * 0 - Success
  1991. * BIT_0 - error
  1992. *
  1993. * Context:
  1994. * Kernel context.
  1995. */
  1996. void
  1997. qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
  1998. {
  1999. struct qla_hw_data *ha = vha->hw;
  2000. fcport->vha = vha;
  2001. fcport->login_retry = 0;
  2002. fcport->port_login_retry_count = ha->port_down_retry_count *
  2003. PORT_RETRY_TIME;
  2004. atomic_set(&fcport->port_down_timer, ha->port_down_retry_count *
  2005. PORT_RETRY_TIME);
  2006. fcport->flags &= ~FCF_LOGIN_NEEDED;
  2007. qla2x00_iidma_fcport(vha, fcport);
  2008. atomic_set(&fcport->state, FCS_ONLINE);
  2009. qla2x00_reg_remote_port(vha, fcport);
  2010. }
  2011. /*
  2012. * qla2x00_configure_fabric
  2013. * Setup SNS devices with loop ID's.
  2014. *
  2015. * Input:
  2016. * ha = adapter block pointer.
  2017. *
  2018. * Returns:
  2019. * 0 = success.
  2020. * BIT_0 = error
  2021. */
  2022. static int
  2023. qla2x00_configure_fabric(scsi_qla_host_t *vha)
  2024. {
  2025. int rval, rval2;
  2026. fc_port_t *fcport, *fcptemp;
  2027. uint16_t next_loopid;
  2028. uint16_t mb[MAILBOX_REGISTER_COUNT];
  2029. uint16_t loop_id;
  2030. LIST_HEAD(new_fcports);
  2031. struct qla_hw_data *ha = vha->hw;
  2032. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  2033. /* If FL port exists, then SNS is present */
  2034. if (IS_FWI2_CAPABLE(ha))
  2035. loop_id = NPH_F_PORT;
  2036. else
  2037. loop_id = SNS_FL_PORT;
  2038. rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1);
  2039. if (rval != QLA_SUCCESS) {
  2040. DEBUG2(printk("scsi(%ld): MBC_GET_PORT_NAME Failed, No FL "
  2041. "Port\n", vha->host_no));
  2042. vha->device_flags &= ~SWITCH_FOUND;
  2043. return (QLA_SUCCESS);
  2044. }
  2045. vha->device_flags |= SWITCH_FOUND;
  2046. /* Mark devices that need re-synchronization. */
  2047. rval2 = qla2x00_device_resync(vha);
  2048. if (rval2 == QLA_RSCNS_HANDLED) {
  2049. /* No point doing the scan, just continue. */
  2050. return (QLA_SUCCESS);
  2051. }
  2052. do {
  2053. /* FDMI support. */
  2054. if (ql2xfdmienable &&
  2055. test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags))
  2056. qla2x00_fdmi_register(vha);
  2057. /* Ensure we are logged into the SNS. */
  2058. if (IS_FWI2_CAPABLE(ha))
  2059. loop_id = NPH_SNS;
  2060. else
  2061. loop_id = SIMPLE_NAME_SERVER;
  2062. ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff,
  2063. 0xfc, mb, BIT_1 | BIT_0);
  2064. if (mb[0] != MBS_COMMAND_COMPLETE) {
  2065. DEBUG2(qla_printk(KERN_INFO, ha,
  2066. "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
  2067. "mb[2]=%x mb[6]=%x mb[7]=%x\n", loop_id,
  2068. mb[0], mb[1], mb[2], mb[6], mb[7]));
  2069. return (QLA_SUCCESS);
  2070. }
  2071. if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) {
  2072. if (qla2x00_rft_id(vha)) {
  2073. /* EMPTY */
  2074. DEBUG2(printk("scsi(%ld): Register FC-4 "
  2075. "TYPE failed.\n", vha->host_no));
  2076. }
  2077. if (qla2x00_rff_id(vha)) {
  2078. /* EMPTY */
  2079. DEBUG2(printk("scsi(%ld): Register FC-4 "
  2080. "Features failed.\n", vha->host_no));
  2081. }
  2082. if (qla2x00_rnn_id(vha)) {
  2083. /* EMPTY */
  2084. DEBUG2(printk("scsi(%ld): Register Node Name "
  2085. "failed.\n", vha->host_no));
  2086. } else if (qla2x00_rsnn_nn(vha)) {
  2087. /* EMPTY */
  2088. DEBUG2(printk("scsi(%ld): Register Symbolic "
  2089. "Node Name failed.\n", vha->host_no));
  2090. }
  2091. }
  2092. rval = qla2x00_find_all_fabric_devs(vha, &new_fcports);
  2093. if (rval != QLA_SUCCESS)
  2094. break;
  2095. /*
  2096. * Logout all previous fabric devices marked lost, except
  2097. * tape devices.
  2098. */
  2099. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2100. if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2101. break;
  2102. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0)
  2103. continue;
  2104. if (atomic_read(&fcport->state) == FCS_DEVICE_LOST) {
  2105. qla2x00_mark_device_lost(vha, fcport,
  2106. ql2xplogiabsentdevice, 0);
  2107. if (fcport->loop_id != FC_NO_LOOP_ID &&
  2108. (fcport->flags & FCF_TAPE_PRESENT) == 0 &&
  2109. fcport->port_type != FCT_INITIATOR &&
  2110. fcport->port_type != FCT_BROADCAST) {
  2111. ha->isp_ops->fabric_logout(vha,
  2112. fcport->loop_id,
  2113. fcport->d_id.b.domain,
  2114. fcport->d_id.b.area,
  2115. fcport->d_id.b.al_pa);
  2116. fcport->loop_id = FC_NO_LOOP_ID;
  2117. }
  2118. }
  2119. }
  2120. /* Starting free loop ID. */
  2121. next_loopid = ha->min_external_loopid;
  2122. /*
  2123. * Scan through our port list and login entries that need to be
  2124. * logged in.
  2125. */
  2126. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2127. if (atomic_read(&vha->loop_down_timer) ||
  2128. test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2129. break;
  2130. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 ||
  2131. (fcport->flags & FCF_LOGIN_NEEDED) == 0)
  2132. continue;
  2133. if (fcport->loop_id == FC_NO_LOOP_ID) {
  2134. fcport->loop_id = next_loopid;
  2135. rval = qla2x00_find_new_loop_id(
  2136. base_vha, fcport);
  2137. if (rval != QLA_SUCCESS) {
  2138. /* Ran out of IDs to use */
  2139. break;
  2140. }
  2141. }
  2142. /* Login and update database */
  2143. qla2x00_fabric_dev_login(vha, fcport, &next_loopid);
  2144. }
  2145. /* Exit if out of loop IDs. */
  2146. if (rval != QLA_SUCCESS) {
  2147. break;
  2148. }
  2149. /*
  2150. * Login and add the new devices to our port list.
  2151. */
  2152. list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) {
  2153. if (atomic_read(&vha->loop_down_timer) ||
  2154. test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2155. break;
  2156. /* Find a new loop ID to use. */
  2157. fcport->loop_id = next_loopid;
  2158. rval = qla2x00_find_new_loop_id(base_vha, fcport);
  2159. if (rval != QLA_SUCCESS) {
  2160. /* Ran out of IDs to use */
  2161. break;
  2162. }
  2163. /* Login and update database */
  2164. qla2x00_fabric_dev_login(vha, fcport, &next_loopid);
  2165. if (vha->vp_idx) {
  2166. fcport->vha = vha;
  2167. fcport->vp_idx = vha->vp_idx;
  2168. }
  2169. list_move_tail(&fcport->list, &vha->vp_fcports);
  2170. }
  2171. } while (0);
  2172. /* Free all new device structures not processed. */
  2173. list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) {
  2174. list_del(&fcport->list);
  2175. kfree(fcport);
  2176. }
  2177. if (rval) {
  2178. DEBUG2(printk("scsi(%ld): Configure fabric error exit: "
  2179. "rval=%d\n", vha->host_no, rval));
  2180. }
  2181. return (rval);
  2182. }
  2183. /*
  2184. * qla2x00_find_all_fabric_devs
  2185. *
  2186. * Input:
  2187. * ha = adapter block pointer.
  2188. * dev = database device entry pointer.
  2189. *
  2190. * Returns:
  2191. * 0 = success.
  2192. *
  2193. * Context:
  2194. * Kernel context.
  2195. */
  2196. static int
  2197. qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha,
  2198. struct list_head *new_fcports)
  2199. {
  2200. int rval;
  2201. uint16_t loop_id;
  2202. fc_port_t *fcport, *new_fcport, *fcptemp;
  2203. int found;
  2204. sw_info_t *swl;
  2205. int swl_idx;
  2206. int first_dev, last_dev;
  2207. port_id_t wrap, nxt_d_id;
  2208. struct qla_hw_data *ha = vha->hw;
  2209. struct scsi_qla_host *vp, *base_vha = pci_get_drvdata(ha->pdev);
  2210. struct scsi_qla_host *tvp;
  2211. rval = QLA_SUCCESS;
  2212. /* Try GID_PT to get device list, else GAN. */
  2213. swl = kcalloc(MAX_FIBRE_DEVICES, sizeof(sw_info_t), GFP_KERNEL);
  2214. if (!swl) {
  2215. /*EMPTY*/
  2216. DEBUG2(printk("scsi(%ld): GID_PT allocations failed, fallback "
  2217. "on GA_NXT\n", vha->host_no));
  2218. } else {
  2219. if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) {
  2220. kfree(swl);
  2221. swl = NULL;
  2222. } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) {
  2223. kfree(swl);
  2224. swl = NULL;
  2225. } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) {
  2226. kfree(swl);
  2227. swl = NULL;
  2228. } else if (ql2xiidmaenable &&
  2229. qla2x00_gfpn_id(vha, swl) == QLA_SUCCESS) {
  2230. qla2x00_gpsc(vha, swl);
  2231. }
  2232. }
  2233. swl_idx = 0;
  2234. /* Allocate temporary fcport for any new fcports discovered. */
  2235. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  2236. if (new_fcport == NULL) {
  2237. kfree(swl);
  2238. return (QLA_MEMORY_ALLOC_FAILED);
  2239. }
  2240. new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
  2241. /* Set start port ID scan at adapter ID. */
  2242. first_dev = 1;
  2243. last_dev = 0;
  2244. /* Starting free loop ID. */
  2245. loop_id = ha->min_external_loopid;
  2246. for (; loop_id <= ha->max_loop_id; loop_id++) {
  2247. if (qla2x00_is_reserved_id(vha, loop_id))
  2248. continue;
  2249. if (atomic_read(&vha->loop_down_timer) || LOOP_TRANSITION(vha))
  2250. break;
  2251. if (swl != NULL) {
  2252. if (last_dev) {
  2253. wrap.b24 = new_fcport->d_id.b24;
  2254. } else {
  2255. new_fcport->d_id.b24 = swl[swl_idx].d_id.b24;
  2256. memcpy(new_fcport->node_name,
  2257. swl[swl_idx].node_name, WWN_SIZE);
  2258. memcpy(new_fcport->port_name,
  2259. swl[swl_idx].port_name, WWN_SIZE);
  2260. memcpy(new_fcport->fabric_port_name,
  2261. swl[swl_idx].fabric_port_name, WWN_SIZE);
  2262. new_fcport->fp_speed = swl[swl_idx].fp_speed;
  2263. if (swl[swl_idx].d_id.b.rsvd_1 != 0) {
  2264. last_dev = 1;
  2265. }
  2266. swl_idx++;
  2267. }
  2268. } else {
  2269. /* Send GA_NXT to the switch */
  2270. rval = qla2x00_ga_nxt(vha, new_fcport);
  2271. if (rval != QLA_SUCCESS) {
  2272. qla_printk(KERN_WARNING, ha,
  2273. "SNS scan failed -- assuming zero-entry "
  2274. "result...\n");
  2275. list_for_each_entry_safe(fcport, fcptemp,
  2276. new_fcports, list) {
  2277. list_del(&fcport->list);
  2278. kfree(fcport);
  2279. }
  2280. rval = QLA_SUCCESS;
  2281. break;
  2282. }
  2283. }
  2284. /* If wrap on switch device list, exit. */
  2285. if (first_dev) {
  2286. wrap.b24 = new_fcport->d_id.b24;
  2287. first_dev = 0;
  2288. } else if (new_fcport->d_id.b24 == wrap.b24) {
  2289. DEBUG2(printk("scsi(%ld): device wrap (%02x%02x%02x)\n",
  2290. vha->host_no, new_fcport->d_id.b.domain,
  2291. new_fcport->d_id.b.area, new_fcport->d_id.b.al_pa));
  2292. break;
  2293. }
  2294. /* Bypass if same physical adapter. */
  2295. if (new_fcport->d_id.b24 == base_vha->d_id.b24)
  2296. continue;
  2297. /* Bypass virtual ports of the same host. */
  2298. found = 0;
  2299. if (ha->num_vhosts) {
  2300. list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
  2301. if (new_fcport->d_id.b24 == vp->d_id.b24) {
  2302. found = 1;
  2303. break;
  2304. }
  2305. }
  2306. if (found)
  2307. continue;
  2308. }
  2309. /* Bypass if same domain and area of adapter. */
  2310. if (((new_fcport->d_id.b24 & 0xffff00) ==
  2311. (vha->d_id.b24 & 0xffff00)) && ha->current_topology ==
  2312. ISP_CFG_FL)
  2313. continue;
  2314. /* Bypass reserved domain fields. */
  2315. if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0)
  2316. continue;
  2317. /* Locate matching device in database. */
  2318. found = 0;
  2319. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2320. if (memcmp(new_fcport->port_name, fcport->port_name,
  2321. WWN_SIZE))
  2322. continue;
  2323. found++;
  2324. /* Update port state. */
  2325. memcpy(fcport->fabric_port_name,
  2326. new_fcport->fabric_port_name, WWN_SIZE);
  2327. fcport->fp_speed = new_fcport->fp_speed;
  2328. /*
  2329. * If address the same and state FCS_ONLINE, nothing
  2330. * changed.
  2331. */
  2332. if (fcport->d_id.b24 == new_fcport->d_id.b24 &&
  2333. atomic_read(&fcport->state) == FCS_ONLINE) {
  2334. break;
  2335. }
  2336. /*
  2337. * If device was not a fabric device before.
  2338. */
  2339. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) {
  2340. fcport->d_id.b24 = new_fcport->d_id.b24;
  2341. fcport->loop_id = FC_NO_LOOP_ID;
  2342. fcport->flags |= (FCF_FABRIC_DEVICE |
  2343. FCF_LOGIN_NEEDED);
  2344. break;
  2345. }
  2346. /*
  2347. * Port ID changed or device was marked to be updated;
  2348. * Log it out if still logged in and mark it for
  2349. * relogin later.
  2350. */
  2351. fcport->d_id.b24 = new_fcport->d_id.b24;
  2352. fcport->flags |= FCF_LOGIN_NEEDED;
  2353. if (fcport->loop_id != FC_NO_LOOP_ID &&
  2354. (fcport->flags & FCF_TAPE_PRESENT) == 0 &&
  2355. fcport->port_type != FCT_INITIATOR &&
  2356. fcport->port_type != FCT_BROADCAST) {
  2357. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  2358. fcport->d_id.b.domain, fcport->d_id.b.area,
  2359. fcport->d_id.b.al_pa);
  2360. fcport->loop_id = FC_NO_LOOP_ID;
  2361. }
  2362. break;
  2363. }
  2364. if (found)
  2365. continue;
  2366. /* If device was not in our fcports list, then add it. */
  2367. list_add_tail(&new_fcport->list, new_fcports);
  2368. /* Allocate a new replacement fcport. */
  2369. nxt_d_id.b24 = new_fcport->d_id.b24;
  2370. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  2371. if (new_fcport == NULL) {
  2372. kfree(swl);
  2373. return (QLA_MEMORY_ALLOC_FAILED);
  2374. }
  2375. new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
  2376. new_fcport->d_id.b24 = nxt_d_id.b24;
  2377. }
  2378. kfree(swl);
  2379. kfree(new_fcport);
  2380. return (rval);
  2381. }
  2382. /*
  2383. * qla2x00_find_new_loop_id
  2384. * Scan through our port list and find a new usable loop ID.
  2385. *
  2386. * Input:
  2387. * ha: adapter state pointer.
  2388. * dev: port structure pointer.
  2389. *
  2390. * Returns:
  2391. * qla2x00 local function return status code.
  2392. *
  2393. * Context:
  2394. * Kernel context.
  2395. */
  2396. static int
  2397. qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev)
  2398. {
  2399. int rval;
  2400. int found;
  2401. fc_port_t *fcport;
  2402. uint16_t first_loop_id;
  2403. struct qla_hw_data *ha = vha->hw;
  2404. struct scsi_qla_host *vp;
  2405. struct scsi_qla_host *tvp;
  2406. rval = QLA_SUCCESS;
  2407. /* Save starting loop ID. */
  2408. first_loop_id = dev->loop_id;
  2409. for (;;) {
  2410. /* Skip loop ID if already used by adapter. */
  2411. if (dev->loop_id == vha->loop_id)
  2412. dev->loop_id++;
  2413. /* Skip reserved loop IDs. */
  2414. while (qla2x00_is_reserved_id(vha, dev->loop_id))
  2415. dev->loop_id++;
  2416. /* Reset loop ID if passed the end. */
  2417. if (dev->loop_id > ha->max_loop_id) {
  2418. /* first loop ID. */
  2419. dev->loop_id = ha->min_external_loopid;
  2420. }
  2421. /* Check for loop ID being already in use. */
  2422. found = 0;
  2423. fcport = NULL;
  2424. list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
  2425. list_for_each_entry(fcport, &vp->vp_fcports, list) {
  2426. if (fcport->loop_id == dev->loop_id &&
  2427. fcport != dev) {
  2428. /* ID possibly in use */
  2429. found++;
  2430. break;
  2431. }
  2432. }
  2433. if (found)
  2434. break;
  2435. }
  2436. /* If not in use then it is free to use. */
  2437. if (!found) {
  2438. break;
  2439. }
  2440. /* ID in use. Try next value. */
  2441. dev->loop_id++;
  2442. /* If wrap around. No free ID to use. */
  2443. if (dev->loop_id == first_loop_id) {
  2444. dev->loop_id = FC_NO_LOOP_ID;
  2445. rval = QLA_FUNCTION_FAILED;
  2446. break;
  2447. }
  2448. }
  2449. return (rval);
  2450. }
  2451. /*
  2452. * qla2x00_device_resync
  2453. * Marks devices in the database that needs resynchronization.
  2454. *
  2455. * Input:
  2456. * ha = adapter block pointer.
  2457. *
  2458. * Context:
  2459. * Kernel context.
  2460. */
  2461. static int
  2462. qla2x00_device_resync(scsi_qla_host_t *vha)
  2463. {
  2464. int rval;
  2465. uint32_t mask;
  2466. fc_port_t *fcport;
  2467. uint32_t rscn_entry;
  2468. uint8_t rscn_out_iter;
  2469. uint8_t format;
  2470. port_id_t d_id;
  2471. rval = QLA_RSCNS_HANDLED;
  2472. while (vha->rscn_out_ptr != vha->rscn_in_ptr ||
  2473. vha->flags.rscn_queue_overflow) {
  2474. rscn_entry = vha->rscn_queue[vha->rscn_out_ptr];
  2475. format = MSB(MSW(rscn_entry));
  2476. d_id.b.domain = LSB(MSW(rscn_entry));
  2477. d_id.b.area = MSB(LSW(rscn_entry));
  2478. d_id.b.al_pa = LSB(LSW(rscn_entry));
  2479. DEBUG(printk("scsi(%ld): RSCN queue entry[%d] = "
  2480. "[%02x/%02x%02x%02x].\n",
  2481. vha->host_no, vha->rscn_out_ptr, format, d_id.b.domain,
  2482. d_id.b.area, d_id.b.al_pa));
  2483. vha->rscn_out_ptr++;
  2484. if (vha->rscn_out_ptr == MAX_RSCN_COUNT)
  2485. vha->rscn_out_ptr = 0;
  2486. /* Skip duplicate entries. */
  2487. for (rscn_out_iter = vha->rscn_out_ptr;
  2488. !vha->flags.rscn_queue_overflow &&
  2489. rscn_out_iter != vha->rscn_in_ptr;
  2490. rscn_out_iter = (rscn_out_iter ==
  2491. (MAX_RSCN_COUNT - 1)) ? 0: rscn_out_iter + 1) {
  2492. if (rscn_entry != vha->rscn_queue[rscn_out_iter])
  2493. break;
  2494. DEBUG(printk("scsi(%ld): Skipping duplicate RSCN queue "
  2495. "entry found at [%d].\n", vha->host_no,
  2496. rscn_out_iter));
  2497. vha->rscn_out_ptr = rscn_out_iter;
  2498. }
  2499. /* Queue overflow, set switch default case. */
  2500. if (vha->flags.rscn_queue_overflow) {
  2501. DEBUG(printk("scsi(%ld): device_resync: rscn "
  2502. "overflow.\n", vha->host_no));
  2503. format = 3;
  2504. vha->flags.rscn_queue_overflow = 0;
  2505. }
  2506. switch (format) {
  2507. case 0:
  2508. mask = 0xffffff;
  2509. break;
  2510. case 1:
  2511. mask = 0xffff00;
  2512. break;
  2513. case 2:
  2514. mask = 0xff0000;
  2515. break;
  2516. default:
  2517. mask = 0x0;
  2518. d_id.b24 = 0;
  2519. vha->rscn_out_ptr = vha->rscn_in_ptr;
  2520. break;
  2521. }
  2522. rval = QLA_SUCCESS;
  2523. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2524. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 ||
  2525. (fcport->d_id.b24 & mask) != d_id.b24 ||
  2526. fcport->port_type == FCT_BROADCAST)
  2527. continue;
  2528. if (atomic_read(&fcport->state) == FCS_ONLINE) {
  2529. if (format != 3 ||
  2530. fcport->port_type != FCT_INITIATOR) {
  2531. qla2x00_mark_device_lost(vha, fcport,
  2532. 0, 0);
  2533. }
  2534. }
  2535. }
  2536. }
  2537. return (rval);
  2538. }
  2539. /*
  2540. * qla2x00_fabric_dev_login
  2541. * Login fabric target device and update FC port database.
  2542. *
  2543. * Input:
  2544. * ha: adapter state pointer.
  2545. * fcport: port structure list pointer.
  2546. * next_loopid: contains value of a new loop ID that can be used
  2547. * by the next login attempt.
  2548. *
  2549. * Returns:
  2550. * qla2x00 local function return status code.
  2551. *
  2552. * Context:
  2553. * Kernel context.
  2554. */
  2555. static int
  2556. qla2x00_fabric_dev_login(scsi_qla_host_t *vha, fc_port_t *fcport,
  2557. uint16_t *next_loopid)
  2558. {
  2559. int rval;
  2560. int retry;
  2561. uint8_t opts;
  2562. struct qla_hw_data *ha = vha->hw;
  2563. rval = QLA_SUCCESS;
  2564. retry = 0;
  2565. rval = qla2x00_fabric_login(vha, fcport, next_loopid);
  2566. if (rval == QLA_SUCCESS) {
  2567. /* Send an ADISC to tape devices.*/
  2568. opts = 0;
  2569. if (fcport->flags & FCF_TAPE_PRESENT)
  2570. opts |= BIT_1;
  2571. rval = qla2x00_get_port_database(vha, fcport, opts);
  2572. if (rval != QLA_SUCCESS) {
  2573. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  2574. fcport->d_id.b.domain, fcport->d_id.b.area,
  2575. fcport->d_id.b.al_pa);
  2576. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  2577. } else {
  2578. qla2x00_update_fcport(vha, fcport);
  2579. }
  2580. }
  2581. return (rval);
  2582. }
  2583. /*
  2584. * qla2x00_fabric_login
  2585. * Issue fabric login command.
  2586. *
  2587. * Input:
  2588. * ha = adapter block pointer.
  2589. * device = pointer to FC device type structure.
  2590. *
  2591. * Returns:
  2592. * 0 - Login successfully
  2593. * 1 - Login failed
  2594. * 2 - Initiator device
  2595. * 3 - Fatal error
  2596. */
  2597. int
  2598. qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport,
  2599. uint16_t *next_loopid)
  2600. {
  2601. int rval;
  2602. int retry;
  2603. uint16_t tmp_loopid;
  2604. uint16_t mb[MAILBOX_REGISTER_COUNT];
  2605. struct qla_hw_data *ha = vha->hw;
  2606. retry = 0;
  2607. tmp_loopid = 0;
  2608. for (;;) {
  2609. DEBUG(printk("scsi(%ld): Trying Fabric Login w/loop id 0x%04x "
  2610. "for port %02x%02x%02x.\n",
  2611. vha->host_no, fcport->loop_id, fcport->d_id.b.domain,
  2612. fcport->d_id.b.area, fcport->d_id.b.al_pa));
  2613. /* Login fcport on switch. */
  2614. ha->isp_ops->fabric_login(vha, fcport->loop_id,
  2615. fcport->d_id.b.domain, fcport->d_id.b.area,
  2616. fcport->d_id.b.al_pa, mb, BIT_0);
  2617. if (mb[0] == MBS_PORT_ID_USED) {
  2618. /*
  2619. * Device has another loop ID. The firmware team
  2620. * recommends the driver perform an implicit login with
  2621. * the specified ID again. The ID we just used is save
  2622. * here so we return with an ID that can be tried by
  2623. * the next login.
  2624. */
  2625. retry++;
  2626. tmp_loopid = fcport->loop_id;
  2627. fcport->loop_id = mb[1];
  2628. DEBUG(printk("Fabric Login: port in use - next "
  2629. "loop id=0x%04x, port Id=%02x%02x%02x.\n",
  2630. fcport->loop_id, fcport->d_id.b.domain,
  2631. fcport->d_id.b.area, fcport->d_id.b.al_pa));
  2632. } else if (mb[0] == MBS_COMMAND_COMPLETE) {
  2633. /*
  2634. * Login succeeded.
  2635. */
  2636. if (retry) {
  2637. /* A retry occurred before. */
  2638. *next_loopid = tmp_loopid;
  2639. } else {
  2640. /*
  2641. * No retry occurred before. Just increment the
  2642. * ID value for next login.
  2643. */
  2644. *next_loopid = (fcport->loop_id + 1);
  2645. }
  2646. if (mb[1] & BIT_0) {
  2647. fcport->port_type = FCT_INITIATOR;
  2648. } else {
  2649. fcport->port_type = FCT_TARGET;
  2650. if (mb[1] & BIT_1) {
  2651. fcport->flags |= FCF_TAPE_PRESENT;
  2652. }
  2653. }
  2654. if (mb[10] & BIT_0)
  2655. fcport->supported_classes |= FC_COS_CLASS2;
  2656. if (mb[10] & BIT_1)
  2657. fcport->supported_classes |= FC_COS_CLASS3;
  2658. rval = QLA_SUCCESS;
  2659. break;
  2660. } else if (mb[0] == MBS_LOOP_ID_USED) {
  2661. /*
  2662. * Loop ID already used, try next loop ID.
  2663. */
  2664. fcport->loop_id++;
  2665. rval = qla2x00_find_new_loop_id(vha, fcport);
  2666. if (rval != QLA_SUCCESS) {
  2667. /* Ran out of loop IDs to use */
  2668. break;
  2669. }
  2670. } else if (mb[0] == MBS_COMMAND_ERROR) {
  2671. /*
  2672. * Firmware possibly timed out during login. If NO
  2673. * retries are left to do then the device is declared
  2674. * dead.
  2675. */
  2676. *next_loopid = fcport->loop_id;
  2677. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  2678. fcport->d_id.b.domain, fcport->d_id.b.area,
  2679. fcport->d_id.b.al_pa);
  2680. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  2681. rval = 1;
  2682. break;
  2683. } else {
  2684. /*
  2685. * unrecoverable / not handled error
  2686. */
  2687. DEBUG2(printk("%s(%ld): failed=%x port_id=%02x%02x%02x "
  2688. "loop_id=%x jiffies=%lx.\n",
  2689. __func__, vha->host_no, mb[0],
  2690. fcport->d_id.b.domain, fcport->d_id.b.area,
  2691. fcport->d_id.b.al_pa, fcport->loop_id, jiffies));
  2692. *next_loopid = fcport->loop_id;
  2693. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  2694. fcport->d_id.b.domain, fcport->d_id.b.area,
  2695. fcport->d_id.b.al_pa);
  2696. fcport->loop_id = FC_NO_LOOP_ID;
  2697. fcport->login_retry = 0;
  2698. rval = 3;
  2699. break;
  2700. }
  2701. }
  2702. return (rval);
  2703. }
  2704. /*
  2705. * qla2x00_local_device_login
  2706. * Issue local device login command.
  2707. *
  2708. * Input:
  2709. * ha = adapter block pointer.
  2710. * loop_id = loop id of device to login to.
  2711. *
  2712. * Returns (Where's the #define!!!!):
  2713. * 0 - Login successfully
  2714. * 1 - Login failed
  2715. * 3 - Fatal error
  2716. */
  2717. int
  2718. qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport)
  2719. {
  2720. int rval;
  2721. uint16_t mb[MAILBOX_REGISTER_COUNT];
  2722. memset(mb, 0, sizeof(mb));
  2723. rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0);
  2724. if (rval == QLA_SUCCESS) {
  2725. /* Interrogate mailbox registers for any errors */
  2726. if (mb[0] == MBS_COMMAND_ERROR)
  2727. rval = 1;
  2728. else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR)
  2729. /* device not in PCB table */
  2730. rval = 3;
  2731. }
  2732. return (rval);
  2733. }
  2734. /*
  2735. * qla2x00_loop_resync
  2736. * Resync with fibre channel devices.
  2737. *
  2738. * Input:
  2739. * ha = adapter block pointer.
  2740. *
  2741. * Returns:
  2742. * 0 = success
  2743. */
  2744. int
  2745. qla2x00_loop_resync(scsi_qla_host_t *vha)
  2746. {
  2747. int rval = QLA_SUCCESS;
  2748. uint32_t wait_time;
  2749. struct req_que *req;
  2750. struct rsp_que *rsp;
  2751. if (ql2xmultique_tag)
  2752. req = vha->hw->req_q_map[0];
  2753. else
  2754. req = vha->req;
  2755. rsp = req->rsp;
  2756. atomic_set(&vha->loop_state, LOOP_UPDATE);
  2757. clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  2758. if (vha->flags.online) {
  2759. if (!(rval = qla2x00_fw_ready(vha))) {
  2760. /* Wait at most MAX_TARGET RSCNs for a stable link. */
  2761. wait_time = 256;
  2762. do {
  2763. atomic_set(&vha->loop_state, LOOP_UPDATE);
  2764. /* Issue a marker after FW becomes ready. */
  2765. qla2x00_marker(vha, req, rsp, 0, 0,
  2766. MK_SYNC_ALL);
  2767. vha->marker_needed = 0;
  2768. /* Remap devices on Loop. */
  2769. clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  2770. qla2x00_configure_loop(vha);
  2771. wait_time--;
  2772. } while (!atomic_read(&vha->loop_down_timer) &&
  2773. !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
  2774. && wait_time && (test_bit(LOOP_RESYNC_NEEDED,
  2775. &vha->dpc_flags)));
  2776. }
  2777. }
  2778. if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
  2779. return (QLA_FUNCTION_FAILED);
  2780. if (rval)
  2781. DEBUG2_3(printk("%s(): **** FAILED ****\n", __func__));
  2782. return (rval);
  2783. }
  2784. void
  2785. qla2x00_update_fcports(scsi_qla_host_t *vha)
  2786. {
  2787. fc_port_t *fcport;
  2788. /* Go with deferred removal of rport references. */
  2789. list_for_each_entry(fcport, &vha->vp_fcports, list)
  2790. if (fcport && fcport->drport &&
  2791. atomic_read(&fcport->state) != FCS_UNCONFIGURED)
  2792. qla2x00_rport_del(fcport);
  2793. }
  2794. /*
  2795. * qla2x00_abort_isp
  2796. * Resets ISP and aborts all outstanding commands.
  2797. *
  2798. * Input:
  2799. * ha = adapter block pointer.
  2800. *
  2801. * Returns:
  2802. * 0 = success
  2803. */
  2804. int
  2805. qla2x00_abort_isp(scsi_qla_host_t *vha)
  2806. {
  2807. int rval;
  2808. uint8_t status = 0;
  2809. struct qla_hw_data *ha = vha->hw;
  2810. struct scsi_qla_host *vp;
  2811. struct scsi_qla_host *tvp;
  2812. struct req_que *req = ha->req_q_map[0];
  2813. if (vha->flags.online) {
  2814. vha->flags.online = 0;
  2815. ha->flags.chip_reset_done = 0;
  2816. clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  2817. ha->qla_stats.total_isp_aborts++;
  2818. qla_printk(KERN_INFO, ha,
  2819. "Performing ISP error recovery - ha= %p.\n", ha);
  2820. ha->isp_ops->reset_chip(vha);
  2821. atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
  2822. if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
  2823. atomic_set(&vha->loop_state, LOOP_DOWN);
  2824. qla2x00_mark_all_devices_lost(vha, 0);
  2825. list_for_each_entry_safe(vp, tvp, &ha->vp_list, list)
  2826. qla2x00_mark_all_devices_lost(vp, 0);
  2827. } else {
  2828. if (!atomic_read(&vha->loop_down_timer))
  2829. atomic_set(&vha->loop_down_timer,
  2830. LOOP_DOWN_TIME);
  2831. }
  2832. /* Requeue all commands in outstanding command list. */
  2833. qla2x00_abort_all_cmds(vha, DID_RESET << 16);
  2834. ha->isp_ops->get_flash_version(vha, req->ring);
  2835. ha->isp_ops->nvram_config(vha);
  2836. if (!qla2x00_restart_isp(vha)) {
  2837. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  2838. if (!atomic_read(&vha->loop_down_timer)) {
  2839. /*
  2840. * Issue marker command only when we are going
  2841. * to start the I/O .
  2842. */
  2843. vha->marker_needed = 1;
  2844. }
  2845. vha->flags.online = 1;
  2846. ha->isp_ops->enable_intrs(ha);
  2847. ha->isp_abort_cnt = 0;
  2848. clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  2849. if (ha->fce) {
  2850. ha->flags.fce_enabled = 1;
  2851. memset(ha->fce, 0,
  2852. fce_calc_size(ha->fce_bufs));
  2853. rval = qla2x00_enable_fce_trace(vha,
  2854. ha->fce_dma, ha->fce_bufs, ha->fce_mb,
  2855. &ha->fce_bufs);
  2856. if (rval) {
  2857. qla_printk(KERN_WARNING, ha,
  2858. "Unable to reinitialize FCE "
  2859. "(%d).\n", rval);
  2860. ha->flags.fce_enabled = 0;
  2861. }
  2862. }
  2863. if (ha->eft) {
  2864. memset(ha->eft, 0, EFT_SIZE);
  2865. rval = qla2x00_enable_eft_trace(vha,
  2866. ha->eft_dma, EFT_NUM_BUFFERS);
  2867. if (rval) {
  2868. qla_printk(KERN_WARNING, ha,
  2869. "Unable to reinitialize EFT "
  2870. "(%d).\n", rval);
  2871. }
  2872. }
  2873. } else { /* failed the ISP abort */
  2874. vha->flags.online = 1;
  2875. if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
  2876. if (ha->isp_abort_cnt == 0) {
  2877. qla_printk(KERN_WARNING, ha,
  2878. "ISP error recovery failed - "
  2879. "board disabled\n");
  2880. /*
  2881. * The next call disables the board
  2882. * completely.
  2883. */
  2884. ha->isp_ops->reset_adapter(vha);
  2885. vha->flags.online = 0;
  2886. clear_bit(ISP_ABORT_RETRY,
  2887. &vha->dpc_flags);
  2888. status = 0;
  2889. } else { /* schedule another ISP abort */
  2890. ha->isp_abort_cnt--;
  2891. DEBUG(printk("qla%ld: ISP abort - "
  2892. "retry remaining %d\n",
  2893. vha->host_no, ha->isp_abort_cnt));
  2894. status = 1;
  2895. }
  2896. } else {
  2897. ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT;
  2898. DEBUG(printk("qla2x00(%ld): ISP error recovery "
  2899. "- retrying (%d) more times\n",
  2900. vha->host_no, ha->isp_abort_cnt));
  2901. set_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  2902. status = 1;
  2903. }
  2904. }
  2905. }
  2906. if (!status) {
  2907. DEBUG(printk(KERN_INFO
  2908. "qla2x00_abort_isp(%ld): succeeded.\n",
  2909. vha->host_no));
  2910. list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
  2911. if (vp->vp_idx)
  2912. qla2x00_vp_abort_isp(vp);
  2913. }
  2914. } else {
  2915. qla_printk(KERN_INFO, ha,
  2916. "qla2x00_abort_isp: **** FAILED ****\n");
  2917. }
  2918. return(status);
  2919. }
  2920. /*
  2921. * qla2x00_restart_isp
  2922. * restarts the ISP after a reset
  2923. *
  2924. * Input:
  2925. * ha = adapter block pointer.
  2926. *
  2927. * Returns:
  2928. * 0 = success
  2929. */
  2930. static int
  2931. qla2x00_restart_isp(scsi_qla_host_t *vha)
  2932. {
  2933. int status = 0;
  2934. uint32_t wait_time;
  2935. struct qla_hw_data *ha = vha->hw;
  2936. struct req_que *req = ha->req_q_map[0];
  2937. struct rsp_que *rsp = ha->rsp_q_map[0];
  2938. /* If firmware needs to be loaded */
  2939. if (qla2x00_isp_firmware(vha)) {
  2940. vha->flags.online = 0;
  2941. status = ha->isp_ops->chip_diag(vha);
  2942. if (!status)
  2943. status = qla2x00_setup_chip(vha);
  2944. }
  2945. if (!status && !(status = qla2x00_init_rings(vha))) {
  2946. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  2947. ha->flags.chip_reset_done = 1;
  2948. /* Initialize the queues in use */
  2949. qla25xx_init_queues(ha);
  2950. status = qla2x00_fw_ready(vha);
  2951. if (!status) {
  2952. DEBUG(printk("%s(): Start configure loop, "
  2953. "status = %d\n", __func__, status));
  2954. /* Issue a marker after FW becomes ready. */
  2955. qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
  2956. vha->flags.online = 1;
  2957. /* Wait at most MAX_TARGET RSCNs for a stable link. */
  2958. wait_time = 256;
  2959. do {
  2960. clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  2961. qla2x00_configure_loop(vha);
  2962. wait_time--;
  2963. } while (!atomic_read(&vha->loop_down_timer) &&
  2964. !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
  2965. && wait_time && (test_bit(LOOP_RESYNC_NEEDED,
  2966. &vha->dpc_flags)));
  2967. }
  2968. /* if no cable then assume it's good */
  2969. if ((vha->device_flags & DFLG_NO_CABLE))
  2970. status = 0;
  2971. DEBUG(printk("%s(): Configure loop done, status = 0x%x\n",
  2972. __func__,
  2973. status));
  2974. }
  2975. return (status);
  2976. }
  2977. static int
  2978. qla25xx_init_queues(struct qla_hw_data *ha)
  2979. {
  2980. struct rsp_que *rsp = NULL;
  2981. struct req_que *req = NULL;
  2982. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  2983. int ret = -1;
  2984. int i;
  2985. for (i = 1; i < ha->max_rsp_queues; i++) {
  2986. rsp = ha->rsp_q_map[i];
  2987. if (rsp) {
  2988. rsp->options &= ~BIT_0;
  2989. ret = qla25xx_init_rsp_que(base_vha, rsp);
  2990. if (ret != QLA_SUCCESS)
  2991. DEBUG2_17(printk(KERN_WARNING
  2992. "%s Rsp que:%d init failed\n", __func__,
  2993. rsp->id));
  2994. else
  2995. DEBUG2_17(printk(KERN_INFO
  2996. "%s Rsp que:%d inited\n", __func__,
  2997. rsp->id));
  2998. }
  2999. }
  3000. for (i = 1; i < ha->max_req_queues; i++) {
  3001. req = ha->req_q_map[i];
  3002. if (req) {
  3003. /* Clear outstanding commands array. */
  3004. req->options &= ~BIT_0;
  3005. ret = qla25xx_init_req_que(base_vha, req);
  3006. if (ret != QLA_SUCCESS)
  3007. DEBUG2_17(printk(KERN_WARNING
  3008. "%s Req que:%d init failed\n", __func__,
  3009. req->id));
  3010. else
  3011. DEBUG2_17(printk(KERN_WARNING
  3012. "%s Req que:%d inited\n", __func__,
  3013. req->id));
  3014. }
  3015. }
  3016. return ret;
  3017. }
  3018. /*
  3019. * qla2x00_reset_adapter
  3020. * Reset adapter.
  3021. *
  3022. * Input:
  3023. * ha = adapter block pointer.
  3024. */
  3025. void
  3026. qla2x00_reset_adapter(scsi_qla_host_t *vha)
  3027. {
  3028. unsigned long flags = 0;
  3029. struct qla_hw_data *ha = vha->hw;
  3030. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  3031. vha->flags.online = 0;
  3032. ha->isp_ops->disable_intrs(ha);
  3033. spin_lock_irqsave(&ha->hardware_lock, flags);
  3034. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  3035. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  3036. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  3037. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  3038. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  3039. }
  3040. void
  3041. qla24xx_reset_adapter(scsi_qla_host_t *vha)
  3042. {
  3043. unsigned long flags = 0;
  3044. struct qla_hw_data *ha = vha->hw;
  3045. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  3046. vha->flags.online = 0;
  3047. ha->isp_ops->disable_intrs(ha);
  3048. spin_lock_irqsave(&ha->hardware_lock, flags);
  3049. WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
  3050. RD_REG_DWORD(&reg->hccr);
  3051. WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
  3052. RD_REG_DWORD(&reg->hccr);
  3053. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  3054. if (IS_NOPOLLING_TYPE(ha))
  3055. ha->isp_ops->enable_intrs(ha);
  3056. }
  3057. /* On sparc systems, obtain port and node WWN from firmware
  3058. * properties.
  3059. */
  3060. static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha,
  3061. struct nvram_24xx *nv)
  3062. {
  3063. #ifdef CONFIG_SPARC
  3064. struct qla_hw_data *ha = vha->hw;
  3065. struct pci_dev *pdev = ha->pdev;
  3066. struct device_node *dp = pci_device_to_OF_node(pdev);
  3067. const u8 *val;
  3068. int len;
  3069. val = of_get_property(dp, "port-wwn", &len);
  3070. if (val && len >= WWN_SIZE)
  3071. memcpy(nv->port_name, val, WWN_SIZE);
  3072. val = of_get_property(dp, "node-wwn", &len);
  3073. if (val && len >= WWN_SIZE)
  3074. memcpy(nv->node_name, val, WWN_SIZE);
  3075. #endif
  3076. }
  3077. int
  3078. qla24xx_nvram_config(scsi_qla_host_t *vha)
  3079. {
  3080. int rval;
  3081. struct init_cb_24xx *icb;
  3082. struct nvram_24xx *nv;
  3083. uint32_t *dptr;
  3084. uint8_t *dptr1, *dptr2;
  3085. uint32_t chksum;
  3086. uint16_t cnt;
  3087. struct qla_hw_data *ha = vha->hw;
  3088. rval = QLA_SUCCESS;
  3089. icb = (struct init_cb_24xx *)ha->init_cb;
  3090. nv = ha->nvram;
  3091. /* Determine NVRAM starting address. */
  3092. if (ha->flags.port0) {
  3093. ha->nvram_base = FA_NVRAM_FUNC0_ADDR;
  3094. ha->vpd_base = FA_NVRAM_VPD0_ADDR;
  3095. } else {
  3096. ha->nvram_base = FA_NVRAM_FUNC1_ADDR;
  3097. ha->vpd_base = FA_NVRAM_VPD1_ADDR;
  3098. }
  3099. ha->nvram_size = sizeof(struct nvram_24xx);
  3100. ha->vpd_size = FA_NVRAM_VPD_SIZE;
  3101. /* Get VPD data into cache */
  3102. ha->vpd = ha->nvram + VPD_OFFSET;
  3103. ha->isp_ops->read_nvram(vha, (uint8_t *)ha->vpd,
  3104. ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4);
  3105. /* Get NVRAM data into cache and calculate checksum. */
  3106. dptr = (uint32_t *)nv;
  3107. ha->isp_ops->read_nvram(vha, (uint8_t *)dptr, ha->nvram_base,
  3108. ha->nvram_size);
  3109. for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++)
  3110. chksum += le32_to_cpu(*dptr++);
  3111. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", vha->host_no));
  3112. DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size));
  3113. /* Bad NVRAM data, set defaults parameters. */
  3114. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
  3115. || nv->id[3] != ' ' ||
  3116. nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) {
  3117. /* Reset NVRAM data. */
  3118. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  3119. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  3120. le16_to_cpu(nv->nvram_version));
  3121. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  3122. "invalid -- WWPN) defaults.\n");
  3123. /*
  3124. * Set default initialization control block.
  3125. */
  3126. memset(nv, 0, ha->nvram_size);
  3127. nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION);
  3128. nv->version = __constant_cpu_to_le16(ICB_VERSION);
  3129. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  3130. nv->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  3131. nv->exchange_count = __constant_cpu_to_le16(0);
  3132. nv->hard_address = __constant_cpu_to_le16(124);
  3133. nv->port_name[0] = 0x21;
  3134. nv->port_name[1] = 0x00 + ha->port_no;
  3135. nv->port_name[2] = 0x00;
  3136. nv->port_name[3] = 0xe0;
  3137. nv->port_name[4] = 0x8b;
  3138. nv->port_name[5] = 0x1c;
  3139. nv->port_name[6] = 0x55;
  3140. nv->port_name[7] = 0x86;
  3141. nv->node_name[0] = 0x20;
  3142. nv->node_name[1] = 0x00;
  3143. nv->node_name[2] = 0x00;
  3144. nv->node_name[3] = 0xe0;
  3145. nv->node_name[4] = 0x8b;
  3146. nv->node_name[5] = 0x1c;
  3147. nv->node_name[6] = 0x55;
  3148. nv->node_name[7] = 0x86;
  3149. qla24xx_nvram_wwn_from_ofw(vha, nv);
  3150. nv->login_retry_count = __constant_cpu_to_le16(8);
  3151. nv->interrupt_delay_timer = __constant_cpu_to_le16(0);
  3152. nv->login_timeout = __constant_cpu_to_le16(0);
  3153. nv->firmware_options_1 =
  3154. __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
  3155. nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4);
  3156. nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12);
  3157. nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13);
  3158. nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10);
  3159. nv->efi_parameters = __constant_cpu_to_le32(0);
  3160. nv->reset_delay = 5;
  3161. nv->max_luns_per_target = __constant_cpu_to_le16(128);
  3162. nv->port_down_retry_count = __constant_cpu_to_le16(30);
  3163. nv->link_down_timeout = __constant_cpu_to_le16(30);
  3164. rval = 1;
  3165. }
  3166. /* Reset Initialization control block */
  3167. memset(icb, 0, ha->init_cb_size);
  3168. /* Copy 1st segment. */
  3169. dptr1 = (uint8_t *)icb;
  3170. dptr2 = (uint8_t *)&nv->version;
  3171. cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
  3172. while (cnt--)
  3173. *dptr1++ = *dptr2++;
  3174. icb->login_retry_count = nv->login_retry_count;
  3175. icb->link_down_on_nos = nv->link_down_on_nos;
  3176. /* Copy 2nd segment. */
  3177. dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
  3178. dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
  3179. cnt = (uint8_t *)&icb->reserved_3 -
  3180. (uint8_t *)&icb->interrupt_delay_timer;
  3181. while (cnt--)
  3182. *dptr1++ = *dptr2++;
  3183. /*
  3184. * Setup driver NVRAM options.
  3185. */
  3186. qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
  3187. "QLA2462");
  3188. /* Use alternate WWN? */
  3189. if (nv->host_p & __constant_cpu_to_le32(BIT_15)) {
  3190. memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
  3191. memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
  3192. }
  3193. /* Prepare nodename */
  3194. if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) {
  3195. /*
  3196. * Firmware will apply the following mask if the nodename was
  3197. * not provided.
  3198. */
  3199. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  3200. icb->node_name[0] &= 0xF0;
  3201. }
  3202. /* Set host adapter parameters. */
  3203. ha->flags.disable_risc_code_load = 0;
  3204. ha->flags.enable_lip_reset = 0;
  3205. ha->flags.enable_lip_full_login =
  3206. le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
  3207. ha->flags.enable_target_reset =
  3208. le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
  3209. ha->flags.enable_led_scheme = 0;
  3210. ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
  3211. ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
  3212. (BIT_6 | BIT_5 | BIT_4)) >> 4;
  3213. memcpy(ha->fw_seriallink_options24, nv->seriallink_options,
  3214. sizeof(ha->fw_seriallink_options24));
  3215. /* save HBA serial number */
  3216. ha->serial0 = icb->port_name[5];
  3217. ha->serial1 = icb->port_name[6];
  3218. ha->serial2 = icb->port_name[7];
  3219. memcpy(vha->node_name, icb->node_name, WWN_SIZE);
  3220. memcpy(vha->port_name, icb->port_name, WWN_SIZE);
  3221. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  3222. ha->retry_count = le16_to_cpu(nv->login_retry_count);
  3223. /* Set minimum login_timeout to 4 seconds. */
  3224. if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
  3225. nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
  3226. if (le16_to_cpu(nv->login_timeout) < 4)
  3227. nv->login_timeout = __constant_cpu_to_le16(4);
  3228. ha->login_timeout = le16_to_cpu(nv->login_timeout);
  3229. icb->login_timeout = nv->login_timeout;
  3230. /* Set minimum RATOV to 100 tenths of a second. */
  3231. ha->r_a_tov = 100;
  3232. ha->loop_reset_delay = nv->reset_delay;
  3233. /* Link Down Timeout = 0:
  3234. *
  3235. * When Port Down timer expires we will start returning
  3236. * I/O's to OS with "DID_NO_CONNECT".
  3237. *
  3238. * Link Down Timeout != 0:
  3239. *
  3240. * The driver waits for the link to come up after link down
  3241. * before returning I/Os to OS with "DID_NO_CONNECT".
  3242. */
  3243. if (le16_to_cpu(nv->link_down_timeout) == 0) {
  3244. ha->loop_down_abort_time =
  3245. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  3246. } else {
  3247. ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
  3248. ha->loop_down_abort_time =
  3249. (LOOP_DOWN_TIME - ha->link_down_timeout);
  3250. }
  3251. /* Need enough time to try and get the port back. */
  3252. ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
  3253. if (qlport_down_retry)
  3254. ha->port_down_retry_count = qlport_down_retry;
  3255. /* Set login_retry_count */
  3256. ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
  3257. if (ha->port_down_retry_count ==
  3258. le16_to_cpu(nv->port_down_retry_count) &&
  3259. ha->port_down_retry_count > 3)
  3260. ha->login_retry_count = ha->port_down_retry_count;
  3261. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  3262. ha->login_retry_count = ha->port_down_retry_count;
  3263. if (ql2xloginretrycount)
  3264. ha->login_retry_count = ql2xloginretrycount;
  3265. /* Enable ZIO. */
  3266. if (!vha->flags.init_done) {
  3267. ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
  3268. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  3269. ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
  3270. le16_to_cpu(icb->interrupt_delay_timer): 2;
  3271. }
  3272. icb->firmware_options_2 &= __constant_cpu_to_le32(
  3273. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
  3274. vha->flags.process_response_queue = 0;
  3275. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  3276. ha->zio_mode = QLA_ZIO_MODE_6;
  3277. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer delay "
  3278. "(%d us).\n", vha->host_no, ha->zio_mode,
  3279. ha->zio_timer * 100));
  3280. qla_printk(KERN_INFO, ha,
  3281. "ZIO mode %d enabled; timer delay (%d us).\n",
  3282. ha->zio_mode, ha->zio_timer * 100);
  3283. icb->firmware_options_2 |= cpu_to_le32(
  3284. (uint32_t)ha->zio_mode);
  3285. icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
  3286. vha->flags.process_response_queue = 1;
  3287. }
  3288. if (rval) {
  3289. DEBUG2_3(printk(KERN_WARNING
  3290. "scsi(%ld): NVRAM configuration failed!\n", vha->host_no));
  3291. }
  3292. return (rval);
  3293. }
  3294. static int
  3295. qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr,
  3296. uint32_t faddr)
  3297. {
  3298. int rval = QLA_SUCCESS;
  3299. int segments, fragment;
  3300. uint32_t *dcode, dlen;
  3301. uint32_t risc_addr;
  3302. uint32_t risc_size;
  3303. uint32_t i;
  3304. struct qla_hw_data *ha = vha->hw;
  3305. struct req_que *req = ha->req_q_map[0];
  3306. qla_printk(KERN_INFO, ha,
  3307. "FW: Loading from flash (%x)...\n", faddr);
  3308. rval = QLA_SUCCESS;
  3309. segments = FA_RISC_CODE_SEGMENTS;
  3310. dcode = (uint32_t *)req->ring;
  3311. *srisc_addr = 0;
  3312. /* Validate firmware image by checking version. */
  3313. qla24xx_read_flash_data(vha, dcode, faddr + 4, 4);
  3314. for (i = 0; i < 4; i++)
  3315. dcode[i] = be32_to_cpu(dcode[i]);
  3316. if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
  3317. dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
  3318. (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
  3319. dcode[3] == 0)) {
  3320. qla_printk(KERN_WARNING, ha,
  3321. "Unable to verify integrity of flash firmware image!\n");
  3322. qla_printk(KERN_WARNING, ha,
  3323. "Firmware data: %08x %08x %08x %08x!\n", dcode[0],
  3324. dcode[1], dcode[2], dcode[3]);
  3325. return QLA_FUNCTION_FAILED;
  3326. }
  3327. while (segments && rval == QLA_SUCCESS) {
  3328. /* Read segment's load information. */
  3329. qla24xx_read_flash_data(vha, dcode, faddr, 4);
  3330. risc_addr = be32_to_cpu(dcode[2]);
  3331. *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
  3332. risc_size = be32_to_cpu(dcode[3]);
  3333. fragment = 0;
  3334. while (risc_size > 0 && rval == QLA_SUCCESS) {
  3335. dlen = (uint32_t)(ha->fw_transfer_size >> 2);
  3336. if (dlen > risc_size)
  3337. dlen = risc_size;
  3338. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  3339. "addr %x, number of dwords 0x%x, offset 0x%x.\n",
  3340. vha->host_no, risc_addr, dlen, faddr));
  3341. qla24xx_read_flash_data(vha, dcode, faddr, dlen);
  3342. for (i = 0; i < dlen; i++)
  3343. dcode[i] = swab32(dcode[i]);
  3344. rval = qla2x00_load_ram(vha, req->dma, risc_addr,
  3345. dlen);
  3346. if (rval) {
  3347. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  3348. "segment %d of firmware\n", vha->host_no,
  3349. fragment));
  3350. qla_printk(KERN_WARNING, ha,
  3351. "[ERROR] Failed to load segment %d of "
  3352. "firmware\n", fragment);
  3353. break;
  3354. }
  3355. faddr += dlen;
  3356. risc_addr += dlen;
  3357. risc_size -= dlen;
  3358. fragment++;
  3359. }
  3360. /* Next segment. */
  3361. segments--;
  3362. }
  3363. return rval;
  3364. }
  3365. #define QLA_FW_URL "ftp://ftp.qlogic.com/outgoing/linux/firmware/"
  3366. int
  3367. qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  3368. {
  3369. int rval;
  3370. int i, fragment;
  3371. uint16_t *wcode, *fwcode;
  3372. uint32_t risc_addr, risc_size, fwclen, wlen, *seg;
  3373. struct fw_blob *blob;
  3374. struct qla_hw_data *ha = vha->hw;
  3375. struct req_que *req = ha->req_q_map[0];
  3376. /* Load firmware blob. */
  3377. blob = qla2x00_request_firmware(vha);
  3378. if (!blob) {
  3379. qla_printk(KERN_ERR, ha, "Firmware image unavailable.\n");
  3380. qla_printk(KERN_ERR, ha, "Firmware images can be retrieved "
  3381. "from: " QLA_FW_URL ".\n");
  3382. return QLA_FUNCTION_FAILED;
  3383. }
  3384. rval = QLA_SUCCESS;
  3385. wcode = (uint16_t *)req->ring;
  3386. *srisc_addr = 0;
  3387. fwcode = (uint16_t *)blob->fw->data;
  3388. fwclen = 0;
  3389. /* Validate firmware image by checking version. */
  3390. if (blob->fw->size < 8 * sizeof(uint16_t)) {
  3391. qla_printk(KERN_WARNING, ha,
  3392. "Unable to verify integrity of firmware image (%Zd)!\n",
  3393. blob->fw->size);
  3394. goto fail_fw_integrity;
  3395. }
  3396. for (i = 0; i < 4; i++)
  3397. wcode[i] = be16_to_cpu(fwcode[i + 4]);
  3398. if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff &&
  3399. wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 &&
  3400. wcode[2] == 0 && wcode[3] == 0)) {
  3401. qla_printk(KERN_WARNING, ha,
  3402. "Unable to verify integrity of firmware image!\n");
  3403. qla_printk(KERN_WARNING, ha,
  3404. "Firmware data: %04x %04x %04x %04x!\n", wcode[0],
  3405. wcode[1], wcode[2], wcode[3]);
  3406. goto fail_fw_integrity;
  3407. }
  3408. seg = blob->segs;
  3409. while (*seg && rval == QLA_SUCCESS) {
  3410. risc_addr = *seg;
  3411. *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr;
  3412. risc_size = be16_to_cpu(fwcode[3]);
  3413. /* Validate firmware image size. */
  3414. fwclen += risc_size * sizeof(uint16_t);
  3415. if (blob->fw->size < fwclen) {
  3416. qla_printk(KERN_WARNING, ha,
  3417. "Unable to verify integrity of firmware image "
  3418. "(%Zd)!\n", blob->fw->size);
  3419. goto fail_fw_integrity;
  3420. }
  3421. fragment = 0;
  3422. while (risc_size > 0 && rval == QLA_SUCCESS) {
  3423. wlen = (uint16_t)(ha->fw_transfer_size >> 1);
  3424. if (wlen > risc_size)
  3425. wlen = risc_size;
  3426. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  3427. "addr %x, number of words 0x%x.\n", vha->host_no,
  3428. risc_addr, wlen));
  3429. for (i = 0; i < wlen; i++)
  3430. wcode[i] = swab16(fwcode[i]);
  3431. rval = qla2x00_load_ram(vha, req->dma, risc_addr,
  3432. wlen);
  3433. if (rval) {
  3434. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  3435. "segment %d of firmware\n", vha->host_no,
  3436. fragment));
  3437. qla_printk(KERN_WARNING, ha,
  3438. "[ERROR] Failed to load segment %d of "
  3439. "firmware\n", fragment);
  3440. break;
  3441. }
  3442. fwcode += wlen;
  3443. risc_addr += wlen;
  3444. risc_size -= wlen;
  3445. fragment++;
  3446. }
  3447. /* Next segment. */
  3448. seg++;
  3449. }
  3450. return rval;
  3451. fail_fw_integrity:
  3452. return QLA_FUNCTION_FAILED;
  3453. }
  3454. static int
  3455. qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  3456. {
  3457. int rval;
  3458. int segments, fragment;
  3459. uint32_t *dcode, dlen;
  3460. uint32_t risc_addr;
  3461. uint32_t risc_size;
  3462. uint32_t i;
  3463. struct fw_blob *blob;
  3464. uint32_t *fwcode, fwclen;
  3465. struct qla_hw_data *ha = vha->hw;
  3466. struct req_que *req = ha->req_q_map[0];
  3467. /* Load firmware blob. */
  3468. blob = qla2x00_request_firmware(vha);
  3469. if (!blob) {
  3470. qla_printk(KERN_ERR, ha, "Firmware image unavailable.\n");
  3471. qla_printk(KERN_ERR, ha, "Firmware images can be retrieved "
  3472. "from: " QLA_FW_URL ".\n");
  3473. return QLA_FUNCTION_FAILED;
  3474. }
  3475. qla_printk(KERN_INFO, ha,
  3476. "FW: Loading via request-firmware...\n");
  3477. rval = QLA_SUCCESS;
  3478. segments = FA_RISC_CODE_SEGMENTS;
  3479. dcode = (uint32_t *)req->ring;
  3480. *srisc_addr = 0;
  3481. fwcode = (uint32_t *)blob->fw->data;
  3482. fwclen = 0;
  3483. /* Validate firmware image by checking version. */
  3484. if (blob->fw->size < 8 * sizeof(uint32_t)) {
  3485. qla_printk(KERN_WARNING, ha,
  3486. "Unable to verify integrity of firmware image (%Zd)!\n",
  3487. blob->fw->size);
  3488. goto fail_fw_integrity;
  3489. }
  3490. for (i = 0; i < 4; i++)
  3491. dcode[i] = be32_to_cpu(fwcode[i + 4]);
  3492. if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
  3493. dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
  3494. (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
  3495. dcode[3] == 0)) {
  3496. qla_printk(KERN_WARNING, ha,
  3497. "Unable to verify integrity of firmware image!\n");
  3498. qla_printk(KERN_WARNING, ha,
  3499. "Firmware data: %08x %08x %08x %08x!\n", dcode[0],
  3500. dcode[1], dcode[2], dcode[3]);
  3501. goto fail_fw_integrity;
  3502. }
  3503. while (segments && rval == QLA_SUCCESS) {
  3504. risc_addr = be32_to_cpu(fwcode[2]);
  3505. *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
  3506. risc_size = be32_to_cpu(fwcode[3]);
  3507. /* Validate firmware image size. */
  3508. fwclen += risc_size * sizeof(uint32_t);
  3509. if (blob->fw->size < fwclen) {
  3510. qla_printk(KERN_WARNING, ha,
  3511. "Unable to verify integrity of firmware image "
  3512. "(%Zd)!\n", blob->fw->size);
  3513. goto fail_fw_integrity;
  3514. }
  3515. fragment = 0;
  3516. while (risc_size > 0 && rval == QLA_SUCCESS) {
  3517. dlen = (uint32_t)(ha->fw_transfer_size >> 2);
  3518. if (dlen > risc_size)
  3519. dlen = risc_size;
  3520. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  3521. "addr %x, number of dwords 0x%x.\n", vha->host_no,
  3522. risc_addr, dlen));
  3523. for (i = 0; i < dlen; i++)
  3524. dcode[i] = swab32(fwcode[i]);
  3525. rval = qla2x00_load_ram(vha, req->dma, risc_addr,
  3526. dlen);
  3527. if (rval) {
  3528. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  3529. "segment %d of firmware\n", vha->host_no,
  3530. fragment));
  3531. qla_printk(KERN_WARNING, ha,
  3532. "[ERROR] Failed to load segment %d of "
  3533. "firmware\n", fragment);
  3534. break;
  3535. }
  3536. fwcode += dlen;
  3537. risc_addr += dlen;
  3538. risc_size -= dlen;
  3539. fragment++;
  3540. }
  3541. /* Next segment. */
  3542. segments--;
  3543. }
  3544. return rval;
  3545. fail_fw_integrity:
  3546. return QLA_FUNCTION_FAILED;
  3547. }
  3548. int
  3549. qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  3550. {
  3551. int rval;
  3552. if (ql2xfwloadbin == 1)
  3553. return qla81xx_load_risc(vha, srisc_addr);
  3554. /*
  3555. * FW Load priority:
  3556. * 1) Firmware via request-firmware interface (.bin file).
  3557. * 2) Firmware residing in flash.
  3558. */
  3559. rval = qla24xx_load_risc_blob(vha, srisc_addr);
  3560. if (rval == QLA_SUCCESS)
  3561. return rval;
  3562. return qla24xx_load_risc_flash(vha, srisc_addr,
  3563. vha->hw->flt_region_fw);
  3564. }
  3565. int
  3566. qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  3567. {
  3568. int rval;
  3569. struct qla_hw_data *ha = vha->hw;
  3570. if (ql2xfwloadbin == 2)
  3571. goto try_blob_fw;
  3572. /*
  3573. * FW Load priority:
  3574. * 1) Firmware residing in flash.
  3575. * 2) Firmware via request-firmware interface (.bin file).
  3576. * 3) Golden-Firmware residing in flash -- limited operation.
  3577. */
  3578. rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw);
  3579. if (rval == QLA_SUCCESS)
  3580. return rval;
  3581. try_blob_fw:
  3582. rval = qla24xx_load_risc_blob(vha, srisc_addr);
  3583. if (rval == QLA_SUCCESS || !ha->flt_region_gold_fw)
  3584. return rval;
  3585. qla_printk(KERN_ERR, ha,
  3586. "FW: Attempting to fallback to golden firmware...\n");
  3587. rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw);
  3588. if (rval != QLA_SUCCESS)
  3589. return rval;
  3590. qla_printk(KERN_ERR, ha,
  3591. "FW: Please update operational firmware...\n");
  3592. ha->flags.running_gold_fw = 1;
  3593. return rval;
  3594. }
  3595. void
  3596. qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha)
  3597. {
  3598. int ret, retries;
  3599. struct qla_hw_data *ha = vha->hw;
  3600. if (!IS_FWI2_CAPABLE(ha))
  3601. return;
  3602. if (!ha->fw_major_version)
  3603. return;
  3604. ret = qla2x00_stop_firmware(vha);
  3605. for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT &&
  3606. ret != QLA_INVALID_COMMAND && retries ; retries--) {
  3607. ha->isp_ops->reset_chip(vha);
  3608. if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS)
  3609. continue;
  3610. if (qla2x00_setup_chip(vha) != QLA_SUCCESS)
  3611. continue;
  3612. qla_printk(KERN_INFO, ha,
  3613. "Attempting retry of stop-firmware command...\n");
  3614. ret = qla2x00_stop_firmware(vha);
  3615. }
  3616. }
  3617. int
  3618. qla24xx_configure_vhba(scsi_qla_host_t *vha)
  3619. {
  3620. int rval = QLA_SUCCESS;
  3621. uint16_t mb[MAILBOX_REGISTER_COUNT];
  3622. struct qla_hw_data *ha = vha->hw;
  3623. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  3624. struct req_que *req;
  3625. struct rsp_que *rsp;
  3626. if (!vha->vp_idx)
  3627. return -EINVAL;
  3628. rval = qla2x00_fw_ready(base_vha);
  3629. if (ql2xmultique_tag)
  3630. req = ha->req_q_map[0];
  3631. else
  3632. req = vha->req;
  3633. rsp = req->rsp;
  3634. if (rval == QLA_SUCCESS) {
  3635. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  3636. qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
  3637. }
  3638. vha->flags.management_server_logged_in = 0;
  3639. /* Login to SNS first */
  3640. ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb, BIT_1);
  3641. if (mb[0] != MBS_COMMAND_COMPLETE) {
  3642. DEBUG15(qla_printk(KERN_INFO, ha,
  3643. "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
  3644. "mb[2]=%x mb[6]=%x mb[7]=%x\n", NPH_SNS,
  3645. mb[0], mb[1], mb[2], mb[6], mb[7]));
  3646. return (QLA_FUNCTION_FAILED);
  3647. }
  3648. atomic_set(&vha->loop_down_timer, 0);
  3649. atomic_set(&vha->loop_state, LOOP_UP);
  3650. set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  3651. set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  3652. rval = qla2x00_loop_resync(base_vha);
  3653. return rval;
  3654. }
  3655. /* 84XX Support **************************************************************/
  3656. static LIST_HEAD(qla_cs84xx_list);
  3657. static DEFINE_MUTEX(qla_cs84xx_mutex);
  3658. static struct qla_chip_state_84xx *
  3659. qla84xx_get_chip(struct scsi_qla_host *vha)
  3660. {
  3661. struct qla_chip_state_84xx *cs84xx;
  3662. struct qla_hw_data *ha = vha->hw;
  3663. mutex_lock(&qla_cs84xx_mutex);
  3664. /* Find any shared 84xx chip. */
  3665. list_for_each_entry(cs84xx, &qla_cs84xx_list, list) {
  3666. if (cs84xx->bus == ha->pdev->bus) {
  3667. kref_get(&cs84xx->kref);
  3668. goto done;
  3669. }
  3670. }
  3671. cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL);
  3672. if (!cs84xx)
  3673. goto done;
  3674. kref_init(&cs84xx->kref);
  3675. spin_lock_init(&cs84xx->access_lock);
  3676. mutex_init(&cs84xx->fw_update_mutex);
  3677. cs84xx->bus = ha->pdev->bus;
  3678. list_add_tail(&cs84xx->list, &qla_cs84xx_list);
  3679. done:
  3680. mutex_unlock(&qla_cs84xx_mutex);
  3681. return cs84xx;
  3682. }
  3683. static void
  3684. __qla84xx_chip_release(struct kref *kref)
  3685. {
  3686. struct qla_chip_state_84xx *cs84xx =
  3687. container_of(kref, struct qla_chip_state_84xx, kref);
  3688. mutex_lock(&qla_cs84xx_mutex);
  3689. list_del(&cs84xx->list);
  3690. mutex_unlock(&qla_cs84xx_mutex);
  3691. kfree(cs84xx);
  3692. }
  3693. void
  3694. qla84xx_put_chip(struct scsi_qla_host *vha)
  3695. {
  3696. struct qla_hw_data *ha = vha->hw;
  3697. if (ha->cs84xx)
  3698. kref_put(&ha->cs84xx->kref, __qla84xx_chip_release);
  3699. }
  3700. static int
  3701. qla84xx_init_chip(scsi_qla_host_t *vha)
  3702. {
  3703. int rval;
  3704. uint16_t status[2];
  3705. struct qla_hw_data *ha = vha->hw;
  3706. mutex_lock(&ha->cs84xx->fw_update_mutex);
  3707. rval = qla84xx_verify_chip(vha, status);
  3708. mutex_unlock(&ha->cs84xx->fw_update_mutex);
  3709. return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED:
  3710. QLA_SUCCESS;
  3711. }
  3712. /* 81XX Support **************************************************************/
  3713. int
  3714. qla81xx_nvram_config(scsi_qla_host_t *vha)
  3715. {
  3716. int rval;
  3717. struct init_cb_81xx *icb;
  3718. struct nvram_81xx *nv;
  3719. uint32_t *dptr;
  3720. uint8_t *dptr1, *dptr2;
  3721. uint32_t chksum;
  3722. uint16_t cnt;
  3723. struct qla_hw_data *ha = vha->hw;
  3724. rval = QLA_SUCCESS;
  3725. icb = (struct init_cb_81xx *)ha->init_cb;
  3726. nv = ha->nvram;
  3727. /* Determine NVRAM starting address. */
  3728. ha->nvram_size = sizeof(struct nvram_81xx);
  3729. ha->vpd_size = FA_NVRAM_VPD_SIZE;
  3730. /* Get VPD data into cache */
  3731. ha->vpd = ha->nvram + VPD_OFFSET;
  3732. ha->isp_ops->read_optrom(vha, ha->vpd, ha->flt_region_vpd << 2,
  3733. ha->vpd_size);
  3734. /* Get NVRAM data into cache and calculate checksum. */
  3735. ha->isp_ops->read_optrom(vha, ha->nvram, ha->flt_region_nvram << 2,
  3736. ha->nvram_size);
  3737. dptr = (uint32_t *)nv;
  3738. for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++)
  3739. chksum += le32_to_cpu(*dptr++);
  3740. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", vha->host_no));
  3741. DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size));
  3742. /* Bad NVRAM data, set defaults parameters. */
  3743. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
  3744. || nv->id[3] != ' ' ||
  3745. nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) {
  3746. /* Reset NVRAM data. */
  3747. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  3748. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  3749. le16_to_cpu(nv->nvram_version));
  3750. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  3751. "invalid -- WWPN) defaults.\n");
  3752. /*
  3753. * Set default initialization control block.
  3754. */
  3755. memset(nv, 0, ha->nvram_size);
  3756. nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION);
  3757. nv->version = __constant_cpu_to_le16(ICB_VERSION);
  3758. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  3759. nv->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  3760. nv->exchange_count = __constant_cpu_to_le16(0);
  3761. nv->port_name[0] = 0x21;
  3762. nv->port_name[1] = 0x00 + ha->port_no;
  3763. nv->port_name[2] = 0x00;
  3764. nv->port_name[3] = 0xe0;
  3765. nv->port_name[4] = 0x8b;
  3766. nv->port_name[5] = 0x1c;
  3767. nv->port_name[6] = 0x55;
  3768. nv->port_name[7] = 0x86;
  3769. nv->node_name[0] = 0x20;
  3770. nv->node_name[1] = 0x00;
  3771. nv->node_name[2] = 0x00;
  3772. nv->node_name[3] = 0xe0;
  3773. nv->node_name[4] = 0x8b;
  3774. nv->node_name[5] = 0x1c;
  3775. nv->node_name[6] = 0x55;
  3776. nv->node_name[7] = 0x86;
  3777. nv->login_retry_count = __constant_cpu_to_le16(8);
  3778. nv->interrupt_delay_timer = __constant_cpu_to_le16(0);
  3779. nv->login_timeout = __constant_cpu_to_le16(0);
  3780. nv->firmware_options_1 =
  3781. __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
  3782. nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4);
  3783. nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12);
  3784. nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13);
  3785. nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10);
  3786. nv->efi_parameters = __constant_cpu_to_le32(0);
  3787. nv->reset_delay = 5;
  3788. nv->max_luns_per_target = __constant_cpu_to_le16(128);
  3789. nv->port_down_retry_count = __constant_cpu_to_le16(30);
  3790. nv->link_down_timeout = __constant_cpu_to_le16(30);
  3791. nv->enode_mac[0] = 0x01;
  3792. nv->enode_mac[1] = 0x02;
  3793. nv->enode_mac[2] = 0x03;
  3794. nv->enode_mac[3] = 0x04;
  3795. nv->enode_mac[4] = 0x05;
  3796. nv->enode_mac[5] = 0x06 + ha->port_no;
  3797. rval = 1;
  3798. }
  3799. /* Reset Initialization control block */
  3800. memset(icb, 0, sizeof(struct init_cb_81xx));
  3801. /* Copy 1st segment. */
  3802. dptr1 = (uint8_t *)icb;
  3803. dptr2 = (uint8_t *)&nv->version;
  3804. cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
  3805. while (cnt--)
  3806. *dptr1++ = *dptr2++;
  3807. icb->login_retry_count = nv->login_retry_count;
  3808. /* Copy 2nd segment. */
  3809. dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
  3810. dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
  3811. cnt = (uint8_t *)&icb->reserved_5 -
  3812. (uint8_t *)&icb->interrupt_delay_timer;
  3813. while (cnt--)
  3814. *dptr1++ = *dptr2++;
  3815. memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac));
  3816. /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */
  3817. if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) {
  3818. icb->enode_mac[0] = 0x01;
  3819. icb->enode_mac[1] = 0x02;
  3820. icb->enode_mac[2] = 0x03;
  3821. icb->enode_mac[3] = 0x04;
  3822. icb->enode_mac[4] = 0x05;
  3823. icb->enode_mac[5] = 0x06 + ha->port_no;
  3824. }
  3825. /* Use extended-initialization control block. */
  3826. memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb));
  3827. /*
  3828. * Setup driver NVRAM options.
  3829. */
  3830. qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
  3831. "QLE81XX");
  3832. /* Use alternate WWN? */
  3833. if (nv->host_p & __constant_cpu_to_le32(BIT_15)) {
  3834. memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
  3835. memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
  3836. }
  3837. /* Prepare nodename */
  3838. if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) {
  3839. /*
  3840. * Firmware will apply the following mask if the nodename was
  3841. * not provided.
  3842. */
  3843. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  3844. icb->node_name[0] &= 0xF0;
  3845. }
  3846. /* Set host adapter parameters. */
  3847. ha->flags.disable_risc_code_load = 0;
  3848. ha->flags.enable_lip_reset = 0;
  3849. ha->flags.enable_lip_full_login =
  3850. le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
  3851. ha->flags.enable_target_reset =
  3852. le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
  3853. ha->flags.enable_led_scheme = 0;
  3854. ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
  3855. ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
  3856. (BIT_6 | BIT_5 | BIT_4)) >> 4;
  3857. /* save HBA serial number */
  3858. ha->serial0 = icb->port_name[5];
  3859. ha->serial1 = icb->port_name[6];
  3860. ha->serial2 = icb->port_name[7];
  3861. memcpy(vha->node_name, icb->node_name, WWN_SIZE);
  3862. memcpy(vha->port_name, icb->port_name, WWN_SIZE);
  3863. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  3864. ha->retry_count = le16_to_cpu(nv->login_retry_count);
  3865. /* Set minimum login_timeout to 4 seconds. */
  3866. if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
  3867. nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
  3868. if (le16_to_cpu(nv->login_timeout) < 4)
  3869. nv->login_timeout = __constant_cpu_to_le16(4);
  3870. ha->login_timeout = le16_to_cpu(nv->login_timeout);
  3871. icb->login_timeout = nv->login_timeout;
  3872. /* Set minimum RATOV to 100 tenths of a second. */
  3873. ha->r_a_tov = 100;
  3874. ha->loop_reset_delay = nv->reset_delay;
  3875. /* Link Down Timeout = 0:
  3876. *
  3877. * When Port Down timer expires we will start returning
  3878. * I/O's to OS with "DID_NO_CONNECT".
  3879. *
  3880. * Link Down Timeout != 0:
  3881. *
  3882. * The driver waits for the link to come up after link down
  3883. * before returning I/Os to OS with "DID_NO_CONNECT".
  3884. */
  3885. if (le16_to_cpu(nv->link_down_timeout) == 0) {
  3886. ha->loop_down_abort_time =
  3887. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  3888. } else {
  3889. ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
  3890. ha->loop_down_abort_time =
  3891. (LOOP_DOWN_TIME - ha->link_down_timeout);
  3892. }
  3893. /* Need enough time to try and get the port back. */
  3894. ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
  3895. if (qlport_down_retry)
  3896. ha->port_down_retry_count = qlport_down_retry;
  3897. /* Set login_retry_count */
  3898. ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
  3899. if (ha->port_down_retry_count ==
  3900. le16_to_cpu(nv->port_down_retry_count) &&
  3901. ha->port_down_retry_count > 3)
  3902. ha->login_retry_count = ha->port_down_retry_count;
  3903. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  3904. ha->login_retry_count = ha->port_down_retry_count;
  3905. if (ql2xloginretrycount)
  3906. ha->login_retry_count = ql2xloginretrycount;
  3907. /* Enable ZIO. */
  3908. if (!vha->flags.init_done) {
  3909. ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
  3910. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  3911. ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
  3912. le16_to_cpu(icb->interrupt_delay_timer): 2;
  3913. }
  3914. icb->firmware_options_2 &= __constant_cpu_to_le32(
  3915. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
  3916. vha->flags.process_response_queue = 0;
  3917. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  3918. ha->zio_mode = QLA_ZIO_MODE_6;
  3919. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer delay "
  3920. "(%d us).\n", vha->host_no, ha->zio_mode,
  3921. ha->zio_timer * 100));
  3922. qla_printk(KERN_INFO, ha,
  3923. "ZIO mode %d enabled; timer delay (%d us).\n",
  3924. ha->zio_mode, ha->zio_timer * 100);
  3925. icb->firmware_options_2 |= cpu_to_le32(
  3926. (uint32_t)ha->zio_mode);
  3927. icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
  3928. vha->flags.process_response_queue = 1;
  3929. }
  3930. if (rval) {
  3931. DEBUG2_3(printk(KERN_WARNING
  3932. "scsi(%ld): NVRAM configuration failed!\n", vha->host_no));
  3933. }
  3934. return (rval);
  3935. }
  3936. void
  3937. qla81xx_update_fw_options(scsi_qla_host_t *ha)
  3938. {
  3939. }