qd65xx.c 10 KB

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  1. /*
  2. * Copyright (C) 1996-2001 Linus Torvalds & author (see below)
  3. */
  4. /*
  5. * Version 0.03 Cleaned auto-tune, added probe
  6. * Version 0.04 Added second channel tuning
  7. * Version 0.05 Enhanced tuning ; added qd6500 support
  8. * Version 0.06 Added dos driver's list
  9. * Version 0.07 Second channel bug fix
  10. *
  11. * QDI QD6500/QD6580 EIDE controller fast support
  12. *
  13. * To activate controller support, use "ide0=qd65xx"
  14. */
  15. /*
  16. * Rewritten from the work of Colten Edwards <pje120@cs.usask.ca> by
  17. * Samuel Thibault <samuel.thibault@ens-lyon.org>
  18. */
  19. #include <linux/module.h>
  20. #include <linux/types.h>
  21. #include <linux/kernel.h>
  22. #include <linux/delay.h>
  23. #include <linux/timer.h>
  24. #include <linux/mm.h>
  25. #include <linux/ioport.h>
  26. #include <linux/blkdev.h>
  27. #include <linux/ide.h>
  28. #include <linux/init.h>
  29. #include <asm/system.h>
  30. #include <asm/io.h>
  31. #define DRV_NAME "qd65xx"
  32. #include "qd65xx.h"
  33. /*
  34. * I/O ports are 0x30-0x31 (and 0x32-0x33 for qd6580)
  35. * or 0xb0-0xb1 (and 0xb2-0xb3 for qd6580)
  36. * -- qd6500 is a single IDE interface
  37. * -- qd6580 is a dual IDE interface
  38. *
  39. * More research on qd6580 being done by willmore@cig.mot.com (David)
  40. * More Information given by Petr Soucek (petr@ryston.cz)
  41. * http://www.ryston.cz/petr/vlb
  42. */
  43. /*
  44. * base: Timer1
  45. *
  46. *
  47. * base+0x01: Config (R/O)
  48. *
  49. * bit 0: ide baseport: 1 = 0x1f0 ; 0 = 0x170 (only useful for qd6500)
  50. * bit 1: qd65xx baseport: 1 = 0xb0 ; 0 = 0x30
  51. * bit 2: ID3: bus speed: 1 = <=33MHz ; 0 = >33MHz
  52. * bit 3: qd6500: 1 = disabled, 0 = enabled
  53. * qd6580: 1
  54. * upper nibble:
  55. * qd6500: 1100
  56. * qd6580: either 1010 or 0101
  57. *
  58. *
  59. * base+0x02: Timer2 (qd6580 only)
  60. *
  61. *
  62. * base+0x03: Control (qd6580 only)
  63. *
  64. * bits 0-3 must always be set 1
  65. * bit 4 must be set 1, but is set 0 by dos driver while measuring vlb clock
  66. * bit 0 : 1 = Only primary port enabled : channel 0 for hda, channel 1 for hdb
  67. * 0 = Primary and Secondary ports enabled : channel 0 for hda & hdb
  68. * channel 1 for hdc & hdd
  69. * bit 1 : 1 = only disks on primary port
  70. * 0 = disks & ATAPI devices on primary port
  71. * bit 2-4 : always 0
  72. * bit 5 : status, but of what ?
  73. * bit 6 : always set 1 by dos driver
  74. * bit 7 : set 1 for non-ATAPI devices on primary port
  75. * (maybe read-ahead and post-write buffer ?)
  76. */
  77. static int timings[4]={-1,-1,-1,-1}; /* stores current timing for each timer */
  78. /*
  79. * qd65xx_select:
  80. *
  81. * This routine is invoked to prepare for access to a given drive.
  82. */
  83. static void qd65xx_select(ide_drive_t *drive)
  84. {
  85. u8 index = (( (QD_TIMREG(drive)) & 0x80 ) >> 7) |
  86. (QD_TIMREG(drive) & 0x02);
  87. if (timings[index] != QD_TIMING(drive))
  88. outb(timings[index] = QD_TIMING(drive), QD_TIMREG(drive));
  89. }
  90. /*
  91. * qd6500_compute_timing
  92. *
  93. * computes the timing value where
  94. * lower nibble represents active time, in count of VLB clocks
  95. * upper nibble represents recovery time, in count of VLB clocks
  96. */
  97. static u8 qd6500_compute_timing (ide_hwif_t *hwif, int active_time, int recovery_time)
  98. {
  99. int clk = ide_vlb_clk ? ide_vlb_clk : 50;
  100. u8 act_cyc, rec_cyc;
  101. if (clk <= 33) {
  102. act_cyc = 9 - IDE_IN(active_time * clk / 1000 + 1, 2, 9);
  103. rec_cyc = 15 - IDE_IN(recovery_time * clk / 1000 + 1, 0, 15);
  104. } else {
  105. act_cyc = 8 - IDE_IN(active_time * clk / 1000 + 1, 1, 8);
  106. rec_cyc = 18 - IDE_IN(recovery_time * clk / 1000 + 1, 3, 18);
  107. }
  108. return (rec_cyc << 4) | 0x08 | act_cyc;
  109. }
  110. /*
  111. * qd6580_compute_timing
  112. *
  113. * idem for qd6580
  114. */
  115. static u8 qd6580_compute_timing (int active_time, int recovery_time)
  116. {
  117. int clk = ide_vlb_clk ? ide_vlb_clk : 50;
  118. u8 act_cyc, rec_cyc;
  119. act_cyc = 17 - IDE_IN(active_time * clk / 1000 + 1, 2, 17);
  120. rec_cyc = 15 - IDE_IN(recovery_time * clk / 1000 + 1, 2, 15);
  121. return (rec_cyc << 4) | act_cyc;
  122. }
  123. /*
  124. * qd_find_disk_type
  125. *
  126. * tries to find timing from dos driver's table
  127. */
  128. static int qd_find_disk_type (ide_drive_t *drive,
  129. int *active_time, int *recovery_time)
  130. {
  131. struct qd65xx_timing_s *p;
  132. char *m = (char *)&drive->id[ATA_ID_PROD];
  133. char model[ATA_ID_PROD_LEN];
  134. if (*m == 0)
  135. return 0;
  136. strncpy(model, m, ATA_ID_PROD_LEN);
  137. ide_fixstring(model, ATA_ID_PROD_LEN, 1); /* byte-swap */
  138. for (p = qd65xx_timing ; p->offset != -1 ; p++) {
  139. if (!strncmp(p->model, model+p->offset, 4)) {
  140. printk(KERN_DEBUG "%s: listed !\n", drive->name);
  141. *active_time = p->active;
  142. *recovery_time = p->recovery;
  143. return 1;
  144. }
  145. }
  146. return 0;
  147. }
  148. /*
  149. * qd_set_timing:
  150. *
  151. * records the timing
  152. */
  153. static void qd_set_timing (ide_drive_t *drive, u8 timing)
  154. {
  155. drive->drive_data &= 0xff00;
  156. drive->drive_data |= timing;
  157. printk(KERN_DEBUG "%s: %#x\n", drive->name, timing);
  158. }
  159. static void qd6500_set_pio_mode(ide_drive_t *drive, const u8 pio)
  160. {
  161. u16 *id = drive->id;
  162. int active_time = 175;
  163. int recovery_time = 415; /* worst case values from the dos driver */
  164. /*
  165. * FIXME: use "pio" value
  166. */
  167. if (!qd_find_disk_type(drive, &active_time, &recovery_time) &&
  168. (id[ATA_ID_OLD_PIO_MODES] & 0xff) && (id[ATA_ID_FIELD_VALID] & 2) &&
  169. id[ATA_ID_EIDE_PIO] >= 240) {
  170. printk(KERN_INFO "%s: PIO mode%d\n", drive->name,
  171. id[ATA_ID_OLD_PIO_MODES] & 0xff);
  172. active_time = 110;
  173. recovery_time = drive->id[ATA_ID_EIDE_PIO] - 120;
  174. }
  175. qd_set_timing(drive, qd6500_compute_timing(drive->hwif,
  176. active_time, recovery_time));
  177. }
  178. static void qd6580_set_pio_mode(ide_drive_t *drive, const u8 pio)
  179. {
  180. ide_hwif_t *hwif = drive->hwif;
  181. struct ide_timing *t = ide_timing_find_mode(XFER_PIO_0 + pio);
  182. unsigned int cycle_time;
  183. int active_time = 175;
  184. int recovery_time = 415; /* worst case values from the dos driver */
  185. u8 base = (hwif->config_data & 0xff00) >> 8;
  186. if (drive->id && !qd_find_disk_type(drive, &active_time, &recovery_time)) {
  187. cycle_time = ide_pio_cycle_time(drive, pio);
  188. switch (pio) {
  189. case 0: break;
  190. case 3:
  191. if (cycle_time >= 110) {
  192. active_time = 86;
  193. recovery_time = cycle_time - 102;
  194. } else
  195. printk(KERN_WARNING "%s: Strange recovery time !\n",drive->name);
  196. break;
  197. case 4:
  198. if (cycle_time >= 69) {
  199. active_time = 70;
  200. recovery_time = cycle_time - 61;
  201. } else
  202. printk(KERN_WARNING "%s: Strange recovery time !\n",drive->name);
  203. break;
  204. default:
  205. if (cycle_time >= 180) {
  206. active_time = 110;
  207. recovery_time = cycle_time - 120;
  208. } else {
  209. active_time = t->active;
  210. recovery_time = cycle_time - active_time;
  211. }
  212. }
  213. printk(KERN_INFO "%s: PIO mode%d\n", drive->name,pio);
  214. }
  215. if (!hwif->channel && drive->media != ide_disk) {
  216. outb(0x5f, QD_CONTROL_PORT);
  217. printk(KERN_WARNING "%s: ATAPI: disabled read-ahead FIFO "
  218. "and post-write buffer on %s.\n",
  219. drive->name, hwif->name);
  220. }
  221. qd_set_timing(drive, qd6580_compute_timing(active_time, recovery_time));
  222. }
  223. /*
  224. * qd_testreg
  225. *
  226. * tests if the given port is a register
  227. */
  228. static int __init qd_testreg(int port)
  229. {
  230. unsigned long flags;
  231. u8 savereg, readreg;
  232. local_irq_save(flags);
  233. savereg = inb_p(port);
  234. outb_p(QD_TESTVAL, port); /* safe value */
  235. readreg = inb_p(port);
  236. outb(savereg, port);
  237. local_irq_restore(flags);
  238. if (savereg == QD_TESTVAL) {
  239. printk(KERN_ERR "Outch ! the probe for qd65xx isn't reliable !\n");
  240. printk(KERN_ERR "Please contact maintainers to tell about your hardware\n");
  241. printk(KERN_ERR "Assuming qd65xx is not present.\n");
  242. return 1;
  243. }
  244. return (readreg != QD_TESTVAL);
  245. }
  246. static void __init qd6500_init_dev(ide_drive_t *drive)
  247. {
  248. ide_hwif_t *hwif = drive->hwif;
  249. u8 base = (hwif->config_data & 0xff00) >> 8;
  250. u8 config = QD_CONFIG(hwif);
  251. drive->drive_data = QD6500_DEF_DATA;
  252. }
  253. static void __init qd6580_init_dev(ide_drive_t *drive)
  254. {
  255. ide_hwif_t *hwif = drive->hwif;
  256. u16 t1, t2;
  257. u8 base = (hwif->config_data & 0xff00) >> 8;
  258. u8 config = QD_CONFIG(hwif);
  259. if (hwif->host_flags & IDE_HFLAG_SINGLE) {
  260. t1 = QD6580_DEF_DATA;
  261. t2 = QD6580_DEF_DATA2;
  262. } else
  263. t2 = t1 = hwif->channel ? QD6580_DEF_DATA2 : QD6580_DEF_DATA;
  264. drive->drive_data = (drive->dn & 1) ? t2 : t1;
  265. }
  266. static const struct ide_port_ops qd6500_port_ops = {
  267. .init_dev = qd6500_init_dev,
  268. .set_pio_mode = qd6500_set_pio_mode,
  269. .selectproc = qd65xx_select,
  270. };
  271. static const struct ide_port_ops qd6580_port_ops = {
  272. .init_dev = qd6580_init_dev,
  273. .set_pio_mode = qd6580_set_pio_mode,
  274. .selectproc = qd65xx_select,
  275. };
  276. static const struct ide_port_info qd65xx_port_info __initdata = {
  277. .name = DRV_NAME,
  278. .chipset = ide_qd65xx,
  279. .host_flags = IDE_HFLAG_IO_32BIT |
  280. IDE_HFLAG_NO_DMA,
  281. .pio_mask = ATA_PIO4,
  282. };
  283. /*
  284. * qd_probe:
  285. *
  286. * looks at the specified baseport, and if qd found, registers & initialises it
  287. * return 1 if another qd may be probed
  288. */
  289. static int __init qd_probe(int base)
  290. {
  291. int rc;
  292. u8 config, unit, control;
  293. struct ide_port_info d = qd65xx_port_info;
  294. config = inb(QD_CONFIG_PORT);
  295. if (! ((config & QD_CONFIG_BASEPORT) >> 1 == (base == 0xb0)) )
  296. return -ENODEV;
  297. unit = ! (config & QD_CONFIG_IDE_BASEPORT);
  298. if (unit)
  299. d.host_flags |= IDE_HFLAG_QD_2ND_PORT;
  300. switch (config & 0xf0) {
  301. case QD_CONFIG_QD6500:
  302. if (qd_testreg(base))
  303. return -ENODEV; /* bad register */
  304. if (config & QD_CONFIG_DISABLED) {
  305. printk(KERN_WARNING "qd6500 is disabled !\n");
  306. return -ENODEV;
  307. }
  308. printk(KERN_NOTICE "qd6500 at %#x\n", base);
  309. printk(KERN_DEBUG "qd6500: config=%#x, ID3=%u\n",
  310. config, QD_ID3);
  311. d.port_ops = &qd6500_port_ops;
  312. d.host_flags |= IDE_HFLAG_SINGLE;
  313. break;
  314. case QD_CONFIG_QD6580_A:
  315. case QD_CONFIG_QD6580_B:
  316. if (qd_testreg(base) || qd_testreg(base + 0x02))
  317. return -ENODEV; /* bad registers */
  318. control = inb(QD_CONTROL_PORT);
  319. printk(KERN_NOTICE "qd6580 at %#x\n", base);
  320. printk(KERN_DEBUG "qd6580: config=%#x, control=%#x, ID3=%u\n",
  321. config, control, QD_ID3);
  322. outb(QD_DEF_CONTR, QD_CONTROL_PORT);
  323. d.port_ops = &qd6580_port_ops;
  324. if (control & QD_CONTR_SEC_DISABLED)
  325. d.host_flags |= IDE_HFLAG_SINGLE;
  326. printk(KERN_INFO "qd6580: %s IDE board\n",
  327. (control & QD_CONTR_SEC_DISABLED) ? "single" : "dual");
  328. break;
  329. default:
  330. return -ENODEV;
  331. }
  332. rc = ide_legacy_device_add(&d, (base << 8) | config);
  333. if (d.host_flags & IDE_HFLAG_SINGLE)
  334. return (rc == 0) ? 1 : rc;
  335. return rc;
  336. }
  337. static int probe_qd65xx;
  338. module_param_named(probe, probe_qd65xx, bool, 0);
  339. MODULE_PARM_DESC(probe, "probe for QD65xx chipsets");
  340. static int __init qd65xx_init(void)
  341. {
  342. int rc1, rc2 = -ENODEV;
  343. if (probe_qd65xx == 0)
  344. return -ENODEV;
  345. rc1 = qd_probe(0x30);
  346. if (rc1)
  347. rc2 = qd_probe(0xb0);
  348. if (rc1 < 0 && rc2 < 0)
  349. return -ENODEV;
  350. return 0;
  351. }
  352. module_init(qd65xx_init);
  353. MODULE_AUTHOR("Samuel Thibault");
  354. MODULE_DESCRIPTION("support of qd65xx vlb ide chipset");
  355. MODULE_LICENSE("GPL");