pcm990-baseboard.c 12 KB

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  1. /*
  2. * arch/arm/mach-pxa/pcm990-baseboard.c
  3. * Support for the Phytec phyCORE-PXA270 Development Platform (PCM-990).
  4. *
  5. * Refer
  6. * http://www.phytec.com/products/rdk/ARM-XScale/phyCORE-XScale-PXA270.html
  7. * for additional hardware info
  8. *
  9. * Author: Juergen Kilb
  10. * Created: April 05, 2005
  11. * Copyright: Phytec Messtechnik GmbH
  12. * e-Mail: armlinux@phytec.de
  13. *
  14. * based on Intel Mainstone Board
  15. *
  16. * Copyright 2007 Juergen Beisert @ Pengutronix (j.beisert@pengutronix.de)
  17. *
  18. * This program is free software; you can redistribute it and/or modify
  19. * it under the terms of the GNU General Public License version 2 as
  20. * published by the Free Software Foundation.
  21. */
  22. #include <linux/irq.h>
  23. #include <linux/platform_device.h>
  24. #include <linux/i2c.h>
  25. #include <linux/pwm_backlight.h>
  26. #include <media/soc_camera.h>
  27. #include <asm/gpio.h>
  28. #include <mach/i2c.h>
  29. #include <mach/camera.h>
  30. #include <asm/mach/map.h>
  31. #include <mach/pxa-regs.h>
  32. #include <mach/audio.h>
  33. #include <mach/mmc.h>
  34. #include <mach/ohci.h>
  35. #include <mach/pcm990_baseboard.h>
  36. #include <mach/pxafb.h>
  37. #include <mach/mfp-pxa27x.h>
  38. #include "devices.h"
  39. #include "generic.h"
  40. static unsigned long pcm990_pin_config[] __initdata = {
  41. /* MMC */
  42. GPIO32_MMC_CLK,
  43. GPIO112_MMC_CMD,
  44. GPIO92_MMC_DAT_0,
  45. GPIO109_MMC_DAT_1,
  46. GPIO110_MMC_DAT_2,
  47. GPIO111_MMC_DAT_3,
  48. /* USB */
  49. GPIO88_USBH1_PWR,
  50. GPIO89_USBH1_PEN,
  51. /* PWM0 */
  52. GPIO16_PWM0_OUT,
  53. /* I2C */
  54. GPIO117_I2C_SCL,
  55. GPIO118_I2C_SDA,
  56. };
  57. /*
  58. * pcm990_lcd_power - control power supply to the LCD
  59. * @on: 0 = switch off, 1 = switch on
  60. *
  61. * Called by the pxafb driver
  62. */
  63. #ifndef CONFIG_PCM990_DISPLAY_NONE
  64. static void pcm990_lcd_power(int on, struct fb_var_screeninfo *var)
  65. {
  66. if (on) {
  67. /* enable LCD-Latches
  68. * power on LCD
  69. */
  70. __PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG3) =
  71. PCM990_CTRL_LCDPWR + PCM990_CTRL_LCDON;
  72. } else {
  73. /* disable LCD-Latches
  74. * power off LCD
  75. */
  76. __PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG3) = 0x00;
  77. }
  78. }
  79. #endif
  80. #if defined(CONFIG_PCM990_DISPLAY_SHARP)
  81. static struct pxafb_mode_info fb_info_sharp_lq084v1dg21 = {
  82. .pixclock = 28000,
  83. .xres = 640,
  84. .yres = 480,
  85. .bpp = 16,
  86. .hsync_len = 20,
  87. .left_margin = 103,
  88. .right_margin = 47,
  89. .vsync_len = 6,
  90. .upper_margin = 28,
  91. .lower_margin = 5,
  92. .sync = 0,
  93. .cmap_greyscale = 0,
  94. };
  95. static struct pxafb_mach_info pcm990_fbinfo __initdata = {
  96. .modes = &fb_info_sharp_lq084v1dg21,
  97. .num_modes = 1,
  98. .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
  99. .pxafb_lcd_power = pcm990_lcd_power,
  100. };
  101. #elif defined(CONFIG_PCM990_DISPLAY_NEC)
  102. struct pxafb_mode_info fb_info_nec_nl6448bc20_18d = {
  103. .pixclock = 39720,
  104. .xres = 640,
  105. .yres = 480,
  106. .bpp = 16,
  107. .hsync_len = 32,
  108. .left_margin = 16,
  109. .right_margin = 48,
  110. .vsync_len = 2,
  111. .upper_margin = 12,
  112. .lower_margin = 17,
  113. .sync = 0,
  114. .cmap_greyscale = 0,
  115. };
  116. static struct pxafb_mach_info pcm990_fbinfo __initdata = {
  117. .modes = &fb_info_nec_nl6448bc20_18d,
  118. .num_modes = 1,
  119. .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
  120. .pxafb_lcd_power = pcm990_lcd_power,
  121. };
  122. #endif
  123. static struct platform_pwm_backlight_data pcm990_backlight_data = {
  124. .pwm_id = 0,
  125. .max_brightness = 1023,
  126. .dft_brightness = 1023,
  127. .pwm_period_ns = 78770,
  128. };
  129. static struct platform_device pcm990_backlight_device = {
  130. .name = "pwm-backlight",
  131. .dev = {
  132. .parent = &pxa27x_device_pwm0.dev,
  133. .platform_data = &pcm990_backlight_data,
  134. },
  135. };
  136. /*
  137. * The PCM-990 development baseboard uses PCM-027's hardware in the
  138. * following way:
  139. *
  140. * - LCD support is in use
  141. * - GPIO16 is output for back light on/off with PWM
  142. * - GPIO58 ... GPIO73 are outputs for display data
  143. * - GPIO74 is output output for LCDFCLK
  144. * - GPIO75 is output for LCDLCLK
  145. * - GPIO76 is output for LCDPCLK
  146. * - GPIO77 is output for LCDBIAS
  147. * - MMC support is in use
  148. * - GPIO32 is output for MMCCLK
  149. * - GPIO92 is MMDAT0
  150. * - GPIO109 is MMDAT1
  151. * - GPIO110 is MMCS0
  152. * - GPIO111 is MMCS1
  153. * - GPIO112 is MMCMD
  154. * - IDE/CF card is in use
  155. * - GPIO48 is output /POE
  156. * - GPIO49 is output /PWE
  157. * - GPIO50 is output /PIOR
  158. * - GPIO51 is output /PIOW
  159. * - GPIO54 is output /PCE2
  160. * - GPIO55 is output /PREG
  161. * - GPIO56 is input /PWAIT
  162. * - GPIO57 is output /PIOS16
  163. * - GPIO79 is output PSKTSEL
  164. * - GPIO85 is output /PCE1
  165. * - FFUART is in use
  166. * - GPIO34 is input FFRXD
  167. * - GPIO35 is input FFCTS
  168. * - GPIO36 is input FFDCD
  169. * - GPIO37 is input FFDSR
  170. * - GPIO38 is input FFRI
  171. * - GPIO39 is output FFTXD
  172. * - GPIO40 is output FFDTR
  173. * - GPIO41 is output FFRTS
  174. * - BTUART is in use
  175. * - GPIO42 is input BTRXD
  176. * - GPIO43 is output BTTXD
  177. * - GPIO44 is input BTCTS
  178. * - GPIO45 is output BTRTS
  179. * - IRUART is in use
  180. * - GPIO46 is input STDRXD
  181. * - GPIO47 is output STDTXD
  182. * - AC97 is in use*)
  183. * - GPIO28 is input AC97CLK
  184. * - GPIO29 is input AC97DatIn
  185. * - GPIO30 is output AC97DatO
  186. * - GPIO31 is output AC97SYNC
  187. * - GPIO113 is output AC97_RESET
  188. * - SSP is in use
  189. * - GPIO23 is output SSPSCLK
  190. * - GPIO24 is output chip select to Max7301
  191. * - GPIO25 is output SSPTXD
  192. * - GPIO26 is input SSPRXD
  193. * - GPIO27 is input for Max7301 IRQ
  194. * - GPIO53 is input SSPSYSCLK
  195. * - SSP3 is in use
  196. * - GPIO81 is output SSPTXD3
  197. * - GPIO82 is input SSPRXD3
  198. * - GPIO83 is output SSPSFRM
  199. * - GPIO84 is output SSPCLK3
  200. *
  201. * Otherwise claimed GPIOs:
  202. * GPIO1 -> IRQ from user switch
  203. * GPIO9 -> IRQ from power management
  204. * GPIO10 -> IRQ from WML9712 AC97 controller
  205. * GPIO11 -> IRQ from IDE controller
  206. * GPIO12 -> IRQ from CF controller
  207. * GPIO13 -> IRQ from CF controller
  208. * GPIO14 -> GPIO free
  209. * GPIO15 -> /CS1 selects baseboard's Control CPLD (U7, 16 bit wide data path)
  210. * GPIO19 -> GPIO free
  211. * GPIO20 -> /SDCS2
  212. * GPIO21 -> /CS3 PC card socket select
  213. * GPIO33 -> /CS5 network controller select
  214. * GPIO78 -> /CS2 (16 bit wide data path)
  215. * GPIO80 -> /CS4 (16 bit wide data path)
  216. * GPIO86 -> GPIO free
  217. * GPIO87 -> GPIO free
  218. * GPIO90 -> LED0 on CPU module
  219. * GPIO91 -> LED1 on CPI module
  220. * GPIO117 -> SCL
  221. * GPIO118 -> SDA
  222. */
  223. static unsigned long pcm990_irq_enabled;
  224. static void pcm990_mask_ack_irq(unsigned int irq)
  225. {
  226. int pcm990_irq = (irq - PCM027_IRQ(0));
  227. PCM990_INTMSKENA = (pcm990_irq_enabled &= ~(1 << pcm990_irq));
  228. }
  229. static void pcm990_unmask_irq(unsigned int irq)
  230. {
  231. int pcm990_irq = (irq - PCM027_IRQ(0));
  232. /* the irq can be acknowledged only if deasserted, so it's done here */
  233. PCM990_INTSETCLR |= 1 << pcm990_irq;
  234. PCM990_INTMSKENA = (pcm990_irq_enabled |= (1 << pcm990_irq));
  235. }
  236. static struct irq_chip pcm990_irq_chip = {
  237. .mask_ack = pcm990_mask_ack_irq,
  238. .unmask = pcm990_unmask_irq,
  239. };
  240. static void pcm990_irq_handler(unsigned int irq, struct irq_desc *desc)
  241. {
  242. unsigned long pending = (~PCM990_INTSETCLR) & pcm990_irq_enabled;
  243. do {
  244. GEDR(PCM990_CTRL_INT_IRQ_GPIO) =
  245. GPIO_bit(PCM990_CTRL_INT_IRQ_GPIO);
  246. if (likely(pending)) {
  247. irq = PCM027_IRQ(0) + __ffs(pending);
  248. generic_handle_irq(irq);
  249. }
  250. pending = (~PCM990_INTSETCLR) & pcm990_irq_enabled;
  251. } while (pending);
  252. }
  253. static void __init pcm990_init_irq(void)
  254. {
  255. int irq;
  256. /* setup extra PCM990 irqs */
  257. for (irq = PCM027_IRQ(0); irq <= PCM027_IRQ(3); irq++) {
  258. set_irq_chip(irq, &pcm990_irq_chip);
  259. set_irq_handler(irq, handle_level_irq);
  260. set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
  261. }
  262. PCM990_INTMSKENA = 0x00; /* disable all Interrupts */
  263. PCM990_INTSETCLR = 0xFF;
  264. set_irq_chained_handler(PCM990_CTRL_INT_IRQ, pcm990_irq_handler);
  265. set_irq_type(PCM990_CTRL_INT_IRQ, PCM990_CTRL_INT_IRQ_EDGE);
  266. }
  267. static int pcm990_mci_init(struct device *dev, irq_handler_t mci_detect_int,
  268. void *data)
  269. {
  270. int err;
  271. err = request_irq(PCM027_MMCDET_IRQ, mci_detect_int, IRQF_DISABLED,
  272. "MMC card detect", data);
  273. if (err)
  274. printk(KERN_ERR "pcm990_mci_init: MMC/SD: can't request MMC "
  275. "card detect IRQ\n");
  276. return err;
  277. }
  278. static void pcm990_mci_setpower(struct device *dev, unsigned int vdd)
  279. {
  280. struct pxamci_platform_data *p_d = dev->platform_data;
  281. if ((1 << vdd) & p_d->ocr_mask)
  282. __PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG5) =
  283. PCM990_CTRL_MMC2PWR;
  284. else
  285. __PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG5) =
  286. ~PCM990_CTRL_MMC2PWR;
  287. }
  288. static void pcm990_mci_exit(struct device *dev, void *data)
  289. {
  290. free_irq(PCM027_MMCDET_IRQ, data);
  291. }
  292. #define MSECS_PER_JIFFY (1000/HZ)
  293. static struct pxamci_platform_data pcm990_mci_platform_data = {
  294. .detect_delay = 250 / MSECS_PER_JIFFY,
  295. .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
  296. .init = pcm990_mci_init,
  297. .setpower = pcm990_mci_setpower,
  298. .exit = pcm990_mci_exit,
  299. };
  300. static struct pxaohci_platform_data pcm990_ohci_platform_data = {
  301. .port_mode = PMM_PERPORT_MODE,
  302. .flags = ENABLE_PORT1 | POWER_CONTROL_LOW | POWER_SENSE_LOW,
  303. .power_on_delay = 10,
  304. };
  305. /*
  306. * PXA27x Camera specific stuff
  307. */
  308. #if defined(CONFIG_VIDEO_PXA27x) || defined(CONFIG_VIDEO_PXA27x_MODULE)
  309. static unsigned long pcm990_camera_pin_config[] = {
  310. /* CIF */
  311. GPIO98_CIF_DD_0,
  312. GPIO105_CIF_DD_1,
  313. GPIO104_CIF_DD_2,
  314. GPIO103_CIF_DD_3,
  315. GPIO95_CIF_DD_4,
  316. GPIO94_CIF_DD_5,
  317. GPIO93_CIF_DD_6,
  318. GPIO108_CIF_DD_7,
  319. GPIO107_CIF_DD_8,
  320. GPIO106_CIF_DD_9,
  321. GPIO42_CIF_MCLK,
  322. GPIO45_CIF_PCLK,
  323. GPIO43_CIF_FV,
  324. GPIO44_CIF_LV,
  325. };
  326. static int pcm990_pxacamera_init(struct device *dev)
  327. {
  328. pxa2xx_mfp_config(ARRAY_AND_SIZE(pcm990_camera_pin_config));
  329. return 0;
  330. }
  331. /*
  332. * CICR4: PCLK_EN: Pixel clock is supplied by the sensor
  333. * MCLK_EN: Master clock is generated by PXA
  334. * PCP: Data sampled on the falling edge of pixel clock
  335. */
  336. struct pxacamera_platform_data pcm990_pxacamera_platform_data = {
  337. .init = pcm990_pxacamera_init,
  338. .flags = PXA_CAMERA_MASTER | PXA_CAMERA_DATAWIDTH_8 | PXA_CAMERA_DATAWIDTH_10 |
  339. PXA_CAMERA_PCLK_EN | PXA_CAMERA_MCLK_EN/* | PXA_CAMERA_PCP*/,
  340. .mclk_10khz = 1000,
  341. };
  342. #include <linux/i2c/pca953x.h>
  343. static struct pca953x_platform_data pca9536_data = {
  344. .gpio_base = NR_BUILTIN_GPIO + 1,
  345. };
  346. static struct soc_camera_link iclink[] = {
  347. {
  348. .bus_id = 0, /* Must match with the camera ID above */
  349. .gpio = NR_BUILTIN_GPIO + 1,
  350. }, {
  351. .bus_id = 0, /* Must match with the camera ID above */
  352. .gpio = -ENXIO,
  353. }
  354. };
  355. /* Board I2C devices. */
  356. static struct i2c_board_info __initdata pcm990_i2c_devices[] = {
  357. {
  358. /* Must initialize before the camera(s) */
  359. I2C_BOARD_INFO("pca9536", 0x41),
  360. .platform_data = &pca9536_data,
  361. }, {
  362. I2C_BOARD_INFO("mt9v022", 0x48),
  363. .platform_data = &iclink[0], /* With extender */
  364. }, {
  365. I2C_BOARD_INFO("mt9m001", 0x5d),
  366. .platform_data = &iclink[0], /* With extender */
  367. },
  368. };
  369. #endif /* CONFIG_VIDEO_PXA27x ||CONFIG_VIDEO_PXA27x_MODULE */
  370. /*
  371. * enable generic access to the base board control CPLDs U6 and U7
  372. */
  373. static struct map_desc pcm990_io_desc[] __initdata = {
  374. {
  375. .virtual = PCM990_CTRL_BASE,
  376. .pfn = __phys_to_pfn(PCM990_CTRL_PHYS),
  377. .length = PCM990_CTRL_SIZE,
  378. .type = MT_DEVICE /* CPLD */
  379. }, {
  380. .virtual = PCM990_CF_PLD_BASE,
  381. .pfn = __phys_to_pfn(PCM990_CF_PLD_PHYS),
  382. .length = PCM990_CF_PLD_SIZE,
  383. .type = MT_DEVICE /* CPLD */
  384. }
  385. };
  386. /*
  387. * system init for baseboard usage. Will be called by pcm027 init.
  388. *
  389. * Add platform devices present on this baseboard and init
  390. * them from CPU side as far as required to use them later on
  391. */
  392. void __init pcm990_baseboard_init(void)
  393. {
  394. pxa2xx_mfp_config(ARRAY_AND_SIZE(pcm990_pin_config));
  395. /* register CPLD access */
  396. iotable_init(ARRAY_AND_SIZE(pcm990_io_desc));
  397. /* register CPLD's IRQ controller */
  398. pcm990_init_irq();
  399. #ifndef CONFIG_PCM990_DISPLAY_NONE
  400. set_pxa_fb_info(&pcm990_fbinfo);
  401. #endif
  402. platform_device_register(&pcm990_backlight_device);
  403. /* MMC */
  404. pxa_set_mci_info(&pcm990_mci_platform_data);
  405. /* USB host */
  406. pxa_set_ohci_info(&pcm990_ohci_platform_data);
  407. pxa_set_i2c_info(NULL);
  408. pxa_set_ac97_info(NULL);
  409. #if defined(CONFIG_VIDEO_PXA27x) || defined(CONFIG_VIDEO_PXA27x_MODULE)
  410. pxa_set_camera_info(&pcm990_pxacamera_platform_data);
  411. i2c_register_board_info(0, ARRAY_AND_SIZE(pcm990_i2c_devices));
  412. #endif
  413. printk(KERN_INFO "PCM-990 Evaluation baseboard initialized\n");
  414. }