mainstone.c 15 KB

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  1. /*
  2. * linux/arch/arm/mach-pxa/mainstone.c
  3. *
  4. * Support for the Intel HCDDBBVA0 Development Platform.
  5. * (go figure how they came up with such name...)
  6. *
  7. * Author: Nicolas Pitre
  8. * Created: Nov 05, 2002
  9. * Copyright: MontaVista Software Inc.
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License version 2 as
  13. * published by the Free Software Foundation.
  14. */
  15. #include <linux/init.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/sysdev.h>
  18. #include <linux/interrupt.h>
  19. #include <linux/sched.h>
  20. #include <linux/bitops.h>
  21. #include <linux/fb.h>
  22. #include <linux/ioport.h>
  23. #include <linux/mtd/mtd.h>
  24. #include <linux/mtd/partitions.h>
  25. #include <linux/input.h>
  26. #include <linux/gpio_keys.h>
  27. #include <linux/pwm_backlight.h>
  28. #include <linux/smc91x.h>
  29. #include <asm/types.h>
  30. #include <asm/setup.h>
  31. #include <asm/memory.h>
  32. #include <asm/mach-types.h>
  33. #include <mach/hardware.h>
  34. #include <asm/irq.h>
  35. #include <asm/sizes.h>
  36. #include <asm/mach/arch.h>
  37. #include <asm/mach/map.h>
  38. #include <asm/mach/irq.h>
  39. #include <asm/mach/flash.h>
  40. #include <mach/pxa-regs.h>
  41. #include <mach/pxa2xx-regs.h>
  42. #include <mach/mfp-pxa27x.h>
  43. #include <mach/mainstone.h>
  44. #include <mach/audio.h>
  45. #include <mach/pxafb.h>
  46. #include <mach/i2c.h>
  47. #include <mach/mmc.h>
  48. #include <mach/irda.h>
  49. #include <mach/ohci.h>
  50. #include <mach/pxa27x_keypad.h>
  51. #include "generic.h"
  52. #include "devices.h"
  53. static unsigned long mainstone_pin_config[] = {
  54. /* Chip Select */
  55. GPIO15_nCS_1,
  56. /* LCD - 16bpp Active TFT */
  57. GPIO58_LCD_LDD_0,
  58. GPIO59_LCD_LDD_1,
  59. GPIO60_LCD_LDD_2,
  60. GPIO61_LCD_LDD_3,
  61. GPIO62_LCD_LDD_4,
  62. GPIO63_LCD_LDD_5,
  63. GPIO64_LCD_LDD_6,
  64. GPIO65_LCD_LDD_7,
  65. GPIO66_LCD_LDD_8,
  66. GPIO67_LCD_LDD_9,
  67. GPIO68_LCD_LDD_10,
  68. GPIO69_LCD_LDD_11,
  69. GPIO70_LCD_LDD_12,
  70. GPIO71_LCD_LDD_13,
  71. GPIO72_LCD_LDD_14,
  72. GPIO73_LCD_LDD_15,
  73. GPIO74_LCD_FCLK,
  74. GPIO75_LCD_LCLK,
  75. GPIO76_LCD_PCLK,
  76. GPIO77_LCD_BIAS,
  77. GPIO16_PWM0_OUT, /* Backlight */
  78. /* MMC */
  79. GPIO32_MMC_CLK,
  80. GPIO112_MMC_CMD,
  81. GPIO92_MMC_DAT_0,
  82. GPIO109_MMC_DAT_1,
  83. GPIO110_MMC_DAT_2,
  84. GPIO111_MMC_DAT_3,
  85. /* USB Host Port 1 */
  86. GPIO88_USBH1_PWR,
  87. GPIO89_USBH1_PEN,
  88. /* PC Card */
  89. GPIO48_nPOE,
  90. GPIO49_nPWE,
  91. GPIO50_nPIOR,
  92. GPIO51_nPIOW,
  93. GPIO85_nPCE_1,
  94. GPIO54_nPCE_2,
  95. GPIO79_PSKTSEL,
  96. GPIO55_nPREG,
  97. GPIO56_nPWAIT,
  98. GPIO57_nIOIS16,
  99. /* AC97 */
  100. GPIO45_AC97_SYSCLK,
  101. /* Keypad */
  102. GPIO93_KP_DKIN_0,
  103. GPIO94_KP_DKIN_1,
  104. GPIO95_KP_DKIN_2,
  105. GPIO100_KP_MKIN_0 | WAKEUP_ON_LEVEL_HIGH,
  106. GPIO101_KP_MKIN_1 | WAKEUP_ON_LEVEL_HIGH,
  107. GPIO102_KP_MKIN_2 | WAKEUP_ON_LEVEL_HIGH,
  108. GPIO97_KP_MKIN_3 | WAKEUP_ON_LEVEL_HIGH,
  109. GPIO98_KP_MKIN_4 | WAKEUP_ON_LEVEL_HIGH,
  110. GPIO99_KP_MKIN_5 | WAKEUP_ON_LEVEL_HIGH,
  111. GPIO103_KP_MKOUT_0,
  112. GPIO104_KP_MKOUT_1,
  113. GPIO105_KP_MKOUT_2,
  114. GPIO106_KP_MKOUT_3,
  115. GPIO107_KP_MKOUT_4,
  116. GPIO108_KP_MKOUT_5,
  117. GPIO96_KP_MKOUT_6,
  118. /* I2C */
  119. GPIO117_I2C_SCL,
  120. GPIO118_I2C_SDA,
  121. /* GPIO */
  122. GPIO1_GPIO | WAKEUP_ON_EDGE_BOTH,
  123. };
  124. static unsigned long mainstone_irq_enabled;
  125. static void mainstone_mask_irq(unsigned int irq)
  126. {
  127. int mainstone_irq = (irq - MAINSTONE_IRQ(0));
  128. MST_INTMSKENA = (mainstone_irq_enabled &= ~(1 << mainstone_irq));
  129. }
  130. static void mainstone_unmask_irq(unsigned int irq)
  131. {
  132. int mainstone_irq = (irq - MAINSTONE_IRQ(0));
  133. /* the irq can be acknowledged only if deasserted, so it's done here */
  134. MST_INTSETCLR &= ~(1 << mainstone_irq);
  135. MST_INTMSKENA = (mainstone_irq_enabled |= (1 << mainstone_irq));
  136. }
  137. static struct irq_chip mainstone_irq_chip = {
  138. .name = "FPGA",
  139. .ack = mainstone_mask_irq,
  140. .mask = mainstone_mask_irq,
  141. .unmask = mainstone_unmask_irq,
  142. };
  143. static void mainstone_irq_handler(unsigned int irq, struct irq_desc *desc)
  144. {
  145. unsigned long pending = MST_INTSETCLR & mainstone_irq_enabled;
  146. do {
  147. GEDR(0) = GPIO_bit(0); /* clear useless edge notification */
  148. if (likely(pending)) {
  149. irq = MAINSTONE_IRQ(0) + __ffs(pending);
  150. generic_handle_irq(irq);
  151. }
  152. pending = MST_INTSETCLR & mainstone_irq_enabled;
  153. } while (pending);
  154. }
  155. static void __init mainstone_init_irq(void)
  156. {
  157. int irq;
  158. pxa27x_init_irq();
  159. /* setup extra Mainstone irqs */
  160. for(irq = MAINSTONE_IRQ(0); irq <= MAINSTONE_IRQ(15); irq++) {
  161. set_irq_chip(irq, &mainstone_irq_chip);
  162. set_irq_handler(irq, handle_level_irq);
  163. if (irq == MAINSTONE_IRQ(10) || irq == MAINSTONE_IRQ(14))
  164. set_irq_flags(irq, IRQF_VALID | IRQF_PROBE | IRQF_NOAUTOEN);
  165. else
  166. set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
  167. }
  168. set_irq_flags(MAINSTONE_IRQ(8), 0);
  169. set_irq_flags(MAINSTONE_IRQ(12), 0);
  170. MST_INTMSKENA = 0;
  171. MST_INTSETCLR = 0;
  172. set_irq_chained_handler(IRQ_GPIO(0), mainstone_irq_handler);
  173. set_irq_type(IRQ_GPIO(0), IRQ_TYPE_EDGE_FALLING);
  174. }
  175. #ifdef CONFIG_PM
  176. static int mainstone_irq_resume(struct sys_device *dev)
  177. {
  178. MST_INTMSKENA = mainstone_irq_enabled;
  179. return 0;
  180. }
  181. static struct sysdev_class mainstone_irq_sysclass = {
  182. .name = "cpld_irq",
  183. .resume = mainstone_irq_resume,
  184. };
  185. static struct sys_device mainstone_irq_device = {
  186. .cls = &mainstone_irq_sysclass,
  187. };
  188. static int __init mainstone_irq_device_init(void)
  189. {
  190. int ret = -ENODEV;
  191. if (machine_is_mainstone()) {
  192. ret = sysdev_class_register(&mainstone_irq_sysclass);
  193. if (ret == 0)
  194. ret = sysdev_register(&mainstone_irq_device);
  195. }
  196. return ret;
  197. }
  198. device_initcall(mainstone_irq_device_init);
  199. #endif
  200. static struct resource smc91x_resources[] = {
  201. [0] = {
  202. .start = (MST_ETH_PHYS + 0x300),
  203. .end = (MST_ETH_PHYS + 0xfffff),
  204. .flags = IORESOURCE_MEM,
  205. },
  206. [1] = {
  207. .start = MAINSTONE_IRQ(3),
  208. .end = MAINSTONE_IRQ(3),
  209. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
  210. }
  211. };
  212. static struct smc91x_platdata mainstone_smc91x_info = {
  213. .flags = SMC91X_USE_8BIT | SMC91X_USE_16BIT | SMC91X_USE_32BIT |
  214. SMC91X_NOWAIT | SMC91X_USE_DMA,
  215. };
  216. static struct platform_device smc91x_device = {
  217. .name = "smc91x",
  218. .id = 0,
  219. .num_resources = ARRAY_SIZE(smc91x_resources),
  220. .resource = smc91x_resources,
  221. .dev = {
  222. .platform_data = &mainstone_smc91x_info,
  223. },
  224. };
  225. static int mst_audio_startup(struct snd_pcm_substream *substream, void *priv)
  226. {
  227. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  228. MST_MSCWR2 &= ~MST_MSCWR2_AC97_SPKROFF;
  229. return 0;
  230. }
  231. static void mst_audio_shutdown(struct snd_pcm_substream *substream, void *priv)
  232. {
  233. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  234. MST_MSCWR2 |= MST_MSCWR2_AC97_SPKROFF;
  235. }
  236. static long mst_audio_suspend_mask;
  237. static void mst_audio_suspend(void *priv)
  238. {
  239. mst_audio_suspend_mask = MST_MSCWR2;
  240. MST_MSCWR2 |= MST_MSCWR2_AC97_SPKROFF;
  241. }
  242. static void mst_audio_resume(void *priv)
  243. {
  244. MST_MSCWR2 &= mst_audio_suspend_mask | ~MST_MSCWR2_AC97_SPKROFF;
  245. }
  246. static pxa2xx_audio_ops_t mst_audio_ops = {
  247. .startup = mst_audio_startup,
  248. .shutdown = mst_audio_shutdown,
  249. .suspend = mst_audio_suspend,
  250. .resume = mst_audio_resume,
  251. };
  252. static struct resource flash_resources[] = {
  253. [0] = {
  254. .start = PXA_CS0_PHYS,
  255. .end = PXA_CS0_PHYS + SZ_64M - 1,
  256. .flags = IORESOURCE_MEM,
  257. },
  258. [1] = {
  259. .start = PXA_CS1_PHYS,
  260. .end = PXA_CS1_PHYS + SZ_64M - 1,
  261. .flags = IORESOURCE_MEM,
  262. },
  263. };
  264. static struct mtd_partition mainstoneflash0_partitions[] = {
  265. {
  266. .name = "Bootloader",
  267. .size = 0x00040000,
  268. .offset = 0,
  269. .mask_flags = MTD_WRITEABLE /* force read-only */
  270. },{
  271. .name = "Kernel",
  272. .size = 0x00400000,
  273. .offset = 0x00040000,
  274. },{
  275. .name = "Filesystem",
  276. .size = MTDPART_SIZ_FULL,
  277. .offset = 0x00440000
  278. }
  279. };
  280. static struct flash_platform_data mst_flash_data[2] = {
  281. {
  282. .map_name = "cfi_probe",
  283. .parts = mainstoneflash0_partitions,
  284. .nr_parts = ARRAY_SIZE(mainstoneflash0_partitions),
  285. }, {
  286. .map_name = "cfi_probe",
  287. .parts = NULL,
  288. .nr_parts = 0,
  289. }
  290. };
  291. static struct platform_device mst_flash_device[2] = {
  292. {
  293. .name = "pxa2xx-flash",
  294. .id = 0,
  295. .dev = {
  296. .platform_data = &mst_flash_data[0],
  297. },
  298. .resource = &flash_resources[0],
  299. .num_resources = 1,
  300. },
  301. {
  302. .name = "pxa2xx-flash",
  303. .id = 1,
  304. .dev = {
  305. .platform_data = &mst_flash_data[1],
  306. },
  307. .resource = &flash_resources[1],
  308. .num_resources = 1,
  309. },
  310. };
  311. #if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
  312. static struct platform_pwm_backlight_data mainstone_backlight_data = {
  313. .pwm_id = 0,
  314. .max_brightness = 1023,
  315. .dft_brightness = 1023,
  316. .pwm_period_ns = 78770,
  317. };
  318. static struct platform_device mainstone_backlight_device = {
  319. .name = "pwm-backlight",
  320. .dev = {
  321. .parent = &pxa27x_device_pwm0.dev,
  322. .platform_data = &mainstone_backlight_data,
  323. },
  324. };
  325. static void __init mainstone_backlight_register(void)
  326. {
  327. int ret = platform_device_register(&mainstone_backlight_device);
  328. if (ret)
  329. printk(KERN_ERR "mainstone: failed to register backlight device: %d\n", ret);
  330. }
  331. #else
  332. #define mainstone_backlight_register() do { } while (0)
  333. #endif
  334. static struct pxafb_mode_info toshiba_ltm04c380k_mode = {
  335. .pixclock = 50000,
  336. .xres = 640,
  337. .yres = 480,
  338. .bpp = 16,
  339. .hsync_len = 1,
  340. .left_margin = 0x9f,
  341. .right_margin = 1,
  342. .vsync_len = 44,
  343. .upper_margin = 0,
  344. .lower_margin = 0,
  345. .sync = FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT,
  346. };
  347. static struct pxafb_mode_info toshiba_ltm035a776c_mode = {
  348. .pixclock = 110000,
  349. .xres = 240,
  350. .yres = 320,
  351. .bpp = 16,
  352. .hsync_len = 4,
  353. .left_margin = 8,
  354. .right_margin = 20,
  355. .vsync_len = 3,
  356. .upper_margin = 1,
  357. .lower_margin = 10,
  358. .sync = FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT,
  359. };
  360. static struct pxafb_mach_info mainstone_pxafb_info = {
  361. .num_modes = 1,
  362. .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
  363. };
  364. static int mainstone_mci_init(struct device *dev, irq_handler_t mstone_detect_int, void *data)
  365. {
  366. int err;
  367. /* make sure SD/Memory Stick multiplexer's signals
  368. * are routed to MMC controller
  369. */
  370. MST_MSCWR1 &= ~MST_MSCWR1_MS_SEL;
  371. err = request_irq(MAINSTONE_MMC_IRQ, mstone_detect_int, IRQF_DISABLED,
  372. "MMC card detect", data);
  373. if (err)
  374. printk(KERN_ERR "mainstone_mci_init: MMC/SD: can't request MMC card detect IRQ\n");
  375. return err;
  376. }
  377. static void mainstone_mci_setpower(struct device *dev, unsigned int vdd)
  378. {
  379. struct pxamci_platform_data* p_d = dev->platform_data;
  380. if (( 1 << vdd) & p_d->ocr_mask) {
  381. printk(KERN_DEBUG "%s: on\n", __func__);
  382. MST_MSCWR1 |= MST_MSCWR1_MMC_ON;
  383. MST_MSCWR1 &= ~MST_MSCWR1_MS_SEL;
  384. } else {
  385. printk(KERN_DEBUG "%s: off\n", __func__);
  386. MST_MSCWR1 &= ~MST_MSCWR1_MMC_ON;
  387. }
  388. }
  389. static void mainstone_mci_exit(struct device *dev, void *data)
  390. {
  391. free_irq(MAINSTONE_MMC_IRQ, data);
  392. }
  393. static struct pxamci_platform_data mainstone_mci_platform_data = {
  394. .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
  395. .init = mainstone_mci_init,
  396. .setpower = mainstone_mci_setpower,
  397. .exit = mainstone_mci_exit,
  398. };
  399. static void mainstone_irda_transceiver_mode(struct device *dev, int mode)
  400. {
  401. unsigned long flags;
  402. local_irq_save(flags);
  403. if (mode & IR_SIRMODE) {
  404. MST_MSCWR1 &= ~MST_MSCWR1_IRDA_FIR;
  405. } else if (mode & IR_FIRMODE) {
  406. MST_MSCWR1 |= MST_MSCWR1_IRDA_FIR;
  407. }
  408. pxa2xx_transceiver_mode(dev, mode);
  409. if (mode & IR_OFF) {
  410. MST_MSCWR1 = (MST_MSCWR1 & ~MST_MSCWR1_IRDA_MASK) | MST_MSCWR1_IRDA_OFF;
  411. } else {
  412. MST_MSCWR1 = (MST_MSCWR1 & ~MST_MSCWR1_IRDA_MASK) | MST_MSCWR1_IRDA_FULL;
  413. }
  414. local_irq_restore(flags);
  415. }
  416. static struct pxaficp_platform_data mainstone_ficp_platform_data = {
  417. .transceiver_cap = IR_SIRMODE | IR_FIRMODE | IR_OFF,
  418. .transceiver_mode = mainstone_irda_transceiver_mode,
  419. };
  420. static struct gpio_keys_button gpio_keys_button[] = {
  421. [0] = {
  422. .desc = "wakeup",
  423. .code = KEY_SUSPEND,
  424. .type = EV_KEY,
  425. .gpio = 1,
  426. .wakeup = 1,
  427. },
  428. };
  429. static struct gpio_keys_platform_data mainstone_gpio_keys = {
  430. .buttons = gpio_keys_button,
  431. .nbuttons = 1,
  432. };
  433. static struct platform_device mst_gpio_keys_device = {
  434. .name = "gpio-keys",
  435. .id = -1,
  436. .dev = {
  437. .platform_data = &mainstone_gpio_keys,
  438. },
  439. };
  440. static struct platform_device *platform_devices[] __initdata = {
  441. &smc91x_device,
  442. &mst_flash_device[0],
  443. &mst_flash_device[1],
  444. &mst_gpio_keys_device,
  445. };
  446. static struct pxaohci_platform_data mainstone_ohci_platform_data = {
  447. .port_mode = PMM_PERPORT_MODE,
  448. .flags = ENABLE_PORT_ALL | POWER_CONTROL_LOW | POWER_SENSE_LOW,
  449. };
  450. #if defined(CONFIG_KEYBOARD_PXA27x) || defined(CONFIG_KEYBOARD_PXA27x_MODULE)
  451. static unsigned int mainstone_matrix_keys[] = {
  452. KEY(0, 0, KEY_A), KEY(1, 0, KEY_B), KEY(2, 0, KEY_C),
  453. KEY(3, 0, KEY_D), KEY(4, 0, KEY_E), KEY(5, 0, KEY_F),
  454. KEY(0, 1, KEY_G), KEY(1, 1, KEY_H), KEY(2, 1, KEY_I),
  455. KEY(3, 1, KEY_J), KEY(4, 1, KEY_K), KEY(5, 1, KEY_L),
  456. KEY(0, 2, KEY_M), KEY(1, 2, KEY_N), KEY(2, 2, KEY_O),
  457. KEY(3, 2, KEY_P), KEY(4, 2, KEY_Q), KEY(5, 2, KEY_R),
  458. KEY(0, 3, KEY_S), KEY(1, 3, KEY_T), KEY(2, 3, KEY_U),
  459. KEY(3, 3, KEY_V), KEY(4, 3, KEY_W), KEY(5, 3, KEY_X),
  460. KEY(2, 4, KEY_Y), KEY(3, 4, KEY_Z),
  461. KEY(0, 4, KEY_DOT), /* . */
  462. KEY(1, 4, KEY_CLOSE), /* @ */
  463. KEY(4, 4, KEY_SLASH),
  464. KEY(5, 4, KEY_BACKSLASH),
  465. KEY(0, 5, KEY_HOME),
  466. KEY(1, 5, KEY_LEFTSHIFT),
  467. KEY(2, 5, KEY_SPACE),
  468. KEY(3, 5, KEY_SPACE),
  469. KEY(4, 5, KEY_ENTER),
  470. KEY(5, 5, KEY_BACKSPACE),
  471. KEY(0, 6, KEY_UP),
  472. KEY(1, 6, KEY_DOWN),
  473. KEY(2, 6, KEY_LEFT),
  474. KEY(3, 6, KEY_RIGHT),
  475. KEY(4, 6, KEY_SELECT),
  476. };
  477. struct pxa27x_keypad_platform_data mainstone_keypad_info = {
  478. .matrix_key_rows = 6,
  479. .matrix_key_cols = 7,
  480. .matrix_key_map = mainstone_matrix_keys,
  481. .matrix_key_map_size = ARRAY_SIZE(mainstone_matrix_keys),
  482. .enable_rotary0 = 1,
  483. .rotary0_up_key = KEY_UP,
  484. .rotary0_down_key = KEY_DOWN,
  485. .debounce_interval = 30,
  486. };
  487. static void __init mainstone_init_keypad(void)
  488. {
  489. pxa_set_keypad_info(&mainstone_keypad_info);
  490. }
  491. #else
  492. static inline void mainstone_init_keypad(void) {}
  493. #endif
  494. static void __init mainstone_init(void)
  495. {
  496. int SW7 = 0; /* FIXME: get from SCR (Mst doc section 3.2.1.1) */
  497. pxa2xx_mfp_config(ARRAY_AND_SIZE(mainstone_pin_config));
  498. mst_flash_data[0].width = (BOOT_DEF & 1) ? 2 : 4;
  499. mst_flash_data[1].width = 4;
  500. /* Compensate for SW7 which swaps the flash banks */
  501. mst_flash_data[SW7].name = "processor-flash";
  502. mst_flash_data[SW7 ^ 1].name = "mainboard-flash";
  503. printk(KERN_NOTICE "Mainstone configured to boot from %s\n",
  504. mst_flash_data[0].name);
  505. /* system bus arbiter setting
  506. * - Core_Park
  507. * - LCD_wt:DMA_wt:CORE_Wt = 2:3:4
  508. */
  509. ARB_CNTRL = ARB_CORE_PARK | 0x234;
  510. platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
  511. /* reading Mainstone's "Virtual Configuration Register"
  512. might be handy to select LCD type here */
  513. if (0)
  514. mainstone_pxafb_info.modes = &toshiba_ltm04c380k_mode;
  515. else
  516. mainstone_pxafb_info.modes = &toshiba_ltm035a776c_mode;
  517. set_pxa_fb_info(&mainstone_pxafb_info);
  518. mainstone_backlight_register();
  519. pxa_set_mci_info(&mainstone_mci_platform_data);
  520. pxa_set_ficp_info(&mainstone_ficp_platform_data);
  521. pxa_set_ohci_info(&mainstone_ohci_platform_data);
  522. pxa_set_i2c_info(NULL);
  523. pxa_set_ac97_info(&mst_audio_ops);
  524. mainstone_init_keypad();
  525. }
  526. static struct map_desc mainstone_io_desc[] __initdata = {
  527. { /* CPLD */
  528. .virtual = MST_FPGA_VIRT,
  529. .pfn = __phys_to_pfn(MST_FPGA_PHYS),
  530. .length = 0x00100000,
  531. .type = MT_DEVICE
  532. }
  533. };
  534. static void __init mainstone_map_io(void)
  535. {
  536. pxa_map_io();
  537. iotable_init(mainstone_io_desc, ARRAY_SIZE(mainstone_io_desc));
  538. /* for use I SRAM as framebuffer. */
  539. PSLR |= 0xF04;
  540. PCFR = 0x66;
  541. }
  542. MACHINE_START(MAINSTONE, "Intel HCDDBBVA0 Development Platform (aka Mainstone)")
  543. /* Maintainer: MontaVista Software Inc. */
  544. .phys_io = 0x40000000,
  545. .boot_params = 0xa0000100, /* BLOB boot parameter setting */
  546. .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
  547. .map_io = mainstone_map_io,
  548. .init_irq = mainstone_init_irq,
  549. .timer = &pxa_timer,
  550. .init_machine = mainstone_init,
  551. MACHINE_END