dma-mapping.h 14 KB

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  1. #ifndef ASMARM_DMA_MAPPING_H
  2. #define ASMARM_DMA_MAPPING_H
  3. #ifdef __KERNEL__
  4. #include <linux/mm_types.h>
  5. #include <linux/scatterlist.h>
  6. #include <asm-generic/dma-coherent.h>
  7. #include <asm/memory.h>
  8. /*
  9. * page_to_dma/dma_to_virt/virt_to_dma are architecture private functions
  10. * used internally by the DMA-mapping API to provide DMA addresses. They
  11. * must not be used by drivers.
  12. */
  13. #ifndef __arch_page_to_dma
  14. static inline dma_addr_t page_to_dma(struct device *dev, struct page *page)
  15. {
  16. return (dma_addr_t)__virt_to_bus((unsigned long)page_address(page));
  17. }
  18. static inline void *dma_to_virt(struct device *dev, dma_addr_t addr)
  19. {
  20. return (void *)__bus_to_virt(addr);
  21. }
  22. static inline dma_addr_t virt_to_dma(struct device *dev, void *addr)
  23. {
  24. return (dma_addr_t)__virt_to_bus((unsigned long)(addr));
  25. }
  26. #else
  27. static inline dma_addr_t page_to_dma(struct device *dev, struct page *page)
  28. {
  29. return __arch_page_to_dma(dev, page);
  30. }
  31. static inline void *dma_to_virt(struct device *dev, dma_addr_t addr)
  32. {
  33. return __arch_dma_to_virt(dev, addr);
  34. }
  35. static inline dma_addr_t virt_to_dma(struct device *dev, void *addr)
  36. {
  37. return __arch_virt_to_dma(dev, addr);
  38. }
  39. #endif
  40. /*
  41. * DMA-consistent mapping functions. These allocate/free a region of
  42. * uncached, unwrite-buffered mapped memory space for use with DMA
  43. * devices. This is the "generic" version. The PCI specific version
  44. * is in pci.h
  45. *
  46. * Note: Drivers should NOT use this function directly, as it will break
  47. * platforms with CONFIG_DMABOUNCE.
  48. * Use the driver DMA support - see dma-mapping.h (dma_sync_*)
  49. */
  50. extern void dma_cache_maint(const void *kaddr, size_t size, int rw);
  51. /*
  52. * Return whether the given device DMA address mask can be supported
  53. * properly. For example, if your device can only drive the low 24-bits
  54. * during bus mastering, then you would pass 0x00ffffff as the mask
  55. * to this function.
  56. *
  57. * FIXME: This should really be a platform specific issue - we should
  58. * return false if GFP_DMA allocations may not satisfy the supplied 'mask'.
  59. */
  60. static inline int dma_supported(struct device *dev, u64 mask)
  61. {
  62. if (mask < ISA_DMA_THRESHOLD)
  63. return 0;
  64. return 1;
  65. }
  66. static inline int dma_set_mask(struct device *dev, u64 dma_mask)
  67. {
  68. if (!dev->dma_mask || !dma_supported(dev, dma_mask))
  69. return -EIO;
  70. *dev->dma_mask = dma_mask;
  71. return 0;
  72. }
  73. static inline int dma_get_cache_alignment(void)
  74. {
  75. return 32;
  76. }
  77. static inline int dma_is_consistent(struct device *dev, dma_addr_t handle)
  78. {
  79. return !!arch_is_coherent();
  80. }
  81. /*
  82. * DMA errors are defined by all-bits-set in the DMA address.
  83. */
  84. static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
  85. {
  86. return dma_addr == ~0;
  87. }
  88. /*
  89. * Dummy noncoherent implementation. We don't provide a dma_cache_sync
  90. * function so drivers using this API are highlighted with build warnings.
  91. */
  92. static inline void *dma_alloc_noncoherent(struct device *dev, size_t size,
  93. dma_addr_t *handle, gfp_t gfp)
  94. {
  95. return NULL;
  96. }
  97. static inline void dma_free_noncoherent(struct device *dev, size_t size,
  98. void *cpu_addr, dma_addr_t handle)
  99. {
  100. }
  101. /**
  102. * dma_alloc_coherent - allocate consistent memory for DMA
  103. * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
  104. * @size: required memory size
  105. * @handle: bus-specific DMA address
  106. *
  107. * Allocate some uncached, unbuffered memory for a device for
  108. * performing DMA. This function allocates pages, and will
  109. * return the CPU-viewed address, and sets @handle to be the
  110. * device-viewed address.
  111. */
  112. extern void *dma_alloc_coherent(struct device *, size_t, dma_addr_t *, gfp_t);
  113. /**
  114. * dma_free_coherent - free memory allocated by dma_alloc_coherent
  115. * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
  116. * @size: size of memory originally requested in dma_alloc_coherent
  117. * @cpu_addr: CPU-view address returned from dma_alloc_coherent
  118. * @handle: device-view address returned from dma_alloc_coherent
  119. *
  120. * Free (and unmap) a DMA buffer previously allocated by
  121. * dma_alloc_coherent().
  122. *
  123. * References to memory and mappings associated with cpu_addr/handle
  124. * during and after this call executing are illegal.
  125. */
  126. extern void dma_free_coherent(struct device *, size_t, void *, dma_addr_t);
  127. /**
  128. * dma_mmap_coherent - map a coherent DMA allocation into user space
  129. * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
  130. * @vma: vm_area_struct describing requested user mapping
  131. * @cpu_addr: kernel CPU-view address returned from dma_alloc_coherent
  132. * @handle: device-view address returned from dma_alloc_coherent
  133. * @size: size of memory originally requested in dma_alloc_coherent
  134. *
  135. * Map a coherent DMA buffer previously allocated by dma_alloc_coherent
  136. * into user space. The coherent DMA buffer must not be freed by the
  137. * driver until the user space mapping has been released.
  138. */
  139. int dma_mmap_coherent(struct device *, struct vm_area_struct *,
  140. void *, dma_addr_t, size_t);
  141. /**
  142. * dma_alloc_writecombine - allocate writecombining memory for DMA
  143. * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
  144. * @size: required memory size
  145. * @handle: bus-specific DMA address
  146. *
  147. * Allocate some uncached, buffered memory for a device for
  148. * performing DMA. This function allocates pages, and will
  149. * return the CPU-viewed address, and sets @handle to be the
  150. * device-viewed address.
  151. */
  152. extern void *dma_alloc_writecombine(struct device *, size_t, dma_addr_t *,
  153. gfp_t);
  154. #define dma_free_writecombine(dev,size,cpu_addr,handle) \
  155. dma_free_coherent(dev,size,cpu_addr,handle)
  156. int dma_mmap_writecombine(struct device *, struct vm_area_struct *,
  157. void *, dma_addr_t, size_t);
  158. #ifdef CONFIG_DMABOUNCE
  159. /*
  160. * For SA-1111, IXP425, and ADI systems the dma-mapping functions are "magic"
  161. * and utilize bounce buffers as needed to work around limited DMA windows.
  162. *
  163. * On the SA-1111, a bug limits DMA to only certain regions of RAM.
  164. * On the IXP425, the PCI inbound window is 64MB (256MB total RAM)
  165. * On some ADI engineering systems, PCI inbound window is 32MB (12MB total RAM)
  166. *
  167. * The following are helper functions used by the dmabounce subystem
  168. *
  169. */
  170. /**
  171. * dmabounce_register_dev
  172. *
  173. * @dev: valid struct device pointer
  174. * @small_buf_size: size of buffers to use with small buffer pool
  175. * @large_buf_size: size of buffers to use with large buffer pool (can be 0)
  176. *
  177. * This function should be called by low-level platform code to register
  178. * a device as requireing DMA buffer bouncing. The function will allocate
  179. * appropriate DMA pools for the device.
  180. *
  181. */
  182. extern int dmabounce_register_dev(struct device *, unsigned long,
  183. unsigned long);
  184. /**
  185. * dmabounce_unregister_dev
  186. *
  187. * @dev: valid struct device pointer
  188. *
  189. * This function should be called by low-level platform code when device
  190. * that was previously registered with dmabounce_register_dev is removed
  191. * from the system.
  192. *
  193. */
  194. extern void dmabounce_unregister_dev(struct device *);
  195. /**
  196. * dma_needs_bounce
  197. *
  198. * @dev: valid struct device pointer
  199. * @dma_handle: dma_handle of unbounced buffer
  200. * @size: size of region being mapped
  201. *
  202. * Platforms that utilize the dmabounce mechanism must implement
  203. * this function.
  204. *
  205. * The dmabounce routines call this function whenever a dma-mapping
  206. * is requested to determine whether a given buffer needs to be bounced
  207. * or not. The function must return 0 if the buffer is OK for
  208. * DMA access and 1 if the buffer needs to be bounced.
  209. *
  210. */
  211. extern int dma_needs_bounce(struct device*, dma_addr_t, size_t);
  212. /*
  213. * The DMA API, implemented by dmabounce.c. See below for descriptions.
  214. */
  215. extern dma_addr_t dma_map_single(struct device *, void *, size_t,
  216. enum dma_data_direction);
  217. extern dma_addr_t dma_map_page(struct device *, struct page *,
  218. unsigned long, size_t, enum dma_data_direction);
  219. extern void dma_unmap_single(struct device *, dma_addr_t, size_t,
  220. enum dma_data_direction);
  221. /*
  222. * Private functions
  223. */
  224. int dmabounce_sync_for_cpu(struct device *, dma_addr_t, unsigned long,
  225. size_t, enum dma_data_direction);
  226. int dmabounce_sync_for_device(struct device *, dma_addr_t, unsigned long,
  227. size_t, enum dma_data_direction);
  228. #else
  229. static inline int dmabounce_sync_for_cpu(struct device *d, dma_addr_t addr,
  230. unsigned long offset, size_t size, enum dma_data_direction dir)
  231. {
  232. return 1;
  233. }
  234. static inline int dmabounce_sync_for_device(struct device *d, dma_addr_t addr,
  235. unsigned long offset, size_t size, enum dma_data_direction dir)
  236. {
  237. return 1;
  238. }
  239. /**
  240. * dma_map_single - map a single buffer for streaming DMA
  241. * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
  242. * @cpu_addr: CPU direct mapped address of buffer
  243. * @size: size of buffer to map
  244. * @dir: DMA transfer direction
  245. *
  246. * Ensure that any data held in the cache is appropriately discarded
  247. * or written back.
  248. *
  249. * The device owns this memory once this call has completed. The CPU
  250. * can regain ownership by calling dma_unmap_single() or
  251. * dma_sync_single_for_cpu().
  252. */
  253. static inline dma_addr_t dma_map_single(struct device *dev, void *cpu_addr,
  254. size_t size, enum dma_data_direction dir)
  255. {
  256. BUG_ON(!valid_dma_direction(dir));
  257. if (!arch_is_coherent())
  258. dma_cache_maint(cpu_addr, size, dir);
  259. return virt_to_dma(dev, cpu_addr);
  260. }
  261. /**
  262. * dma_map_page - map a portion of a page for streaming DMA
  263. * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
  264. * @page: page that buffer resides in
  265. * @offset: offset into page for start of buffer
  266. * @size: size of buffer to map
  267. * @dir: DMA transfer direction
  268. *
  269. * Ensure that any data held in the cache is appropriately discarded
  270. * or written back.
  271. *
  272. * The device owns this memory once this call has completed. The CPU
  273. * can regain ownership by calling dma_unmap_page().
  274. */
  275. static inline dma_addr_t dma_map_page(struct device *dev, struct page *page,
  276. unsigned long offset, size_t size, enum dma_data_direction dir)
  277. {
  278. BUG_ON(!valid_dma_direction(dir));
  279. if (!arch_is_coherent())
  280. dma_cache_maint(page_address(page) + offset, size, dir);
  281. return page_to_dma(dev, page) + offset;
  282. }
  283. /**
  284. * dma_unmap_single - unmap a single buffer previously mapped
  285. * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
  286. * @handle: DMA address of buffer
  287. * @size: size of buffer (same as passed to dma_map_single)
  288. * @dir: DMA transfer direction (same as passed to dma_map_single)
  289. *
  290. * Unmap a single streaming mode DMA translation. The handle and size
  291. * must match what was provided in the previous dma_map_single() call.
  292. * All other usages are undefined.
  293. *
  294. * After this call, reads by the CPU to the buffer are guaranteed to see
  295. * whatever the device wrote there.
  296. */
  297. static inline void dma_unmap_single(struct device *dev, dma_addr_t handle,
  298. size_t size, enum dma_data_direction dir)
  299. {
  300. /* nothing to do */
  301. }
  302. #endif /* CONFIG_DMABOUNCE */
  303. /**
  304. * dma_unmap_page - unmap a buffer previously mapped through dma_map_page()
  305. * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
  306. * @handle: DMA address of buffer
  307. * @size: size of buffer (same as passed to dma_map_page)
  308. * @dir: DMA transfer direction (same as passed to dma_map_page)
  309. *
  310. * Unmap a page streaming mode DMA translation. The handle and size
  311. * must match what was provided in the previous dma_map_page() call.
  312. * All other usages are undefined.
  313. *
  314. * After this call, reads by the CPU to the buffer are guaranteed to see
  315. * whatever the device wrote there.
  316. */
  317. static inline void dma_unmap_page(struct device *dev, dma_addr_t handle,
  318. size_t size, enum dma_data_direction dir)
  319. {
  320. dma_unmap_single(dev, handle, size, dir);
  321. }
  322. /**
  323. * dma_sync_single_range_for_cpu
  324. * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
  325. * @handle: DMA address of buffer
  326. * @offset: offset of region to start sync
  327. * @size: size of region to sync
  328. * @dir: DMA transfer direction (same as passed to dma_map_single)
  329. *
  330. * Make physical memory consistent for a single streaming mode DMA
  331. * translation after a transfer.
  332. *
  333. * If you perform a dma_map_single() but wish to interrogate the
  334. * buffer using the cpu, yet do not wish to teardown the PCI dma
  335. * mapping, you must call this function before doing so. At the
  336. * next point you give the PCI dma address back to the card, you
  337. * must first the perform a dma_sync_for_device, and then the
  338. * device again owns the buffer.
  339. */
  340. static inline void dma_sync_single_range_for_cpu(struct device *dev,
  341. dma_addr_t handle, unsigned long offset, size_t size,
  342. enum dma_data_direction dir)
  343. {
  344. BUG_ON(!valid_dma_direction(dir));
  345. dmabounce_sync_for_cpu(dev, handle, offset, size, dir);
  346. }
  347. static inline void dma_sync_single_range_for_device(struct device *dev,
  348. dma_addr_t handle, unsigned long offset, size_t size,
  349. enum dma_data_direction dir)
  350. {
  351. BUG_ON(!valid_dma_direction(dir));
  352. if (!dmabounce_sync_for_device(dev, handle, offset, size, dir))
  353. return;
  354. if (!arch_is_coherent())
  355. dma_cache_maint(dma_to_virt(dev, handle) + offset, size, dir);
  356. }
  357. static inline void dma_sync_single_for_cpu(struct device *dev,
  358. dma_addr_t handle, size_t size, enum dma_data_direction dir)
  359. {
  360. dma_sync_single_range_for_cpu(dev, handle, 0, size, dir);
  361. }
  362. static inline void dma_sync_single_for_device(struct device *dev,
  363. dma_addr_t handle, size_t size, enum dma_data_direction dir)
  364. {
  365. dma_sync_single_range_for_device(dev, handle, 0, size, dir);
  366. }
  367. /*
  368. * The scatter list versions of the above methods.
  369. */
  370. extern int dma_map_sg(struct device *, struct scatterlist *, int,
  371. enum dma_data_direction);
  372. extern void dma_unmap_sg(struct device *, struct scatterlist *, int,
  373. enum dma_data_direction);
  374. extern void dma_sync_sg_for_cpu(struct device *, struct scatterlist *, int,
  375. enum dma_data_direction);
  376. extern void dma_sync_sg_for_device(struct device *, struct scatterlist *, int,
  377. enum dma_data_direction);
  378. #endif /* __KERNEL__ */
  379. #endif