iwl-4965.c 132 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2003 - 2007 Intel Corporation. All rights reserved.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of version 2 of the GNU General Public License as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * You should have received a copy of the GNU General Public License along with
  15. * this program; if not, write to the Free Software Foundation, Inc.,
  16. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17. *
  18. * The full GNU General Public License is included in this distribution in the
  19. * file called LICENSE.
  20. *
  21. * Contact Information:
  22. * James P. Ketrenos <ipw2100-admin@linux.intel.com>
  23. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  24. *
  25. *****************************************************************************/
  26. #include <linux/kernel.h>
  27. #include <linux/module.h>
  28. #include <linux/version.h>
  29. #include <linux/init.h>
  30. #include <linux/pci.h>
  31. #include <linux/dma-mapping.h>
  32. #include <linux/delay.h>
  33. #include <linux/skbuff.h>
  34. #include <linux/netdevice.h>
  35. #include <linux/wireless.h>
  36. #include <net/mac80211.h>
  37. #include <linux/etherdevice.h>
  38. #include <asm/unaligned.h>
  39. #include "iwl-4965.h"
  40. #include "iwl-helpers.h"
  41. static void iwl4965_hw_card_show_info(struct iwl4965_priv *priv);
  42. #define IWL_DECLARE_RATE_INFO(r, s, ip, in, rp, rn, pp, np) \
  43. [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP, \
  44. IWL_RATE_SISO_##s##M_PLCP, \
  45. IWL_RATE_MIMO_##s##M_PLCP, \
  46. IWL_RATE_##r##M_IEEE, \
  47. IWL_RATE_##ip##M_INDEX, \
  48. IWL_RATE_##in##M_INDEX, \
  49. IWL_RATE_##rp##M_INDEX, \
  50. IWL_RATE_##rn##M_INDEX, \
  51. IWL_RATE_##pp##M_INDEX, \
  52. IWL_RATE_##np##M_INDEX }
  53. /*
  54. * Parameter order:
  55. * rate, ht rate, prev rate, next rate, prev tgg rate, next tgg rate
  56. *
  57. * If there isn't a valid next or previous rate then INV is used which
  58. * maps to IWL_RATE_INVALID
  59. *
  60. */
  61. const struct iwl4965_rate_info iwl4965_rates[IWL_RATE_COUNT] = {
  62. IWL_DECLARE_RATE_INFO(1, INV, INV, 2, INV, 2, INV, 2), /* 1mbps */
  63. IWL_DECLARE_RATE_INFO(2, INV, 1, 5, 1, 5, 1, 5), /* 2mbps */
  64. IWL_DECLARE_RATE_INFO(5, INV, 2, 6, 2, 11, 2, 11), /*5.5mbps */
  65. IWL_DECLARE_RATE_INFO(11, INV, 9, 12, 9, 12, 5, 18), /* 11mbps */
  66. IWL_DECLARE_RATE_INFO(6, 6, 5, 9, 5, 11, 5, 11), /* 6mbps */
  67. IWL_DECLARE_RATE_INFO(9, 6, 6, 11, 6, 11, 5, 11), /* 9mbps */
  68. IWL_DECLARE_RATE_INFO(12, 12, 11, 18, 11, 18, 11, 18), /* 12mbps */
  69. IWL_DECLARE_RATE_INFO(18, 18, 12, 24, 12, 24, 11, 24), /* 18mbps */
  70. IWL_DECLARE_RATE_INFO(24, 24, 18, 36, 18, 36, 18, 36), /* 24mbps */
  71. IWL_DECLARE_RATE_INFO(36, 36, 24, 48, 24, 48, 24, 48), /* 36mbps */
  72. IWL_DECLARE_RATE_INFO(48, 48, 36, 54, 36, 54, 36, 54), /* 48mbps */
  73. IWL_DECLARE_RATE_INFO(54, 54, 48, INV, 48, INV, 48, INV),/* 54mbps */
  74. IWL_DECLARE_RATE_INFO(60, 60, 48, INV, 48, INV, 48, INV),/* 60mbps */
  75. };
  76. #ifdef CONFIG_IWL4965_HT
  77. static const u16 default_tid_to_tx_fifo[] = {
  78. IWL_TX_FIFO_AC1,
  79. IWL_TX_FIFO_AC0,
  80. IWL_TX_FIFO_AC0,
  81. IWL_TX_FIFO_AC1,
  82. IWL_TX_FIFO_AC2,
  83. IWL_TX_FIFO_AC2,
  84. IWL_TX_FIFO_AC3,
  85. IWL_TX_FIFO_AC3,
  86. IWL_TX_FIFO_NONE,
  87. IWL_TX_FIFO_NONE,
  88. IWL_TX_FIFO_NONE,
  89. IWL_TX_FIFO_NONE,
  90. IWL_TX_FIFO_NONE,
  91. IWL_TX_FIFO_NONE,
  92. IWL_TX_FIFO_NONE,
  93. IWL_TX_FIFO_NONE,
  94. IWL_TX_FIFO_AC3
  95. };
  96. #endif /*CONFIG_IWL4965_HT */
  97. static int is_fat_channel(__le32 rxon_flags)
  98. {
  99. return (rxon_flags & RXON_FLG_CHANNEL_MODE_PURE_40_MSK) ||
  100. (rxon_flags & RXON_FLG_CHANNEL_MODE_MIXED_MSK);
  101. }
  102. static u8 is_single_stream(struct iwl4965_priv *priv)
  103. {
  104. #ifdef CONFIG_IWL4965_HT
  105. if (!priv->current_ht_config.is_ht ||
  106. (priv->current_ht_config.supp_mcs_set[1] == 0) ||
  107. (priv->ps_mode == IWL_MIMO_PS_STATIC))
  108. return 1;
  109. #else
  110. return 1;
  111. #endif /*CONFIG_IWL4965_HT */
  112. return 0;
  113. }
  114. /*
  115. * Determine how many receiver/antenna chains to use.
  116. * More provides better reception via diversity. Fewer saves power.
  117. * MIMO (dual stream) requires at least 2, but works better with 3.
  118. * This does not determine *which* chains to use, just how many.
  119. */
  120. static int iwl4965_get_rx_chain_counter(struct iwl4965_priv *priv,
  121. u8 *idle_state, u8 *rx_state)
  122. {
  123. u8 is_single = is_single_stream(priv);
  124. u8 is_cam = test_bit(STATUS_POWER_PMI, &priv->status) ? 0 : 1;
  125. /* # of Rx chains to use when expecting MIMO. */
  126. if (is_single || (!is_cam && (priv->ps_mode == IWL_MIMO_PS_STATIC)))
  127. *rx_state = 2;
  128. else
  129. *rx_state = 3;
  130. /* # Rx chains when idling and maybe trying to save power */
  131. switch (priv->ps_mode) {
  132. case IWL_MIMO_PS_STATIC:
  133. case IWL_MIMO_PS_DYNAMIC:
  134. *idle_state = (is_cam) ? 2 : 1;
  135. break;
  136. case IWL_MIMO_PS_NONE:
  137. *idle_state = (is_cam) ? *rx_state : 1;
  138. break;
  139. default:
  140. *idle_state = 1;
  141. break;
  142. }
  143. return 0;
  144. }
  145. int iwl4965_hw_rxq_stop(struct iwl4965_priv *priv)
  146. {
  147. int rc;
  148. unsigned long flags;
  149. spin_lock_irqsave(&priv->lock, flags);
  150. rc = iwl4965_grab_nic_access(priv);
  151. if (rc) {
  152. spin_unlock_irqrestore(&priv->lock, flags);
  153. return rc;
  154. }
  155. /* stop Rx DMA */
  156. iwl4965_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
  157. rc = iwl4965_poll_direct_bit(priv, FH_MEM_RSSR_RX_STATUS_REG,
  158. (1 << 24), 1000);
  159. if (rc < 0)
  160. IWL_ERROR("Can't stop Rx DMA.\n");
  161. iwl4965_release_nic_access(priv);
  162. spin_unlock_irqrestore(&priv->lock, flags);
  163. return 0;
  164. }
  165. u8 iwl4965_hw_find_station(struct iwl4965_priv *priv, const u8 *addr)
  166. {
  167. int i;
  168. int start = 0;
  169. int ret = IWL_INVALID_STATION;
  170. unsigned long flags;
  171. DECLARE_MAC_BUF(mac);
  172. if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) ||
  173. (priv->iw_mode == IEEE80211_IF_TYPE_AP))
  174. start = IWL_STA_ID;
  175. if (is_broadcast_ether_addr(addr))
  176. return IWL4965_BROADCAST_ID;
  177. spin_lock_irqsave(&priv->sta_lock, flags);
  178. for (i = start; i < priv->hw_setting.max_stations; i++)
  179. if ((priv->stations[i].used) &&
  180. (!compare_ether_addr
  181. (priv->stations[i].sta.sta.addr, addr))) {
  182. ret = i;
  183. goto out;
  184. }
  185. IWL_DEBUG_ASSOC_LIMIT("can not find STA %s total %d\n",
  186. print_mac(mac, addr), priv->num_stations);
  187. out:
  188. spin_unlock_irqrestore(&priv->sta_lock, flags);
  189. return ret;
  190. }
  191. static int iwl4965_nic_set_pwr_src(struct iwl4965_priv *priv, int pwr_max)
  192. {
  193. int ret;
  194. unsigned long flags;
  195. spin_lock_irqsave(&priv->lock, flags);
  196. ret = iwl4965_grab_nic_access(priv);
  197. if (ret) {
  198. spin_unlock_irqrestore(&priv->lock, flags);
  199. return ret;
  200. }
  201. if (!pwr_max) {
  202. u32 val;
  203. ret = pci_read_config_dword(priv->pci_dev, PCI_POWER_SOURCE,
  204. &val);
  205. if (val & PCI_CFG_PMC_PME_FROM_D3COLD_SUPPORT)
  206. iwl4965_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
  207. APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
  208. ~APMG_PS_CTRL_MSK_PWR_SRC);
  209. } else
  210. iwl4965_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
  211. APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
  212. ~APMG_PS_CTRL_MSK_PWR_SRC);
  213. iwl4965_release_nic_access(priv);
  214. spin_unlock_irqrestore(&priv->lock, flags);
  215. return ret;
  216. }
  217. static int iwl4965_rx_init(struct iwl4965_priv *priv, struct iwl4965_rx_queue *rxq)
  218. {
  219. int rc;
  220. unsigned long flags;
  221. unsigned int rb_size;
  222. spin_lock_irqsave(&priv->lock, flags);
  223. rc = iwl4965_grab_nic_access(priv);
  224. if (rc) {
  225. spin_unlock_irqrestore(&priv->lock, flags);
  226. return rc;
  227. }
  228. if (iwl4965_param_amsdu_size_8K)
  229. rb_size = FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_8K;
  230. else
  231. rb_size = FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_4K;
  232. /* Stop Rx DMA */
  233. iwl4965_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
  234. /* Reset driver's Rx queue write index */
  235. iwl4965_write_direct32(priv, FH_RSCSR_CHNL0_RBDCB_WPTR_REG, 0);
  236. /* Tell device where to find RBD circular buffer in DRAM */
  237. iwl4965_write_direct32(priv, FH_RSCSR_CHNL0_RBDCB_BASE_REG,
  238. rxq->dma_addr >> 8);
  239. /* Tell device where in DRAM to update its Rx status */
  240. iwl4965_write_direct32(priv, FH_RSCSR_CHNL0_STTS_WPTR_REG,
  241. (priv->hw_setting.shared_phys +
  242. offsetof(struct iwl4965_shared, val0)) >> 4);
  243. /* Enable Rx DMA, enable host interrupt, Rx buffer size 4k, 256 RBDs */
  244. iwl4965_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG,
  245. FH_RCSR_RX_CONFIG_CHNL_EN_ENABLE_VAL |
  246. FH_RCSR_CHNL0_RX_CONFIG_IRQ_DEST_INT_HOST_VAL |
  247. rb_size |
  248. /*0x10 << 4 | */
  249. (RX_QUEUE_SIZE_LOG <<
  250. FH_RCSR_RX_CONFIG_RBDCB_SIZE_BITSHIFT));
  251. /*
  252. * iwl4965_write32(priv,CSR_INT_COAL_REG,0);
  253. */
  254. iwl4965_release_nic_access(priv);
  255. spin_unlock_irqrestore(&priv->lock, flags);
  256. return 0;
  257. }
  258. /* Tell 4965 where to find the "keep warm" buffer */
  259. static int iwl4965_kw_init(struct iwl4965_priv *priv)
  260. {
  261. unsigned long flags;
  262. int rc;
  263. spin_lock_irqsave(&priv->lock, flags);
  264. rc = iwl4965_grab_nic_access(priv);
  265. if (rc)
  266. goto out;
  267. iwl4965_write_direct32(priv, IWL_FH_KW_MEM_ADDR_REG,
  268. priv->kw.dma_addr >> 4);
  269. iwl4965_release_nic_access(priv);
  270. out:
  271. spin_unlock_irqrestore(&priv->lock, flags);
  272. return rc;
  273. }
  274. static int iwl4965_kw_alloc(struct iwl4965_priv *priv)
  275. {
  276. struct pci_dev *dev = priv->pci_dev;
  277. struct iwl4965_kw *kw = &priv->kw;
  278. kw->size = IWL4965_KW_SIZE; /* TBW need set somewhere else */
  279. kw->v_addr = pci_alloc_consistent(dev, kw->size, &kw->dma_addr);
  280. if (!kw->v_addr)
  281. return -ENOMEM;
  282. return 0;
  283. }
  284. #define CHECK_AND_PRINT(x) ((eeprom_ch->flags & EEPROM_CHANNEL_##x) \
  285. ? # x " " : "")
  286. /**
  287. * iwl4965_set_fat_chan_info - Copy fat channel info into driver's priv.
  288. *
  289. * Does not set up a command, or touch hardware.
  290. */
  291. int iwl4965_set_fat_chan_info(struct iwl4965_priv *priv,
  292. enum ieee80211_band band, u16 channel,
  293. const struct iwl4965_eeprom_channel *eeprom_ch,
  294. u8 fat_extension_channel)
  295. {
  296. struct iwl4965_channel_info *ch_info;
  297. ch_info = (struct iwl4965_channel_info *)
  298. iwl4965_get_channel_info(priv, band, channel);
  299. if (!is_channel_valid(ch_info))
  300. return -1;
  301. IWL_DEBUG_INFO("FAT Ch. %d [%sGHz] %s%s%s%s%s%s(0x%02x"
  302. " %ddBm): Ad-Hoc %ssupported\n",
  303. ch_info->channel,
  304. is_channel_a_band(ch_info) ?
  305. "5.2" : "2.4",
  306. CHECK_AND_PRINT(IBSS),
  307. CHECK_AND_PRINT(ACTIVE),
  308. CHECK_AND_PRINT(RADAR),
  309. CHECK_AND_PRINT(WIDE),
  310. CHECK_AND_PRINT(NARROW),
  311. CHECK_AND_PRINT(DFS),
  312. eeprom_ch->flags,
  313. eeprom_ch->max_power_avg,
  314. ((eeprom_ch->flags & EEPROM_CHANNEL_IBSS)
  315. && !(eeprom_ch->flags & EEPROM_CHANNEL_RADAR)) ?
  316. "" : "not ");
  317. ch_info->fat_eeprom = *eeprom_ch;
  318. ch_info->fat_max_power_avg = eeprom_ch->max_power_avg;
  319. ch_info->fat_curr_txpow = eeprom_ch->max_power_avg;
  320. ch_info->fat_min_power = 0;
  321. ch_info->fat_scan_power = eeprom_ch->max_power_avg;
  322. ch_info->fat_flags = eeprom_ch->flags;
  323. ch_info->fat_extension_channel = fat_extension_channel;
  324. return 0;
  325. }
  326. /**
  327. * iwl4965_kw_free - Free the "keep warm" buffer
  328. */
  329. static void iwl4965_kw_free(struct iwl4965_priv *priv)
  330. {
  331. struct pci_dev *dev = priv->pci_dev;
  332. struct iwl4965_kw *kw = &priv->kw;
  333. if (kw->v_addr) {
  334. pci_free_consistent(dev, kw->size, kw->v_addr, kw->dma_addr);
  335. memset(kw, 0, sizeof(*kw));
  336. }
  337. }
  338. /**
  339. * iwl4965_txq_ctx_reset - Reset TX queue context
  340. * Destroys all DMA structures and initialise them again
  341. *
  342. * @param priv
  343. * @return error code
  344. */
  345. static int iwl4965_txq_ctx_reset(struct iwl4965_priv *priv)
  346. {
  347. int rc = 0;
  348. int txq_id, slots_num;
  349. unsigned long flags;
  350. iwl4965_kw_free(priv);
  351. /* Free all tx/cmd queues and keep-warm buffer */
  352. iwl4965_hw_txq_ctx_free(priv);
  353. /* Alloc keep-warm buffer */
  354. rc = iwl4965_kw_alloc(priv);
  355. if (rc) {
  356. IWL_ERROR("Keep Warm allocation failed");
  357. goto error_kw;
  358. }
  359. spin_lock_irqsave(&priv->lock, flags);
  360. rc = iwl4965_grab_nic_access(priv);
  361. if (unlikely(rc)) {
  362. IWL_ERROR("TX reset failed");
  363. spin_unlock_irqrestore(&priv->lock, flags);
  364. goto error_reset;
  365. }
  366. /* Turn off all Tx DMA channels */
  367. iwl4965_write_prph(priv, KDR_SCD_TXFACT, 0);
  368. iwl4965_release_nic_access(priv);
  369. spin_unlock_irqrestore(&priv->lock, flags);
  370. /* Tell 4965 where to find the keep-warm buffer */
  371. rc = iwl4965_kw_init(priv);
  372. if (rc) {
  373. IWL_ERROR("kw_init failed\n");
  374. goto error_reset;
  375. }
  376. /* Alloc and init all (default 16) Tx queues,
  377. * including the command queue (#4) */
  378. for (txq_id = 0; txq_id < priv->hw_setting.max_txq_num; txq_id++) {
  379. slots_num = (txq_id == IWL_CMD_QUEUE_NUM) ?
  380. TFD_CMD_SLOTS : TFD_TX_CMD_SLOTS;
  381. rc = iwl4965_tx_queue_init(priv, &priv->txq[txq_id], slots_num,
  382. txq_id);
  383. if (rc) {
  384. IWL_ERROR("Tx %d queue init failed\n", txq_id);
  385. goto error;
  386. }
  387. }
  388. return rc;
  389. error:
  390. iwl4965_hw_txq_ctx_free(priv);
  391. error_reset:
  392. iwl4965_kw_free(priv);
  393. error_kw:
  394. return rc;
  395. }
  396. int iwl4965_hw_nic_init(struct iwl4965_priv *priv)
  397. {
  398. int rc;
  399. unsigned long flags;
  400. struct iwl4965_rx_queue *rxq = &priv->rxq;
  401. u8 rev_id;
  402. u32 val;
  403. u8 val_link;
  404. iwl4965_power_init_handle(priv);
  405. /* nic_init */
  406. spin_lock_irqsave(&priv->lock, flags);
  407. iwl4965_set_bit(priv, CSR_GIO_CHICKEN_BITS,
  408. CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
  409. iwl4965_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
  410. rc = iwl4965_poll_bit(priv, CSR_GP_CNTRL,
  411. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
  412. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
  413. if (rc < 0) {
  414. spin_unlock_irqrestore(&priv->lock, flags);
  415. IWL_DEBUG_INFO("Failed to init the card\n");
  416. return rc;
  417. }
  418. rc = iwl4965_grab_nic_access(priv);
  419. if (rc) {
  420. spin_unlock_irqrestore(&priv->lock, flags);
  421. return rc;
  422. }
  423. iwl4965_read_prph(priv, APMG_CLK_CTRL_REG);
  424. iwl4965_write_prph(priv, APMG_CLK_CTRL_REG,
  425. APMG_CLK_VAL_DMA_CLK_RQT |
  426. APMG_CLK_VAL_BSM_CLK_RQT);
  427. iwl4965_read_prph(priv, APMG_CLK_CTRL_REG);
  428. udelay(20);
  429. iwl4965_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
  430. APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
  431. iwl4965_release_nic_access(priv);
  432. iwl4965_write32(priv, CSR_INT_COALESCING, 512 / 32);
  433. spin_unlock_irqrestore(&priv->lock, flags);
  434. /* Determine HW type */
  435. rc = pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &rev_id);
  436. if (rc)
  437. return rc;
  438. IWL_DEBUG_INFO("HW Revision ID = 0x%X\n", rev_id);
  439. iwl4965_nic_set_pwr_src(priv, 1);
  440. spin_lock_irqsave(&priv->lock, flags);
  441. if ((rev_id & 0x80) == 0x80 && (rev_id & 0x7f) < 8) {
  442. pci_read_config_dword(priv->pci_dev, PCI_REG_WUM8, &val);
  443. /* Enable No Snoop field */
  444. pci_write_config_dword(priv->pci_dev, PCI_REG_WUM8,
  445. val & ~(1 << 11));
  446. }
  447. spin_unlock_irqrestore(&priv->lock, flags);
  448. if (priv->eeprom.calib_version < EEPROM_TX_POWER_VERSION_NEW) {
  449. IWL_ERROR("Older EEPROM detected! Aborting.\n");
  450. return -EINVAL;
  451. }
  452. pci_read_config_byte(priv->pci_dev, PCI_LINK_CTRL, &val_link);
  453. /* disable L1 entry -- workaround for pre-B1 */
  454. pci_write_config_byte(priv->pci_dev, PCI_LINK_CTRL, val_link & ~0x02);
  455. spin_lock_irqsave(&priv->lock, flags);
  456. /* set CSR_HW_CONFIG_REG for uCode use */
  457. iwl4965_set_bit(priv, CSR_HW_IF_CONFIG_REG,
  458. CSR_HW_IF_CONFIG_REG_BIT_KEDRON_R |
  459. CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI |
  460. CSR_HW_IF_CONFIG_REG_BIT_MAC_SI);
  461. rc = iwl4965_grab_nic_access(priv);
  462. if (rc < 0) {
  463. spin_unlock_irqrestore(&priv->lock, flags);
  464. IWL_DEBUG_INFO("Failed to init the card\n");
  465. return rc;
  466. }
  467. iwl4965_read_prph(priv, APMG_PS_CTRL_REG);
  468. iwl4965_set_bits_prph(priv, APMG_PS_CTRL_REG,
  469. APMG_PS_CTRL_VAL_RESET_REQ);
  470. udelay(5);
  471. iwl4965_clear_bits_prph(priv, APMG_PS_CTRL_REG,
  472. APMG_PS_CTRL_VAL_RESET_REQ);
  473. iwl4965_release_nic_access(priv);
  474. spin_unlock_irqrestore(&priv->lock, flags);
  475. iwl4965_hw_card_show_info(priv);
  476. /* end nic_init */
  477. /* Allocate the RX queue, or reset if it is already allocated */
  478. if (!rxq->bd) {
  479. rc = iwl4965_rx_queue_alloc(priv);
  480. if (rc) {
  481. IWL_ERROR("Unable to initialize Rx queue\n");
  482. return -ENOMEM;
  483. }
  484. } else
  485. iwl4965_rx_queue_reset(priv, rxq);
  486. iwl4965_rx_replenish(priv);
  487. iwl4965_rx_init(priv, rxq);
  488. spin_lock_irqsave(&priv->lock, flags);
  489. rxq->need_update = 1;
  490. iwl4965_rx_queue_update_write_ptr(priv, rxq);
  491. spin_unlock_irqrestore(&priv->lock, flags);
  492. /* Allocate and init all Tx and Command queues */
  493. rc = iwl4965_txq_ctx_reset(priv);
  494. if (rc)
  495. return rc;
  496. if (priv->eeprom.sku_cap & EEPROM_SKU_CAP_SW_RF_KILL_ENABLE)
  497. IWL_DEBUG_RF_KILL("SW RF KILL supported in EEPROM.\n");
  498. if (priv->eeprom.sku_cap & EEPROM_SKU_CAP_HW_RF_KILL_ENABLE)
  499. IWL_DEBUG_RF_KILL("HW RF KILL supported in EEPROM.\n");
  500. set_bit(STATUS_INIT, &priv->status);
  501. return 0;
  502. }
  503. int iwl4965_hw_nic_stop_master(struct iwl4965_priv *priv)
  504. {
  505. int rc = 0;
  506. u32 reg_val;
  507. unsigned long flags;
  508. spin_lock_irqsave(&priv->lock, flags);
  509. /* set stop master bit */
  510. iwl4965_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
  511. reg_val = iwl4965_read32(priv, CSR_GP_CNTRL);
  512. if (CSR_GP_CNTRL_REG_FLAG_MAC_POWER_SAVE ==
  513. (reg_val & CSR_GP_CNTRL_REG_MSK_POWER_SAVE_TYPE))
  514. IWL_DEBUG_INFO("Card in power save, master is already "
  515. "stopped\n");
  516. else {
  517. rc = iwl4965_poll_bit(priv, CSR_RESET,
  518. CSR_RESET_REG_FLAG_MASTER_DISABLED,
  519. CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
  520. if (rc < 0) {
  521. spin_unlock_irqrestore(&priv->lock, flags);
  522. return rc;
  523. }
  524. }
  525. spin_unlock_irqrestore(&priv->lock, flags);
  526. IWL_DEBUG_INFO("stop master\n");
  527. return rc;
  528. }
  529. /**
  530. * iwl4965_hw_txq_ctx_stop - Stop all Tx DMA channels, free Tx queue memory
  531. */
  532. void iwl4965_hw_txq_ctx_stop(struct iwl4965_priv *priv)
  533. {
  534. int txq_id;
  535. unsigned long flags;
  536. /* Stop each Tx DMA channel, and wait for it to be idle */
  537. for (txq_id = 0; txq_id < priv->hw_setting.max_txq_num; txq_id++) {
  538. spin_lock_irqsave(&priv->lock, flags);
  539. if (iwl4965_grab_nic_access(priv)) {
  540. spin_unlock_irqrestore(&priv->lock, flags);
  541. continue;
  542. }
  543. iwl4965_write_direct32(priv,
  544. IWL_FH_TCSR_CHNL_TX_CONFIG_REG(txq_id),
  545. 0x0);
  546. iwl4965_poll_direct_bit(priv, IWL_FH_TSSR_TX_STATUS_REG,
  547. IWL_FH_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE
  548. (txq_id), 200);
  549. iwl4965_release_nic_access(priv);
  550. spin_unlock_irqrestore(&priv->lock, flags);
  551. }
  552. /* Deallocate memory for all Tx queues */
  553. iwl4965_hw_txq_ctx_free(priv);
  554. }
  555. int iwl4965_hw_nic_reset(struct iwl4965_priv *priv)
  556. {
  557. int rc = 0;
  558. unsigned long flags;
  559. iwl4965_hw_nic_stop_master(priv);
  560. spin_lock_irqsave(&priv->lock, flags);
  561. iwl4965_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
  562. udelay(10);
  563. iwl4965_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
  564. rc = iwl4965_poll_bit(priv, CSR_RESET,
  565. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
  566. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25);
  567. udelay(10);
  568. rc = iwl4965_grab_nic_access(priv);
  569. if (!rc) {
  570. iwl4965_write_prph(priv, APMG_CLK_EN_REG,
  571. APMG_CLK_VAL_DMA_CLK_RQT |
  572. APMG_CLK_VAL_BSM_CLK_RQT);
  573. udelay(10);
  574. iwl4965_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
  575. APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
  576. iwl4965_release_nic_access(priv);
  577. }
  578. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  579. wake_up_interruptible(&priv->wait_command_queue);
  580. spin_unlock_irqrestore(&priv->lock, flags);
  581. return rc;
  582. }
  583. #define REG_RECALIB_PERIOD (60)
  584. /**
  585. * iwl4965_bg_statistics_periodic - Timer callback to queue statistics
  586. *
  587. * This callback is provided in order to queue the statistics_work
  588. * in work_queue context (v. softirq)
  589. *
  590. * This timer function is continually reset to execute within
  591. * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
  592. * was received. We need to ensure we receive the statistics in order
  593. * to update the temperature used for calibrating the TXPOWER. However,
  594. * we can't send the statistics command from softirq context (which
  595. * is the context which timers run at) so we have to queue off the
  596. * statistics_work to actually send the command to the hardware.
  597. */
  598. static void iwl4965_bg_statistics_periodic(unsigned long data)
  599. {
  600. struct iwl4965_priv *priv = (struct iwl4965_priv *)data;
  601. queue_work(priv->workqueue, &priv->statistics_work);
  602. }
  603. /**
  604. * iwl4965_bg_statistics_work - Send the statistics request to the hardware.
  605. *
  606. * This is queued by iwl4965_bg_statistics_periodic.
  607. */
  608. static void iwl4965_bg_statistics_work(struct work_struct *work)
  609. {
  610. struct iwl4965_priv *priv = container_of(work, struct iwl4965_priv,
  611. statistics_work);
  612. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  613. return;
  614. mutex_lock(&priv->mutex);
  615. iwl4965_send_statistics_request(priv);
  616. mutex_unlock(&priv->mutex);
  617. }
  618. #define CT_LIMIT_CONST 259
  619. #define TM_CT_KILL_THRESHOLD 110
  620. void iwl4965_rf_kill_ct_config(struct iwl4965_priv *priv)
  621. {
  622. struct iwl4965_ct_kill_config cmd;
  623. u32 R1, R2, R3;
  624. u32 temp_th;
  625. u32 crit_temperature;
  626. unsigned long flags;
  627. int rc = 0;
  628. spin_lock_irqsave(&priv->lock, flags);
  629. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  630. CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
  631. spin_unlock_irqrestore(&priv->lock, flags);
  632. if (priv->statistics.flag & STATISTICS_REPLY_FLG_FAT_MODE_MSK) {
  633. R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[1]);
  634. R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[1]);
  635. R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[1]);
  636. } else {
  637. R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[0]);
  638. R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[0]);
  639. R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[0]);
  640. }
  641. temp_th = CELSIUS_TO_KELVIN(TM_CT_KILL_THRESHOLD);
  642. crit_temperature = ((temp_th * (R3-R1))/CT_LIMIT_CONST) + R2;
  643. cmd.critical_temperature_R = cpu_to_le32(crit_temperature);
  644. rc = iwl4965_send_cmd_pdu(priv,
  645. REPLY_CT_KILL_CONFIG_CMD, sizeof(cmd), &cmd);
  646. if (rc)
  647. IWL_ERROR("REPLY_CT_KILL_CONFIG_CMD failed\n");
  648. else
  649. IWL_DEBUG_INFO("REPLY_CT_KILL_CONFIG_CMD succeeded\n");
  650. }
  651. #ifdef CONFIG_IWL4965_SENSITIVITY
  652. /* "false alarms" are signals that our DSP tries to lock onto,
  653. * but then determines that they are either noise, or transmissions
  654. * from a distant wireless network (also "noise", really) that get
  655. * "stepped on" by stronger transmissions within our own network.
  656. * This algorithm attempts to set a sensitivity level that is high
  657. * enough to receive all of our own network traffic, but not so
  658. * high that our DSP gets too busy trying to lock onto non-network
  659. * activity/noise. */
  660. static int iwl4965_sens_energy_cck(struct iwl4965_priv *priv,
  661. u32 norm_fa,
  662. u32 rx_enable_time,
  663. struct statistics_general_data *rx_info)
  664. {
  665. u32 max_nrg_cck = 0;
  666. int i = 0;
  667. u8 max_silence_rssi = 0;
  668. u32 silence_ref = 0;
  669. u8 silence_rssi_a = 0;
  670. u8 silence_rssi_b = 0;
  671. u8 silence_rssi_c = 0;
  672. u32 val;
  673. /* "false_alarms" values below are cross-multiplications to assess the
  674. * numbers of false alarms within the measured period of actual Rx
  675. * (Rx is off when we're txing), vs the min/max expected false alarms
  676. * (some should be expected if rx is sensitive enough) in a
  677. * hypothetical listening period of 200 time units (TU), 204.8 msec:
  678. *
  679. * MIN_FA/fixed-time < false_alarms/actual-rx-time < MAX_FA/beacon-time
  680. *
  681. * */
  682. u32 false_alarms = norm_fa * 200 * 1024;
  683. u32 max_false_alarms = MAX_FA_CCK * rx_enable_time;
  684. u32 min_false_alarms = MIN_FA_CCK * rx_enable_time;
  685. struct iwl4965_sensitivity_data *data = NULL;
  686. data = &(priv->sensitivity_data);
  687. data->nrg_auto_corr_silence_diff = 0;
  688. /* Find max silence rssi among all 3 receivers.
  689. * This is background noise, which may include transmissions from other
  690. * networks, measured during silence before our network's beacon */
  691. silence_rssi_a = (u8)((rx_info->beacon_silence_rssi_a &
  692. ALL_BAND_FILTER) >> 8);
  693. silence_rssi_b = (u8)((rx_info->beacon_silence_rssi_b &
  694. ALL_BAND_FILTER) >> 8);
  695. silence_rssi_c = (u8)((rx_info->beacon_silence_rssi_c &
  696. ALL_BAND_FILTER) >> 8);
  697. val = max(silence_rssi_b, silence_rssi_c);
  698. max_silence_rssi = max(silence_rssi_a, (u8) val);
  699. /* Store silence rssi in 20-beacon history table */
  700. data->nrg_silence_rssi[data->nrg_silence_idx] = max_silence_rssi;
  701. data->nrg_silence_idx++;
  702. if (data->nrg_silence_idx >= NRG_NUM_PREV_STAT_L)
  703. data->nrg_silence_idx = 0;
  704. /* Find max silence rssi across 20 beacon history */
  705. for (i = 0; i < NRG_NUM_PREV_STAT_L; i++) {
  706. val = data->nrg_silence_rssi[i];
  707. silence_ref = max(silence_ref, val);
  708. }
  709. IWL_DEBUG_CALIB("silence a %u, b %u, c %u, 20-bcn max %u\n",
  710. silence_rssi_a, silence_rssi_b, silence_rssi_c,
  711. silence_ref);
  712. /* Find max rx energy (min value!) among all 3 receivers,
  713. * measured during beacon frame.
  714. * Save it in 10-beacon history table. */
  715. i = data->nrg_energy_idx;
  716. val = min(rx_info->beacon_energy_b, rx_info->beacon_energy_c);
  717. data->nrg_value[i] = min(rx_info->beacon_energy_a, val);
  718. data->nrg_energy_idx++;
  719. if (data->nrg_energy_idx >= 10)
  720. data->nrg_energy_idx = 0;
  721. /* Find min rx energy (max value) across 10 beacon history.
  722. * This is the minimum signal level that we want to receive well.
  723. * Add backoff (margin so we don't miss slightly lower energy frames).
  724. * This establishes an upper bound (min value) for energy threshold. */
  725. max_nrg_cck = data->nrg_value[0];
  726. for (i = 1; i < 10; i++)
  727. max_nrg_cck = (u32) max(max_nrg_cck, (data->nrg_value[i]));
  728. max_nrg_cck += 6;
  729. IWL_DEBUG_CALIB("rx energy a %u, b %u, c %u, 10-bcn max/min %u\n",
  730. rx_info->beacon_energy_a, rx_info->beacon_energy_b,
  731. rx_info->beacon_energy_c, max_nrg_cck - 6);
  732. /* Count number of consecutive beacons with fewer-than-desired
  733. * false alarms. */
  734. if (false_alarms < min_false_alarms)
  735. data->num_in_cck_no_fa++;
  736. else
  737. data->num_in_cck_no_fa = 0;
  738. IWL_DEBUG_CALIB("consecutive bcns with few false alarms = %u\n",
  739. data->num_in_cck_no_fa);
  740. /* If we got too many false alarms this time, reduce sensitivity */
  741. if (false_alarms > max_false_alarms) {
  742. IWL_DEBUG_CALIB("norm FA %u > max FA %u\n",
  743. false_alarms, max_false_alarms);
  744. IWL_DEBUG_CALIB("... reducing sensitivity\n");
  745. data->nrg_curr_state = IWL_FA_TOO_MANY;
  746. if (data->auto_corr_cck > AUTO_CORR_MAX_TH_CCK) {
  747. /* Store for "fewer than desired" on later beacon */
  748. data->nrg_silence_ref = silence_ref;
  749. /* increase energy threshold (reduce nrg value)
  750. * to decrease sensitivity */
  751. if (data->nrg_th_cck > (NRG_MAX_CCK + NRG_STEP_CCK))
  752. data->nrg_th_cck = data->nrg_th_cck
  753. - NRG_STEP_CCK;
  754. }
  755. /* increase auto_corr values to decrease sensitivity */
  756. if (data->auto_corr_cck < AUTO_CORR_MAX_TH_CCK)
  757. data->auto_corr_cck = AUTO_CORR_MAX_TH_CCK + 1;
  758. else {
  759. val = data->auto_corr_cck + AUTO_CORR_STEP_CCK;
  760. data->auto_corr_cck = min((u32)AUTO_CORR_MAX_CCK, val);
  761. }
  762. val = data->auto_corr_cck_mrc + AUTO_CORR_STEP_CCK;
  763. data->auto_corr_cck_mrc = min((u32)AUTO_CORR_MAX_CCK_MRC, val);
  764. /* Else if we got fewer than desired, increase sensitivity */
  765. } else if (false_alarms < min_false_alarms) {
  766. data->nrg_curr_state = IWL_FA_TOO_FEW;
  767. /* Compare silence level with silence level for most recent
  768. * healthy number or too many false alarms */
  769. data->nrg_auto_corr_silence_diff = (s32)data->nrg_silence_ref -
  770. (s32)silence_ref;
  771. IWL_DEBUG_CALIB("norm FA %u < min FA %u, silence diff %d\n",
  772. false_alarms, min_false_alarms,
  773. data->nrg_auto_corr_silence_diff);
  774. /* Increase value to increase sensitivity, but only if:
  775. * 1a) previous beacon did *not* have *too many* false alarms
  776. * 1b) AND there's a significant difference in Rx levels
  777. * from a previous beacon with too many, or healthy # FAs
  778. * OR 2) We've seen a lot of beacons (100) with too few
  779. * false alarms */
  780. if ((data->nrg_prev_state != IWL_FA_TOO_MANY) &&
  781. ((data->nrg_auto_corr_silence_diff > NRG_DIFF) ||
  782. (data->num_in_cck_no_fa > MAX_NUMBER_CCK_NO_FA))) {
  783. IWL_DEBUG_CALIB("... increasing sensitivity\n");
  784. /* Increase nrg value to increase sensitivity */
  785. val = data->nrg_th_cck + NRG_STEP_CCK;
  786. data->nrg_th_cck = min((u32)NRG_MIN_CCK, val);
  787. /* Decrease auto_corr values to increase sensitivity */
  788. val = data->auto_corr_cck - AUTO_CORR_STEP_CCK;
  789. data->auto_corr_cck = max((u32)AUTO_CORR_MIN_CCK, val);
  790. val = data->auto_corr_cck_mrc - AUTO_CORR_STEP_CCK;
  791. data->auto_corr_cck_mrc =
  792. max((u32)AUTO_CORR_MIN_CCK_MRC, val);
  793. } else
  794. IWL_DEBUG_CALIB("... but not changing sensitivity\n");
  795. /* Else we got a healthy number of false alarms, keep status quo */
  796. } else {
  797. IWL_DEBUG_CALIB(" FA in safe zone\n");
  798. data->nrg_curr_state = IWL_FA_GOOD_RANGE;
  799. /* Store for use in "fewer than desired" with later beacon */
  800. data->nrg_silence_ref = silence_ref;
  801. /* If previous beacon had too many false alarms,
  802. * give it some extra margin by reducing sensitivity again
  803. * (but don't go below measured energy of desired Rx) */
  804. if (IWL_FA_TOO_MANY == data->nrg_prev_state) {
  805. IWL_DEBUG_CALIB("... increasing margin\n");
  806. data->nrg_th_cck -= NRG_MARGIN;
  807. }
  808. }
  809. /* Make sure the energy threshold does not go above the measured
  810. * energy of the desired Rx signals (reduced by backoff margin),
  811. * or else we might start missing Rx frames.
  812. * Lower value is higher energy, so we use max()!
  813. */
  814. data->nrg_th_cck = max(max_nrg_cck, data->nrg_th_cck);
  815. IWL_DEBUG_CALIB("new nrg_th_cck %u\n", data->nrg_th_cck);
  816. data->nrg_prev_state = data->nrg_curr_state;
  817. return 0;
  818. }
  819. static int iwl4965_sens_auto_corr_ofdm(struct iwl4965_priv *priv,
  820. u32 norm_fa,
  821. u32 rx_enable_time)
  822. {
  823. u32 val;
  824. u32 false_alarms = norm_fa * 200 * 1024;
  825. u32 max_false_alarms = MAX_FA_OFDM * rx_enable_time;
  826. u32 min_false_alarms = MIN_FA_OFDM * rx_enable_time;
  827. struct iwl4965_sensitivity_data *data = NULL;
  828. data = &(priv->sensitivity_data);
  829. /* If we got too many false alarms this time, reduce sensitivity */
  830. if (false_alarms > max_false_alarms) {
  831. IWL_DEBUG_CALIB("norm FA %u > max FA %u)\n",
  832. false_alarms, max_false_alarms);
  833. val = data->auto_corr_ofdm + AUTO_CORR_STEP_OFDM;
  834. data->auto_corr_ofdm =
  835. min((u32)AUTO_CORR_MAX_OFDM, val);
  836. val = data->auto_corr_ofdm_mrc + AUTO_CORR_STEP_OFDM;
  837. data->auto_corr_ofdm_mrc =
  838. min((u32)AUTO_CORR_MAX_OFDM_MRC, val);
  839. val = data->auto_corr_ofdm_x1 + AUTO_CORR_STEP_OFDM;
  840. data->auto_corr_ofdm_x1 =
  841. min((u32)AUTO_CORR_MAX_OFDM_X1, val);
  842. val = data->auto_corr_ofdm_mrc_x1 + AUTO_CORR_STEP_OFDM;
  843. data->auto_corr_ofdm_mrc_x1 =
  844. min((u32)AUTO_CORR_MAX_OFDM_MRC_X1, val);
  845. }
  846. /* Else if we got fewer than desired, increase sensitivity */
  847. else if (false_alarms < min_false_alarms) {
  848. IWL_DEBUG_CALIB("norm FA %u < min FA %u\n",
  849. false_alarms, min_false_alarms);
  850. val = data->auto_corr_ofdm - AUTO_CORR_STEP_OFDM;
  851. data->auto_corr_ofdm =
  852. max((u32)AUTO_CORR_MIN_OFDM, val);
  853. val = data->auto_corr_ofdm_mrc - AUTO_CORR_STEP_OFDM;
  854. data->auto_corr_ofdm_mrc =
  855. max((u32)AUTO_CORR_MIN_OFDM_MRC, val);
  856. val = data->auto_corr_ofdm_x1 - AUTO_CORR_STEP_OFDM;
  857. data->auto_corr_ofdm_x1 =
  858. max((u32)AUTO_CORR_MIN_OFDM_X1, val);
  859. val = data->auto_corr_ofdm_mrc_x1 - AUTO_CORR_STEP_OFDM;
  860. data->auto_corr_ofdm_mrc_x1 =
  861. max((u32)AUTO_CORR_MIN_OFDM_MRC_X1, val);
  862. }
  863. else
  864. IWL_DEBUG_CALIB("min FA %u < norm FA %u < max FA %u OK\n",
  865. min_false_alarms, false_alarms, max_false_alarms);
  866. return 0;
  867. }
  868. static int iwl4965_sensitivity_callback(struct iwl4965_priv *priv,
  869. struct iwl4965_cmd *cmd, struct sk_buff *skb)
  870. {
  871. /* We didn't cache the SKB; let the caller free it */
  872. return 1;
  873. }
  874. /* Prepare a SENSITIVITY_CMD, send to uCode if values have changed */
  875. static int iwl4965_sensitivity_write(struct iwl4965_priv *priv, u8 flags)
  876. {
  877. int rc = 0;
  878. struct iwl4965_sensitivity_cmd cmd ;
  879. struct iwl4965_sensitivity_data *data = NULL;
  880. struct iwl4965_host_cmd cmd_out = {
  881. .id = SENSITIVITY_CMD,
  882. .len = sizeof(struct iwl4965_sensitivity_cmd),
  883. .meta.flags = flags,
  884. .data = &cmd,
  885. };
  886. data = &(priv->sensitivity_data);
  887. memset(&cmd, 0, sizeof(cmd));
  888. cmd.table[HD_AUTO_CORR32_X4_TH_ADD_MIN_INDEX] =
  889. cpu_to_le16((u16)data->auto_corr_ofdm);
  890. cmd.table[HD_AUTO_CORR32_X4_TH_ADD_MIN_MRC_INDEX] =
  891. cpu_to_le16((u16)data->auto_corr_ofdm_mrc);
  892. cmd.table[HD_AUTO_CORR32_X1_TH_ADD_MIN_INDEX] =
  893. cpu_to_le16((u16)data->auto_corr_ofdm_x1);
  894. cmd.table[HD_AUTO_CORR32_X1_TH_ADD_MIN_MRC_INDEX] =
  895. cpu_to_le16((u16)data->auto_corr_ofdm_mrc_x1);
  896. cmd.table[HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX] =
  897. cpu_to_le16((u16)data->auto_corr_cck);
  898. cmd.table[HD_AUTO_CORR40_X4_TH_ADD_MIN_MRC_INDEX] =
  899. cpu_to_le16((u16)data->auto_corr_cck_mrc);
  900. cmd.table[HD_MIN_ENERGY_CCK_DET_INDEX] =
  901. cpu_to_le16((u16)data->nrg_th_cck);
  902. cmd.table[HD_MIN_ENERGY_OFDM_DET_INDEX] =
  903. cpu_to_le16((u16)data->nrg_th_ofdm);
  904. cmd.table[HD_BARKER_CORR_TH_ADD_MIN_INDEX] =
  905. __constant_cpu_to_le16(190);
  906. cmd.table[HD_BARKER_CORR_TH_ADD_MIN_MRC_INDEX] =
  907. __constant_cpu_to_le16(390);
  908. cmd.table[HD_OFDM_ENERGY_TH_IN_INDEX] =
  909. __constant_cpu_to_le16(62);
  910. IWL_DEBUG_CALIB("ofdm: ac %u mrc %u x1 %u mrc_x1 %u thresh %u\n",
  911. data->auto_corr_ofdm, data->auto_corr_ofdm_mrc,
  912. data->auto_corr_ofdm_x1, data->auto_corr_ofdm_mrc_x1,
  913. data->nrg_th_ofdm);
  914. IWL_DEBUG_CALIB("cck: ac %u mrc %u thresh %u\n",
  915. data->auto_corr_cck, data->auto_corr_cck_mrc,
  916. data->nrg_th_cck);
  917. /* Update uCode's "work" table, and copy it to DSP */
  918. cmd.control = SENSITIVITY_CMD_CONTROL_WORK_TABLE;
  919. if (flags & CMD_ASYNC)
  920. cmd_out.meta.u.callback = iwl4965_sensitivity_callback;
  921. /* Don't send command to uCode if nothing has changed */
  922. if (!memcmp(&cmd.table[0], &(priv->sensitivity_tbl[0]),
  923. sizeof(u16)*HD_TABLE_SIZE)) {
  924. IWL_DEBUG_CALIB("No change in SENSITIVITY_CMD\n");
  925. return 0;
  926. }
  927. /* Copy table for comparison next time */
  928. memcpy(&(priv->sensitivity_tbl[0]), &(cmd.table[0]),
  929. sizeof(u16)*HD_TABLE_SIZE);
  930. rc = iwl4965_send_cmd(priv, &cmd_out);
  931. if (!rc) {
  932. IWL_DEBUG_CALIB("SENSITIVITY_CMD succeeded\n");
  933. return rc;
  934. }
  935. return 0;
  936. }
  937. void iwl4965_init_sensitivity(struct iwl4965_priv *priv, u8 flags, u8 force)
  938. {
  939. int rc = 0;
  940. int i;
  941. struct iwl4965_sensitivity_data *data = NULL;
  942. IWL_DEBUG_CALIB("Start iwl4965_init_sensitivity\n");
  943. if (force)
  944. memset(&(priv->sensitivity_tbl[0]), 0,
  945. sizeof(u16)*HD_TABLE_SIZE);
  946. /* Clear driver's sensitivity algo data */
  947. data = &(priv->sensitivity_data);
  948. memset(data, 0, sizeof(struct iwl4965_sensitivity_data));
  949. data->num_in_cck_no_fa = 0;
  950. data->nrg_curr_state = IWL_FA_TOO_MANY;
  951. data->nrg_prev_state = IWL_FA_TOO_MANY;
  952. data->nrg_silence_ref = 0;
  953. data->nrg_silence_idx = 0;
  954. data->nrg_energy_idx = 0;
  955. for (i = 0; i < 10; i++)
  956. data->nrg_value[i] = 0;
  957. for (i = 0; i < NRG_NUM_PREV_STAT_L; i++)
  958. data->nrg_silence_rssi[i] = 0;
  959. data->auto_corr_ofdm = 90;
  960. data->auto_corr_ofdm_mrc = 170;
  961. data->auto_corr_ofdm_x1 = 105;
  962. data->auto_corr_ofdm_mrc_x1 = 220;
  963. data->auto_corr_cck = AUTO_CORR_CCK_MIN_VAL_DEF;
  964. data->auto_corr_cck_mrc = 200;
  965. data->nrg_th_cck = 100;
  966. data->nrg_th_ofdm = 100;
  967. data->last_bad_plcp_cnt_ofdm = 0;
  968. data->last_fa_cnt_ofdm = 0;
  969. data->last_bad_plcp_cnt_cck = 0;
  970. data->last_fa_cnt_cck = 0;
  971. /* Clear prior Sensitivity command data to force send to uCode */
  972. if (force)
  973. memset(&(priv->sensitivity_tbl[0]), 0,
  974. sizeof(u16)*HD_TABLE_SIZE);
  975. rc |= iwl4965_sensitivity_write(priv, flags);
  976. IWL_DEBUG_CALIB("<<return 0x%X\n", rc);
  977. return;
  978. }
  979. /* Reset differential Rx gains in NIC to prepare for chain noise calibration.
  980. * Called after every association, but this runs only once!
  981. * ... once chain noise is calibrated the first time, it's good forever. */
  982. void iwl4965_chain_noise_reset(struct iwl4965_priv *priv)
  983. {
  984. struct iwl4965_chain_noise_data *data = NULL;
  985. int rc = 0;
  986. data = &(priv->chain_noise_data);
  987. if ((data->state == IWL_CHAIN_NOISE_ALIVE) && iwl4965_is_associated(priv)) {
  988. struct iwl4965_calibration_cmd cmd;
  989. memset(&cmd, 0, sizeof(cmd));
  990. cmd.opCode = PHY_CALIBRATE_DIFF_GAIN_CMD;
  991. cmd.diff_gain_a = 0;
  992. cmd.diff_gain_b = 0;
  993. cmd.diff_gain_c = 0;
  994. rc = iwl4965_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
  995. sizeof(cmd), &cmd);
  996. msleep(4);
  997. data->state = IWL_CHAIN_NOISE_ACCUMULATE;
  998. IWL_DEBUG_CALIB("Run chain_noise_calibrate\n");
  999. }
  1000. return;
  1001. }
  1002. /*
  1003. * Accumulate 20 beacons of signal and noise statistics for each of
  1004. * 3 receivers/antennas/rx-chains, then figure out:
  1005. * 1) Which antennas are connected.
  1006. * 2) Differential rx gain settings to balance the 3 receivers.
  1007. */
  1008. static void iwl4965_noise_calibration(struct iwl4965_priv *priv,
  1009. struct iwl4965_notif_statistics *stat_resp)
  1010. {
  1011. struct iwl4965_chain_noise_data *data = NULL;
  1012. int rc = 0;
  1013. u32 chain_noise_a;
  1014. u32 chain_noise_b;
  1015. u32 chain_noise_c;
  1016. u32 chain_sig_a;
  1017. u32 chain_sig_b;
  1018. u32 chain_sig_c;
  1019. u32 average_sig[NUM_RX_CHAINS] = {INITIALIZATION_VALUE};
  1020. u32 average_noise[NUM_RX_CHAINS] = {INITIALIZATION_VALUE};
  1021. u32 max_average_sig;
  1022. u16 max_average_sig_antenna_i;
  1023. u32 min_average_noise = MIN_AVERAGE_NOISE_MAX_VALUE;
  1024. u16 min_average_noise_antenna_i = INITIALIZATION_VALUE;
  1025. u16 i = 0;
  1026. u16 chan_num = INITIALIZATION_VALUE;
  1027. u32 band = INITIALIZATION_VALUE;
  1028. u32 active_chains = 0;
  1029. unsigned long flags;
  1030. struct statistics_rx_non_phy *rx_info = &(stat_resp->rx.general);
  1031. data = &(priv->chain_noise_data);
  1032. /* Accumulate just the first 20 beacons after the first association,
  1033. * then we're done forever. */
  1034. if (data->state != IWL_CHAIN_NOISE_ACCUMULATE) {
  1035. if (data->state == IWL_CHAIN_NOISE_ALIVE)
  1036. IWL_DEBUG_CALIB("Wait for noise calib reset\n");
  1037. return;
  1038. }
  1039. spin_lock_irqsave(&priv->lock, flags);
  1040. if (rx_info->interference_data_flag != INTERFERENCE_DATA_AVAILABLE) {
  1041. IWL_DEBUG_CALIB(" << Interference data unavailable\n");
  1042. spin_unlock_irqrestore(&priv->lock, flags);
  1043. return;
  1044. }
  1045. band = (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) ? 0 : 1;
  1046. chan_num = le16_to_cpu(priv->staging_rxon.channel);
  1047. /* Make sure we accumulate data for just the associated channel
  1048. * (even if scanning). */
  1049. if ((chan_num != (le32_to_cpu(stat_resp->flag) >> 16)) ||
  1050. ((STATISTICS_REPLY_FLG_BAND_24G_MSK ==
  1051. (stat_resp->flag & STATISTICS_REPLY_FLG_BAND_24G_MSK)) && band)) {
  1052. IWL_DEBUG_CALIB("Stats not from chan=%d, band=%d\n",
  1053. chan_num, band);
  1054. spin_unlock_irqrestore(&priv->lock, flags);
  1055. return;
  1056. }
  1057. /* Accumulate beacon statistics values across 20 beacons */
  1058. chain_noise_a = le32_to_cpu(rx_info->beacon_silence_rssi_a) &
  1059. IN_BAND_FILTER;
  1060. chain_noise_b = le32_to_cpu(rx_info->beacon_silence_rssi_b) &
  1061. IN_BAND_FILTER;
  1062. chain_noise_c = le32_to_cpu(rx_info->beacon_silence_rssi_c) &
  1063. IN_BAND_FILTER;
  1064. chain_sig_a = le32_to_cpu(rx_info->beacon_rssi_a) & IN_BAND_FILTER;
  1065. chain_sig_b = le32_to_cpu(rx_info->beacon_rssi_b) & IN_BAND_FILTER;
  1066. chain_sig_c = le32_to_cpu(rx_info->beacon_rssi_c) & IN_BAND_FILTER;
  1067. spin_unlock_irqrestore(&priv->lock, flags);
  1068. data->beacon_count++;
  1069. data->chain_noise_a = (chain_noise_a + data->chain_noise_a);
  1070. data->chain_noise_b = (chain_noise_b + data->chain_noise_b);
  1071. data->chain_noise_c = (chain_noise_c + data->chain_noise_c);
  1072. data->chain_signal_a = (chain_sig_a + data->chain_signal_a);
  1073. data->chain_signal_b = (chain_sig_b + data->chain_signal_b);
  1074. data->chain_signal_c = (chain_sig_c + data->chain_signal_c);
  1075. IWL_DEBUG_CALIB("chan=%d, band=%d, beacon=%d\n", chan_num, band,
  1076. data->beacon_count);
  1077. IWL_DEBUG_CALIB("chain_sig: a %d b %d c %d\n",
  1078. chain_sig_a, chain_sig_b, chain_sig_c);
  1079. IWL_DEBUG_CALIB("chain_noise: a %d b %d c %d\n",
  1080. chain_noise_a, chain_noise_b, chain_noise_c);
  1081. /* If this is the 20th beacon, determine:
  1082. * 1) Disconnected antennas (using signal strengths)
  1083. * 2) Differential gain (using silence noise) to balance receivers */
  1084. if (data->beacon_count == CAL_NUM_OF_BEACONS) {
  1085. /* Analyze signal for disconnected antenna */
  1086. average_sig[0] = (data->chain_signal_a) / CAL_NUM_OF_BEACONS;
  1087. average_sig[1] = (data->chain_signal_b) / CAL_NUM_OF_BEACONS;
  1088. average_sig[2] = (data->chain_signal_c) / CAL_NUM_OF_BEACONS;
  1089. if (average_sig[0] >= average_sig[1]) {
  1090. max_average_sig = average_sig[0];
  1091. max_average_sig_antenna_i = 0;
  1092. active_chains = (1 << max_average_sig_antenna_i);
  1093. } else {
  1094. max_average_sig = average_sig[1];
  1095. max_average_sig_antenna_i = 1;
  1096. active_chains = (1 << max_average_sig_antenna_i);
  1097. }
  1098. if (average_sig[2] >= max_average_sig) {
  1099. max_average_sig = average_sig[2];
  1100. max_average_sig_antenna_i = 2;
  1101. active_chains = (1 << max_average_sig_antenna_i);
  1102. }
  1103. IWL_DEBUG_CALIB("average_sig: a %d b %d c %d\n",
  1104. average_sig[0], average_sig[1], average_sig[2]);
  1105. IWL_DEBUG_CALIB("max_average_sig = %d, antenna %d\n",
  1106. max_average_sig, max_average_sig_antenna_i);
  1107. /* Compare signal strengths for all 3 receivers. */
  1108. for (i = 0; i < NUM_RX_CHAINS; i++) {
  1109. if (i != max_average_sig_antenna_i) {
  1110. s32 rssi_delta = (max_average_sig -
  1111. average_sig[i]);
  1112. /* If signal is very weak, compared with
  1113. * strongest, mark it as disconnected. */
  1114. if (rssi_delta > MAXIMUM_ALLOWED_PATHLOSS)
  1115. data->disconn_array[i] = 1;
  1116. else
  1117. active_chains |= (1 << i);
  1118. IWL_DEBUG_CALIB("i = %d rssiDelta = %d "
  1119. "disconn_array[i] = %d\n",
  1120. i, rssi_delta, data->disconn_array[i]);
  1121. }
  1122. }
  1123. /*If both chains A & B are disconnected -
  1124. * connect B and leave A as is */
  1125. if (data->disconn_array[CHAIN_A] &&
  1126. data->disconn_array[CHAIN_B]) {
  1127. data->disconn_array[CHAIN_B] = 0;
  1128. active_chains |= (1 << CHAIN_B);
  1129. IWL_DEBUG_CALIB("both A & B chains are disconnected! "
  1130. "W/A - declare B as connected\n");
  1131. }
  1132. IWL_DEBUG_CALIB("active_chains (bitwise) = 0x%x\n",
  1133. active_chains);
  1134. /* Save for use within RXON, TX, SCAN commands, etc. */
  1135. priv->valid_antenna = active_chains;
  1136. /* Analyze noise for rx balance */
  1137. average_noise[0] = ((data->chain_noise_a)/CAL_NUM_OF_BEACONS);
  1138. average_noise[1] = ((data->chain_noise_b)/CAL_NUM_OF_BEACONS);
  1139. average_noise[2] = ((data->chain_noise_c)/CAL_NUM_OF_BEACONS);
  1140. for (i = 0; i < NUM_RX_CHAINS; i++) {
  1141. if (!(data->disconn_array[i]) &&
  1142. (average_noise[i] <= min_average_noise)) {
  1143. /* This means that chain i is active and has
  1144. * lower noise values so far: */
  1145. min_average_noise = average_noise[i];
  1146. min_average_noise_antenna_i = i;
  1147. }
  1148. }
  1149. data->delta_gain_code[min_average_noise_antenna_i] = 0;
  1150. IWL_DEBUG_CALIB("average_noise: a %d b %d c %d\n",
  1151. average_noise[0], average_noise[1],
  1152. average_noise[2]);
  1153. IWL_DEBUG_CALIB("min_average_noise = %d, antenna %d\n",
  1154. min_average_noise, min_average_noise_antenna_i);
  1155. for (i = 0; i < NUM_RX_CHAINS; i++) {
  1156. s32 delta_g = 0;
  1157. if (!(data->disconn_array[i]) &&
  1158. (data->delta_gain_code[i] ==
  1159. CHAIN_NOISE_DELTA_GAIN_INIT_VAL)) {
  1160. delta_g = average_noise[i] - min_average_noise;
  1161. data->delta_gain_code[i] = (u8)((delta_g *
  1162. 10) / 15);
  1163. if (CHAIN_NOISE_MAX_DELTA_GAIN_CODE <
  1164. data->delta_gain_code[i])
  1165. data->delta_gain_code[i] =
  1166. CHAIN_NOISE_MAX_DELTA_GAIN_CODE;
  1167. data->delta_gain_code[i] =
  1168. (data->delta_gain_code[i] | (1 << 2));
  1169. } else
  1170. data->delta_gain_code[i] = 0;
  1171. }
  1172. IWL_DEBUG_CALIB("delta_gain_codes: a %d b %d c %d\n",
  1173. data->delta_gain_code[0],
  1174. data->delta_gain_code[1],
  1175. data->delta_gain_code[2]);
  1176. /* Differential gain gets sent to uCode only once */
  1177. if (!data->radio_write) {
  1178. struct iwl4965_calibration_cmd cmd;
  1179. data->radio_write = 1;
  1180. memset(&cmd, 0, sizeof(cmd));
  1181. cmd.opCode = PHY_CALIBRATE_DIFF_GAIN_CMD;
  1182. cmd.diff_gain_a = data->delta_gain_code[0];
  1183. cmd.diff_gain_b = data->delta_gain_code[1];
  1184. cmd.diff_gain_c = data->delta_gain_code[2];
  1185. rc = iwl4965_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
  1186. sizeof(cmd), &cmd);
  1187. if (rc)
  1188. IWL_DEBUG_CALIB("fail sending cmd "
  1189. "REPLY_PHY_CALIBRATION_CMD \n");
  1190. /* TODO we might want recalculate
  1191. * rx_chain in rxon cmd */
  1192. /* Mark so we run this algo only once! */
  1193. data->state = IWL_CHAIN_NOISE_CALIBRATED;
  1194. }
  1195. data->chain_noise_a = 0;
  1196. data->chain_noise_b = 0;
  1197. data->chain_noise_c = 0;
  1198. data->chain_signal_a = 0;
  1199. data->chain_signal_b = 0;
  1200. data->chain_signal_c = 0;
  1201. data->beacon_count = 0;
  1202. }
  1203. return;
  1204. }
  1205. static void iwl4965_sensitivity_calibration(struct iwl4965_priv *priv,
  1206. struct iwl4965_notif_statistics *resp)
  1207. {
  1208. int rc = 0;
  1209. u32 rx_enable_time;
  1210. u32 fa_cck;
  1211. u32 fa_ofdm;
  1212. u32 bad_plcp_cck;
  1213. u32 bad_plcp_ofdm;
  1214. u32 norm_fa_ofdm;
  1215. u32 norm_fa_cck;
  1216. struct iwl4965_sensitivity_data *data = NULL;
  1217. struct statistics_rx_non_phy *rx_info = &(resp->rx.general);
  1218. struct statistics_rx *statistics = &(resp->rx);
  1219. unsigned long flags;
  1220. struct statistics_general_data statis;
  1221. data = &(priv->sensitivity_data);
  1222. if (!iwl4965_is_associated(priv)) {
  1223. IWL_DEBUG_CALIB("<< - not associated\n");
  1224. return;
  1225. }
  1226. spin_lock_irqsave(&priv->lock, flags);
  1227. if (rx_info->interference_data_flag != INTERFERENCE_DATA_AVAILABLE) {
  1228. IWL_DEBUG_CALIB("<< invalid data.\n");
  1229. spin_unlock_irqrestore(&priv->lock, flags);
  1230. return;
  1231. }
  1232. /* Extract Statistics: */
  1233. rx_enable_time = le32_to_cpu(rx_info->channel_load);
  1234. fa_cck = le32_to_cpu(statistics->cck.false_alarm_cnt);
  1235. fa_ofdm = le32_to_cpu(statistics->ofdm.false_alarm_cnt);
  1236. bad_plcp_cck = le32_to_cpu(statistics->cck.plcp_err);
  1237. bad_plcp_ofdm = le32_to_cpu(statistics->ofdm.plcp_err);
  1238. statis.beacon_silence_rssi_a =
  1239. le32_to_cpu(statistics->general.beacon_silence_rssi_a);
  1240. statis.beacon_silence_rssi_b =
  1241. le32_to_cpu(statistics->general.beacon_silence_rssi_b);
  1242. statis.beacon_silence_rssi_c =
  1243. le32_to_cpu(statistics->general.beacon_silence_rssi_c);
  1244. statis.beacon_energy_a =
  1245. le32_to_cpu(statistics->general.beacon_energy_a);
  1246. statis.beacon_energy_b =
  1247. le32_to_cpu(statistics->general.beacon_energy_b);
  1248. statis.beacon_energy_c =
  1249. le32_to_cpu(statistics->general.beacon_energy_c);
  1250. spin_unlock_irqrestore(&priv->lock, flags);
  1251. IWL_DEBUG_CALIB("rx_enable_time = %u usecs\n", rx_enable_time);
  1252. if (!rx_enable_time) {
  1253. IWL_DEBUG_CALIB("<< RX Enable Time == 0! \n");
  1254. return;
  1255. }
  1256. /* These statistics increase monotonically, and do not reset
  1257. * at each beacon. Calculate difference from last value, or just
  1258. * use the new statistics value if it has reset or wrapped around. */
  1259. if (data->last_bad_plcp_cnt_cck > bad_plcp_cck)
  1260. data->last_bad_plcp_cnt_cck = bad_plcp_cck;
  1261. else {
  1262. bad_plcp_cck -= data->last_bad_plcp_cnt_cck;
  1263. data->last_bad_plcp_cnt_cck += bad_plcp_cck;
  1264. }
  1265. if (data->last_bad_plcp_cnt_ofdm > bad_plcp_ofdm)
  1266. data->last_bad_plcp_cnt_ofdm = bad_plcp_ofdm;
  1267. else {
  1268. bad_plcp_ofdm -= data->last_bad_plcp_cnt_ofdm;
  1269. data->last_bad_plcp_cnt_ofdm += bad_plcp_ofdm;
  1270. }
  1271. if (data->last_fa_cnt_ofdm > fa_ofdm)
  1272. data->last_fa_cnt_ofdm = fa_ofdm;
  1273. else {
  1274. fa_ofdm -= data->last_fa_cnt_ofdm;
  1275. data->last_fa_cnt_ofdm += fa_ofdm;
  1276. }
  1277. if (data->last_fa_cnt_cck > fa_cck)
  1278. data->last_fa_cnt_cck = fa_cck;
  1279. else {
  1280. fa_cck -= data->last_fa_cnt_cck;
  1281. data->last_fa_cnt_cck += fa_cck;
  1282. }
  1283. /* Total aborted signal locks */
  1284. norm_fa_ofdm = fa_ofdm + bad_plcp_ofdm;
  1285. norm_fa_cck = fa_cck + bad_plcp_cck;
  1286. IWL_DEBUG_CALIB("cck: fa %u badp %u ofdm: fa %u badp %u\n", fa_cck,
  1287. bad_plcp_cck, fa_ofdm, bad_plcp_ofdm);
  1288. iwl4965_sens_auto_corr_ofdm(priv, norm_fa_ofdm, rx_enable_time);
  1289. iwl4965_sens_energy_cck(priv, norm_fa_cck, rx_enable_time, &statis);
  1290. rc |= iwl4965_sensitivity_write(priv, CMD_ASYNC);
  1291. return;
  1292. }
  1293. static void iwl4965_bg_sensitivity_work(struct work_struct *work)
  1294. {
  1295. struct iwl4965_priv *priv = container_of(work, struct iwl4965_priv,
  1296. sensitivity_work);
  1297. mutex_lock(&priv->mutex);
  1298. if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
  1299. test_bit(STATUS_SCANNING, &priv->status)) {
  1300. mutex_unlock(&priv->mutex);
  1301. return;
  1302. }
  1303. if (priv->start_calib) {
  1304. iwl4965_noise_calibration(priv, &priv->statistics);
  1305. if (priv->sensitivity_data.state ==
  1306. IWL_SENS_CALIB_NEED_REINIT) {
  1307. iwl4965_init_sensitivity(priv, CMD_ASYNC, 0);
  1308. priv->sensitivity_data.state = IWL_SENS_CALIB_ALLOWED;
  1309. } else
  1310. iwl4965_sensitivity_calibration(priv,
  1311. &priv->statistics);
  1312. }
  1313. mutex_unlock(&priv->mutex);
  1314. return;
  1315. }
  1316. #endif /*CONFIG_IWL4965_SENSITIVITY*/
  1317. static void iwl4965_bg_txpower_work(struct work_struct *work)
  1318. {
  1319. struct iwl4965_priv *priv = container_of(work, struct iwl4965_priv,
  1320. txpower_work);
  1321. /* If a scan happened to start before we got here
  1322. * then just return; the statistics notification will
  1323. * kick off another scheduled work to compensate for
  1324. * any temperature delta we missed here. */
  1325. if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
  1326. test_bit(STATUS_SCANNING, &priv->status))
  1327. return;
  1328. mutex_lock(&priv->mutex);
  1329. /* Regardless of if we are assocaited, we must reconfigure the
  1330. * TX power since frames can be sent on non-radar channels while
  1331. * not associated */
  1332. iwl4965_hw_reg_send_txpower(priv);
  1333. /* Update last_temperature to keep is_calib_needed from running
  1334. * when it isn't needed... */
  1335. priv->last_temperature = priv->temperature;
  1336. mutex_unlock(&priv->mutex);
  1337. }
  1338. /*
  1339. * Acquire priv->lock before calling this function !
  1340. */
  1341. static void iwl4965_set_wr_ptrs(struct iwl4965_priv *priv, int txq_id, u32 index)
  1342. {
  1343. iwl4965_write_direct32(priv, HBUS_TARG_WRPTR,
  1344. (index & 0xff) | (txq_id << 8));
  1345. iwl4965_write_prph(priv, KDR_SCD_QUEUE_RDPTR(txq_id), index);
  1346. }
  1347. /**
  1348. * iwl4965_tx_queue_set_status - (optionally) start Tx/Cmd queue
  1349. * @tx_fifo_id: Tx DMA/FIFO channel (range 0-7) that the queue will feed
  1350. * @scd_retry: (1) Indicates queue will be used in aggregation mode
  1351. *
  1352. * NOTE: Acquire priv->lock before calling this function !
  1353. */
  1354. static void iwl4965_tx_queue_set_status(struct iwl4965_priv *priv,
  1355. struct iwl4965_tx_queue *txq,
  1356. int tx_fifo_id, int scd_retry)
  1357. {
  1358. int txq_id = txq->q.id;
  1359. /* Find out whether to activate Tx queue */
  1360. int active = test_bit(txq_id, &priv->txq_ctx_active_msk)?1:0;
  1361. /* Set up and activate */
  1362. iwl4965_write_prph(priv, KDR_SCD_QUEUE_STATUS_BITS(txq_id),
  1363. (active << SCD_QUEUE_STTS_REG_POS_ACTIVE) |
  1364. (tx_fifo_id << SCD_QUEUE_STTS_REG_POS_TXF) |
  1365. (scd_retry << SCD_QUEUE_STTS_REG_POS_WSL) |
  1366. (scd_retry << SCD_QUEUE_STTS_REG_POS_SCD_ACK) |
  1367. SCD_QUEUE_STTS_REG_MSK);
  1368. txq->sched_retry = scd_retry;
  1369. IWL_DEBUG_INFO("%s %s Queue %d on AC %d\n",
  1370. active ? "Activate" : "Deactivate",
  1371. scd_retry ? "BA" : "AC", txq_id, tx_fifo_id);
  1372. }
  1373. static const u16 default_queue_to_tx_fifo[] = {
  1374. IWL_TX_FIFO_AC3,
  1375. IWL_TX_FIFO_AC2,
  1376. IWL_TX_FIFO_AC1,
  1377. IWL_TX_FIFO_AC0,
  1378. IWL_CMD_FIFO_NUM,
  1379. IWL_TX_FIFO_HCCA_1,
  1380. IWL_TX_FIFO_HCCA_2
  1381. };
  1382. static inline void iwl4965_txq_ctx_activate(struct iwl4965_priv *priv, int txq_id)
  1383. {
  1384. set_bit(txq_id, &priv->txq_ctx_active_msk);
  1385. }
  1386. static inline void iwl4965_txq_ctx_deactivate(struct iwl4965_priv *priv, int txq_id)
  1387. {
  1388. clear_bit(txq_id, &priv->txq_ctx_active_msk);
  1389. }
  1390. int iwl4965_alive_notify(struct iwl4965_priv *priv)
  1391. {
  1392. u32 a;
  1393. int i = 0;
  1394. unsigned long flags;
  1395. int rc;
  1396. spin_lock_irqsave(&priv->lock, flags);
  1397. #ifdef CONFIG_IWL4965_SENSITIVITY
  1398. memset(&(priv->sensitivity_data), 0,
  1399. sizeof(struct iwl4965_sensitivity_data));
  1400. memset(&(priv->chain_noise_data), 0,
  1401. sizeof(struct iwl4965_chain_noise_data));
  1402. for (i = 0; i < NUM_RX_CHAINS; i++)
  1403. priv->chain_noise_data.delta_gain_code[i] =
  1404. CHAIN_NOISE_DELTA_GAIN_INIT_VAL;
  1405. #endif /* CONFIG_IWL4965_SENSITIVITY*/
  1406. rc = iwl4965_grab_nic_access(priv);
  1407. if (rc) {
  1408. spin_unlock_irqrestore(&priv->lock, flags);
  1409. return rc;
  1410. }
  1411. /* Clear 4965's internal Tx Scheduler data base */
  1412. priv->scd_base_addr = iwl4965_read_prph(priv, KDR_SCD_SRAM_BASE_ADDR);
  1413. a = priv->scd_base_addr + SCD_CONTEXT_DATA_OFFSET;
  1414. for (; a < priv->scd_base_addr + SCD_TX_STTS_BITMAP_OFFSET; a += 4)
  1415. iwl4965_write_targ_mem(priv, a, 0);
  1416. for (; a < priv->scd_base_addr + SCD_TRANSLATE_TBL_OFFSET; a += 4)
  1417. iwl4965_write_targ_mem(priv, a, 0);
  1418. for (; a < sizeof(u16) * priv->hw_setting.max_txq_num; a += 4)
  1419. iwl4965_write_targ_mem(priv, a, 0);
  1420. /* Tel 4965 where to find Tx byte count tables */
  1421. iwl4965_write_prph(priv, KDR_SCD_DRAM_BASE_ADDR,
  1422. (priv->hw_setting.shared_phys +
  1423. offsetof(struct iwl4965_shared, queues_byte_cnt_tbls)) >> 10);
  1424. /* Disable chain mode for all queues */
  1425. iwl4965_write_prph(priv, KDR_SCD_QUEUECHAIN_SEL, 0);
  1426. /* Initialize each Tx queue (including the command queue) */
  1427. for (i = 0; i < priv->hw_setting.max_txq_num; i++) {
  1428. /* TFD circular buffer read/write indexes */
  1429. iwl4965_write_prph(priv, KDR_SCD_QUEUE_RDPTR(i), 0);
  1430. iwl4965_write_direct32(priv, HBUS_TARG_WRPTR, 0 | (i << 8));
  1431. /* Max Tx Window size for Scheduler-ACK mode */
  1432. iwl4965_write_targ_mem(priv, priv->scd_base_addr +
  1433. SCD_CONTEXT_QUEUE_OFFSET(i),
  1434. (SCD_WIN_SIZE <<
  1435. SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
  1436. SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
  1437. /* Frame limit */
  1438. iwl4965_write_targ_mem(priv, priv->scd_base_addr +
  1439. SCD_CONTEXT_QUEUE_OFFSET(i) +
  1440. sizeof(u32),
  1441. (SCD_FRAME_LIMIT <<
  1442. SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS) &
  1443. SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
  1444. }
  1445. iwl4965_write_prph(priv, KDR_SCD_INTERRUPT_MASK,
  1446. (1 << priv->hw_setting.max_txq_num) - 1);
  1447. /* Activate all Tx DMA/FIFO channels */
  1448. iwl4965_write_prph(priv, KDR_SCD_TXFACT,
  1449. SCD_TXFACT_REG_TXFIFO_MASK(0, 7));
  1450. iwl4965_set_wr_ptrs(priv, IWL_CMD_QUEUE_NUM, 0);
  1451. /* Map each Tx/cmd queue to its corresponding fifo */
  1452. for (i = 0; i < ARRAY_SIZE(default_queue_to_tx_fifo); i++) {
  1453. int ac = default_queue_to_tx_fifo[i];
  1454. iwl4965_txq_ctx_activate(priv, i);
  1455. iwl4965_tx_queue_set_status(priv, &priv->txq[i], ac, 0);
  1456. }
  1457. iwl4965_release_nic_access(priv);
  1458. spin_unlock_irqrestore(&priv->lock, flags);
  1459. return 0;
  1460. }
  1461. /**
  1462. * iwl4965_hw_set_hw_setting
  1463. *
  1464. * Called when initializing driver
  1465. */
  1466. int iwl4965_hw_set_hw_setting(struct iwl4965_priv *priv)
  1467. {
  1468. /* Allocate area for Tx byte count tables and Rx queue status */
  1469. priv->hw_setting.shared_virt =
  1470. pci_alloc_consistent(priv->pci_dev,
  1471. sizeof(struct iwl4965_shared),
  1472. &priv->hw_setting.shared_phys);
  1473. if (!priv->hw_setting.shared_virt)
  1474. return -1;
  1475. memset(priv->hw_setting.shared_virt, 0, sizeof(struct iwl4965_shared));
  1476. priv->hw_setting.max_txq_num = iwl4965_param_queues_num;
  1477. priv->hw_setting.tx_cmd_len = sizeof(struct iwl4965_tx_cmd);
  1478. priv->hw_setting.max_rxq_size = RX_QUEUE_SIZE;
  1479. priv->hw_setting.max_rxq_log = RX_QUEUE_SIZE_LOG;
  1480. if (iwl4965_param_amsdu_size_8K)
  1481. priv->hw_setting.rx_buf_size = IWL_RX_BUF_SIZE_8K;
  1482. else
  1483. priv->hw_setting.rx_buf_size = IWL_RX_BUF_SIZE_4K;
  1484. priv->hw_setting.max_pkt_size = priv->hw_setting.rx_buf_size - 256;
  1485. priv->hw_setting.max_stations = IWL4965_STATION_COUNT;
  1486. priv->hw_setting.bcast_sta_id = IWL4965_BROADCAST_ID;
  1487. priv->hw_setting.tx_ant_num = 2;
  1488. return 0;
  1489. }
  1490. /**
  1491. * iwl4965_hw_txq_ctx_free - Free TXQ Context
  1492. *
  1493. * Destroy all TX DMA queues and structures
  1494. */
  1495. void iwl4965_hw_txq_ctx_free(struct iwl4965_priv *priv)
  1496. {
  1497. int txq_id;
  1498. /* Tx queues */
  1499. for (txq_id = 0; txq_id < priv->hw_setting.max_txq_num; txq_id++)
  1500. iwl4965_tx_queue_free(priv, &priv->txq[txq_id]);
  1501. /* Keep-warm buffer */
  1502. iwl4965_kw_free(priv);
  1503. }
  1504. /**
  1505. * iwl4965_hw_txq_free_tfd - Free all chunks referenced by TFD [txq->q.read_ptr]
  1506. *
  1507. * Does NOT advance any TFD circular buffer read/write indexes
  1508. * Does NOT free the TFD itself (which is within circular buffer)
  1509. */
  1510. int iwl4965_hw_txq_free_tfd(struct iwl4965_priv *priv, struct iwl4965_tx_queue *txq)
  1511. {
  1512. struct iwl4965_tfd_frame *bd_tmp = (struct iwl4965_tfd_frame *)&txq->bd[0];
  1513. struct iwl4965_tfd_frame *bd = &bd_tmp[txq->q.read_ptr];
  1514. struct pci_dev *dev = priv->pci_dev;
  1515. int i;
  1516. int counter = 0;
  1517. int index, is_odd;
  1518. /* Host command buffers stay mapped in memory, nothing to clean */
  1519. if (txq->q.id == IWL_CMD_QUEUE_NUM)
  1520. return 0;
  1521. /* Sanity check on number of chunks */
  1522. counter = IWL_GET_BITS(*bd, num_tbs);
  1523. if (counter > MAX_NUM_OF_TBS) {
  1524. IWL_ERROR("Too many chunks: %i\n", counter);
  1525. /* @todo issue fatal error, it is quite serious situation */
  1526. return 0;
  1527. }
  1528. /* Unmap chunks, if any.
  1529. * TFD info for odd chunks is different format than for even chunks. */
  1530. for (i = 0; i < counter; i++) {
  1531. index = i / 2;
  1532. is_odd = i & 0x1;
  1533. if (is_odd)
  1534. pci_unmap_single(
  1535. dev,
  1536. IWL_GET_BITS(bd->pa[index], tb2_addr_lo16) |
  1537. (IWL_GET_BITS(bd->pa[index],
  1538. tb2_addr_hi20) << 16),
  1539. IWL_GET_BITS(bd->pa[index], tb2_len),
  1540. PCI_DMA_TODEVICE);
  1541. else if (i > 0)
  1542. pci_unmap_single(dev,
  1543. le32_to_cpu(bd->pa[index].tb1_addr),
  1544. IWL_GET_BITS(bd->pa[index], tb1_len),
  1545. PCI_DMA_TODEVICE);
  1546. /* Free SKB, if any, for this chunk */
  1547. if (txq->txb[txq->q.read_ptr].skb[i]) {
  1548. struct sk_buff *skb = txq->txb[txq->q.read_ptr].skb[i];
  1549. dev_kfree_skb(skb);
  1550. txq->txb[txq->q.read_ptr].skb[i] = NULL;
  1551. }
  1552. }
  1553. return 0;
  1554. }
  1555. int iwl4965_hw_reg_set_txpower(struct iwl4965_priv *priv, s8 power)
  1556. {
  1557. IWL_ERROR("TODO: Implement iwl4965_hw_reg_set_txpower!\n");
  1558. return -EINVAL;
  1559. }
  1560. static s32 iwl4965_math_div_round(s32 num, s32 denom, s32 *res)
  1561. {
  1562. s32 sign = 1;
  1563. if (num < 0) {
  1564. sign = -sign;
  1565. num = -num;
  1566. }
  1567. if (denom < 0) {
  1568. sign = -sign;
  1569. denom = -denom;
  1570. }
  1571. *res = 1;
  1572. *res = ((num * 2 + denom) / (denom * 2)) * sign;
  1573. return 1;
  1574. }
  1575. /**
  1576. * iwl4965_get_voltage_compensation - Power supply voltage comp for txpower
  1577. *
  1578. * Determines power supply voltage compensation for txpower calculations.
  1579. * Returns number of 1/2-dB steps to subtract from gain table index,
  1580. * to compensate for difference between power supply voltage during
  1581. * factory measurements, vs. current power supply voltage.
  1582. *
  1583. * Voltage indication is higher for lower voltage.
  1584. * Lower voltage requires more gain (lower gain table index).
  1585. */
  1586. static s32 iwl4965_get_voltage_compensation(s32 eeprom_voltage,
  1587. s32 current_voltage)
  1588. {
  1589. s32 comp = 0;
  1590. if ((TX_POWER_IWL_ILLEGAL_VOLTAGE == eeprom_voltage) ||
  1591. (TX_POWER_IWL_ILLEGAL_VOLTAGE == current_voltage))
  1592. return 0;
  1593. iwl4965_math_div_round(current_voltage - eeprom_voltage,
  1594. TX_POWER_IWL_VOLTAGE_CODES_PER_03V, &comp);
  1595. if (current_voltage > eeprom_voltage)
  1596. comp *= 2;
  1597. if ((comp < -2) || (comp > 2))
  1598. comp = 0;
  1599. return comp;
  1600. }
  1601. static const struct iwl4965_channel_info *
  1602. iwl4965_get_channel_txpower_info(struct iwl4965_priv *priv,
  1603. enum ieee80211_band band, u16 channel)
  1604. {
  1605. const struct iwl4965_channel_info *ch_info;
  1606. ch_info = iwl4965_get_channel_info(priv, band, channel);
  1607. if (!is_channel_valid(ch_info))
  1608. return NULL;
  1609. return ch_info;
  1610. }
  1611. static s32 iwl4965_get_tx_atten_grp(u16 channel)
  1612. {
  1613. if (channel >= CALIB_IWL_TX_ATTEN_GR5_FCH &&
  1614. channel <= CALIB_IWL_TX_ATTEN_GR5_LCH)
  1615. return CALIB_CH_GROUP_5;
  1616. if (channel >= CALIB_IWL_TX_ATTEN_GR1_FCH &&
  1617. channel <= CALIB_IWL_TX_ATTEN_GR1_LCH)
  1618. return CALIB_CH_GROUP_1;
  1619. if (channel >= CALIB_IWL_TX_ATTEN_GR2_FCH &&
  1620. channel <= CALIB_IWL_TX_ATTEN_GR2_LCH)
  1621. return CALIB_CH_GROUP_2;
  1622. if (channel >= CALIB_IWL_TX_ATTEN_GR3_FCH &&
  1623. channel <= CALIB_IWL_TX_ATTEN_GR3_LCH)
  1624. return CALIB_CH_GROUP_3;
  1625. if (channel >= CALIB_IWL_TX_ATTEN_GR4_FCH &&
  1626. channel <= CALIB_IWL_TX_ATTEN_GR4_LCH)
  1627. return CALIB_CH_GROUP_4;
  1628. IWL_ERROR("Can't find txatten group for channel %d.\n", channel);
  1629. return -1;
  1630. }
  1631. static u32 iwl4965_get_sub_band(const struct iwl4965_priv *priv, u32 channel)
  1632. {
  1633. s32 b = -1;
  1634. for (b = 0; b < EEPROM_TX_POWER_BANDS; b++) {
  1635. if (priv->eeprom.calib_info.band_info[b].ch_from == 0)
  1636. continue;
  1637. if ((channel >= priv->eeprom.calib_info.band_info[b].ch_from)
  1638. && (channel <= priv->eeprom.calib_info.band_info[b].ch_to))
  1639. break;
  1640. }
  1641. return b;
  1642. }
  1643. static s32 iwl4965_interpolate_value(s32 x, s32 x1, s32 y1, s32 x2, s32 y2)
  1644. {
  1645. s32 val;
  1646. if (x2 == x1)
  1647. return y1;
  1648. else {
  1649. iwl4965_math_div_round((x2 - x) * (y1 - y2), (x2 - x1), &val);
  1650. return val + y2;
  1651. }
  1652. }
  1653. /**
  1654. * iwl4965_interpolate_chan - Interpolate factory measurements for one channel
  1655. *
  1656. * Interpolates factory measurements from the two sample channels within a
  1657. * sub-band, to apply to channel of interest. Interpolation is proportional to
  1658. * differences in channel frequencies, which is proportional to differences
  1659. * in channel number.
  1660. */
  1661. static int iwl4965_interpolate_chan(struct iwl4965_priv *priv, u32 channel,
  1662. struct iwl4965_eeprom_calib_ch_info *chan_info)
  1663. {
  1664. s32 s = -1;
  1665. u32 c;
  1666. u32 m;
  1667. const struct iwl4965_eeprom_calib_measure *m1;
  1668. const struct iwl4965_eeprom_calib_measure *m2;
  1669. struct iwl4965_eeprom_calib_measure *omeas;
  1670. u32 ch_i1;
  1671. u32 ch_i2;
  1672. s = iwl4965_get_sub_band(priv, channel);
  1673. if (s >= EEPROM_TX_POWER_BANDS) {
  1674. IWL_ERROR("Tx Power can not find channel %d ", channel);
  1675. return -1;
  1676. }
  1677. ch_i1 = priv->eeprom.calib_info.band_info[s].ch1.ch_num;
  1678. ch_i2 = priv->eeprom.calib_info.band_info[s].ch2.ch_num;
  1679. chan_info->ch_num = (u8) channel;
  1680. IWL_DEBUG_TXPOWER("channel %d subband %d factory cal ch %d & %d\n",
  1681. channel, s, ch_i1, ch_i2);
  1682. for (c = 0; c < EEPROM_TX_POWER_TX_CHAINS; c++) {
  1683. for (m = 0; m < EEPROM_TX_POWER_MEASUREMENTS; m++) {
  1684. m1 = &(priv->eeprom.calib_info.band_info[s].ch1.
  1685. measurements[c][m]);
  1686. m2 = &(priv->eeprom.calib_info.band_info[s].ch2.
  1687. measurements[c][m]);
  1688. omeas = &(chan_info->measurements[c][m]);
  1689. omeas->actual_pow =
  1690. (u8) iwl4965_interpolate_value(channel, ch_i1,
  1691. m1->actual_pow,
  1692. ch_i2,
  1693. m2->actual_pow);
  1694. omeas->gain_idx =
  1695. (u8) iwl4965_interpolate_value(channel, ch_i1,
  1696. m1->gain_idx, ch_i2,
  1697. m2->gain_idx);
  1698. omeas->temperature =
  1699. (u8) iwl4965_interpolate_value(channel, ch_i1,
  1700. m1->temperature,
  1701. ch_i2,
  1702. m2->temperature);
  1703. omeas->pa_det =
  1704. (s8) iwl4965_interpolate_value(channel, ch_i1,
  1705. m1->pa_det, ch_i2,
  1706. m2->pa_det);
  1707. IWL_DEBUG_TXPOWER
  1708. ("chain %d meas %d AP1=%d AP2=%d AP=%d\n", c, m,
  1709. m1->actual_pow, m2->actual_pow, omeas->actual_pow);
  1710. IWL_DEBUG_TXPOWER
  1711. ("chain %d meas %d NI1=%d NI2=%d NI=%d\n", c, m,
  1712. m1->gain_idx, m2->gain_idx, omeas->gain_idx);
  1713. IWL_DEBUG_TXPOWER
  1714. ("chain %d meas %d PA1=%d PA2=%d PA=%d\n", c, m,
  1715. m1->pa_det, m2->pa_det, omeas->pa_det);
  1716. IWL_DEBUG_TXPOWER
  1717. ("chain %d meas %d T1=%d T2=%d T=%d\n", c, m,
  1718. m1->temperature, m2->temperature,
  1719. omeas->temperature);
  1720. }
  1721. }
  1722. return 0;
  1723. }
  1724. /* bit-rate-dependent table to prevent Tx distortion, in half-dB units,
  1725. * for OFDM 6, 12, 18, 24, 36, 48, 54, 60 MBit, and CCK all rates. */
  1726. static s32 back_off_table[] = {
  1727. 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 20 MHz */
  1728. 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 20 MHz */
  1729. 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 40 MHz */
  1730. 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 40 MHz */
  1731. 10 /* CCK */
  1732. };
  1733. /* Thermal compensation values for txpower for various frequency ranges ...
  1734. * ratios from 3:1 to 4.5:1 of degrees (Celsius) per half-dB gain adjust */
  1735. static struct iwl4965_txpower_comp_entry {
  1736. s32 degrees_per_05db_a;
  1737. s32 degrees_per_05db_a_denom;
  1738. } tx_power_cmp_tble[CALIB_CH_GROUP_MAX] = {
  1739. {9, 2}, /* group 0 5.2, ch 34-43 */
  1740. {4, 1}, /* group 1 5.2, ch 44-70 */
  1741. {4, 1}, /* group 2 5.2, ch 71-124 */
  1742. {4, 1}, /* group 3 5.2, ch 125-200 */
  1743. {3, 1} /* group 4 2.4, ch all */
  1744. };
  1745. static s32 get_min_power_index(s32 rate_power_index, u32 band)
  1746. {
  1747. if (!band) {
  1748. if ((rate_power_index & 7) <= 4)
  1749. return MIN_TX_GAIN_INDEX_52GHZ_EXT;
  1750. }
  1751. return MIN_TX_GAIN_INDEX;
  1752. }
  1753. struct gain_entry {
  1754. u8 dsp;
  1755. u8 radio;
  1756. };
  1757. static const struct gain_entry gain_table[2][108] = {
  1758. /* 5.2GHz power gain index table */
  1759. {
  1760. {123, 0x3F}, /* highest txpower */
  1761. {117, 0x3F},
  1762. {110, 0x3F},
  1763. {104, 0x3F},
  1764. {98, 0x3F},
  1765. {110, 0x3E},
  1766. {104, 0x3E},
  1767. {98, 0x3E},
  1768. {110, 0x3D},
  1769. {104, 0x3D},
  1770. {98, 0x3D},
  1771. {110, 0x3C},
  1772. {104, 0x3C},
  1773. {98, 0x3C},
  1774. {110, 0x3B},
  1775. {104, 0x3B},
  1776. {98, 0x3B},
  1777. {110, 0x3A},
  1778. {104, 0x3A},
  1779. {98, 0x3A},
  1780. {110, 0x39},
  1781. {104, 0x39},
  1782. {98, 0x39},
  1783. {110, 0x38},
  1784. {104, 0x38},
  1785. {98, 0x38},
  1786. {110, 0x37},
  1787. {104, 0x37},
  1788. {98, 0x37},
  1789. {110, 0x36},
  1790. {104, 0x36},
  1791. {98, 0x36},
  1792. {110, 0x35},
  1793. {104, 0x35},
  1794. {98, 0x35},
  1795. {110, 0x34},
  1796. {104, 0x34},
  1797. {98, 0x34},
  1798. {110, 0x33},
  1799. {104, 0x33},
  1800. {98, 0x33},
  1801. {110, 0x32},
  1802. {104, 0x32},
  1803. {98, 0x32},
  1804. {110, 0x31},
  1805. {104, 0x31},
  1806. {98, 0x31},
  1807. {110, 0x30},
  1808. {104, 0x30},
  1809. {98, 0x30},
  1810. {110, 0x25},
  1811. {104, 0x25},
  1812. {98, 0x25},
  1813. {110, 0x24},
  1814. {104, 0x24},
  1815. {98, 0x24},
  1816. {110, 0x23},
  1817. {104, 0x23},
  1818. {98, 0x23},
  1819. {110, 0x22},
  1820. {104, 0x18},
  1821. {98, 0x18},
  1822. {110, 0x17},
  1823. {104, 0x17},
  1824. {98, 0x17},
  1825. {110, 0x16},
  1826. {104, 0x16},
  1827. {98, 0x16},
  1828. {110, 0x15},
  1829. {104, 0x15},
  1830. {98, 0x15},
  1831. {110, 0x14},
  1832. {104, 0x14},
  1833. {98, 0x14},
  1834. {110, 0x13},
  1835. {104, 0x13},
  1836. {98, 0x13},
  1837. {110, 0x12},
  1838. {104, 0x08},
  1839. {98, 0x08},
  1840. {110, 0x07},
  1841. {104, 0x07},
  1842. {98, 0x07},
  1843. {110, 0x06},
  1844. {104, 0x06},
  1845. {98, 0x06},
  1846. {110, 0x05},
  1847. {104, 0x05},
  1848. {98, 0x05},
  1849. {110, 0x04},
  1850. {104, 0x04},
  1851. {98, 0x04},
  1852. {110, 0x03},
  1853. {104, 0x03},
  1854. {98, 0x03},
  1855. {110, 0x02},
  1856. {104, 0x02},
  1857. {98, 0x02},
  1858. {110, 0x01},
  1859. {104, 0x01},
  1860. {98, 0x01},
  1861. {110, 0x00},
  1862. {104, 0x00},
  1863. {98, 0x00},
  1864. {93, 0x00},
  1865. {88, 0x00},
  1866. {83, 0x00},
  1867. {78, 0x00},
  1868. },
  1869. /* 2.4GHz power gain index table */
  1870. {
  1871. {110, 0x3f}, /* highest txpower */
  1872. {104, 0x3f},
  1873. {98, 0x3f},
  1874. {110, 0x3e},
  1875. {104, 0x3e},
  1876. {98, 0x3e},
  1877. {110, 0x3d},
  1878. {104, 0x3d},
  1879. {98, 0x3d},
  1880. {110, 0x3c},
  1881. {104, 0x3c},
  1882. {98, 0x3c},
  1883. {110, 0x3b},
  1884. {104, 0x3b},
  1885. {98, 0x3b},
  1886. {110, 0x3a},
  1887. {104, 0x3a},
  1888. {98, 0x3a},
  1889. {110, 0x39},
  1890. {104, 0x39},
  1891. {98, 0x39},
  1892. {110, 0x38},
  1893. {104, 0x38},
  1894. {98, 0x38},
  1895. {110, 0x37},
  1896. {104, 0x37},
  1897. {98, 0x37},
  1898. {110, 0x36},
  1899. {104, 0x36},
  1900. {98, 0x36},
  1901. {110, 0x35},
  1902. {104, 0x35},
  1903. {98, 0x35},
  1904. {110, 0x34},
  1905. {104, 0x34},
  1906. {98, 0x34},
  1907. {110, 0x33},
  1908. {104, 0x33},
  1909. {98, 0x33},
  1910. {110, 0x32},
  1911. {104, 0x32},
  1912. {98, 0x32},
  1913. {110, 0x31},
  1914. {104, 0x31},
  1915. {98, 0x31},
  1916. {110, 0x30},
  1917. {104, 0x30},
  1918. {98, 0x30},
  1919. {110, 0x6},
  1920. {104, 0x6},
  1921. {98, 0x6},
  1922. {110, 0x5},
  1923. {104, 0x5},
  1924. {98, 0x5},
  1925. {110, 0x4},
  1926. {104, 0x4},
  1927. {98, 0x4},
  1928. {110, 0x3},
  1929. {104, 0x3},
  1930. {98, 0x3},
  1931. {110, 0x2},
  1932. {104, 0x2},
  1933. {98, 0x2},
  1934. {110, 0x1},
  1935. {104, 0x1},
  1936. {98, 0x1},
  1937. {110, 0x0},
  1938. {104, 0x0},
  1939. {98, 0x0},
  1940. {97, 0},
  1941. {96, 0},
  1942. {95, 0},
  1943. {94, 0},
  1944. {93, 0},
  1945. {92, 0},
  1946. {91, 0},
  1947. {90, 0},
  1948. {89, 0},
  1949. {88, 0},
  1950. {87, 0},
  1951. {86, 0},
  1952. {85, 0},
  1953. {84, 0},
  1954. {83, 0},
  1955. {82, 0},
  1956. {81, 0},
  1957. {80, 0},
  1958. {79, 0},
  1959. {78, 0},
  1960. {77, 0},
  1961. {76, 0},
  1962. {75, 0},
  1963. {74, 0},
  1964. {73, 0},
  1965. {72, 0},
  1966. {71, 0},
  1967. {70, 0},
  1968. {69, 0},
  1969. {68, 0},
  1970. {67, 0},
  1971. {66, 0},
  1972. {65, 0},
  1973. {64, 0},
  1974. {63, 0},
  1975. {62, 0},
  1976. {61, 0},
  1977. {60, 0},
  1978. {59, 0},
  1979. }
  1980. };
  1981. static int iwl4965_fill_txpower_tbl(struct iwl4965_priv *priv, u8 band, u16 channel,
  1982. u8 is_fat, u8 ctrl_chan_high,
  1983. struct iwl4965_tx_power_db *tx_power_tbl)
  1984. {
  1985. u8 saturation_power;
  1986. s32 target_power;
  1987. s32 user_target_power;
  1988. s32 power_limit;
  1989. s32 current_temp;
  1990. s32 reg_limit;
  1991. s32 current_regulatory;
  1992. s32 txatten_grp = CALIB_CH_GROUP_MAX;
  1993. int i;
  1994. int c;
  1995. const struct iwl4965_channel_info *ch_info = NULL;
  1996. struct iwl4965_eeprom_calib_ch_info ch_eeprom_info;
  1997. const struct iwl4965_eeprom_calib_measure *measurement;
  1998. s16 voltage;
  1999. s32 init_voltage;
  2000. s32 voltage_compensation;
  2001. s32 degrees_per_05db_num;
  2002. s32 degrees_per_05db_denom;
  2003. s32 factory_temp;
  2004. s32 temperature_comp[2];
  2005. s32 factory_gain_index[2];
  2006. s32 factory_actual_pwr[2];
  2007. s32 power_index;
  2008. /* Sanity check requested level (dBm) */
  2009. if (priv->user_txpower_limit < IWL_TX_POWER_TARGET_POWER_MIN) {
  2010. IWL_WARNING("Requested user TXPOWER %d below limit.\n",
  2011. priv->user_txpower_limit);
  2012. return -EINVAL;
  2013. }
  2014. if (priv->user_txpower_limit > IWL_TX_POWER_TARGET_POWER_MAX) {
  2015. IWL_WARNING("Requested user TXPOWER %d above limit.\n",
  2016. priv->user_txpower_limit);
  2017. return -EINVAL;
  2018. }
  2019. /* user_txpower_limit is in dBm, convert to half-dBm (half-dB units
  2020. * are used for indexing into txpower table) */
  2021. user_target_power = 2 * priv->user_txpower_limit;
  2022. /* Get current (RXON) channel, band, width */
  2023. ch_info =
  2024. iwl4965_get_channel_txpower_info(priv, priv->band, channel);
  2025. IWL_DEBUG_TXPOWER("chan %d band %d is_fat %d\n", channel, band,
  2026. is_fat);
  2027. if (!ch_info)
  2028. return -EINVAL;
  2029. /* get txatten group, used to select 1) thermal txpower adjustment
  2030. * and 2) mimo txpower balance between Tx chains. */
  2031. txatten_grp = iwl4965_get_tx_atten_grp(channel);
  2032. if (txatten_grp < 0)
  2033. return -EINVAL;
  2034. IWL_DEBUG_TXPOWER("channel %d belongs to txatten group %d\n",
  2035. channel, txatten_grp);
  2036. if (is_fat) {
  2037. if (ctrl_chan_high)
  2038. channel -= 2;
  2039. else
  2040. channel += 2;
  2041. }
  2042. /* hardware txpower limits ...
  2043. * saturation (clipping distortion) txpowers are in half-dBm */
  2044. if (band)
  2045. saturation_power = priv->eeprom.calib_info.saturation_power24;
  2046. else
  2047. saturation_power = priv->eeprom.calib_info.saturation_power52;
  2048. if (saturation_power < IWL_TX_POWER_SATURATION_MIN ||
  2049. saturation_power > IWL_TX_POWER_SATURATION_MAX) {
  2050. if (band)
  2051. saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_24;
  2052. else
  2053. saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_52;
  2054. }
  2055. /* regulatory txpower limits ... reg_limit values are in half-dBm,
  2056. * max_power_avg values are in dBm, convert * 2 */
  2057. if (is_fat)
  2058. reg_limit = ch_info->fat_max_power_avg * 2;
  2059. else
  2060. reg_limit = ch_info->max_power_avg * 2;
  2061. if ((reg_limit < IWL_TX_POWER_REGULATORY_MIN) ||
  2062. (reg_limit > IWL_TX_POWER_REGULATORY_MAX)) {
  2063. if (band)
  2064. reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_24;
  2065. else
  2066. reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_52;
  2067. }
  2068. /* Interpolate txpower calibration values for this channel,
  2069. * based on factory calibration tests on spaced channels. */
  2070. iwl4965_interpolate_chan(priv, channel, &ch_eeprom_info);
  2071. /* calculate tx gain adjustment based on power supply voltage */
  2072. voltage = priv->eeprom.calib_info.voltage;
  2073. init_voltage = (s32)le32_to_cpu(priv->card_alive_init.voltage);
  2074. voltage_compensation =
  2075. iwl4965_get_voltage_compensation(voltage, init_voltage);
  2076. IWL_DEBUG_TXPOWER("curr volt %d eeprom volt %d volt comp %d\n",
  2077. init_voltage,
  2078. voltage, voltage_compensation);
  2079. /* get current temperature (Celsius) */
  2080. current_temp = max(priv->temperature, IWL_TX_POWER_TEMPERATURE_MIN);
  2081. current_temp = min(priv->temperature, IWL_TX_POWER_TEMPERATURE_MAX);
  2082. current_temp = KELVIN_TO_CELSIUS(current_temp);
  2083. /* select thermal txpower adjustment params, based on channel group
  2084. * (same frequency group used for mimo txatten adjustment) */
  2085. degrees_per_05db_num =
  2086. tx_power_cmp_tble[txatten_grp].degrees_per_05db_a;
  2087. degrees_per_05db_denom =
  2088. tx_power_cmp_tble[txatten_grp].degrees_per_05db_a_denom;
  2089. /* get per-chain txpower values from factory measurements */
  2090. for (c = 0; c < 2; c++) {
  2091. measurement = &ch_eeprom_info.measurements[c][1];
  2092. /* txgain adjustment (in half-dB steps) based on difference
  2093. * between factory and current temperature */
  2094. factory_temp = measurement->temperature;
  2095. iwl4965_math_div_round((current_temp - factory_temp) *
  2096. degrees_per_05db_denom,
  2097. degrees_per_05db_num,
  2098. &temperature_comp[c]);
  2099. factory_gain_index[c] = measurement->gain_idx;
  2100. factory_actual_pwr[c] = measurement->actual_pow;
  2101. IWL_DEBUG_TXPOWER("chain = %d\n", c);
  2102. IWL_DEBUG_TXPOWER("fctry tmp %d, "
  2103. "curr tmp %d, comp %d steps\n",
  2104. factory_temp, current_temp,
  2105. temperature_comp[c]);
  2106. IWL_DEBUG_TXPOWER("fctry idx %d, fctry pwr %d\n",
  2107. factory_gain_index[c],
  2108. factory_actual_pwr[c]);
  2109. }
  2110. /* for each of 33 bit-rates (including 1 for CCK) */
  2111. for (i = 0; i < POWER_TABLE_NUM_ENTRIES; i++) {
  2112. u8 is_mimo_rate;
  2113. union iwl4965_tx_power_dual_stream tx_power;
  2114. /* for mimo, reduce each chain's txpower by half
  2115. * (3dB, 6 steps), so total output power is regulatory
  2116. * compliant. */
  2117. if (i & 0x8) {
  2118. current_regulatory = reg_limit -
  2119. IWL_TX_POWER_MIMO_REGULATORY_COMPENSATION;
  2120. is_mimo_rate = 1;
  2121. } else {
  2122. current_regulatory = reg_limit;
  2123. is_mimo_rate = 0;
  2124. }
  2125. /* find txpower limit, either hardware or regulatory */
  2126. power_limit = saturation_power - back_off_table[i];
  2127. if (power_limit > current_regulatory)
  2128. power_limit = current_regulatory;
  2129. /* reduce user's txpower request if necessary
  2130. * for this rate on this channel */
  2131. target_power = user_target_power;
  2132. if (target_power > power_limit)
  2133. target_power = power_limit;
  2134. IWL_DEBUG_TXPOWER("rate %d sat %d reg %d usr %d tgt %d\n",
  2135. i, saturation_power - back_off_table[i],
  2136. current_regulatory, user_target_power,
  2137. target_power);
  2138. /* for each of 2 Tx chains (radio transmitters) */
  2139. for (c = 0; c < 2; c++) {
  2140. s32 atten_value;
  2141. if (is_mimo_rate)
  2142. atten_value =
  2143. (s32)le32_to_cpu(priv->card_alive_init.
  2144. tx_atten[txatten_grp][c]);
  2145. else
  2146. atten_value = 0;
  2147. /* calculate index; higher index means lower txpower */
  2148. power_index = (u8) (factory_gain_index[c] -
  2149. (target_power -
  2150. factory_actual_pwr[c]) -
  2151. temperature_comp[c] -
  2152. voltage_compensation +
  2153. atten_value);
  2154. /* IWL_DEBUG_TXPOWER("calculated txpower index %d\n",
  2155. power_index); */
  2156. if (power_index < get_min_power_index(i, band))
  2157. power_index = get_min_power_index(i, band);
  2158. /* adjust 5 GHz index to support negative indexes */
  2159. if (!band)
  2160. power_index += 9;
  2161. /* CCK, rate 32, reduce txpower for CCK */
  2162. if (i == POWER_TABLE_CCK_ENTRY)
  2163. power_index +=
  2164. IWL_TX_POWER_CCK_COMPENSATION_C_STEP;
  2165. /* stay within the table! */
  2166. if (power_index > 107) {
  2167. IWL_WARNING("txpower index %d > 107\n",
  2168. power_index);
  2169. power_index = 107;
  2170. }
  2171. if (power_index < 0) {
  2172. IWL_WARNING("txpower index %d < 0\n",
  2173. power_index);
  2174. power_index = 0;
  2175. }
  2176. /* fill txpower command for this rate/chain */
  2177. tx_power.s.radio_tx_gain[c] =
  2178. gain_table[band][power_index].radio;
  2179. tx_power.s.dsp_predis_atten[c] =
  2180. gain_table[band][power_index].dsp;
  2181. IWL_DEBUG_TXPOWER("chain %d mimo %d index %d "
  2182. "gain 0x%02x dsp %d\n",
  2183. c, atten_value, power_index,
  2184. tx_power.s.radio_tx_gain[c],
  2185. tx_power.s.dsp_predis_atten[c]);
  2186. }/* for each chain */
  2187. tx_power_tbl->power_tbl[i].dw = cpu_to_le32(tx_power.dw);
  2188. }/* for each rate */
  2189. return 0;
  2190. }
  2191. /**
  2192. * iwl4965_hw_reg_send_txpower - Configure the TXPOWER level user limit
  2193. *
  2194. * Uses the active RXON for channel, band, and characteristics (fat, high)
  2195. * The power limit is taken from priv->user_txpower_limit.
  2196. */
  2197. int iwl4965_hw_reg_send_txpower(struct iwl4965_priv *priv)
  2198. {
  2199. struct iwl4965_txpowertable_cmd cmd = { 0 };
  2200. int rc = 0;
  2201. u8 band = 0;
  2202. u8 is_fat = 0;
  2203. u8 ctrl_chan_high = 0;
  2204. if (test_bit(STATUS_SCANNING, &priv->status)) {
  2205. /* If this gets hit a lot, switch it to a BUG() and catch
  2206. * the stack trace to find out who is calling this during
  2207. * a scan. */
  2208. IWL_WARNING("TX Power requested while scanning!\n");
  2209. return -EAGAIN;
  2210. }
  2211. band = priv->band == IEEE80211_BAND_2GHZ;
  2212. is_fat = is_fat_channel(priv->active_rxon.flags);
  2213. if (is_fat &&
  2214. (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
  2215. ctrl_chan_high = 1;
  2216. cmd.band = band;
  2217. cmd.channel = priv->active_rxon.channel;
  2218. rc = iwl4965_fill_txpower_tbl(priv, band,
  2219. le16_to_cpu(priv->active_rxon.channel),
  2220. is_fat, ctrl_chan_high, &cmd.tx_power);
  2221. if (rc)
  2222. return rc;
  2223. rc = iwl4965_send_cmd_pdu(priv, REPLY_TX_PWR_TABLE_CMD, sizeof(cmd), &cmd);
  2224. return rc;
  2225. }
  2226. int iwl4965_hw_channel_switch(struct iwl4965_priv *priv, u16 channel)
  2227. {
  2228. int rc;
  2229. u8 band = 0;
  2230. u8 is_fat = 0;
  2231. u8 ctrl_chan_high = 0;
  2232. struct iwl4965_channel_switch_cmd cmd = { 0 };
  2233. const struct iwl4965_channel_info *ch_info;
  2234. band = priv->band == IEEE80211_BAND_2GHZ;
  2235. ch_info = iwl4965_get_channel_info(priv, priv->band, channel);
  2236. is_fat = is_fat_channel(priv->staging_rxon.flags);
  2237. if (is_fat &&
  2238. (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
  2239. ctrl_chan_high = 1;
  2240. cmd.band = band;
  2241. cmd.expect_beacon = 0;
  2242. cmd.channel = cpu_to_le16(channel);
  2243. cmd.rxon_flags = priv->active_rxon.flags;
  2244. cmd.rxon_filter_flags = priv->active_rxon.filter_flags;
  2245. cmd.switch_time = cpu_to_le32(priv->ucode_beacon_time);
  2246. if (ch_info)
  2247. cmd.expect_beacon = is_channel_radar(ch_info);
  2248. else
  2249. cmd.expect_beacon = 1;
  2250. rc = iwl4965_fill_txpower_tbl(priv, band, channel, is_fat,
  2251. ctrl_chan_high, &cmd.tx_power);
  2252. if (rc) {
  2253. IWL_DEBUG_11H("error:%d fill txpower_tbl\n", rc);
  2254. return rc;
  2255. }
  2256. rc = iwl4965_send_cmd_pdu(priv, REPLY_CHANNEL_SWITCH, sizeof(cmd), &cmd);
  2257. return rc;
  2258. }
  2259. #define RTS_HCCA_RETRY_LIMIT 3
  2260. #define RTS_DFAULT_RETRY_LIMIT 60
  2261. void iwl4965_hw_build_tx_cmd_rate(struct iwl4965_priv *priv,
  2262. struct iwl4965_cmd *cmd,
  2263. struct ieee80211_tx_control *ctrl,
  2264. struct ieee80211_hdr *hdr, int sta_id,
  2265. int is_hcca)
  2266. {
  2267. struct iwl4965_tx_cmd *tx = &cmd->cmd.tx;
  2268. u8 rts_retry_limit = 0;
  2269. u8 data_retry_limit = 0;
  2270. u16 fc = le16_to_cpu(hdr->frame_control);
  2271. u8 rate_plcp;
  2272. u16 rate_flags = 0;
  2273. int rate_idx = min(ctrl->tx_rate->hw_value & 0xffff, IWL_RATE_COUNT - 1);
  2274. rate_plcp = iwl4965_rates[rate_idx].plcp;
  2275. rts_retry_limit = (is_hcca) ?
  2276. RTS_HCCA_RETRY_LIMIT : RTS_DFAULT_RETRY_LIMIT;
  2277. if ((rate_idx >= IWL_FIRST_CCK_RATE) && (rate_idx <= IWL_LAST_CCK_RATE))
  2278. rate_flags |= RATE_MCS_CCK_MSK;
  2279. if (ieee80211_is_probe_response(fc)) {
  2280. data_retry_limit = 3;
  2281. if (data_retry_limit < rts_retry_limit)
  2282. rts_retry_limit = data_retry_limit;
  2283. } else
  2284. data_retry_limit = IWL_DEFAULT_TX_RETRY;
  2285. if (priv->data_retry_limit != -1)
  2286. data_retry_limit = priv->data_retry_limit;
  2287. if (ieee80211_is_data(fc)) {
  2288. tx->initial_rate_index = 0;
  2289. tx->tx_flags |= TX_CMD_FLG_STA_RATE_MSK;
  2290. } else {
  2291. switch (fc & IEEE80211_FCTL_STYPE) {
  2292. case IEEE80211_STYPE_AUTH:
  2293. case IEEE80211_STYPE_DEAUTH:
  2294. case IEEE80211_STYPE_ASSOC_REQ:
  2295. case IEEE80211_STYPE_REASSOC_REQ:
  2296. if (tx->tx_flags & TX_CMD_FLG_RTS_MSK) {
  2297. tx->tx_flags &= ~TX_CMD_FLG_RTS_MSK;
  2298. tx->tx_flags |= TX_CMD_FLG_CTS_MSK;
  2299. }
  2300. break;
  2301. default:
  2302. break;
  2303. }
  2304. /* Alternate between antenna A and B for successive frames */
  2305. if (priv->use_ant_b_for_management_frame) {
  2306. priv->use_ant_b_for_management_frame = 0;
  2307. rate_flags |= RATE_MCS_ANT_B_MSK;
  2308. } else {
  2309. priv->use_ant_b_for_management_frame = 1;
  2310. rate_flags |= RATE_MCS_ANT_A_MSK;
  2311. }
  2312. }
  2313. tx->rts_retry_limit = rts_retry_limit;
  2314. tx->data_retry_limit = data_retry_limit;
  2315. tx->rate_n_flags = iwl4965_hw_set_rate_n_flags(rate_plcp, rate_flags);
  2316. }
  2317. int iwl4965_hw_get_rx_read(struct iwl4965_priv *priv)
  2318. {
  2319. struct iwl4965_shared *shared_data = priv->hw_setting.shared_virt;
  2320. return IWL_GET_BITS(*shared_data, rb_closed_stts_rb_num);
  2321. }
  2322. int iwl4965_hw_get_temperature(struct iwl4965_priv *priv)
  2323. {
  2324. return priv->temperature;
  2325. }
  2326. unsigned int iwl4965_hw_get_beacon_cmd(struct iwl4965_priv *priv,
  2327. struct iwl4965_frame *frame, u8 rate)
  2328. {
  2329. struct iwl4965_tx_beacon_cmd *tx_beacon_cmd;
  2330. unsigned int frame_size;
  2331. tx_beacon_cmd = &frame->u.beacon;
  2332. memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
  2333. tx_beacon_cmd->tx.sta_id = IWL4965_BROADCAST_ID;
  2334. tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  2335. frame_size = iwl4965_fill_beacon_frame(priv,
  2336. tx_beacon_cmd->frame,
  2337. iwl4965_broadcast_addr,
  2338. sizeof(frame->u) - sizeof(*tx_beacon_cmd));
  2339. BUG_ON(frame_size > MAX_MPDU_SIZE);
  2340. tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
  2341. if ((rate == IWL_RATE_1M_PLCP) || (rate >= IWL_RATE_2M_PLCP))
  2342. tx_beacon_cmd->tx.rate_n_flags =
  2343. iwl4965_hw_set_rate_n_flags(rate, RATE_MCS_CCK_MSK);
  2344. else
  2345. tx_beacon_cmd->tx.rate_n_flags =
  2346. iwl4965_hw_set_rate_n_flags(rate, 0);
  2347. tx_beacon_cmd->tx.tx_flags = (TX_CMD_FLG_SEQ_CTL_MSK |
  2348. TX_CMD_FLG_TSF_MSK | TX_CMD_FLG_STA_RATE_MSK);
  2349. return (sizeof(*tx_beacon_cmd) + frame_size);
  2350. }
  2351. /*
  2352. * Tell 4965 where to find circular buffer of Tx Frame Descriptors for
  2353. * given Tx queue, and enable the DMA channel used for that queue.
  2354. *
  2355. * 4965 supports up to 16 Tx queues in DRAM, mapped to up to 8 Tx DMA
  2356. * channels supported in hardware.
  2357. */
  2358. int iwl4965_hw_tx_queue_init(struct iwl4965_priv *priv, struct iwl4965_tx_queue *txq)
  2359. {
  2360. int rc;
  2361. unsigned long flags;
  2362. int txq_id = txq->q.id;
  2363. spin_lock_irqsave(&priv->lock, flags);
  2364. rc = iwl4965_grab_nic_access(priv);
  2365. if (rc) {
  2366. spin_unlock_irqrestore(&priv->lock, flags);
  2367. return rc;
  2368. }
  2369. /* Circular buffer (TFD queue in DRAM) physical base address */
  2370. iwl4965_write_direct32(priv, FH_MEM_CBBC_QUEUE(txq_id),
  2371. txq->q.dma_addr >> 8);
  2372. /* Enable DMA channel, using same id as for TFD queue */
  2373. iwl4965_write_direct32(
  2374. priv, IWL_FH_TCSR_CHNL_TX_CONFIG_REG(txq_id),
  2375. IWL_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE |
  2376. IWL_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE_VAL);
  2377. iwl4965_release_nic_access(priv);
  2378. spin_unlock_irqrestore(&priv->lock, flags);
  2379. return 0;
  2380. }
  2381. int iwl4965_hw_txq_attach_buf_to_tfd(struct iwl4965_priv *priv, void *ptr,
  2382. dma_addr_t addr, u16 len)
  2383. {
  2384. int index, is_odd;
  2385. struct iwl4965_tfd_frame *tfd = ptr;
  2386. u32 num_tbs = IWL_GET_BITS(*tfd, num_tbs);
  2387. /* Each TFD can point to a maximum 20 Tx buffers */
  2388. if ((num_tbs >= MAX_NUM_OF_TBS) || (num_tbs < 0)) {
  2389. IWL_ERROR("Error can not send more than %d chunks\n",
  2390. MAX_NUM_OF_TBS);
  2391. return -EINVAL;
  2392. }
  2393. index = num_tbs / 2;
  2394. is_odd = num_tbs & 0x1;
  2395. if (!is_odd) {
  2396. tfd->pa[index].tb1_addr = cpu_to_le32(addr);
  2397. IWL_SET_BITS(tfd->pa[index], tb1_addr_hi,
  2398. iwl_get_dma_hi_address(addr));
  2399. IWL_SET_BITS(tfd->pa[index], tb1_len, len);
  2400. } else {
  2401. IWL_SET_BITS(tfd->pa[index], tb2_addr_lo16,
  2402. (u32) (addr & 0xffff));
  2403. IWL_SET_BITS(tfd->pa[index], tb2_addr_hi20, addr >> 16);
  2404. IWL_SET_BITS(tfd->pa[index], tb2_len, len);
  2405. }
  2406. IWL_SET_BITS(*tfd, num_tbs, num_tbs + 1);
  2407. return 0;
  2408. }
  2409. static void iwl4965_hw_card_show_info(struct iwl4965_priv *priv)
  2410. {
  2411. u16 hw_version = priv->eeprom.board_revision_4965;
  2412. IWL_DEBUG_INFO("4965ABGN HW Version %u.%u.%u\n",
  2413. ((hw_version >> 8) & 0x0F),
  2414. ((hw_version >> 8) >> 4), (hw_version & 0x00FF));
  2415. IWL_DEBUG_INFO("4965ABGN PBA Number %.16s\n",
  2416. priv->eeprom.board_pba_number_4965);
  2417. }
  2418. #define IWL_TX_CRC_SIZE 4
  2419. #define IWL_TX_DELIMITER_SIZE 4
  2420. /**
  2421. * iwl4965_tx_queue_update_wr_ptr - Set up entry in Tx byte-count array
  2422. */
  2423. int iwl4965_tx_queue_update_wr_ptr(struct iwl4965_priv *priv,
  2424. struct iwl4965_tx_queue *txq, u16 byte_cnt)
  2425. {
  2426. int len;
  2427. int txq_id = txq->q.id;
  2428. struct iwl4965_shared *shared_data = priv->hw_setting.shared_virt;
  2429. if (txq->need_update == 0)
  2430. return 0;
  2431. len = byte_cnt + IWL_TX_CRC_SIZE + IWL_TX_DELIMITER_SIZE;
  2432. /* Set up byte count within first 256 entries */
  2433. IWL_SET_BITS16(shared_data->queues_byte_cnt_tbls[txq_id].
  2434. tfd_offset[txq->q.write_ptr], byte_cnt, len);
  2435. /* If within first 64 entries, duplicate at end */
  2436. if (txq->q.write_ptr < IWL4965_MAX_WIN_SIZE)
  2437. IWL_SET_BITS16(shared_data->queues_byte_cnt_tbls[txq_id].
  2438. tfd_offset[IWL4965_QUEUE_SIZE + txq->q.write_ptr],
  2439. byte_cnt, len);
  2440. return 0;
  2441. }
  2442. /**
  2443. * iwl4965_set_rxon_chain - Set up Rx chain usage in "staging" RXON image
  2444. *
  2445. * Selects how many and which Rx receivers/antennas/chains to use.
  2446. * This should not be used for scan command ... it puts data in wrong place.
  2447. */
  2448. void iwl4965_set_rxon_chain(struct iwl4965_priv *priv)
  2449. {
  2450. u8 is_single = is_single_stream(priv);
  2451. u8 idle_state, rx_state;
  2452. priv->staging_rxon.rx_chain = 0;
  2453. rx_state = idle_state = 3;
  2454. /* Tell uCode which antennas are actually connected.
  2455. * Before first association, we assume all antennas are connected.
  2456. * Just after first association, iwl4965_noise_calibration()
  2457. * checks which antennas actually *are* connected. */
  2458. priv->staging_rxon.rx_chain |=
  2459. cpu_to_le16(priv->valid_antenna << RXON_RX_CHAIN_VALID_POS);
  2460. /* How many receivers should we use? */
  2461. iwl4965_get_rx_chain_counter(priv, &idle_state, &rx_state);
  2462. priv->staging_rxon.rx_chain |=
  2463. cpu_to_le16(rx_state << RXON_RX_CHAIN_MIMO_CNT_POS);
  2464. priv->staging_rxon.rx_chain |=
  2465. cpu_to_le16(idle_state << RXON_RX_CHAIN_CNT_POS);
  2466. if (!is_single && (rx_state >= 2) &&
  2467. !test_bit(STATUS_POWER_PMI, &priv->status))
  2468. priv->staging_rxon.rx_chain |= RXON_RX_CHAIN_MIMO_FORCE_MSK;
  2469. else
  2470. priv->staging_rxon.rx_chain &= ~RXON_RX_CHAIN_MIMO_FORCE_MSK;
  2471. IWL_DEBUG_ASSOC("rx chain %X\n", priv->staging_rxon.rx_chain);
  2472. }
  2473. /**
  2474. * sign_extend - Sign extend a value using specified bit as sign-bit
  2475. *
  2476. * Example: sign_extend(9, 3) would return -7 as bit3 of 1001b is 1
  2477. * and bit0..2 is 001b which when sign extended to 1111111111111001b is -7.
  2478. *
  2479. * @param oper value to sign extend
  2480. * @param index 0 based bit index (0<=index<32) to sign bit
  2481. */
  2482. static s32 sign_extend(u32 oper, int index)
  2483. {
  2484. u8 shift = 31 - index;
  2485. return (s32)(oper << shift) >> shift;
  2486. }
  2487. /**
  2488. * iwl4965_get_temperature - return the calibrated temperature (in Kelvin)
  2489. * @statistics: Provides the temperature reading from the uCode
  2490. *
  2491. * A return of <0 indicates bogus data in the statistics
  2492. */
  2493. int iwl4965_get_temperature(const struct iwl4965_priv *priv)
  2494. {
  2495. s32 temperature;
  2496. s32 vt;
  2497. s32 R1, R2, R3;
  2498. u32 R4;
  2499. if (test_bit(STATUS_TEMPERATURE, &priv->status) &&
  2500. (priv->statistics.flag & STATISTICS_REPLY_FLG_FAT_MODE_MSK)) {
  2501. IWL_DEBUG_TEMP("Running FAT temperature calibration\n");
  2502. R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[1]);
  2503. R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[1]);
  2504. R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[1]);
  2505. R4 = le32_to_cpu(priv->card_alive_init.therm_r4[1]);
  2506. } else {
  2507. IWL_DEBUG_TEMP("Running temperature calibration\n");
  2508. R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[0]);
  2509. R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[0]);
  2510. R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[0]);
  2511. R4 = le32_to_cpu(priv->card_alive_init.therm_r4[0]);
  2512. }
  2513. /*
  2514. * Temperature is only 23 bits, so sign extend out to 32.
  2515. *
  2516. * NOTE If we haven't received a statistics notification yet
  2517. * with an updated temperature, use R4 provided to us in the
  2518. * "initialize" ALIVE response.
  2519. */
  2520. if (!test_bit(STATUS_TEMPERATURE, &priv->status))
  2521. vt = sign_extend(R4, 23);
  2522. else
  2523. vt = sign_extend(
  2524. le32_to_cpu(priv->statistics.general.temperature), 23);
  2525. IWL_DEBUG_TEMP("Calib values R[1-3]: %d %d %d R4: %d\n",
  2526. R1, R2, R3, vt);
  2527. if (R3 == R1) {
  2528. IWL_ERROR("Calibration conflict R1 == R3\n");
  2529. return -1;
  2530. }
  2531. /* Calculate temperature in degrees Kelvin, adjust by 97%.
  2532. * Add offset to center the adjustment around 0 degrees Centigrade. */
  2533. temperature = TEMPERATURE_CALIB_A_VAL * (vt - R2);
  2534. temperature /= (R3 - R1);
  2535. temperature = (temperature * 97) / 100 +
  2536. TEMPERATURE_CALIB_KELVIN_OFFSET;
  2537. IWL_DEBUG_TEMP("Calibrated temperature: %dK, %dC\n", temperature,
  2538. KELVIN_TO_CELSIUS(temperature));
  2539. return temperature;
  2540. }
  2541. /* Adjust Txpower only if temperature variance is greater than threshold. */
  2542. #define IWL_TEMPERATURE_THRESHOLD 3
  2543. /**
  2544. * iwl4965_is_temp_calib_needed - determines if new calibration is needed
  2545. *
  2546. * If the temperature changed has changed sufficiently, then a recalibration
  2547. * is needed.
  2548. *
  2549. * Assumes caller will replace priv->last_temperature once calibration
  2550. * executed.
  2551. */
  2552. static int iwl4965_is_temp_calib_needed(struct iwl4965_priv *priv)
  2553. {
  2554. int temp_diff;
  2555. if (!test_bit(STATUS_STATISTICS, &priv->status)) {
  2556. IWL_DEBUG_TEMP("Temperature not updated -- no statistics.\n");
  2557. return 0;
  2558. }
  2559. temp_diff = priv->temperature - priv->last_temperature;
  2560. /* get absolute value */
  2561. if (temp_diff < 0) {
  2562. IWL_DEBUG_POWER("Getting cooler, delta %d, \n", temp_diff);
  2563. temp_diff = -temp_diff;
  2564. } else if (temp_diff == 0)
  2565. IWL_DEBUG_POWER("Same temp, \n");
  2566. else
  2567. IWL_DEBUG_POWER("Getting warmer, delta %d, \n", temp_diff);
  2568. if (temp_diff < IWL_TEMPERATURE_THRESHOLD) {
  2569. IWL_DEBUG_POWER("Thermal txpower calib not needed\n");
  2570. return 0;
  2571. }
  2572. IWL_DEBUG_POWER("Thermal txpower calib needed\n");
  2573. return 1;
  2574. }
  2575. /* Calculate noise level, based on measurements during network silence just
  2576. * before arriving beacon. This measurement can be done only if we know
  2577. * exactly when to expect beacons, therefore only when we're associated. */
  2578. static void iwl4965_rx_calc_noise(struct iwl4965_priv *priv)
  2579. {
  2580. struct statistics_rx_non_phy *rx_info
  2581. = &(priv->statistics.rx.general);
  2582. int num_active_rx = 0;
  2583. int total_silence = 0;
  2584. int bcn_silence_a =
  2585. le32_to_cpu(rx_info->beacon_silence_rssi_a) & IN_BAND_FILTER;
  2586. int bcn_silence_b =
  2587. le32_to_cpu(rx_info->beacon_silence_rssi_b) & IN_BAND_FILTER;
  2588. int bcn_silence_c =
  2589. le32_to_cpu(rx_info->beacon_silence_rssi_c) & IN_BAND_FILTER;
  2590. if (bcn_silence_a) {
  2591. total_silence += bcn_silence_a;
  2592. num_active_rx++;
  2593. }
  2594. if (bcn_silence_b) {
  2595. total_silence += bcn_silence_b;
  2596. num_active_rx++;
  2597. }
  2598. if (bcn_silence_c) {
  2599. total_silence += bcn_silence_c;
  2600. num_active_rx++;
  2601. }
  2602. /* Average among active antennas */
  2603. if (num_active_rx)
  2604. priv->last_rx_noise = (total_silence / num_active_rx) - 107;
  2605. else
  2606. priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
  2607. IWL_DEBUG_CALIB("inband silence a %u, b %u, c %u, dBm %d\n",
  2608. bcn_silence_a, bcn_silence_b, bcn_silence_c,
  2609. priv->last_rx_noise);
  2610. }
  2611. void iwl4965_hw_rx_statistics(struct iwl4965_priv *priv, struct iwl4965_rx_mem_buffer *rxb)
  2612. {
  2613. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2614. int change;
  2615. s32 temp;
  2616. IWL_DEBUG_RX("Statistics notification received (%d vs %d).\n",
  2617. (int)sizeof(priv->statistics), pkt->len);
  2618. change = ((priv->statistics.general.temperature !=
  2619. pkt->u.stats.general.temperature) ||
  2620. ((priv->statistics.flag &
  2621. STATISTICS_REPLY_FLG_FAT_MODE_MSK) !=
  2622. (pkt->u.stats.flag & STATISTICS_REPLY_FLG_FAT_MODE_MSK)));
  2623. memcpy(&priv->statistics, &pkt->u.stats, sizeof(priv->statistics));
  2624. set_bit(STATUS_STATISTICS, &priv->status);
  2625. /* Reschedule the statistics timer to occur in
  2626. * REG_RECALIB_PERIOD seconds to ensure we get a
  2627. * thermal update even if the uCode doesn't give
  2628. * us one */
  2629. mod_timer(&priv->statistics_periodic, jiffies +
  2630. msecs_to_jiffies(REG_RECALIB_PERIOD * 1000));
  2631. if (unlikely(!test_bit(STATUS_SCANNING, &priv->status)) &&
  2632. (pkt->hdr.cmd == STATISTICS_NOTIFICATION)) {
  2633. iwl4965_rx_calc_noise(priv);
  2634. #ifdef CONFIG_IWL4965_SENSITIVITY
  2635. queue_work(priv->workqueue, &priv->sensitivity_work);
  2636. #endif
  2637. }
  2638. /* If the hardware hasn't reported a change in
  2639. * temperature then don't bother computing a
  2640. * calibrated temperature value */
  2641. if (!change)
  2642. return;
  2643. temp = iwl4965_get_temperature(priv);
  2644. if (temp < 0)
  2645. return;
  2646. if (priv->temperature != temp) {
  2647. if (priv->temperature)
  2648. IWL_DEBUG_TEMP("Temperature changed "
  2649. "from %dC to %dC\n",
  2650. KELVIN_TO_CELSIUS(priv->temperature),
  2651. KELVIN_TO_CELSIUS(temp));
  2652. else
  2653. IWL_DEBUG_TEMP("Temperature "
  2654. "initialized to %dC\n",
  2655. KELVIN_TO_CELSIUS(temp));
  2656. }
  2657. priv->temperature = temp;
  2658. set_bit(STATUS_TEMPERATURE, &priv->status);
  2659. if (unlikely(!test_bit(STATUS_SCANNING, &priv->status)) &&
  2660. iwl4965_is_temp_calib_needed(priv))
  2661. queue_work(priv->workqueue, &priv->txpower_work);
  2662. }
  2663. static void iwl4965_add_radiotap(struct iwl4965_priv *priv,
  2664. struct sk_buff *skb,
  2665. struct iwl4965_rx_phy_res *rx_start,
  2666. struct ieee80211_rx_status *stats,
  2667. u32 ampdu_status)
  2668. {
  2669. s8 signal = stats->ssi;
  2670. s8 noise = 0;
  2671. int rate = stats->rate_idx;
  2672. u64 tsf = stats->mactime;
  2673. __le16 phy_flags_hw = rx_start->phy_flags;
  2674. struct iwl4965_rt_rx_hdr {
  2675. struct ieee80211_radiotap_header rt_hdr;
  2676. __le64 rt_tsf; /* TSF */
  2677. u8 rt_flags; /* radiotap packet flags */
  2678. u8 rt_rate; /* rate in 500kb/s */
  2679. __le16 rt_channelMHz; /* channel in MHz */
  2680. __le16 rt_chbitmask; /* channel bitfield */
  2681. s8 rt_dbmsignal; /* signal in dBm, kluged to signed */
  2682. s8 rt_dbmnoise;
  2683. u8 rt_antenna; /* antenna number */
  2684. } __attribute__ ((packed)) *iwl4965_rt;
  2685. /* TODO: We won't have enough headroom for HT frames. Fix it later. */
  2686. if (skb_headroom(skb) < sizeof(*iwl4965_rt)) {
  2687. if (net_ratelimit())
  2688. printk(KERN_ERR "not enough headroom [%d] for "
  2689. "radiotap head [%zd]\n",
  2690. skb_headroom(skb), sizeof(*iwl4965_rt));
  2691. return;
  2692. }
  2693. /* put radiotap header in front of 802.11 header and data */
  2694. iwl4965_rt = (void *)skb_push(skb, sizeof(*iwl4965_rt));
  2695. /* initialise radiotap header */
  2696. iwl4965_rt->rt_hdr.it_version = PKTHDR_RADIOTAP_VERSION;
  2697. iwl4965_rt->rt_hdr.it_pad = 0;
  2698. /* total header + data */
  2699. put_unaligned(cpu_to_le16(sizeof(*iwl4965_rt)),
  2700. &iwl4965_rt->rt_hdr.it_len);
  2701. /* Indicate all the fields we add to the radiotap header */
  2702. put_unaligned(cpu_to_le32((1 << IEEE80211_RADIOTAP_TSFT) |
  2703. (1 << IEEE80211_RADIOTAP_FLAGS) |
  2704. (1 << IEEE80211_RADIOTAP_RATE) |
  2705. (1 << IEEE80211_RADIOTAP_CHANNEL) |
  2706. (1 << IEEE80211_RADIOTAP_DBM_ANTSIGNAL) |
  2707. (1 << IEEE80211_RADIOTAP_DBM_ANTNOISE) |
  2708. (1 << IEEE80211_RADIOTAP_ANTENNA)),
  2709. &iwl4965_rt->rt_hdr.it_present);
  2710. /* Zero the flags, we'll add to them as we go */
  2711. iwl4965_rt->rt_flags = 0;
  2712. put_unaligned(cpu_to_le64(tsf), &iwl4965_rt->rt_tsf);
  2713. iwl4965_rt->rt_dbmsignal = signal;
  2714. iwl4965_rt->rt_dbmnoise = noise;
  2715. /* Convert the channel frequency and set the flags */
  2716. put_unaligned(cpu_to_le16(stats->freq), &iwl4965_rt->rt_channelMHz);
  2717. if (!(phy_flags_hw & RX_RES_PHY_FLAGS_BAND_24_MSK))
  2718. put_unaligned(cpu_to_le16(IEEE80211_CHAN_OFDM |
  2719. IEEE80211_CHAN_5GHZ),
  2720. &iwl4965_rt->rt_chbitmask);
  2721. else if (phy_flags_hw & RX_RES_PHY_FLAGS_MOD_CCK_MSK)
  2722. put_unaligned(cpu_to_le16(IEEE80211_CHAN_CCK |
  2723. IEEE80211_CHAN_2GHZ),
  2724. &iwl4965_rt->rt_chbitmask);
  2725. else /* 802.11g */
  2726. put_unaligned(cpu_to_le16(IEEE80211_CHAN_OFDM |
  2727. IEEE80211_CHAN_2GHZ),
  2728. &iwl4965_rt->rt_chbitmask);
  2729. if (rate == -1)
  2730. iwl4965_rt->rt_rate = 0;
  2731. else
  2732. iwl4965_rt->rt_rate = iwl4965_rates[rate].ieee;
  2733. /*
  2734. * "antenna number"
  2735. *
  2736. * It seems that the antenna field in the phy flags value
  2737. * is actually a bitfield. This is undefined by radiotap,
  2738. * it wants an actual antenna number but I always get "7"
  2739. * for most legacy frames I receive indicating that the
  2740. * same frame was received on all three RX chains.
  2741. *
  2742. * I think this field should be removed in favour of a
  2743. * new 802.11n radiotap field "RX chains" that is defined
  2744. * as a bitmask.
  2745. */
  2746. iwl4965_rt->rt_antenna =
  2747. le16_to_cpu(phy_flags_hw & RX_RES_PHY_FLAGS_ANTENNA_MSK) >> 4;
  2748. /* set the preamble flag if appropriate */
  2749. if (phy_flags_hw & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK)
  2750. iwl4965_rt->rt_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
  2751. stats->flag |= RX_FLAG_RADIOTAP;
  2752. }
  2753. static void iwl4965_handle_data_packet(struct iwl4965_priv *priv, int is_data,
  2754. int include_phy,
  2755. struct iwl4965_rx_mem_buffer *rxb,
  2756. struct ieee80211_rx_status *stats)
  2757. {
  2758. struct iwl4965_rx_packet *pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
  2759. struct iwl4965_rx_phy_res *rx_start = (include_phy) ?
  2760. (struct iwl4965_rx_phy_res *)&(pkt->u.raw[0]) : NULL;
  2761. struct ieee80211_hdr *hdr;
  2762. u16 len;
  2763. __le32 *rx_end;
  2764. unsigned int skblen;
  2765. u32 ampdu_status;
  2766. if (!include_phy && priv->last_phy_res[0])
  2767. rx_start = (struct iwl4965_rx_phy_res *)&priv->last_phy_res[1];
  2768. if (!rx_start) {
  2769. IWL_ERROR("MPDU frame without a PHY data\n");
  2770. return;
  2771. }
  2772. if (include_phy) {
  2773. hdr = (struct ieee80211_hdr *)((u8 *) & rx_start[1] +
  2774. rx_start->cfg_phy_cnt);
  2775. len = le16_to_cpu(rx_start->byte_count);
  2776. rx_end = (__le32 *) ((u8 *) & pkt->u.raw[0] +
  2777. sizeof(struct iwl4965_rx_phy_res) +
  2778. rx_start->cfg_phy_cnt + len);
  2779. } else {
  2780. struct iwl4965_rx_mpdu_res_start *amsdu =
  2781. (struct iwl4965_rx_mpdu_res_start *)pkt->u.raw;
  2782. hdr = (struct ieee80211_hdr *)(pkt->u.raw +
  2783. sizeof(struct iwl4965_rx_mpdu_res_start));
  2784. len = le16_to_cpu(amsdu->byte_count);
  2785. rx_start->byte_count = amsdu->byte_count;
  2786. rx_end = (__le32 *) (((u8 *) hdr) + len);
  2787. }
  2788. if (len > priv->hw_setting.max_pkt_size || len < 16) {
  2789. IWL_WARNING("byte count out of range [16,4K] : %d\n", len);
  2790. return;
  2791. }
  2792. ampdu_status = le32_to_cpu(*rx_end);
  2793. skblen = ((u8 *) rx_end - (u8 *) & pkt->u.raw[0]) + sizeof(u32);
  2794. /* start from MAC */
  2795. skb_reserve(rxb->skb, (void *)hdr - (void *)pkt);
  2796. skb_put(rxb->skb, len); /* end where data ends */
  2797. /* We only process data packets if the interface is open */
  2798. if (unlikely(!priv->is_open)) {
  2799. IWL_DEBUG_DROP_LIMIT
  2800. ("Dropping packet while interface is not open.\n");
  2801. return;
  2802. }
  2803. stats->flag = 0;
  2804. hdr = (struct ieee80211_hdr *)rxb->skb->data;
  2805. if (iwl4965_param_hwcrypto)
  2806. iwl4965_set_decrypted_flag(priv, rxb->skb, ampdu_status, stats);
  2807. if (priv->add_radiotap)
  2808. iwl4965_add_radiotap(priv, rxb->skb, rx_start, stats, ampdu_status);
  2809. ieee80211_rx_irqsafe(priv->hw, rxb->skb, stats);
  2810. priv->alloc_rxb_skb--;
  2811. rxb->skb = NULL;
  2812. #ifdef LED
  2813. priv->led_packets += len;
  2814. iwl4965_setup_activity_timer(priv);
  2815. #endif
  2816. }
  2817. /* Calc max signal level (dBm) among 3 possible receivers */
  2818. static int iwl4965_calc_rssi(struct iwl4965_rx_phy_res *rx_resp)
  2819. {
  2820. /* data from PHY/DSP regarding signal strength, etc.,
  2821. * contents are always there, not configurable by host. */
  2822. struct iwl4965_rx_non_cfg_phy *ncphy =
  2823. (struct iwl4965_rx_non_cfg_phy *)rx_resp->non_cfg_phy;
  2824. u32 agc = (le16_to_cpu(ncphy->agc_info) & IWL_AGC_DB_MASK)
  2825. >> IWL_AGC_DB_POS;
  2826. u32 valid_antennae =
  2827. (le16_to_cpu(rx_resp->phy_flags) & RX_PHY_FLAGS_ANTENNAE_MASK)
  2828. >> RX_PHY_FLAGS_ANTENNAE_OFFSET;
  2829. u8 max_rssi = 0;
  2830. u32 i;
  2831. /* Find max rssi among 3 possible receivers.
  2832. * These values are measured by the digital signal processor (DSP).
  2833. * They should stay fairly constant even as the signal strength varies,
  2834. * if the radio's automatic gain control (AGC) is working right.
  2835. * AGC value (see below) will provide the "interesting" info. */
  2836. for (i = 0; i < 3; i++)
  2837. if (valid_antennae & (1 << i))
  2838. max_rssi = max(ncphy->rssi_info[i << 1], max_rssi);
  2839. IWL_DEBUG_STATS("Rssi In A %d B %d C %d Max %d AGC dB %d\n",
  2840. ncphy->rssi_info[0], ncphy->rssi_info[2], ncphy->rssi_info[4],
  2841. max_rssi, agc);
  2842. /* dBm = max_rssi dB - agc dB - constant.
  2843. * Higher AGC (higher radio gain) means lower signal. */
  2844. return (max_rssi - agc - IWL_RSSI_OFFSET);
  2845. }
  2846. #ifdef CONFIG_IWL4965_HT
  2847. /* Parsed Information Elements */
  2848. struct ieee802_11_elems {
  2849. u8 *ds_params;
  2850. u8 ds_params_len;
  2851. u8 *tim;
  2852. u8 tim_len;
  2853. u8 *ibss_params;
  2854. u8 ibss_params_len;
  2855. u8 *erp_info;
  2856. u8 erp_info_len;
  2857. u8 *ht_cap_param;
  2858. u8 ht_cap_param_len;
  2859. u8 *ht_extra_param;
  2860. u8 ht_extra_param_len;
  2861. };
  2862. static int parse_elems(u8 *start, size_t len, struct ieee802_11_elems *elems)
  2863. {
  2864. size_t left = len;
  2865. u8 *pos = start;
  2866. int unknown = 0;
  2867. memset(elems, 0, sizeof(*elems));
  2868. while (left >= 2) {
  2869. u8 id, elen;
  2870. id = *pos++;
  2871. elen = *pos++;
  2872. left -= 2;
  2873. if (elen > left)
  2874. return -1;
  2875. switch (id) {
  2876. case WLAN_EID_DS_PARAMS:
  2877. elems->ds_params = pos;
  2878. elems->ds_params_len = elen;
  2879. break;
  2880. case WLAN_EID_TIM:
  2881. elems->tim = pos;
  2882. elems->tim_len = elen;
  2883. break;
  2884. case WLAN_EID_IBSS_PARAMS:
  2885. elems->ibss_params = pos;
  2886. elems->ibss_params_len = elen;
  2887. break;
  2888. case WLAN_EID_ERP_INFO:
  2889. elems->erp_info = pos;
  2890. elems->erp_info_len = elen;
  2891. break;
  2892. case WLAN_EID_HT_CAPABILITY:
  2893. elems->ht_cap_param = pos;
  2894. elems->ht_cap_param_len = elen;
  2895. break;
  2896. case WLAN_EID_HT_EXTRA_INFO:
  2897. elems->ht_extra_param = pos;
  2898. elems->ht_extra_param_len = elen;
  2899. break;
  2900. default:
  2901. unknown++;
  2902. break;
  2903. }
  2904. left -= elen;
  2905. pos += elen;
  2906. }
  2907. return 0;
  2908. }
  2909. void iwl4965_init_ht_hw_capab(struct ieee80211_ht_info *ht_info,
  2910. enum ieee80211_band band)
  2911. {
  2912. ht_info->cap = 0;
  2913. memset(ht_info->supp_mcs_set, 0, 16);
  2914. ht_info->ht_supported = 1;
  2915. if (band == IEEE80211_BAND_5GHZ) {
  2916. ht_info->cap |= (u16)IEEE80211_HT_CAP_SUP_WIDTH;
  2917. ht_info->cap |= (u16)IEEE80211_HT_CAP_SGI_40;
  2918. ht_info->supp_mcs_set[4] = 0x01;
  2919. }
  2920. ht_info->cap |= (u16)IEEE80211_HT_CAP_GRN_FLD;
  2921. ht_info->cap |= (u16)IEEE80211_HT_CAP_SGI_20;
  2922. ht_info->cap |= (u16)(IEEE80211_HT_CAP_MIMO_PS &
  2923. (IWL_MIMO_PS_NONE << 2));
  2924. if (iwl4965_param_amsdu_size_8K) {
  2925. printk(KERN_DEBUG "iwl4965 in A-MSDU 8K support mode\n");
  2926. ht_info->cap |= (u16)IEEE80211_HT_CAP_MAX_AMSDU;
  2927. }
  2928. ht_info->ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF;
  2929. ht_info->ampdu_density = CFG_HT_MPDU_DENSITY_DEF;
  2930. ht_info->supp_mcs_set[0] = 0xFF;
  2931. ht_info->supp_mcs_set[1] = 0xFF;
  2932. }
  2933. #endif /* CONFIG_IWL4965_HT */
  2934. static void iwl4965_sta_modify_ps_wake(struct iwl4965_priv *priv, int sta_id)
  2935. {
  2936. unsigned long flags;
  2937. spin_lock_irqsave(&priv->sta_lock, flags);
  2938. priv->stations[sta_id].sta.station_flags &= ~STA_FLG_PWR_SAVE_MSK;
  2939. priv->stations[sta_id].sta.station_flags_msk = STA_FLG_PWR_SAVE_MSK;
  2940. priv->stations[sta_id].sta.sta.modify_mask = 0;
  2941. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  2942. spin_unlock_irqrestore(&priv->sta_lock, flags);
  2943. iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
  2944. }
  2945. static void iwl4965_update_ps_mode(struct iwl4965_priv *priv, u16 ps_bit, u8 *addr)
  2946. {
  2947. /* FIXME: need locking over ps_status ??? */
  2948. u8 sta_id = iwl4965_hw_find_station(priv, addr);
  2949. if (sta_id != IWL_INVALID_STATION) {
  2950. u8 sta_awake = priv->stations[sta_id].
  2951. ps_status == STA_PS_STATUS_WAKE;
  2952. if (sta_awake && ps_bit)
  2953. priv->stations[sta_id].ps_status = STA_PS_STATUS_SLEEP;
  2954. else if (!sta_awake && !ps_bit) {
  2955. iwl4965_sta_modify_ps_wake(priv, sta_id);
  2956. priv->stations[sta_id].ps_status = STA_PS_STATUS_WAKE;
  2957. }
  2958. }
  2959. }
  2960. #define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
  2961. /* Called for REPLY_4965_RX (legacy ABG frames), or
  2962. * REPLY_RX_MPDU_CMD (HT high-throughput N frames). */
  2963. static void iwl4965_rx_reply_rx(struct iwl4965_priv *priv,
  2964. struct iwl4965_rx_mem_buffer *rxb)
  2965. {
  2966. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2967. /* Use phy data (Rx signal strength, etc.) contained within
  2968. * this rx packet for legacy frames,
  2969. * or phy data cached from REPLY_RX_PHY_CMD for HT frames. */
  2970. int include_phy = (pkt->hdr.cmd == REPLY_4965_RX);
  2971. struct iwl4965_rx_phy_res *rx_start = (include_phy) ?
  2972. (struct iwl4965_rx_phy_res *)&(pkt->u.raw[0]) :
  2973. (struct iwl4965_rx_phy_res *)&priv->last_phy_res[1];
  2974. __le32 *rx_end;
  2975. unsigned int len = 0;
  2976. struct ieee80211_hdr *header;
  2977. u16 fc;
  2978. struct ieee80211_rx_status stats = {
  2979. .mactime = le64_to_cpu(rx_start->timestamp),
  2980. .freq = ieee80211chan2mhz(le16_to_cpu(rx_start->channel)),
  2981. .band =
  2982. (rx_start->phy_flags & RX_RES_PHY_FLAGS_BAND_24_MSK) ?
  2983. IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ,
  2984. .antenna = 0,
  2985. .rate_idx = iwl4965_rate_index_from_plcp(
  2986. le32_to_cpu(rx_start->rate_n_flags)),
  2987. .flag = 0,
  2988. };
  2989. u8 network_packet;
  2990. if ((unlikely(rx_start->cfg_phy_cnt > 20))) {
  2991. IWL_DEBUG_DROP
  2992. ("dsp size out of range [0,20]: "
  2993. "%d/n", rx_start->cfg_phy_cnt);
  2994. return;
  2995. }
  2996. if (!include_phy) {
  2997. if (priv->last_phy_res[0])
  2998. rx_start = (struct iwl4965_rx_phy_res *)
  2999. &priv->last_phy_res[1];
  3000. else
  3001. rx_start = NULL;
  3002. }
  3003. if (!rx_start) {
  3004. IWL_ERROR("MPDU frame without a PHY data\n");
  3005. return;
  3006. }
  3007. if (include_phy) {
  3008. header = (struct ieee80211_hdr *)((u8 *) & rx_start[1]
  3009. + rx_start->cfg_phy_cnt);
  3010. len = le16_to_cpu(rx_start->byte_count);
  3011. rx_end = (__le32 *) (pkt->u.raw + rx_start->cfg_phy_cnt +
  3012. sizeof(struct iwl4965_rx_phy_res) + len);
  3013. } else {
  3014. struct iwl4965_rx_mpdu_res_start *amsdu =
  3015. (struct iwl4965_rx_mpdu_res_start *)pkt->u.raw;
  3016. header = (void *)(pkt->u.raw +
  3017. sizeof(struct iwl4965_rx_mpdu_res_start));
  3018. len = le16_to_cpu(amsdu->byte_count);
  3019. rx_end = (__le32 *) (pkt->u.raw +
  3020. sizeof(struct iwl4965_rx_mpdu_res_start) + len);
  3021. }
  3022. if (!(*rx_end & RX_RES_STATUS_NO_CRC32_ERROR) ||
  3023. !(*rx_end & RX_RES_STATUS_NO_RXE_OVERFLOW)) {
  3024. IWL_DEBUG_RX("Bad CRC or FIFO: 0x%08X.\n",
  3025. le32_to_cpu(*rx_end));
  3026. return;
  3027. }
  3028. priv->ucode_beacon_time = le32_to_cpu(rx_start->beacon_time_stamp);
  3029. /* Find max signal strength (dBm) among 3 antenna/receiver chains */
  3030. stats.ssi = iwl4965_calc_rssi(rx_start);
  3031. /* Meaningful noise values are available only from beacon statistics,
  3032. * which are gathered only when associated, and indicate noise
  3033. * only for the associated network channel ...
  3034. * Ignore these noise values while scanning (other channels) */
  3035. if (iwl4965_is_associated(priv) &&
  3036. !test_bit(STATUS_SCANNING, &priv->status)) {
  3037. stats.noise = priv->last_rx_noise;
  3038. stats.signal = iwl4965_calc_sig_qual(stats.ssi, stats.noise);
  3039. } else {
  3040. stats.noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
  3041. stats.signal = iwl4965_calc_sig_qual(stats.ssi, 0);
  3042. }
  3043. /* Reset beacon noise level if not associated. */
  3044. if (!iwl4965_is_associated(priv))
  3045. priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
  3046. #ifdef CONFIG_IWL4965_DEBUG
  3047. /* TODO: Parts of iwl4965_report_frame are broken for 4965 */
  3048. if (iwl4965_debug_level & (IWL_DL_RX))
  3049. /* Set "1" to report good data frames in groups of 100 */
  3050. iwl4965_report_frame(priv, pkt, header, 1);
  3051. if (iwl4965_debug_level & (IWL_DL_RX | IWL_DL_STATS))
  3052. IWL_DEBUG_RX("Rssi %d, noise %d, qual %d, TSF %lu\n",
  3053. stats.ssi, stats.noise, stats.signal,
  3054. (long unsigned int)le64_to_cpu(rx_start->timestamp));
  3055. #endif
  3056. network_packet = iwl4965_is_network_packet(priv, header);
  3057. if (network_packet) {
  3058. priv->last_rx_rssi = stats.ssi;
  3059. priv->last_beacon_time = priv->ucode_beacon_time;
  3060. priv->last_tsf = le64_to_cpu(rx_start->timestamp);
  3061. }
  3062. fc = le16_to_cpu(header->frame_control);
  3063. switch (fc & IEEE80211_FCTL_FTYPE) {
  3064. case IEEE80211_FTYPE_MGMT:
  3065. if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
  3066. iwl4965_update_ps_mode(priv, fc & IEEE80211_FCTL_PM,
  3067. header->addr2);
  3068. switch (fc & IEEE80211_FCTL_STYPE) {
  3069. case IEEE80211_STYPE_PROBE_RESP:
  3070. case IEEE80211_STYPE_BEACON:
  3071. if ((priv->iw_mode == IEEE80211_IF_TYPE_STA &&
  3072. !compare_ether_addr(header->addr2, priv->bssid)) ||
  3073. (priv->iw_mode == IEEE80211_IF_TYPE_IBSS &&
  3074. !compare_ether_addr(header->addr3, priv->bssid))) {
  3075. struct ieee80211_mgmt *mgmt =
  3076. (struct ieee80211_mgmt *)header;
  3077. u64 timestamp =
  3078. le64_to_cpu(mgmt->u.beacon.timestamp);
  3079. priv->timestamp0 = timestamp & 0xFFFFFFFF;
  3080. priv->timestamp1 =
  3081. (timestamp >> 32) & 0xFFFFFFFF;
  3082. priv->beacon_int = le16_to_cpu(
  3083. mgmt->u.beacon.beacon_int);
  3084. if (priv->call_post_assoc_from_beacon &&
  3085. (priv->iw_mode == IEEE80211_IF_TYPE_STA)) {
  3086. priv->call_post_assoc_from_beacon = 0;
  3087. queue_work(priv->workqueue,
  3088. &priv->post_associate.work);
  3089. }
  3090. }
  3091. break;
  3092. case IEEE80211_STYPE_ACTION:
  3093. break;
  3094. /*
  3095. * TODO: Use the new callback function from
  3096. * mac80211 instead of sniffing these packets.
  3097. */
  3098. case IEEE80211_STYPE_ASSOC_RESP:
  3099. case IEEE80211_STYPE_REASSOC_RESP:
  3100. if (network_packet) {
  3101. #ifdef CONFIG_IWL4965_HT
  3102. u8 *pos = NULL;
  3103. struct ieee802_11_elems elems;
  3104. #endif /*CONFIG_IWL4965_HT */
  3105. struct ieee80211_mgmt *mgnt =
  3106. (struct ieee80211_mgmt *)header;
  3107. /* We have just associated, give some
  3108. * time for the 4-way handshake if
  3109. * any. Don't start scan too early. */
  3110. priv->next_scan_jiffies = jiffies +
  3111. IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
  3112. priv->assoc_id = (~((1 << 15) | (1 << 14))
  3113. & le16_to_cpu(mgnt->u.assoc_resp.aid));
  3114. priv->assoc_capability =
  3115. le16_to_cpu(
  3116. mgnt->u.assoc_resp.capab_info);
  3117. #ifdef CONFIG_IWL4965_HT
  3118. pos = mgnt->u.assoc_resp.variable;
  3119. if (!parse_elems(pos,
  3120. len - (pos - (u8 *) mgnt),
  3121. &elems)) {
  3122. if (elems.ht_extra_param &&
  3123. elems.ht_cap_param)
  3124. break;
  3125. }
  3126. #endif /*CONFIG_IWL4965_HT */
  3127. /* assoc_id is 0 no association */
  3128. if (!priv->assoc_id)
  3129. break;
  3130. if (priv->beacon_int)
  3131. queue_work(priv->workqueue,
  3132. &priv->post_associate.work);
  3133. else
  3134. priv->call_post_assoc_from_beacon = 1;
  3135. }
  3136. break;
  3137. case IEEE80211_STYPE_PROBE_REQ:
  3138. if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
  3139. !iwl4965_is_associated(priv)) {
  3140. DECLARE_MAC_BUF(mac1);
  3141. DECLARE_MAC_BUF(mac2);
  3142. DECLARE_MAC_BUF(mac3);
  3143. IWL_DEBUG_DROP("Dropping (non network): "
  3144. "%s, %s, %s\n",
  3145. print_mac(mac1, header->addr1),
  3146. print_mac(mac2, header->addr2),
  3147. print_mac(mac3, header->addr3));
  3148. return;
  3149. }
  3150. }
  3151. iwl4965_handle_data_packet(priv, 0, include_phy, rxb, &stats);
  3152. break;
  3153. case IEEE80211_FTYPE_CTL:
  3154. #ifdef CONFIG_IWL4965_HT
  3155. switch (fc & IEEE80211_FCTL_STYPE) {
  3156. case IEEE80211_STYPE_BACK_REQ:
  3157. IWL_DEBUG_HT("IEEE80211_STYPE_BACK_REQ arrived\n");
  3158. iwl4965_handle_data_packet(priv, 0, include_phy,
  3159. rxb, &stats);
  3160. break;
  3161. default:
  3162. break;
  3163. }
  3164. #endif
  3165. break;
  3166. case IEEE80211_FTYPE_DATA: {
  3167. DECLARE_MAC_BUF(mac1);
  3168. DECLARE_MAC_BUF(mac2);
  3169. DECLARE_MAC_BUF(mac3);
  3170. if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
  3171. iwl4965_update_ps_mode(priv, fc & IEEE80211_FCTL_PM,
  3172. header->addr2);
  3173. if (unlikely(!network_packet))
  3174. IWL_DEBUG_DROP("Dropping (non network): "
  3175. "%s, %s, %s\n",
  3176. print_mac(mac1, header->addr1),
  3177. print_mac(mac2, header->addr2),
  3178. print_mac(mac3, header->addr3));
  3179. else if (unlikely(iwl4965_is_duplicate_packet(priv, header)))
  3180. IWL_DEBUG_DROP("Dropping (dup): %s, %s, %s\n",
  3181. print_mac(mac1, header->addr1),
  3182. print_mac(mac2, header->addr2),
  3183. print_mac(mac3, header->addr3));
  3184. else
  3185. iwl4965_handle_data_packet(priv, 1, include_phy, rxb,
  3186. &stats);
  3187. break;
  3188. }
  3189. default:
  3190. break;
  3191. }
  3192. }
  3193. /* Cache phy data (Rx signal strength, etc) for HT frame (REPLY_RX_PHY_CMD).
  3194. * This will be used later in iwl4965_rx_reply_rx() for REPLY_RX_MPDU_CMD. */
  3195. static void iwl4965_rx_reply_rx_phy(struct iwl4965_priv *priv,
  3196. struct iwl4965_rx_mem_buffer *rxb)
  3197. {
  3198. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3199. priv->last_phy_res[0] = 1;
  3200. memcpy(&priv->last_phy_res[1], &(pkt->u.raw[0]),
  3201. sizeof(struct iwl4965_rx_phy_res));
  3202. }
  3203. static void iwl4965_rx_missed_beacon_notif(struct iwl4965_priv *priv,
  3204. struct iwl4965_rx_mem_buffer *rxb)
  3205. {
  3206. #ifdef CONFIG_IWL4965_SENSITIVITY
  3207. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3208. struct iwl4965_missed_beacon_notif *missed_beacon;
  3209. missed_beacon = &pkt->u.missed_beacon;
  3210. if (le32_to_cpu(missed_beacon->consequtive_missed_beacons) > 5) {
  3211. IWL_DEBUG_CALIB("missed bcn cnsq %d totl %d rcd %d expctd %d\n",
  3212. le32_to_cpu(missed_beacon->consequtive_missed_beacons),
  3213. le32_to_cpu(missed_beacon->total_missed_becons),
  3214. le32_to_cpu(missed_beacon->num_recvd_beacons),
  3215. le32_to_cpu(missed_beacon->num_expected_beacons));
  3216. priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT;
  3217. if (unlikely(!test_bit(STATUS_SCANNING, &priv->status)))
  3218. queue_work(priv->workqueue, &priv->sensitivity_work);
  3219. }
  3220. #endif /*CONFIG_IWL4965_SENSITIVITY*/
  3221. }
  3222. #ifdef CONFIG_IWL4965_HT
  3223. /**
  3224. * iwl4965_sta_modify_enable_tid_tx - Enable Tx for this TID in station table
  3225. */
  3226. static void iwl4965_sta_modify_enable_tid_tx(struct iwl4965_priv *priv,
  3227. int sta_id, int tid)
  3228. {
  3229. unsigned long flags;
  3230. /* Remove "disable" flag, to enable Tx for this TID */
  3231. spin_lock_irqsave(&priv->sta_lock, flags);
  3232. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_TID_DISABLE_TX;
  3233. priv->stations[sta_id].sta.tid_disable_tx &= cpu_to_le16(~(1 << tid));
  3234. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  3235. spin_unlock_irqrestore(&priv->sta_lock, flags);
  3236. iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
  3237. }
  3238. /**
  3239. * iwl4965_tx_status_reply_compressed_ba - Update tx status from block-ack
  3240. *
  3241. * Go through block-ack's bitmap of ACK'd frames, update driver's record of
  3242. * ACK vs. not. This gets sent to mac80211, then to rate scaling algo.
  3243. */
  3244. static int iwl4965_tx_status_reply_compressed_ba(struct iwl4965_priv *priv,
  3245. struct iwl4965_ht_agg *agg,
  3246. struct iwl4965_compressed_ba_resp*
  3247. ba_resp)
  3248. {
  3249. int i, sh, ack;
  3250. u16 seq_ctl = le16_to_cpu(ba_resp->seq_ctl);
  3251. u16 scd_flow = le16_to_cpu(ba_resp->scd_flow);
  3252. u64 bitmap;
  3253. int successes = 0;
  3254. struct ieee80211_tx_status *tx_status;
  3255. if (unlikely(!agg->wait_for_ba)) {
  3256. IWL_ERROR("Received BA when not expected\n");
  3257. return -EINVAL;
  3258. }
  3259. /* Mark that the expected block-ack response arrived */
  3260. agg->wait_for_ba = 0;
  3261. IWL_DEBUG_TX_REPLY("BA %d %d\n", agg->start_idx, ba_resp->seq_ctl);
  3262. /* Calculate shift to align block-ack bits with our Tx window bits */
  3263. sh = agg->start_idx - SEQ_TO_INDEX(seq_ctl>>4);
  3264. if (sh < 0) /* tbw something is wrong with indices */
  3265. sh += 0x100;
  3266. /* don't use 64-bit values for now */
  3267. bitmap = le64_to_cpu(ba_resp->bitmap) >> sh;
  3268. if (agg->frame_count > (64 - sh)) {
  3269. IWL_DEBUG_TX_REPLY("more frames than bitmap size");
  3270. return -1;
  3271. }
  3272. /* check for success or failure according to the
  3273. * transmitted bitmap and block-ack bitmap */
  3274. bitmap &= agg->bitmap;
  3275. /* For each frame attempted in aggregation,
  3276. * update driver's record of tx frame's status. */
  3277. for (i = 0; i < agg->frame_count ; i++) {
  3278. ack = bitmap & (1 << i);
  3279. successes += !!ack;
  3280. IWL_DEBUG_TX_REPLY("%s ON i=%d idx=%d raw=%d\n",
  3281. ack? "ACK":"NACK", i, (agg->start_idx + i) & 0xff,
  3282. agg->start_idx + i);
  3283. }
  3284. tx_status = &priv->txq[scd_flow].txb[agg->start_idx].status;
  3285. tx_status->flags = IEEE80211_TX_STATUS_ACK;
  3286. tx_status->flags |= IEEE80211_TX_STATUS_AMPDU;
  3287. tx_status->ampdu_ack_map = successes;
  3288. tx_status->ampdu_ack_len = agg->frame_count;
  3289. /* FIXME Wrong rate
  3290. tx_status->control.tx_rate = agg->rate_n_flags;
  3291. */
  3292. IWL_DEBUG_TX_REPLY("Bitmap %llx\n", bitmap);
  3293. return 0;
  3294. }
  3295. /**
  3296. * iwl4965_tx_queue_stop_scheduler - Stop queue, but keep configuration
  3297. */
  3298. static void iwl4965_tx_queue_stop_scheduler(struct iwl4965_priv *priv,
  3299. u16 txq_id)
  3300. {
  3301. /* Simply stop the queue, but don't change any configuration;
  3302. * the SCD_ACT_EN bit is the write-enable mask for the ACTIVE bit. */
  3303. iwl4965_write_prph(priv,
  3304. KDR_SCD_QUEUE_STATUS_BITS(txq_id),
  3305. (0 << SCD_QUEUE_STTS_REG_POS_ACTIVE)|
  3306. (1 << SCD_QUEUE_STTS_REG_POS_SCD_ACT_EN));
  3307. }
  3308. /**
  3309. * txq_id must be greater than IWL_BACK_QUEUE_FIRST_ID
  3310. */
  3311. static int iwl4965_tx_queue_agg_disable(struct iwl4965_priv *priv, u16 txq_id,
  3312. u16 ssn_idx, u8 tx_fifo)
  3313. {
  3314. if (IWL_BACK_QUEUE_FIRST_ID > txq_id) {
  3315. IWL_WARNING("queue number too small: %d, must be > %d\n",
  3316. txq_id, IWL_BACK_QUEUE_FIRST_ID);
  3317. return -EINVAL;
  3318. }
  3319. iwl4965_tx_queue_stop_scheduler(priv, txq_id);
  3320. iwl4965_clear_bits_prph(priv, KDR_SCD_QUEUECHAIN_SEL, (1 << txq_id));
  3321. priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
  3322. priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
  3323. /* supposes that ssn_idx is valid (!= 0xFFF) */
  3324. iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
  3325. iwl4965_clear_bits_prph(priv, KDR_SCD_INTERRUPT_MASK, (1 << txq_id));
  3326. iwl4965_txq_ctx_deactivate(priv, txq_id);
  3327. iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 0);
  3328. return 0;
  3329. }
  3330. int iwl4965_check_empty_hw_queue(struct iwl4965_priv *priv, int sta_id,
  3331. u8 tid, int txq_id)
  3332. {
  3333. struct iwl4965_queue *q = &priv->txq[txq_id].q;
  3334. u8 *addr = priv->stations[sta_id].sta.sta.addr;
  3335. struct iwl4965_tid_data *tid_data = &priv->stations[sta_id].tid[tid];
  3336. switch (priv->stations[sta_id].tid[tid].agg.state) {
  3337. case IWL_EMPTYING_HW_QUEUE_DELBA:
  3338. /* We are reclaiming the last packet of the */
  3339. /* aggregated HW queue */
  3340. if (txq_id == tid_data->agg.txq_id &&
  3341. q->read_ptr == q->write_ptr) {
  3342. u16 ssn = SEQ_TO_SN(tid_data->seq_number);
  3343. int tx_fifo = default_tid_to_tx_fifo[tid];
  3344. IWL_DEBUG_HT("HW queue empty: continue DELBA flow\n");
  3345. iwl4965_tx_queue_agg_disable(priv, txq_id,
  3346. ssn, tx_fifo);
  3347. tid_data->agg.state = IWL_AGG_OFF;
  3348. ieee80211_stop_tx_ba_cb_irqsafe(priv->hw, addr, tid);
  3349. }
  3350. break;
  3351. case IWL_EMPTYING_HW_QUEUE_ADDBA:
  3352. /* We are reclaiming the last packet of the queue */
  3353. if (tid_data->tfds_in_queue == 0) {
  3354. IWL_DEBUG_HT("HW queue empty: continue ADDBA flow\n");
  3355. tid_data->agg.state = IWL_AGG_ON;
  3356. ieee80211_start_tx_ba_cb_irqsafe(priv->hw, addr, tid);
  3357. }
  3358. break;
  3359. }
  3360. return 0;
  3361. }
  3362. /**
  3363. * iwl4965_queue_dec_wrap - Decrement queue index, wrap back to end if needed
  3364. * @index -- current index
  3365. * @n_bd -- total number of entries in queue (s/b power of 2)
  3366. */
  3367. static inline int iwl4965_queue_dec_wrap(int index, int n_bd)
  3368. {
  3369. return (index == 0) ? n_bd - 1 : index - 1;
  3370. }
  3371. /**
  3372. * iwl4965_rx_reply_compressed_ba - Handler for REPLY_COMPRESSED_BA
  3373. *
  3374. * Handles block-acknowledge notification from device, which reports success
  3375. * of frames sent via aggregation.
  3376. */
  3377. static void iwl4965_rx_reply_compressed_ba(struct iwl4965_priv *priv,
  3378. struct iwl4965_rx_mem_buffer *rxb)
  3379. {
  3380. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3381. struct iwl4965_compressed_ba_resp *ba_resp = &pkt->u.compressed_ba;
  3382. int index;
  3383. struct iwl4965_tx_queue *txq = NULL;
  3384. struct iwl4965_ht_agg *agg;
  3385. DECLARE_MAC_BUF(mac);
  3386. /* "flow" corresponds to Tx queue */
  3387. u16 scd_flow = le16_to_cpu(ba_resp->scd_flow);
  3388. /* "ssn" is start of block-ack Tx window, corresponds to index
  3389. * (in Tx queue's circular buffer) of first TFD/frame in window */
  3390. u16 ba_resp_scd_ssn = le16_to_cpu(ba_resp->scd_ssn);
  3391. if (scd_flow >= ARRAY_SIZE(priv->txq)) {
  3392. IWL_ERROR("BUG_ON scd_flow is bigger than number of queues");
  3393. return;
  3394. }
  3395. txq = &priv->txq[scd_flow];
  3396. agg = &priv->stations[ba_resp->sta_id].tid[ba_resp->tid].agg;
  3397. /* Find index just before block-ack window */
  3398. index = iwl4965_queue_dec_wrap(ba_resp_scd_ssn & 0xff, txq->q.n_bd);
  3399. /* TODO: Need to get this copy more safely - now good for debug */
  3400. IWL_DEBUG_TX_REPLY("REPLY_COMPRESSED_BA [%d]Received from %s, "
  3401. "sta_id = %d\n",
  3402. agg->wait_for_ba,
  3403. print_mac(mac, (u8*) &ba_resp->sta_addr_lo32),
  3404. ba_resp->sta_id);
  3405. IWL_DEBUG_TX_REPLY("TID = %d, SeqCtl = %d, bitmap = 0x%llx, scd_flow = "
  3406. "%d, scd_ssn = %d\n",
  3407. ba_resp->tid,
  3408. ba_resp->seq_ctl,
  3409. ba_resp->bitmap,
  3410. ba_resp->scd_flow,
  3411. ba_resp->scd_ssn);
  3412. IWL_DEBUG_TX_REPLY("DAT start_idx = %d, bitmap = 0x%llx \n",
  3413. agg->start_idx,
  3414. agg->bitmap);
  3415. /* Update driver's record of ACK vs. not for each frame in window */
  3416. iwl4965_tx_status_reply_compressed_ba(priv, agg, ba_resp);
  3417. /* Release all TFDs before the SSN, i.e. all TFDs in front of
  3418. * block-ack window (we assume that they've been successfully
  3419. * transmitted ... if not, it's too late anyway). */
  3420. if (txq->q.read_ptr != (ba_resp_scd_ssn & 0xff)) {
  3421. int freed = iwl4965_tx_queue_reclaim(priv, scd_flow, index);
  3422. priv->stations[ba_resp->sta_id].
  3423. tid[ba_resp->tid].tfds_in_queue -= freed;
  3424. if (iwl4965_queue_space(&txq->q) > txq->q.low_mark &&
  3425. priv->mac80211_registered &&
  3426. agg->state != IWL_EMPTYING_HW_QUEUE_DELBA)
  3427. ieee80211_wake_queue(priv->hw, scd_flow);
  3428. iwl4965_check_empty_hw_queue(priv, ba_resp->sta_id,
  3429. ba_resp->tid, scd_flow);
  3430. }
  3431. }
  3432. /**
  3433. * iwl4965_tx_queue_set_q2ratid - Map unique receiver/tid combination to a queue
  3434. */
  3435. static int iwl4965_tx_queue_set_q2ratid(struct iwl4965_priv *priv, u16 ra_tid,
  3436. u16 txq_id)
  3437. {
  3438. u32 tbl_dw_addr;
  3439. u32 tbl_dw;
  3440. u16 scd_q2ratid;
  3441. scd_q2ratid = ra_tid & SCD_QUEUE_RA_TID_MAP_RATID_MSK;
  3442. tbl_dw_addr = priv->scd_base_addr +
  3443. SCD_TRANSLATE_TBL_OFFSET_QUEUE(txq_id);
  3444. tbl_dw = iwl4965_read_targ_mem(priv, tbl_dw_addr);
  3445. if (txq_id & 0x1)
  3446. tbl_dw = (scd_q2ratid << 16) | (tbl_dw & 0x0000FFFF);
  3447. else
  3448. tbl_dw = scd_q2ratid | (tbl_dw & 0xFFFF0000);
  3449. iwl4965_write_targ_mem(priv, tbl_dw_addr, tbl_dw);
  3450. return 0;
  3451. }
  3452. /**
  3453. * iwl4965_tx_queue_agg_enable - Set up & enable aggregation for selected queue
  3454. *
  3455. * NOTE: txq_id must be greater than IWL_BACK_QUEUE_FIRST_ID,
  3456. * i.e. it must be one of the higher queues used for aggregation
  3457. */
  3458. static int iwl4965_tx_queue_agg_enable(struct iwl4965_priv *priv, int txq_id,
  3459. int tx_fifo, int sta_id, int tid,
  3460. u16 ssn_idx)
  3461. {
  3462. unsigned long flags;
  3463. int rc;
  3464. u16 ra_tid;
  3465. if (IWL_BACK_QUEUE_FIRST_ID > txq_id)
  3466. IWL_WARNING("queue number too small: %d, must be > %d\n",
  3467. txq_id, IWL_BACK_QUEUE_FIRST_ID);
  3468. ra_tid = BUILD_RAxTID(sta_id, tid);
  3469. /* Modify device's station table to Tx this TID */
  3470. iwl4965_sta_modify_enable_tid_tx(priv, sta_id, tid);
  3471. spin_lock_irqsave(&priv->lock, flags);
  3472. rc = iwl4965_grab_nic_access(priv);
  3473. if (rc) {
  3474. spin_unlock_irqrestore(&priv->lock, flags);
  3475. return rc;
  3476. }
  3477. /* Stop this Tx queue before configuring it */
  3478. iwl4965_tx_queue_stop_scheduler(priv, txq_id);
  3479. /* Map receiver-address / traffic-ID to this queue */
  3480. iwl4965_tx_queue_set_q2ratid(priv, ra_tid, txq_id);
  3481. /* Set this queue as a chain-building queue */
  3482. iwl4965_set_bits_prph(priv, KDR_SCD_QUEUECHAIN_SEL, (1 << txq_id));
  3483. /* Place first TFD at index corresponding to start sequence number.
  3484. * Assumes that ssn_idx is valid (!= 0xFFF) */
  3485. priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
  3486. priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
  3487. iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
  3488. /* Set up Tx window size and frame limit for this queue */
  3489. iwl4965_write_targ_mem(priv,
  3490. priv->scd_base_addr + SCD_CONTEXT_QUEUE_OFFSET(txq_id),
  3491. (SCD_WIN_SIZE << SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
  3492. SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
  3493. iwl4965_write_targ_mem(priv, priv->scd_base_addr +
  3494. SCD_CONTEXT_QUEUE_OFFSET(txq_id) + sizeof(u32),
  3495. (SCD_FRAME_LIMIT << SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS)
  3496. & SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
  3497. iwl4965_set_bits_prph(priv, KDR_SCD_INTERRUPT_MASK, (1 << txq_id));
  3498. /* Set up Status area in SRAM, map to Tx DMA/FIFO, activate the queue */
  3499. iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 1);
  3500. iwl4965_release_nic_access(priv);
  3501. spin_unlock_irqrestore(&priv->lock, flags);
  3502. return 0;
  3503. }
  3504. #endif /* CONFIG_IWL4965_HT */
  3505. /**
  3506. * iwl4965_add_station - Initialize a station's hardware rate table
  3507. *
  3508. * The uCode's station table contains a table of fallback rates
  3509. * for automatic fallback during transmission.
  3510. *
  3511. * NOTE: This sets up a default set of values. These will be replaced later
  3512. * if the driver's iwl-4965-rs rate scaling algorithm is used, instead of
  3513. * rc80211_simple.
  3514. *
  3515. * NOTE: Run REPLY_ADD_STA command to set up station table entry, before
  3516. * calling this function (which runs REPLY_TX_LINK_QUALITY_CMD,
  3517. * which requires station table entry to exist).
  3518. */
  3519. void iwl4965_add_station(struct iwl4965_priv *priv, const u8 *addr, int is_ap)
  3520. {
  3521. int i, r;
  3522. struct iwl4965_link_quality_cmd link_cmd = {
  3523. .reserved1 = 0,
  3524. };
  3525. u16 rate_flags;
  3526. /* Set up the rate scaling to start at selected rate, fall back
  3527. * all the way down to 1M in IEEE order, and then spin on 1M */
  3528. if (is_ap)
  3529. r = IWL_RATE_54M_INDEX;
  3530. else if (priv->band == IEEE80211_BAND_5GHZ)
  3531. r = IWL_RATE_6M_INDEX;
  3532. else
  3533. r = IWL_RATE_1M_INDEX;
  3534. for (i = 0; i < LINK_QUAL_MAX_RETRY_NUM; i++) {
  3535. rate_flags = 0;
  3536. if (r >= IWL_FIRST_CCK_RATE && r <= IWL_LAST_CCK_RATE)
  3537. rate_flags |= RATE_MCS_CCK_MSK;
  3538. /* Use Tx antenna B only */
  3539. rate_flags |= RATE_MCS_ANT_B_MSK;
  3540. rate_flags &= ~RATE_MCS_ANT_A_MSK;
  3541. link_cmd.rs_table[i].rate_n_flags =
  3542. iwl4965_hw_set_rate_n_flags(iwl4965_rates[r].plcp, rate_flags);
  3543. r = iwl4965_get_prev_ieee_rate(r);
  3544. }
  3545. link_cmd.general_params.single_stream_ant_msk = 2;
  3546. link_cmd.general_params.dual_stream_ant_msk = 3;
  3547. link_cmd.agg_params.agg_dis_start_th = 3;
  3548. link_cmd.agg_params.agg_time_limit = cpu_to_le16(4000);
  3549. /* Update the rate scaling for control frame Tx to AP */
  3550. link_cmd.sta_id = is_ap ? IWL_AP_ID : IWL4965_BROADCAST_ID;
  3551. iwl4965_send_cmd_pdu(priv, REPLY_TX_LINK_QUALITY_CMD, sizeof(link_cmd),
  3552. &link_cmd);
  3553. }
  3554. #ifdef CONFIG_IWL4965_HT
  3555. static u8 iwl4965_is_channel_extension(struct iwl4965_priv *priv,
  3556. enum ieee80211_band band,
  3557. u16 channel, u8 extension_chan_offset)
  3558. {
  3559. const struct iwl4965_channel_info *ch_info;
  3560. ch_info = iwl4965_get_channel_info(priv, band, channel);
  3561. if (!is_channel_valid(ch_info))
  3562. return 0;
  3563. if (extension_chan_offset == IWL_EXT_CHANNEL_OFFSET_AUTO)
  3564. return 0;
  3565. if ((ch_info->fat_extension_channel == extension_chan_offset) ||
  3566. (ch_info->fat_extension_channel == HT_IE_EXT_CHANNEL_MAX))
  3567. return 1;
  3568. return 0;
  3569. }
  3570. static u8 iwl4965_is_fat_tx_allowed(struct iwl4965_priv *priv,
  3571. struct ieee80211_ht_info *sta_ht_inf)
  3572. {
  3573. struct iwl_ht_info *iwl_ht_conf = &priv->current_ht_config;
  3574. if ((!iwl_ht_conf->is_ht) ||
  3575. (iwl_ht_conf->supported_chan_width != IWL_CHANNEL_WIDTH_40MHZ) ||
  3576. (iwl_ht_conf->extension_chan_offset == IWL_EXT_CHANNEL_OFFSET_AUTO))
  3577. return 0;
  3578. if (sta_ht_inf) {
  3579. if ((!sta_ht_inf->ht_supported) ||
  3580. (!(sta_ht_inf->cap & IEEE80211_HT_CAP_SUP_WIDTH)))
  3581. return 0;
  3582. }
  3583. return (iwl4965_is_channel_extension(priv, priv->band,
  3584. iwl_ht_conf->control_channel,
  3585. iwl_ht_conf->extension_chan_offset));
  3586. }
  3587. void iwl4965_set_rxon_ht(struct iwl4965_priv *priv, struct iwl_ht_info *ht_info)
  3588. {
  3589. struct iwl4965_rxon_cmd *rxon = &priv->staging_rxon;
  3590. u32 val;
  3591. if (!ht_info->is_ht)
  3592. return;
  3593. /* Set up channel bandwidth: 20 MHz only, or 20/40 mixed if fat ok */
  3594. if (iwl4965_is_fat_tx_allowed(priv, NULL))
  3595. rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED_MSK;
  3596. else
  3597. rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK |
  3598. RXON_FLG_CHANNEL_MODE_PURE_40_MSK);
  3599. if (le16_to_cpu(rxon->channel) != ht_info->control_channel) {
  3600. IWL_DEBUG_ASSOC("control diff than current %d %d\n",
  3601. le16_to_cpu(rxon->channel),
  3602. ht_info->control_channel);
  3603. rxon->channel = cpu_to_le16(ht_info->control_channel);
  3604. return;
  3605. }
  3606. /* Note: control channel is opposite of extension channel */
  3607. switch (ht_info->extension_chan_offset) {
  3608. case IWL_EXT_CHANNEL_OFFSET_ABOVE:
  3609. rxon->flags &= ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
  3610. break;
  3611. case IWL_EXT_CHANNEL_OFFSET_BELOW:
  3612. rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
  3613. break;
  3614. case IWL_EXT_CHANNEL_OFFSET_AUTO:
  3615. rxon->flags &= ~RXON_FLG_CHANNEL_MODE_MIXED_MSK;
  3616. break;
  3617. default:
  3618. rxon->flags &= ~RXON_FLG_CHANNEL_MODE_MIXED_MSK;
  3619. break;
  3620. }
  3621. val = ht_info->ht_protection;
  3622. rxon->flags |= cpu_to_le32(val << RXON_FLG_HT_OPERATING_MODE_POS);
  3623. iwl4965_set_rxon_chain(priv);
  3624. IWL_DEBUG_ASSOC("supported HT rate 0x%X %X "
  3625. "rxon flags 0x%X operation mode :0x%X "
  3626. "extension channel offset 0x%x "
  3627. "control chan %d\n",
  3628. ht_info->supp_mcs_set[0], ht_info->supp_mcs_set[1],
  3629. le32_to_cpu(rxon->flags), ht_info->ht_protection,
  3630. ht_info->extension_chan_offset,
  3631. ht_info->control_channel);
  3632. return;
  3633. }
  3634. void iwl4965_set_ht_add_station(struct iwl4965_priv *priv, u8 index,
  3635. struct ieee80211_ht_info *sta_ht_inf)
  3636. {
  3637. __le32 sta_flags;
  3638. u8 mimo_ps_mode;
  3639. if (!sta_ht_inf || !sta_ht_inf->ht_supported)
  3640. goto done;
  3641. mimo_ps_mode = (sta_ht_inf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2;
  3642. sta_flags = priv->stations[index].sta.station_flags;
  3643. sta_flags &= ~(STA_FLG_RTS_MIMO_PROT_MSK | STA_FLG_MIMO_DIS_MSK);
  3644. switch (mimo_ps_mode) {
  3645. case WLAN_HT_CAP_MIMO_PS_STATIC:
  3646. sta_flags |= STA_FLG_MIMO_DIS_MSK;
  3647. break;
  3648. case WLAN_HT_CAP_MIMO_PS_DYNAMIC:
  3649. sta_flags |= STA_FLG_RTS_MIMO_PROT_MSK;
  3650. break;
  3651. case WLAN_HT_CAP_MIMO_PS_DISABLED:
  3652. break;
  3653. default:
  3654. IWL_WARNING("Invalid MIMO PS mode %d", mimo_ps_mode);
  3655. break;
  3656. }
  3657. sta_flags |= cpu_to_le32(
  3658. (u32)sta_ht_inf->ampdu_factor << STA_FLG_MAX_AGG_SIZE_POS);
  3659. sta_flags |= cpu_to_le32(
  3660. (u32)sta_ht_inf->ampdu_density << STA_FLG_AGG_MPDU_DENSITY_POS);
  3661. if (iwl4965_is_fat_tx_allowed(priv, sta_ht_inf))
  3662. sta_flags |= STA_FLG_FAT_EN_MSK;
  3663. else
  3664. sta_flags &= ~STA_FLG_FAT_EN_MSK;
  3665. priv->stations[index].sta.station_flags = sta_flags;
  3666. done:
  3667. return;
  3668. }
  3669. static void iwl4965_sta_modify_add_ba_tid(struct iwl4965_priv *priv,
  3670. int sta_id, int tid, u16 ssn)
  3671. {
  3672. unsigned long flags;
  3673. spin_lock_irqsave(&priv->sta_lock, flags);
  3674. priv->stations[sta_id].sta.station_flags_msk = 0;
  3675. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_ADDBA_TID_MSK;
  3676. priv->stations[sta_id].sta.add_immediate_ba_tid = (u8)tid;
  3677. priv->stations[sta_id].sta.add_immediate_ba_ssn = cpu_to_le16(ssn);
  3678. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  3679. spin_unlock_irqrestore(&priv->sta_lock, flags);
  3680. iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
  3681. }
  3682. static void iwl4965_sta_modify_del_ba_tid(struct iwl4965_priv *priv,
  3683. int sta_id, int tid)
  3684. {
  3685. unsigned long flags;
  3686. spin_lock_irqsave(&priv->sta_lock, flags);
  3687. priv->stations[sta_id].sta.station_flags_msk = 0;
  3688. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_DELBA_TID_MSK;
  3689. priv->stations[sta_id].sta.remove_immediate_ba_tid = (u8)tid;
  3690. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  3691. spin_unlock_irqrestore(&priv->sta_lock, flags);
  3692. iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
  3693. }
  3694. /*
  3695. * Find first available (lowest unused) Tx Queue, mark it "active".
  3696. * Called only when finding queue for aggregation.
  3697. * Should never return anything < 7, because they should already
  3698. * be in use as EDCA AC (0-3), Command (4), HCCA (5, 6).
  3699. */
  3700. static int iwl4965_txq_ctx_activate_free(struct iwl4965_priv *priv)
  3701. {
  3702. int txq_id;
  3703. for (txq_id = 0; txq_id < priv->hw_setting.max_txq_num; txq_id++)
  3704. if (!test_and_set_bit(txq_id, &priv->txq_ctx_active_msk))
  3705. return txq_id;
  3706. return -1;
  3707. }
  3708. static int iwl4965_mac_ht_tx_agg_start(struct ieee80211_hw *hw, const u8 *da,
  3709. u16 tid, u16 *start_seq_num)
  3710. {
  3711. struct iwl4965_priv *priv = hw->priv;
  3712. int sta_id;
  3713. int tx_fifo;
  3714. int txq_id;
  3715. int ssn = -1;
  3716. int rc = 0;
  3717. unsigned long flags;
  3718. struct iwl4965_tid_data *tid_data;
  3719. DECLARE_MAC_BUF(mac);
  3720. if (likely(tid < ARRAY_SIZE(default_tid_to_tx_fifo)))
  3721. tx_fifo = default_tid_to_tx_fifo[tid];
  3722. else
  3723. return -EINVAL;
  3724. IWL_WARNING("%s on da = %s tid = %d\n",
  3725. __func__, print_mac(mac, da), tid);
  3726. sta_id = iwl4965_hw_find_station(priv, da);
  3727. if (sta_id == IWL_INVALID_STATION)
  3728. return -ENXIO;
  3729. if (priv->stations[sta_id].tid[tid].agg.state != IWL_AGG_OFF) {
  3730. IWL_ERROR("Start AGG when state is not IWL_AGG_OFF !\n");
  3731. return -ENXIO;
  3732. }
  3733. txq_id = iwl4965_txq_ctx_activate_free(priv);
  3734. if (txq_id == -1)
  3735. return -ENXIO;
  3736. spin_lock_irqsave(&priv->sta_lock, flags);
  3737. tid_data = &priv->stations[sta_id].tid[tid];
  3738. ssn = SEQ_TO_SN(tid_data->seq_number);
  3739. tid_data->agg.txq_id = txq_id;
  3740. spin_unlock_irqrestore(&priv->sta_lock, flags);
  3741. *start_seq_num = ssn;
  3742. rc = iwl4965_tx_queue_agg_enable(priv, txq_id, tx_fifo,
  3743. sta_id, tid, ssn);
  3744. if (rc)
  3745. return rc;
  3746. rc = 0;
  3747. if (tid_data->tfds_in_queue == 0) {
  3748. printk(KERN_ERR "HW queue is empty\n");
  3749. tid_data->agg.state = IWL_AGG_ON;
  3750. ieee80211_start_tx_ba_cb_irqsafe(hw, da, tid);
  3751. } else {
  3752. IWL_DEBUG_HT("HW queue is NOT empty: %d packets in HW queue\n",
  3753. tid_data->tfds_in_queue);
  3754. tid_data->agg.state = IWL_EMPTYING_HW_QUEUE_ADDBA;
  3755. }
  3756. return rc;
  3757. }
  3758. static int iwl4965_mac_ht_tx_agg_stop(struct ieee80211_hw *hw, const u8 *da,
  3759. u16 tid)
  3760. {
  3761. struct iwl4965_priv *priv = hw->priv;
  3762. int tx_fifo_id, txq_id, sta_id, ssn = -1;
  3763. struct iwl4965_tid_data *tid_data;
  3764. int rc, write_ptr, read_ptr;
  3765. unsigned long flags;
  3766. DECLARE_MAC_BUF(mac);
  3767. if (!da) {
  3768. IWL_ERROR("da = NULL\n");
  3769. return -EINVAL;
  3770. }
  3771. if (likely(tid < ARRAY_SIZE(default_tid_to_tx_fifo)))
  3772. tx_fifo_id = default_tid_to_tx_fifo[tid];
  3773. else
  3774. return -EINVAL;
  3775. sta_id = iwl4965_hw_find_station(priv, da);
  3776. if (sta_id == IWL_INVALID_STATION)
  3777. return -ENXIO;
  3778. if (priv->stations[sta_id].tid[tid].agg.state != IWL_AGG_ON)
  3779. IWL_WARNING("Stopping AGG while state not IWL_AGG_ON\n");
  3780. tid_data = &priv->stations[sta_id].tid[tid];
  3781. ssn = (tid_data->seq_number & IEEE80211_SCTL_SEQ) >> 4;
  3782. txq_id = tid_data->agg.txq_id;
  3783. write_ptr = priv->txq[txq_id].q.write_ptr;
  3784. read_ptr = priv->txq[txq_id].q.read_ptr;
  3785. /* The queue is not empty */
  3786. if (write_ptr != read_ptr) {
  3787. IWL_DEBUG_HT("Stopping a non empty AGG HW QUEUE\n");
  3788. priv->stations[sta_id].tid[tid].agg.state =
  3789. IWL_EMPTYING_HW_QUEUE_DELBA;
  3790. return 0;
  3791. }
  3792. IWL_DEBUG_HT("HW queue empty\n");;
  3793. priv->stations[sta_id].tid[tid].agg.state = IWL_AGG_OFF;
  3794. spin_lock_irqsave(&priv->lock, flags);
  3795. rc = iwl4965_grab_nic_access(priv);
  3796. if (rc) {
  3797. spin_unlock_irqrestore(&priv->lock, flags);
  3798. return rc;
  3799. }
  3800. rc = iwl4965_tx_queue_agg_disable(priv, txq_id, ssn, tx_fifo_id);
  3801. iwl4965_release_nic_access(priv);
  3802. spin_unlock_irqrestore(&priv->lock, flags);
  3803. if (rc)
  3804. return rc;
  3805. ieee80211_stop_tx_ba_cb_irqsafe(priv->hw, da, tid);
  3806. IWL_DEBUG_INFO("iwl4965_mac_ht_tx_agg_stop on da=%s tid=%d\n",
  3807. print_mac(mac, da), tid);
  3808. return 0;
  3809. }
  3810. int iwl4965_mac_ampdu_action(struct ieee80211_hw *hw,
  3811. enum ieee80211_ampdu_mlme_action action,
  3812. const u8 *addr, u16 tid, u16 *ssn)
  3813. {
  3814. struct iwl4965_priv *priv = hw->priv;
  3815. int sta_id;
  3816. DECLARE_MAC_BUF(mac);
  3817. IWL_DEBUG_HT("A-MPDU action on da=%s tid=%d ",
  3818. print_mac(mac, addr), tid);
  3819. sta_id = iwl4965_hw_find_station(priv, addr);
  3820. switch (action) {
  3821. case IEEE80211_AMPDU_RX_START:
  3822. IWL_DEBUG_HT("start Rx\n");
  3823. iwl4965_sta_modify_add_ba_tid(priv, sta_id, tid, *ssn);
  3824. break;
  3825. case IEEE80211_AMPDU_RX_STOP:
  3826. IWL_DEBUG_HT("stop Rx\n");
  3827. iwl4965_sta_modify_del_ba_tid(priv, sta_id, tid);
  3828. break;
  3829. case IEEE80211_AMPDU_TX_START:
  3830. IWL_DEBUG_HT("start Tx\n");
  3831. return iwl4965_mac_ht_tx_agg_start(hw, addr, tid, ssn);
  3832. case IEEE80211_AMPDU_TX_STOP:
  3833. IWL_DEBUG_HT("stop Tx\n");
  3834. return iwl4965_mac_ht_tx_agg_stop(hw, addr, tid);
  3835. default:
  3836. IWL_DEBUG_HT("unknown\n");
  3837. return -EINVAL;
  3838. break;
  3839. }
  3840. return 0;
  3841. }
  3842. #endif /* CONFIG_IWL4965_HT */
  3843. /* Set up 4965-specific Rx frame reply handlers */
  3844. void iwl4965_hw_rx_handler_setup(struct iwl4965_priv *priv)
  3845. {
  3846. /* Legacy Rx frames */
  3847. priv->rx_handlers[REPLY_4965_RX] = iwl4965_rx_reply_rx;
  3848. /* High-throughput (HT) Rx frames */
  3849. priv->rx_handlers[REPLY_RX_PHY_CMD] = iwl4965_rx_reply_rx_phy;
  3850. priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwl4965_rx_reply_rx;
  3851. priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] =
  3852. iwl4965_rx_missed_beacon_notif;
  3853. #ifdef CONFIG_IWL4965_HT
  3854. priv->rx_handlers[REPLY_COMPRESSED_BA] = iwl4965_rx_reply_compressed_ba;
  3855. #endif /* CONFIG_IWL4965_HT */
  3856. }
  3857. void iwl4965_hw_setup_deferred_work(struct iwl4965_priv *priv)
  3858. {
  3859. INIT_WORK(&priv->txpower_work, iwl4965_bg_txpower_work);
  3860. INIT_WORK(&priv->statistics_work, iwl4965_bg_statistics_work);
  3861. #ifdef CONFIG_IWL4965_SENSITIVITY
  3862. INIT_WORK(&priv->sensitivity_work, iwl4965_bg_sensitivity_work);
  3863. #endif
  3864. init_timer(&priv->statistics_periodic);
  3865. priv->statistics_periodic.data = (unsigned long)priv;
  3866. priv->statistics_periodic.function = iwl4965_bg_statistics_periodic;
  3867. }
  3868. void iwl4965_hw_cancel_deferred_work(struct iwl4965_priv *priv)
  3869. {
  3870. del_timer_sync(&priv->statistics_periodic);
  3871. cancel_delayed_work(&priv->init_alive_start);
  3872. }
  3873. struct pci_device_id iwl4965_hw_card_ids[] = {
  3874. {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x4229)},
  3875. {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x4230)},
  3876. {0}
  3877. };
  3878. /*
  3879. * The device's EEPROM semaphore prevents conflicts between driver and uCode
  3880. * when accessing the EEPROM; each access is a series of pulses to/from the
  3881. * EEPROM chip, not a single event, so even reads could conflict if they
  3882. * weren't arbitrated by the semaphore.
  3883. */
  3884. int iwl4965_eeprom_acquire_semaphore(struct iwl4965_priv *priv)
  3885. {
  3886. u16 count;
  3887. int rc;
  3888. for (count = 0; count < EEPROM_SEM_RETRY_LIMIT; count++) {
  3889. /* Request semaphore */
  3890. iwl4965_set_bit(priv, CSR_HW_IF_CONFIG_REG,
  3891. CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM);
  3892. /* See if we got it */
  3893. rc = iwl4965_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
  3894. CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM,
  3895. CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM,
  3896. EEPROM_SEM_TIMEOUT);
  3897. if (rc >= 0) {
  3898. IWL_DEBUG_IO("Acquired semaphore after %d tries.\n",
  3899. count+1);
  3900. return rc;
  3901. }
  3902. }
  3903. return rc;
  3904. }
  3905. MODULE_DEVICE_TABLE(pci, iwl4965_hw_card_ids);