e1000_ethtool.c 54 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526152715281529153015311532153315341535153615371538153915401541154215431544154515461547154815491550155115521553155415551556155715581559156015611562156315641565156615671568156915701571157215731574157515761577157815791580158115821583158415851586158715881589159015911592159315941595159615971598159916001601160216031604160516061607160816091610161116121613161416151616161716181619162016211622162316241625162616271628162916301631163216331634163516361637163816391640164116421643164416451646164716481649165016511652165316541655165616571658165916601661166216631664166516661667166816691670167116721673167416751676167716781679168016811682168316841685168616871688168916901691169216931694169516961697169816991700170117021703170417051706170717081709171017111712171317141715171617171718171917201721172217231724172517261727172817291730173117321733173417351736173717381739174017411742174317441745174617471748174917501751175217531754175517561757175817591760176117621763176417651766176717681769177017711772177317741775177617771778177917801781178217831784178517861787178817891790179117921793179417951796179717981799180018011802180318041805180618071808180918101811181218131814181518161817181818191820182118221823182418251826182718281829183018311832183318341835183618371838183918401841184218431844184518461847184818491850185118521853185418551856185718581859186018611862186318641865186618671868
  1. /*******************************************************************************
  2. Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
  3. This program is free software; you can redistribute it and/or modify it
  4. under the terms of the GNU General Public License as published by the Free
  5. Software Foundation; either version 2 of the License, or (at your option)
  6. any later version.
  7. This program is distributed in the hope that it will be useful, but WITHOUT
  8. ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  9. FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  10. more details.
  11. You should have received a copy of the GNU General Public License along with
  12. this program; if not, write to the Free Software Foundation, Inc., 59
  13. Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  14. The full GNU General Public License is included in this distribution in the
  15. file called LICENSE.
  16. Contact Information:
  17. Linux NICS <linux.nics@intel.com>
  18. Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  19. *******************************************************************************/
  20. /* ethtool support for e1000 */
  21. #include "e1000.h"
  22. #include <asm/uaccess.h>
  23. extern char e1000_driver_name[];
  24. extern char e1000_driver_version[];
  25. extern int e1000_up(struct e1000_adapter *adapter);
  26. extern void e1000_down(struct e1000_adapter *adapter);
  27. extern void e1000_reset(struct e1000_adapter *adapter);
  28. extern int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx);
  29. extern int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
  30. extern int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
  31. extern void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
  32. extern void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
  33. extern void e1000_update_stats(struct e1000_adapter *adapter);
  34. struct e1000_stats {
  35. char stat_string[ETH_GSTRING_LEN];
  36. int sizeof_stat;
  37. int stat_offset;
  38. };
  39. #define E1000_STAT(m) sizeof(((struct e1000_adapter *)0)->m), \
  40. offsetof(struct e1000_adapter, m)
  41. static const struct e1000_stats e1000_gstrings_stats[] = {
  42. { "rx_packets", E1000_STAT(net_stats.rx_packets) },
  43. { "tx_packets", E1000_STAT(net_stats.tx_packets) },
  44. { "rx_bytes", E1000_STAT(net_stats.rx_bytes) },
  45. { "tx_bytes", E1000_STAT(net_stats.tx_bytes) },
  46. { "rx_errors", E1000_STAT(net_stats.rx_errors) },
  47. { "tx_errors", E1000_STAT(net_stats.tx_errors) },
  48. { "tx_dropped", E1000_STAT(net_stats.tx_dropped) },
  49. { "multicast", E1000_STAT(net_stats.multicast) },
  50. { "collisions", E1000_STAT(net_stats.collisions) },
  51. { "rx_length_errors", E1000_STAT(net_stats.rx_length_errors) },
  52. { "rx_over_errors", E1000_STAT(net_stats.rx_over_errors) },
  53. { "rx_crc_errors", E1000_STAT(net_stats.rx_crc_errors) },
  54. { "rx_frame_errors", E1000_STAT(net_stats.rx_frame_errors) },
  55. { "rx_fifo_errors", E1000_STAT(net_stats.rx_fifo_errors) },
  56. { "rx_no_buffer_count", E1000_STAT(stats.rnbc) },
  57. { "rx_missed_errors", E1000_STAT(net_stats.rx_missed_errors) },
  58. { "tx_aborted_errors", E1000_STAT(net_stats.tx_aborted_errors) },
  59. { "tx_carrier_errors", E1000_STAT(net_stats.tx_carrier_errors) },
  60. { "tx_fifo_errors", E1000_STAT(net_stats.tx_fifo_errors) },
  61. { "tx_heartbeat_errors", E1000_STAT(net_stats.tx_heartbeat_errors) },
  62. { "tx_window_errors", E1000_STAT(net_stats.tx_window_errors) },
  63. { "tx_abort_late_coll", E1000_STAT(stats.latecol) },
  64. { "tx_deferred_ok", E1000_STAT(stats.dc) },
  65. { "tx_single_coll_ok", E1000_STAT(stats.scc) },
  66. { "tx_multi_coll_ok", E1000_STAT(stats.mcc) },
  67. { "tx_timeout_count", E1000_STAT(tx_timeout_count) },
  68. { "rx_long_length_errors", E1000_STAT(stats.roc) },
  69. { "rx_short_length_errors", E1000_STAT(stats.ruc) },
  70. { "rx_align_errors", E1000_STAT(stats.algnerrc) },
  71. { "tx_tcp_seg_good", E1000_STAT(stats.tsctc) },
  72. { "tx_tcp_seg_failed", E1000_STAT(stats.tsctfc) },
  73. { "rx_flow_control_xon", E1000_STAT(stats.xonrxc) },
  74. { "rx_flow_control_xoff", E1000_STAT(stats.xoffrxc) },
  75. { "tx_flow_control_xon", E1000_STAT(stats.xontxc) },
  76. { "tx_flow_control_xoff", E1000_STAT(stats.xofftxc) },
  77. { "rx_long_byte_count", E1000_STAT(stats.gorcl) },
  78. { "rx_csum_offload_good", E1000_STAT(hw_csum_good) },
  79. { "rx_csum_offload_errors", E1000_STAT(hw_csum_err) },
  80. { "rx_header_split", E1000_STAT(rx_hdr_split) },
  81. { "alloc_rx_buff_failed", E1000_STAT(alloc_rx_buff_failed) },
  82. };
  83. #define E1000_QUEUE_STATS_LEN 0
  84. #define E1000_GLOBAL_STATS_LEN \
  85. sizeof(e1000_gstrings_stats) / sizeof(struct e1000_stats)
  86. #define E1000_STATS_LEN (E1000_GLOBAL_STATS_LEN + E1000_QUEUE_STATS_LEN)
  87. static const char e1000_gstrings_test[][ETH_GSTRING_LEN] = {
  88. "Register test (offline)", "Eeprom test (offline)",
  89. "Interrupt test (offline)", "Loopback test (offline)",
  90. "Link test (on/offline)"
  91. };
  92. #define E1000_TEST_LEN sizeof(e1000_gstrings_test) / ETH_GSTRING_LEN
  93. static int
  94. e1000_get_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
  95. {
  96. struct e1000_adapter *adapter = netdev_priv(netdev);
  97. struct e1000_hw *hw = &adapter->hw;
  98. if (hw->media_type == e1000_media_type_copper) {
  99. ecmd->supported = (SUPPORTED_10baseT_Half |
  100. SUPPORTED_10baseT_Full |
  101. SUPPORTED_100baseT_Half |
  102. SUPPORTED_100baseT_Full |
  103. SUPPORTED_1000baseT_Full|
  104. SUPPORTED_Autoneg |
  105. SUPPORTED_TP);
  106. ecmd->advertising = ADVERTISED_TP;
  107. if (hw->autoneg == 1) {
  108. ecmd->advertising |= ADVERTISED_Autoneg;
  109. /* the e1000 autoneg seems to match ethtool nicely */
  110. ecmd->advertising |= hw->autoneg_advertised;
  111. }
  112. ecmd->port = PORT_TP;
  113. ecmd->phy_address = hw->phy_addr;
  114. if (hw->mac_type == e1000_82543)
  115. ecmd->transceiver = XCVR_EXTERNAL;
  116. else
  117. ecmd->transceiver = XCVR_INTERNAL;
  118. } else {
  119. ecmd->supported = (SUPPORTED_1000baseT_Full |
  120. SUPPORTED_FIBRE |
  121. SUPPORTED_Autoneg);
  122. ecmd->advertising = (ADVERTISED_1000baseT_Full |
  123. ADVERTISED_FIBRE |
  124. ADVERTISED_Autoneg);
  125. ecmd->port = PORT_FIBRE;
  126. if (hw->mac_type >= e1000_82545)
  127. ecmd->transceiver = XCVR_INTERNAL;
  128. else
  129. ecmd->transceiver = XCVR_EXTERNAL;
  130. }
  131. if (netif_carrier_ok(adapter->netdev)) {
  132. e1000_get_speed_and_duplex(hw, &adapter->link_speed,
  133. &adapter->link_duplex);
  134. ecmd->speed = adapter->link_speed;
  135. /* unfortunatly FULL_DUPLEX != DUPLEX_FULL
  136. * and HALF_DUPLEX != DUPLEX_HALF */
  137. if (adapter->link_duplex == FULL_DUPLEX)
  138. ecmd->duplex = DUPLEX_FULL;
  139. else
  140. ecmd->duplex = DUPLEX_HALF;
  141. } else {
  142. ecmd->speed = -1;
  143. ecmd->duplex = -1;
  144. }
  145. ecmd->autoneg = ((hw->media_type == e1000_media_type_fiber) ||
  146. hw->autoneg) ? AUTONEG_ENABLE : AUTONEG_DISABLE;
  147. return 0;
  148. }
  149. static int
  150. e1000_set_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
  151. {
  152. struct e1000_adapter *adapter = netdev_priv(netdev);
  153. struct e1000_hw *hw = &adapter->hw;
  154. /* When SoL/IDER sessions are active, autoneg/speed/duplex
  155. * cannot be changed */
  156. if (e1000_check_phy_reset_block(hw)) {
  157. DPRINTK(DRV, ERR, "Cannot change link characteristics "
  158. "when SoL/IDER is active.\n");
  159. return -EINVAL;
  160. }
  161. if (ecmd->autoneg == AUTONEG_ENABLE) {
  162. hw->autoneg = 1;
  163. if (hw->media_type == e1000_media_type_fiber)
  164. hw->autoneg_advertised = ADVERTISED_1000baseT_Full |
  165. ADVERTISED_FIBRE |
  166. ADVERTISED_Autoneg;
  167. else
  168. hw->autoneg_advertised = ADVERTISED_10baseT_Half |
  169. ADVERTISED_10baseT_Full |
  170. ADVERTISED_100baseT_Half |
  171. ADVERTISED_100baseT_Full |
  172. ADVERTISED_1000baseT_Full|
  173. ADVERTISED_Autoneg |
  174. ADVERTISED_TP;
  175. ecmd->advertising = hw->autoneg_advertised;
  176. } else
  177. if (e1000_set_spd_dplx(adapter, ecmd->speed + ecmd->duplex))
  178. return -EINVAL;
  179. /* reset the link */
  180. if (netif_running(adapter->netdev)) {
  181. e1000_down(adapter);
  182. e1000_reset(adapter);
  183. e1000_up(adapter);
  184. } else
  185. e1000_reset(adapter);
  186. return 0;
  187. }
  188. static void
  189. e1000_get_pauseparam(struct net_device *netdev,
  190. struct ethtool_pauseparam *pause)
  191. {
  192. struct e1000_adapter *adapter = netdev_priv(netdev);
  193. struct e1000_hw *hw = &adapter->hw;
  194. pause->autoneg =
  195. (adapter->fc_autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE);
  196. if (hw->fc == e1000_fc_rx_pause)
  197. pause->rx_pause = 1;
  198. else if (hw->fc == e1000_fc_tx_pause)
  199. pause->tx_pause = 1;
  200. else if (hw->fc == e1000_fc_full) {
  201. pause->rx_pause = 1;
  202. pause->tx_pause = 1;
  203. }
  204. }
  205. static int
  206. e1000_set_pauseparam(struct net_device *netdev,
  207. struct ethtool_pauseparam *pause)
  208. {
  209. struct e1000_adapter *adapter = netdev_priv(netdev);
  210. struct e1000_hw *hw = &adapter->hw;
  211. adapter->fc_autoneg = pause->autoneg;
  212. if (pause->rx_pause && pause->tx_pause)
  213. hw->fc = e1000_fc_full;
  214. else if (pause->rx_pause && !pause->tx_pause)
  215. hw->fc = e1000_fc_rx_pause;
  216. else if (!pause->rx_pause && pause->tx_pause)
  217. hw->fc = e1000_fc_tx_pause;
  218. else if (!pause->rx_pause && !pause->tx_pause)
  219. hw->fc = e1000_fc_none;
  220. hw->original_fc = hw->fc;
  221. if (adapter->fc_autoneg == AUTONEG_ENABLE) {
  222. if (netif_running(adapter->netdev)) {
  223. e1000_down(adapter);
  224. e1000_up(adapter);
  225. } else
  226. e1000_reset(adapter);
  227. } else
  228. return ((hw->media_type == e1000_media_type_fiber) ?
  229. e1000_setup_link(hw) : e1000_force_mac_fc(hw));
  230. return 0;
  231. }
  232. static uint32_t
  233. e1000_get_rx_csum(struct net_device *netdev)
  234. {
  235. struct e1000_adapter *adapter = netdev_priv(netdev);
  236. return adapter->rx_csum;
  237. }
  238. static int
  239. e1000_set_rx_csum(struct net_device *netdev, uint32_t data)
  240. {
  241. struct e1000_adapter *adapter = netdev_priv(netdev);
  242. adapter->rx_csum = data;
  243. if (netif_running(netdev)) {
  244. e1000_down(adapter);
  245. e1000_up(adapter);
  246. } else
  247. e1000_reset(adapter);
  248. return 0;
  249. }
  250. static uint32_t
  251. e1000_get_tx_csum(struct net_device *netdev)
  252. {
  253. return (netdev->features & NETIF_F_HW_CSUM) != 0;
  254. }
  255. static int
  256. e1000_set_tx_csum(struct net_device *netdev, uint32_t data)
  257. {
  258. struct e1000_adapter *adapter = netdev_priv(netdev);
  259. if (adapter->hw.mac_type < e1000_82543) {
  260. if (!data)
  261. return -EINVAL;
  262. return 0;
  263. }
  264. if (data)
  265. netdev->features |= NETIF_F_HW_CSUM;
  266. else
  267. netdev->features &= ~NETIF_F_HW_CSUM;
  268. return 0;
  269. }
  270. #ifdef NETIF_F_TSO
  271. static int
  272. e1000_set_tso(struct net_device *netdev, uint32_t data)
  273. {
  274. struct e1000_adapter *adapter = netdev_priv(netdev);
  275. if ((adapter->hw.mac_type < e1000_82544) ||
  276. (adapter->hw.mac_type == e1000_82547))
  277. return data ? -EINVAL : 0;
  278. if (data)
  279. netdev->features |= NETIF_F_TSO;
  280. else
  281. netdev->features &= ~NETIF_F_TSO;
  282. return 0;
  283. }
  284. #endif /* NETIF_F_TSO */
  285. static uint32_t
  286. e1000_get_msglevel(struct net_device *netdev)
  287. {
  288. struct e1000_adapter *adapter = netdev_priv(netdev);
  289. return adapter->msg_enable;
  290. }
  291. static void
  292. e1000_set_msglevel(struct net_device *netdev, uint32_t data)
  293. {
  294. struct e1000_adapter *adapter = netdev_priv(netdev);
  295. adapter->msg_enable = data;
  296. }
  297. static int
  298. e1000_get_regs_len(struct net_device *netdev)
  299. {
  300. #define E1000_REGS_LEN 32
  301. return E1000_REGS_LEN * sizeof(uint32_t);
  302. }
  303. static void
  304. e1000_get_regs(struct net_device *netdev,
  305. struct ethtool_regs *regs, void *p)
  306. {
  307. struct e1000_adapter *adapter = netdev_priv(netdev);
  308. struct e1000_hw *hw = &adapter->hw;
  309. uint32_t *regs_buff = p;
  310. uint16_t phy_data;
  311. memset(p, 0, E1000_REGS_LEN * sizeof(uint32_t));
  312. regs->version = (1 << 24) | (hw->revision_id << 16) | hw->device_id;
  313. regs_buff[0] = E1000_READ_REG(hw, CTRL);
  314. regs_buff[1] = E1000_READ_REG(hw, STATUS);
  315. regs_buff[2] = E1000_READ_REG(hw, RCTL);
  316. regs_buff[3] = E1000_READ_REG(hw, RDLEN);
  317. regs_buff[4] = E1000_READ_REG(hw, RDH);
  318. regs_buff[5] = E1000_READ_REG(hw, RDT);
  319. regs_buff[6] = E1000_READ_REG(hw, RDTR);
  320. regs_buff[7] = E1000_READ_REG(hw, TCTL);
  321. regs_buff[8] = E1000_READ_REG(hw, TDLEN);
  322. regs_buff[9] = E1000_READ_REG(hw, TDH);
  323. regs_buff[10] = E1000_READ_REG(hw, TDT);
  324. regs_buff[11] = E1000_READ_REG(hw, TIDV);
  325. regs_buff[12] = adapter->hw.phy_type; /* PHY type (IGP=1, M88=0) */
  326. if (hw->phy_type == e1000_phy_igp) {
  327. e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
  328. IGP01E1000_PHY_AGC_A);
  329. e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_A &
  330. IGP01E1000_PHY_PAGE_SELECT, &phy_data);
  331. regs_buff[13] = (uint32_t)phy_data; /* cable length */
  332. e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
  333. IGP01E1000_PHY_AGC_B);
  334. e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_B &
  335. IGP01E1000_PHY_PAGE_SELECT, &phy_data);
  336. regs_buff[14] = (uint32_t)phy_data; /* cable length */
  337. e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
  338. IGP01E1000_PHY_AGC_C);
  339. e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_C &
  340. IGP01E1000_PHY_PAGE_SELECT, &phy_data);
  341. regs_buff[15] = (uint32_t)phy_data; /* cable length */
  342. e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
  343. IGP01E1000_PHY_AGC_D);
  344. e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_D &
  345. IGP01E1000_PHY_PAGE_SELECT, &phy_data);
  346. regs_buff[16] = (uint32_t)phy_data; /* cable length */
  347. regs_buff[17] = 0; /* extended 10bt distance (not needed) */
  348. e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, 0x0);
  349. e1000_read_phy_reg(hw, IGP01E1000_PHY_PORT_STATUS &
  350. IGP01E1000_PHY_PAGE_SELECT, &phy_data);
  351. regs_buff[18] = (uint32_t)phy_data; /* cable polarity */
  352. e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
  353. IGP01E1000_PHY_PCS_INIT_REG);
  354. e1000_read_phy_reg(hw, IGP01E1000_PHY_PCS_INIT_REG &
  355. IGP01E1000_PHY_PAGE_SELECT, &phy_data);
  356. regs_buff[19] = (uint32_t)phy_data; /* cable polarity */
  357. regs_buff[20] = 0; /* polarity correction enabled (always) */
  358. regs_buff[22] = 0; /* phy receive errors (unavailable) */
  359. regs_buff[23] = regs_buff[18]; /* mdix mode */
  360. e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, 0x0);
  361. } else {
  362. e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_STATUS, &phy_data);
  363. regs_buff[13] = (uint32_t)phy_data; /* cable length */
  364. regs_buff[14] = 0; /* Dummy (to align w/ IGP phy reg dump) */
  365. regs_buff[15] = 0; /* Dummy (to align w/ IGP phy reg dump) */
  366. regs_buff[16] = 0; /* Dummy (to align w/ IGP phy reg dump) */
  367. e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);
  368. regs_buff[17] = (uint32_t)phy_data; /* extended 10bt distance */
  369. regs_buff[18] = regs_buff[13]; /* cable polarity */
  370. regs_buff[19] = 0; /* Dummy (to align w/ IGP phy reg dump) */
  371. regs_buff[20] = regs_buff[17]; /* polarity correction */
  372. /* phy receive errors */
  373. regs_buff[22] = adapter->phy_stats.receive_errors;
  374. regs_buff[23] = regs_buff[13]; /* mdix mode */
  375. }
  376. regs_buff[21] = adapter->phy_stats.idle_errors; /* phy idle errors */
  377. e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_data);
  378. regs_buff[24] = (uint32_t)phy_data; /* phy local receiver status */
  379. regs_buff[25] = regs_buff[24]; /* phy remote receiver status */
  380. if (hw->mac_type >= e1000_82540 &&
  381. hw->media_type == e1000_media_type_copper) {
  382. regs_buff[26] = E1000_READ_REG(hw, MANC);
  383. }
  384. }
  385. static int
  386. e1000_get_eeprom_len(struct net_device *netdev)
  387. {
  388. struct e1000_adapter *adapter = netdev_priv(netdev);
  389. return adapter->hw.eeprom.word_size * 2;
  390. }
  391. static int
  392. e1000_get_eeprom(struct net_device *netdev,
  393. struct ethtool_eeprom *eeprom, uint8_t *bytes)
  394. {
  395. struct e1000_adapter *adapter = netdev_priv(netdev);
  396. struct e1000_hw *hw = &adapter->hw;
  397. uint16_t *eeprom_buff;
  398. int first_word, last_word;
  399. int ret_val = 0;
  400. uint16_t i;
  401. if (eeprom->len == 0)
  402. return -EINVAL;
  403. eeprom->magic = hw->vendor_id | (hw->device_id << 16);
  404. first_word = eeprom->offset >> 1;
  405. last_word = (eeprom->offset + eeprom->len - 1) >> 1;
  406. eeprom_buff = kmalloc(sizeof(uint16_t) *
  407. (last_word - first_word + 1), GFP_KERNEL);
  408. if (!eeprom_buff)
  409. return -ENOMEM;
  410. if (hw->eeprom.type == e1000_eeprom_spi)
  411. ret_val = e1000_read_eeprom(hw, first_word,
  412. last_word - first_word + 1,
  413. eeprom_buff);
  414. else {
  415. for (i = 0; i < last_word - first_word + 1; i++)
  416. if ((ret_val = e1000_read_eeprom(hw, first_word + i, 1,
  417. &eeprom_buff[i])))
  418. break;
  419. }
  420. /* Device's eeprom is always little-endian, word addressable */
  421. for (i = 0; i < last_word - first_word + 1; i++)
  422. le16_to_cpus(&eeprom_buff[i]);
  423. memcpy(bytes, (uint8_t *)eeprom_buff + (eeprom->offset & 1),
  424. eeprom->len);
  425. kfree(eeprom_buff);
  426. return ret_val;
  427. }
  428. static int
  429. e1000_set_eeprom(struct net_device *netdev,
  430. struct ethtool_eeprom *eeprom, uint8_t *bytes)
  431. {
  432. struct e1000_adapter *adapter = netdev_priv(netdev);
  433. struct e1000_hw *hw = &adapter->hw;
  434. uint16_t *eeprom_buff;
  435. void *ptr;
  436. int max_len, first_word, last_word, ret_val = 0;
  437. uint16_t i;
  438. if (eeprom->len == 0)
  439. return -EOPNOTSUPP;
  440. if (eeprom->magic != (hw->vendor_id | (hw->device_id << 16)))
  441. return -EFAULT;
  442. max_len = hw->eeprom.word_size * 2;
  443. first_word = eeprom->offset >> 1;
  444. last_word = (eeprom->offset + eeprom->len - 1) >> 1;
  445. eeprom_buff = kmalloc(max_len, GFP_KERNEL);
  446. if (!eeprom_buff)
  447. return -ENOMEM;
  448. ptr = (void *)eeprom_buff;
  449. if (eeprom->offset & 1) {
  450. /* need read/modify/write of first changed EEPROM word */
  451. /* only the second byte of the word is being modified */
  452. ret_val = e1000_read_eeprom(hw, first_word, 1,
  453. &eeprom_buff[0]);
  454. ptr++;
  455. }
  456. if (((eeprom->offset + eeprom->len) & 1) && (ret_val == 0)) {
  457. /* need read/modify/write of last changed EEPROM word */
  458. /* only the first byte of the word is being modified */
  459. ret_val = e1000_read_eeprom(hw, last_word, 1,
  460. &eeprom_buff[last_word - first_word]);
  461. }
  462. /* Device's eeprom is always little-endian, word addressable */
  463. for (i = 0; i < last_word - first_word + 1; i++)
  464. le16_to_cpus(&eeprom_buff[i]);
  465. memcpy(ptr, bytes, eeprom->len);
  466. for (i = 0; i < last_word - first_word + 1; i++)
  467. eeprom_buff[i] = cpu_to_le16(eeprom_buff[i]);
  468. ret_val = e1000_write_eeprom(hw, first_word,
  469. last_word - first_word + 1, eeprom_buff);
  470. /* Update the checksum over the first part of the EEPROM if needed
  471. * and flush shadow RAM for 82573 conrollers */
  472. if ((ret_val == 0) && ((first_word <= EEPROM_CHECKSUM_REG) ||
  473. (hw->mac_type == e1000_82573)))
  474. e1000_update_eeprom_checksum(hw);
  475. kfree(eeprom_buff);
  476. return ret_val;
  477. }
  478. static void
  479. e1000_get_drvinfo(struct net_device *netdev,
  480. struct ethtool_drvinfo *drvinfo)
  481. {
  482. struct e1000_adapter *adapter = netdev_priv(netdev);
  483. char firmware_version[32];
  484. uint16_t eeprom_data;
  485. strncpy(drvinfo->driver, e1000_driver_name, 32);
  486. strncpy(drvinfo->version, e1000_driver_version, 32);
  487. /* EEPROM image version # is reported as firmware version # for
  488. * 8257{1|2|3} controllers */
  489. e1000_read_eeprom(&adapter->hw, 5, 1, &eeprom_data);
  490. switch (adapter->hw.mac_type) {
  491. case e1000_82571:
  492. case e1000_82572:
  493. case e1000_82573:
  494. sprintf(firmware_version, "%d.%d-%d",
  495. (eeprom_data & 0xF000) >> 12,
  496. (eeprom_data & 0x0FF0) >> 4,
  497. eeprom_data & 0x000F);
  498. break;
  499. default:
  500. sprintf(firmware_version, "N/A");
  501. }
  502. strncpy(drvinfo->fw_version, firmware_version, 32);
  503. strncpy(drvinfo->bus_info, pci_name(adapter->pdev), 32);
  504. drvinfo->n_stats = E1000_STATS_LEN;
  505. drvinfo->testinfo_len = E1000_TEST_LEN;
  506. drvinfo->regdump_len = e1000_get_regs_len(netdev);
  507. drvinfo->eedump_len = e1000_get_eeprom_len(netdev);
  508. }
  509. static void
  510. e1000_get_ringparam(struct net_device *netdev,
  511. struct ethtool_ringparam *ring)
  512. {
  513. struct e1000_adapter *adapter = netdev_priv(netdev);
  514. e1000_mac_type mac_type = adapter->hw.mac_type;
  515. struct e1000_tx_ring *txdr = adapter->tx_ring;
  516. struct e1000_rx_ring *rxdr = adapter->rx_ring;
  517. ring->rx_max_pending = (mac_type < e1000_82544) ? E1000_MAX_RXD :
  518. E1000_MAX_82544_RXD;
  519. ring->tx_max_pending = (mac_type < e1000_82544) ? E1000_MAX_TXD :
  520. E1000_MAX_82544_TXD;
  521. ring->rx_mini_max_pending = 0;
  522. ring->rx_jumbo_max_pending = 0;
  523. ring->rx_pending = rxdr->count;
  524. ring->tx_pending = txdr->count;
  525. ring->rx_mini_pending = 0;
  526. ring->rx_jumbo_pending = 0;
  527. }
  528. static int
  529. e1000_set_ringparam(struct net_device *netdev,
  530. struct ethtool_ringparam *ring)
  531. {
  532. struct e1000_adapter *adapter = netdev_priv(netdev);
  533. e1000_mac_type mac_type = adapter->hw.mac_type;
  534. struct e1000_tx_ring *txdr, *tx_old, *tx_new;
  535. struct e1000_rx_ring *rxdr, *rx_old, *rx_new;
  536. int i, err, tx_ring_size, rx_ring_size;
  537. tx_ring_size = sizeof(struct e1000_tx_ring) * adapter->num_tx_queues;
  538. rx_ring_size = sizeof(struct e1000_rx_ring) * adapter->num_rx_queues;
  539. if (netif_running(adapter->netdev))
  540. e1000_down(adapter);
  541. tx_old = adapter->tx_ring;
  542. rx_old = adapter->rx_ring;
  543. adapter->tx_ring = kmalloc(tx_ring_size, GFP_KERNEL);
  544. if (!adapter->tx_ring) {
  545. err = -ENOMEM;
  546. goto err_setup_rx;
  547. }
  548. memset(adapter->tx_ring, 0, tx_ring_size);
  549. adapter->rx_ring = kmalloc(rx_ring_size, GFP_KERNEL);
  550. if (!adapter->rx_ring) {
  551. kfree(adapter->tx_ring);
  552. err = -ENOMEM;
  553. goto err_setup_rx;
  554. }
  555. memset(adapter->rx_ring, 0, rx_ring_size);
  556. txdr = adapter->tx_ring;
  557. rxdr = adapter->rx_ring;
  558. if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
  559. return -EINVAL;
  560. rxdr->count = max(ring->rx_pending,(uint32_t)E1000_MIN_RXD);
  561. rxdr->count = min(rxdr->count,(uint32_t)(mac_type < e1000_82544 ?
  562. E1000_MAX_RXD : E1000_MAX_82544_RXD));
  563. E1000_ROUNDUP(rxdr->count, REQ_RX_DESCRIPTOR_MULTIPLE);
  564. txdr->count = max(ring->tx_pending,(uint32_t)E1000_MIN_TXD);
  565. txdr->count = min(txdr->count,(uint32_t)(mac_type < e1000_82544 ?
  566. E1000_MAX_TXD : E1000_MAX_82544_TXD));
  567. E1000_ROUNDUP(txdr->count, REQ_TX_DESCRIPTOR_MULTIPLE);
  568. for (i = 0; i < adapter->num_tx_queues; i++)
  569. txdr[i].count = txdr->count;
  570. for (i = 0; i < adapter->num_rx_queues; i++)
  571. rxdr[i].count = rxdr->count;
  572. if (netif_running(adapter->netdev)) {
  573. /* Try to get new resources before deleting old */
  574. if ((err = e1000_setup_all_rx_resources(adapter)))
  575. goto err_setup_rx;
  576. if ((err = e1000_setup_all_tx_resources(adapter)))
  577. goto err_setup_tx;
  578. /* save the new, restore the old in order to free it,
  579. * then restore the new back again */
  580. rx_new = adapter->rx_ring;
  581. tx_new = adapter->tx_ring;
  582. adapter->rx_ring = rx_old;
  583. adapter->tx_ring = tx_old;
  584. e1000_free_all_rx_resources(adapter);
  585. e1000_free_all_tx_resources(adapter);
  586. kfree(tx_old);
  587. kfree(rx_old);
  588. adapter->rx_ring = rx_new;
  589. adapter->tx_ring = tx_new;
  590. if ((err = e1000_up(adapter)))
  591. return err;
  592. }
  593. return 0;
  594. err_setup_tx:
  595. e1000_free_all_rx_resources(adapter);
  596. err_setup_rx:
  597. adapter->rx_ring = rx_old;
  598. adapter->tx_ring = tx_old;
  599. e1000_up(adapter);
  600. return err;
  601. }
  602. #define REG_PATTERN_TEST(R, M, W) \
  603. { \
  604. uint32_t pat, value; \
  605. uint32_t test[] = \
  606. {0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF}; \
  607. for (pat = 0; pat < sizeof(test)/sizeof(test[0]); pat++) { \
  608. E1000_WRITE_REG(&adapter->hw, R, (test[pat] & W)); \
  609. value = E1000_READ_REG(&adapter->hw, R); \
  610. if (value != (test[pat] & W & M)) { \
  611. DPRINTK(DRV, ERR, "pattern test reg %04X failed: got " \
  612. "0x%08X expected 0x%08X\n", \
  613. E1000_##R, value, (test[pat] & W & M)); \
  614. *data = (adapter->hw.mac_type < e1000_82543) ? \
  615. E1000_82542_##R : E1000_##R; \
  616. return 1; \
  617. } \
  618. } \
  619. }
  620. #define REG_SET_AND_CHECK(R, M, W) \
  621. { \
  622. uint32_t value; \
  623. E1000_WRITE_REG(&adapter->hw, R, W & M); \
  624. value = E1000_READ_REG(&adapter->hw, R); \
  625. if ((W & M) != (value & M)) { \
  626. DPRINTK(DRV, ERR, "set/check reg %04X test failed: got 0x%08X "\
  627. "expected 0x%08X\n", E1000_##R, (value & M), (W & M)); \
  628. *data = (adapter->hw.mac_type < e1000_82543) ? \
  629. E1000_82542_##R : E1000_##R; \
  630. return 1; \
  631. } \
  632. }
  633. static int
  634. e1000_reg_test(struct e1000_adapter *adapter, uint64_t *data)
  635. {
  636. uint32_t value, before, after;
  637. uint32_t i, toggle;
  638. /* The status register is Read Only, so a write should fail.
  639. * Some bits that get toggled are ignored.
  640. */
  641. switch (adapter->hw.mac_type) {
  642. /* there are several bits on newer hardware that are r/w */
  643. case e1000_82571:
  644. case e1000_82572:
  645. toggle = 0x7FFFF3FF;
  646. break;
  647. case e1000_82573:
  648. toggle = 0x7FFFF033;
  649. break;
  650. default:
  651. toggle = 0xFFFFF833;
  652. break;
  653. }
  654. before = E1000_READ_REG(&adapter->hw, STATUS);
  655. value = (E1000_READ_REG(&adapter->hw, STATUS) & toggle);
  656. E1000_WRITE_REG(&adapter->hw, STATUS, toggle);
  657. after = E1000_READ_REG(&adapter->hw, STATUS) & toggle;
  658. if (value != after) {
  659. DPRINTK(DRV, ERR, "failed STATUS register test got: "
  660. "0x%08X expected: 0x%08X\n", after, value);
  661. *data = 1;
  662. return 1;
  663. }
  664. /* restore previous status */
  665. E1000_WRITE_REG(&adapter->hw, STATUS, before);
  666. REG_PATTERN_TEST(FCAL, 0xFFFFFFFF, 0xFFFFFFFF);
  667. REG_PATTERN_TEST(FCAH, 0x0000FFFF, 0xFFFFFFFF);
  668. REG_PATTERN_TEST(FCT, 0x0000FFFF, 0xFFFFFFFF);
  669. REG_PATTERN_TEST(VET, 0x0000FFFF, 0xFFFFFFFF);
  670. REG_PATTERN_TEST(RDTR, 0x0000FFFF, 0xFFFFFFFF);
  671. REG_PATTERN_TEST(RDBAH, 0xFFFFFFFF, 0xFFFFFFFF);
  672. REG_PATTERN_TEST(RDLEN, 0x000FFF80, 0x000FFFFF);
  673. REG_PATTERN_TEST(RDH, 0x0000FFFF, 0x0000FFFF);
  674. REG_PATTERN_TEST(RDT, 0x0000FFFF, 0x0000FFFF);
  675. REG_PATTERN_TEST(FCRTH, 0x0000FFF8, 0x0000FFF8);
  676. REG_PATTERN_TEST(FCTTV, 0x0000FFFF, 0x0000FFFF);
  677. REG_PATTERN_TEST(TIPG, 0x3FFFFFFF, 0x3FFFFFFF);
  678. REG_PATTERN_TEST(TDBAH, 0xFFFFFFFF, 0xFFFFFFFF);
  679. REG_PATTERN_TEST(TDLEN, 0x000FFF80, 0x000FFFFF);
  680. REG_SET_AND_CHECK(RCTL, 0xFFFFFFFF, 0x00000000);
  681. REG_SET_AND_CHECK(RCTL, 0x06DFB3FE, 0x003FFFFB);
  682. REG_SET_AND_CHECK(TCTL, 0xFFFFFFFF, 0x00000000);
  683. if (adapter->hw.mac_type >= e1000_82543) {
  684. REG_SET_AND_CHECK(RCTL, 0x06DFB3FE, 0xFFFFFFFF);
  685. REG_PATTERN_TEST(RDBAL, 0xFFFFFFF0, 0xFFFFFFFF);
  686. REG_PATTERN_TEST(TXCW, 0xC000FFFF, 0x0000FFFF);
  687. REG_PATTERN_TEST(TDBAL, 0xFFFFFFF0, 0xFFFFFFFF);
  688. REG_PATTERN_TEST(TIDV, 0x0000FFFF, 0x0000FFFF);
  689. for (i = 0; i < E1000_RAR_ENTRIES; i++) {
  690. REG_PATTERN_TEST(RA + ((i << 1) << 2), 0xFFFFFFFF,
  691. 0xFFFFFFFF);
  692. REG_PATTERN_TEST(RA + (((i << 1) + 1) << 2), 0x8003FFFF,
  693. 0xFFFFFFFF);
  694. }
  695. } else {
  696. REG_SET_AND_CHECK(RCTL, 0xFFFFFFFF, 0x01FFFFFF);
  697. REG_PATTERN_TEST(RDBAL, 0xFFFFF000, 0xFFFFFFFF);
  698. REG_PATTERN_TEST(TXCW, 0x0000FFFF, 0x0000FFFF);
  699. REG_PATTERN_TEST(TDBAL, 0xFFFFF000, 0xFFFFFFFF);
  700. }
  701. for (i = 0; i < E1000_MC_TBL_SIZE; i++)
  702. REG_PATTERN_TEST(MTA + (i << 2), 0xFFFFFFFF, 0xFFFFFFFF);
  703. *data = 0;
  704. return 0;
  705. }
  706. static int
  707. e1000_eeprom_test(struct e1000_adapter *adapter, uint64_t *data)
  708. {
  709. uint16_t temp;
  710. uint16_t checksum = 0;
  711. uint16_t i;
  712. *data = 0;
  713. /* Read and add up the contents of the EEPROM */
  714. for (i = 0; i < (EEPROM_CHECKSUM_REG + 1); i++) {
  715. if ((e1000_read_eeprom(&adapter->hw, i, 1, &temp)) < 0) {
  716. *data = 1;
  717. break;
  718. }
  719. checksum += temp;
  720. }
  721. /* If Checksum is not Correct return error else test passed */
  722. if ((checksum != (uint16_t) EEPROM_SUM) && !(*data))
  723. *data = 2;
  724. return *data;
  725. }
  726. static irqreturn_t
  727. e1000_test_intr(int irq,
  728. void *data,
  729. struct pt_regs *regs)
  730. {
  731. struct net_device *netdev = (struct net_device *) data;
  732. struct e1000_adapter *adapter = netdev_priv(netdev);
  733. adapter->test_icr |= E1000_READ_REG(&adapter->hw, ICR);
  734. return IRQ_HANDLED;
  735. }
  736. static int
  737. e1000_intr_test(struct e1000_adapter *adapter, uint64_t *data)
  738. {
  739. struct net_device *netdev = adapter->netdev;
  740. uint32_t mask, i=0, shared_int = TRUE;
  741. uint32_t irq = adapter->pdev->irq;
  742. *data = 0;
  743. /* Hook up test interrupt handler just for this test */
  744. if (!request_irq(irq, &e1000_test_intr, 0, netdev->name, netdev)) {
  745. shared_int = FALSE;
  746. } else if (request_irq(irq, &e1000_test_intr, SA_SHIRQ,
  747. netdev->name, netdev)){
  748. *data = 1;
  749. return -1;
  750. }
  751. /* Disable all the interrupts */
  752. E1000_WRITE_REG(&adapter->hw, IMC, 0xFFFFFFFF);
  753. msec_delay(10);
  754. /* Test each interrupt */
  755. for (; i < 10; i++) {
  756. /* Interrupt to test */
  757. mask = 1 << i;
  758. if (!shared_int) {
  759. /* Disable the interrupt to be reported in
  760. * the cause register and then force the same
  761. * interrupt and see if one gets posted. If
  762. * an interrupt was posted to the bus, the
  763. * test failed.
  764. */
  765. adapter->test_icr = 0;
  766. E1000_WRITE_REG(&adapter->hw, IMC, mask);
  767. E1000_WRITE_REG(&adapter->hw, ICS, mask);
  768. msec_delay(10);
  769. if (adapter->test_icr & mask) {
  770. *data = 3;
  771. break;
  772. }
  773. }
  774. /* Enable the interrupt to be reported in
  775. * the cause register and then force the same
  776. * interrupt and see if one gets posted. If
  777. * an interrupt was not posted to the bus, the
  778. * test failed.
  779. */
  780. adapter->test_icr = 0;
  781. E1000_WRITE_REG(&adapter->hw, IMS, mask);
  782. E1000_WRITE_REG(&adapter->hw, ICS, mask);
  783. msec_delay(10);
  784. if (!(adapter->test_icr & mask)) {
  785. *data = 4;
  786. break;
  787. }
  788. if (!shared_int) {
  789. /* Disable the other interrupts to be reported in
  790. * the cause register and then force the other
  791. * interrupts and see if any get posted. If
  792. * an interrupt was posted to the bus, the
  793. * test failed.
  794. */
  795. adapter->test_icr = 0;
  796. E1000_WRITE_REG(&adapter->hw, IMC, ~mask & 0x00007FFF);
  797. E1000_WRITE_REG(&adapter->hw, ICS, ~mask & 0x00007FFF);
  798. msec_delay(10);
  799. if (adapter->test_icr) {
  800. *data = 5;
  801. break;
  802. }
  803. }
  804. }
  805. /* Disable all the interrupts */
  806. E1000_WRITE_REG(&adapter->hw, IMC, 0xFFFFFFFF);
  807. msec_delay(10);
  808. /* Unhook test interrupt handler */
  809. free_irq(irq, netdev);
  810. return *data;
  811. }
  812. static void
  813. e1000_free_desc_rings(struct e1000_adapter *adapter)
  814. {
  815. struct e1000_tx_ring *txdr = &adapter->test_tx_ring;
  816. struct e1000_rx_ring *rxdr = &adapter->test_rx_ring;
  817. struct pci_dev *pdev = adapter->pdev;
  818. int i;
  819. if (txdr->desc && txdr->buffer_info) {
  820. for (i = 0; i < txdr->count; i++) {
  821. if (txdr->buffer_info[i].dma)
  822. pci_unmap_single(pdev, txdr->buffer_info[i].dma,
  823. txdr->buffer_info[i].length,
  824. PCI_DMA_TODEVICE);
  825. if (txdr->buffer_info[i].skb)
  826. dev_kfree_skb(txdr->buffer_info[i].skb);
  827. }
  828. }
  829. if (rxdr->desc && rxdr->buffer_info) {
  830. for (i = 0; i < rxdr->count; i++) {
  831. if (rxdr->buffer_info[i].dma)
  832. pci_unmap_single(pdev, rxdr->buffer_info[i].dma,
  833. rxdr->buffer_info[i].length,
  834. PCI_DMA_FROMDEVICE);
  835. if (rxdr->buffer_info[i].skb)
  836. dev_kfree_skb(rxdr->buffer_info[i].skb);
  837. }
  838. }
  839. if (txdr->desc) {
  840. pci_free_consistent(pdev, txdr->size, txdr->desc, txdr->dma);
  841. txdr->desc = NULL;
  842. }
  843. if (rxdr->desc) {
  844. pci_free_consistent(pdev, rxdr->size, rxdr->desc, rxdr->dma);
  845. rxdr->desc = NULL;
  846. }
  847. kfree(txdr->buffer_info);
  848. txdr->buffer_info = NULL;
  849. kfree(rxdr->buffer_info);
  850. rxdr->buffer_info = NULL;
  851. return;
  852. }
  853. static int
  854. e1000_setup_desc_rings(struct e1000_adapter *adapter)
  855. {
  856. struct e1000_tx_ring *txdr = &adapter->test_tx_ring;
  857. struct e1000_rx_ring *rxdr = &adapter->test_rx_ring;
  858. struct pci_dev *pdev = adapter->pdev;
  859. uint32_t rctl;
  860. int size, i, ret_val;
  861. /* Setup Tx descriptor ring and Tx buffers */
  862. if (!txdr->count)
  863. txdr->count = E1000_DEFAULT_TXD;
  864. size = txdr->count * sizeof(struct e1000_buffer);
  865. if (!(txdr->buffer_info = kmalloc(size, GFP_KERNEL))) {
  866. ret_val = 1;
  867. goto err_nomem;
  868. }
  869. memset(txdr->buffer_info, 0, size);
  870. txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
  871. E1000_ROUNDUP(txdr->size, 4096);
  872. if (!(txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma))) {
  873. ret_val = 2;
  874. goto err_nomem;
  875. }
  876. memset(txdr->desc, 0, txdr->size);
  877. txdr->next_to_use = txdr->next_to_clean = 0;
  878. E1000_WRITE_REG(&adapter->hw, TDBAL,
  879. ((uint64_t) txdr->dma & 0x00000000FFFFFFFF));
  880. E1000_WRITE_REG(&adapter->hw, TDBAH, ((uint64_t) txdr->dma >> 32));
  881. E1000_WRITE_REG(&adapter->hw, TDLEN,
  882. txdr->count * sizeof(struct e1000_tx_desc));
  883. E1000_WRITE_REG(&adapter->hw, TDH, 0);
  884. E1000_WRITE_REG(&adapter->hw, TDT, 0);
  885. E1000_WRITE_REG(&adapter->hw, TCTL,
  886. E1000_TCTL_PSP | E1000_TCTL_EN |
  887. E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT |
  888. E1000_FDX_COLLISION_DISTANCE << E1000_COLD_SHIFT);
  889. for (i = 0; i < txdr->count; i++) {
  890. struct e1000_tx_desc *tx_desc = E1000_TX_DESC(*txdr, i);
  891. struct sk_buff *skb;
  892. unsigned int size = 1024;
  893. if (!(skb = alloc_skb(size, GFP_KERNEL))) {
  894. ret_val = 3;
  895. goto err_nomem;
  896. }
  897. skb_put(skb, size);
  898. txdr->buffer_info[i].skb = skb;
  899. txdr->buffer_info[i].length = skb->len;
  900. txdr->buffer_info[i].dma =
  901. pci_map_single(pdev, skb->data, skb->len,
  902. PCI_DMA_TODEVICE);
  903. tx_desc->buffer_addr = cpu_to_le64(txdr->buffer_info[i].dma);
  904. tx_desc->lower.data = cpu_to_le32(skb->len);
  905. tx_desc->lower.data |= cpu_to_le32(E1000_TXD_CMD_EOP |
  906. E1000_TXD_CMD_IFCS |
  907. E1000_TXD_CMD_RPS);
  908. tx_desc->upper.data = 0;
  909. }
  910. /* Setup Rx descriptor ring and Rx buffers */
  911. if (!rxdr->count)
  912. rxdr->count = E1000_DEFAULT_RXD;
  913. size = rxdr->count * sizeof(struct e1000_buffer);
  914. if (!(rxdr->buffer_info = kmalloc(size, GFP_KERNEL))) {
  915. ret_val = 4;
  916. goto err_nomem;
  917. }
  918. memset(rxdr->buffer_info, 0, size);
  919. rxdr->size = rxdr->count * sizeof(struct e1000_rx_desc);
  920. if (!(rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma))) {
  921. ret_val = 5;
  922. goto err_nomem;
  923. }
  924. memset(rxdr->desc, 0, rxdr->size);
  925. rxdr->next_to_use = rxdr->next_to_clean = 0;
  926. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  927. E1000_WRITE_REG(&adapter->hw, RCTL, rctl & ~E1000_RCTL_EN);
  928. E1000_WRITE_REG(&adapter->hw, RDBAL,
  929. ((uint64_t) rxdr->dma & 0xFFFFFFFF));
  930. E1000_WRITE_REG(&adapter->hw, RDBAH, ((uint64_t) rxdr->dma >> 32));
  931. E1000_WRITE_REG(&adapter->hw, RDLEN, rxdr->size);
  932. E1000_WRITE_REG(&adapter->hw, RDH, 0);
  933. E1000_WRITE_REG(&adapter->hw, RDT, 0);
  934. rctl = E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_SZ_2048 |
  935. E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
  936. (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
  937. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  938. for (i = 0; i < rxdr->count; i++) {
  939. struct e1000_rx_desc *rx_desc = E1000_RX_DESC(*rxdr, i);
  940. struct sk_buff *skb;
  941. if (!(skb = alloc_skb(E1000_RXBUFFER_2048 + NET_IP_ALIGN,
  942. GFP_KERNEL))) {
  943. ret_val = 6;
  944. goto err_nomem;
  945. }
  946. skb_reserve(skb, NET_IP_ALIGN);
  947. rxdr->buffer_info[i].skb = skb;
  948. rxdr->buffer_info[i].length = E1000_RXBUFFER_2048;
  949. rxdr->buffer_info[i].dma =
  950. pci_map_single(pdev, skb->data, E1000_RXBUFFER_2048,
  951. PCI_DMA_FROMDEVICE);
  952. rx_desc->buffer_addr = cpu_to_le64(rxdr->buffer_info[i].dma);
  953. memset(skb->data, 0x00, skb->len);
  954. }
  955. return 0;
  956. err_nomem:
  957. e1000_free_desc_rings(adapter);
  958. return ret_val;
  959. }
  960. static void
  961. e1000_phy_disable_receiver(struct e1000_adapter *adapter)
  962. {
  963. /* Write out to PHY registers 29 and 30 to disable the Receiver. */
  964. e1000_write_phy_reg(&adapter->hw, 29, 0x001F);
  965. e1000_write_phy_reg(&adapter->hw, 30, 0x8FFC);
  966. e1000_write_phy_reg(&adapter->hw, 29, 0x001A);
  967. e1000_write_phy_reg(&adapter->hw, 30, 0x8FF0);
  968. }
  969. static void
  970. e1000_phy_reset_clk_and_crs(struct e1000_adapter *adapter)
  971. {
  972. uint16_t phy_reg;
  973. /* Because we reset the PHY above, we need to re-force TX_CLK in the
  974. * Extended PHY Specific Control Register to 25MHz clock. This
  975. * value defaults back to a 2.5MHz clock when the PHY is reset.
  976. */
  977. e1000_read_phy_reg(&adapter->hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_reg);
  978. phy_reg |= M88E1000_EPSCR_TX_CLK_25;
  979. e1000_write_phy_reg(&adapter->hw,
  980. M88E1000_EXT_PHY_SPEC_CTRL, phy_reg);
  981. /* In addition, because of the s/w reset above, we need to enable
  982. * CRS on TX. This must be set for both full and half duplex
  983. * operation.
  984. */
  985. e1000_read_phy_reg(&adapter->hw, M88E1000_PHY_SPEC_CTRL, &phy_reg);
  986. phy_reg |= M88E1000_PSCR_ASSERT_CRS_ON_TX;
  987. e1000_write_phy_reg(&adapter->hw,
  988. M88E1000_PHY_SPEC_CTRL, phy_reg);
  989. }
  990. static int
  991. e1000_nonintegrated_phy_loopback(struct e1000_adapter *adapter)
  992. {
  993. uint32_t ctrl_reg;
  994. uint16_t phy_reg;
  995. /* Setup the Device Control Register for PHY loopback test. */
  996. ctrl_reg = E1000_READ_REG(&adapter->hw, CTRL);
  997. ctrl_reg |= (E1000_CTRL_ILOS | /* Invert Loss-Of-Signal */
  998. E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
  999. E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
  1000. E1000_CTRL_SPD_1000 | /* Force Speed to 1000 */
  1001. E1000_CTRL_FD); /* Force Duplex to FULL */
  1002. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl_reg);
  1003. /* Read the PHY Specific Control Register (0x10) */
  1004. e1000_read_phy_reg(&adapter->hw, M88E1000_PHY_SPEC_CTRL, &phy_reg);
  1005. /* Clear Auto-Crossover bits in PHY Specific Control Register
  1006. * (bits 6:5).
  1007. */
  1008. phy_reg &= ~M88E1000_PSCR_AUTO_X_MODE;
  1009. e1000_write_phy_reg(&adapter->hw, M88E1000_PHY_SPEC_CTRL, phy_reg);
  1010. /* Perform software reset on the PHY */
  1011. e1000_phy_reset(&adapter->hw);
  1012. /* Have to setup TX_CLK and TX_CRS after software reset */
  1013. e1000_phy_reset_clk_and_crs(adapter);
  1014. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x8100);
  1015. /* Wait for reset to complete. */
  1016. udelay(500);
  1017. /* Have to setup TX_CLK and TX_CRS after software reset */
  1018. e1000_phy_reset_clk_and_crs(adapter);
  1019. /* Write out to PHY registers 29 and 30 to disable the Receiver. */
  1020. e1000_phy_disable_receiver(adapter);
  1021. /* Set the loopback bit in the PHY control register. */
  1022. e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_reg);
  1023. phy_reg |= MII_CR_LOOPBACK;
  1024. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_reg);
  1025. /* Setup TX_CLK and TX_CRS one more time. */
  1026. e1000_phy_reset_clk_and_crs(adapter);
  1027. /* Check Phy Configuration */
  1028. e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_reg);
  1029. if (phy_reg != 0x4100)
  1030. return 9;
  1031. e1000_read_phy_reg(&adapter->hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_reg);
  1032. if (phy_reg != 0x0070)
  1033. return 10;
  1034. e1000_read_phy_reg(&adapter->hw, 29, &phy_reg);
  1035. if (phy_reg != 0x001A)
  1036. return 11;
  1037. return 0;
  1038. }
  1039. static int
  1040. e1000_integrated_phy_loopback(struct e1000_adapter *adapter)
  1041. {
  1042. uint32_t ctrl_reg = 0;
  1043. uint32_t stat_reg = 0;
  1044. adapter->hw.autoneg = FALSE;
  1045. if (adapter->hw.phy_type == e1000_phy_m88) {
  1046. /* Auto-MDI/MDIX Off */
  1047. e1000_write_phy_reg(&adapter->hw,
  1048. M88E1000_PHY_SPEC_CTRL, 0x0808);
  1049. /* reset to update Auto-MDI/MDIX */
  1050. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x9140);
  1051. /* autoneg off */
  1052. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x8140);
  1053. }
  1054. /* force 1000, set loopback */
  1055. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x4140);
  1056. /* Now set up the MAC to the same speed/duplex as the PHY. */
  1057. ctrl_reg = E1000_READ_REG(&adapter->hw, CTRL);
  1058. ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */
  1059. ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
  1060. E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
  1061. E1000_CTRL_SPD_1000 |/* Force Speed to 1000 */
  1062. E1000_CTRL_FD); /* Force Duplex to FULL */
  1063. if (adapter->hw.media_type == e1000_media_type_copper &&
  1064. adapter->hw.phy_type == e1000_phy_m88) {
  1065. ctrl_reg |= E1000_CTRL_ILOS; /* Invert Loss of Signal */
  1066. } else {
  1067. /* Set the ILOS bit on the fiber Nic is half
  1068. * duplex link is detected. */
  1069. stat_reg = E1000_READ_REG(&adapter->hw, STATUS);
  1070. if ((stat_reg & E1000_STATUS_FD) == 0)
  1071. ctrl_reg |= (E1000_CTRL_ILOS | E1000_CTRL_SLU);
  1072. }
  1073. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl_reg);
  1074. /* Disable the receiver on the PHY so when a cable is plugged in, the
  1075. * PHY does not begin to autoneg when a cable is reconnected to the NIC.
  1076. */
  1077. if (adapter->hw.phy_type == e1000_phy_m88)
  1078. e1000_phy_disable_receiver(adapter);
  1079. udelay(500);
  1080. return 0;
  1081. }
  1082. static int
  1083. e1000_set_phy_loopback(struct e1000_adapter *adapter)
  1084. {
  1085. uint16_t phy_reg = 0;
  1086. uint16_t count = 0;
  1087. switch (adapter->hw.mac_type) {
  1088. case e1000_82543:
  1089. if (adapter->hw.media_type == e1000_media_type_copper) {
  1090. /* Attempt to setup Loopback mode on Non-integrated PHY.
  1091. * Some PHY registers get corrupted at random, so
  1092. * attempt this 10 times.
  1093. */
  1094. while (e1000_nonintegrated_phy_loopback(adapter) &&
  1095. count++ < 10);
  1096. if (count < 11)
  1097. return 0;
  1098. }
  1099. break;
  1100. case e1000_82544:
  1101. case e1000_82540:
  1102. case e1000_82545:
  1103. case e1000_82545_rev_3:
  1104. case e1000_82546:
  1105. case e1000_82546_rev_3:
  1106. case e1000_82541:
  1107. case e1000_82541_rev_2:
  1108. case e1000_82547:
  1109. case e1000_82547_rev_2:
  1110. case e1000_82571:
  1111. case e1000_82572:
  1112. case e1000_82573:
  1113. return e1000_integrated_phy_loopback(adapter);
  1114. break;
  1115. default:
  1116. /* Default PHY loopback work is to read the MII
  1117. * control register and assert bit 14 (loopback mode).
  1118. */
  1119. e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_reg);
  1120. phy_reg |= MII_CR_LOOPBACK;
  1121. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_reg);
  1122. return 0;
  1123. break;
  1124. }
  1125. return 8;
  1126. }
  1127. static int
  1128. e1000_setup_loopback_test(struct e1000_adapter *adapter)
  1129. {
  1130. struct e1000_hw *hw = &adapter->hw;
  1131. uint32_t rctl;
  1132. if (hw->media_type == e1000_media_type_fiber ||
  1133. hw->media_type == e1000_media_type_internal_serdes) {
  1134. switch (hw->mac_type) {
  1135. case e1000_82545:
  1136. case e1000_82546:
  1137. case e1000_82545_rev_3:
  1138. case e1000_82546_rev_3:
  1139. return e1000_set_phy_loopback(adapter);
  1140. break;
  1141. case e1000_82571:
  1142. case e1000_82572:
  1143. #define E1000_SERDES_LB_ON 0x410
  1144. e1000_set_phy_loopback(adapter);
  1145. E1000_WRITE_REG(hw, SCTL, E1000_SERDES_LB_ON);
  1146. msec_delay(10);
  1147. return 0;
  1148. break;
  1149. default:
  1150. rctl = E1000_READ_REG(hw, RCTL);
  1151. rctl |= E1000_RCTL_LBM_TCVR;
  1152. E1000_WRITE_REG(hw, RCTL, rctl);
  1153. return 0;
  1154. }
  1155. } else if (hw->media_type == e1000_media_type_copper)
  1156. return e1000_set_phy_loopback(adapter);
  1157. return 7;
  1158. }
  1159. static void
  1160. e1000_loopback_cleanup(struct e1000_adapter *adapter)
  1161. {
  1162. struct e1000_hw *hw = &adapter->hw;
  1163. uint32_t rctl;
  1164. uint16_t phy_reg;
  1165. rctl = E1000_READ_REG(hw, RCTL);
  1166. rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
  1167. E1000_WRITE_REG(hw, RCTL, rctl);
  1168. switch (hw->mac_type) {
  1169. case e1000_82571:
  1170. case e1000_82572:
  1171. if (hw->media_type == e1000_media_type_fiber ||
  1172. hw->media_type == e1000_media_type_internal_serdes) {
  1173. #define E1000_SERDES_LB_OFF 0x400
  1174. E1000_WRITE_REG(hw, SCTL, E1000_SERDES_LB_OFF);
  1175. msec_delay(10);
  1176. break;
  1177. }
  1178. /* Fall Through */
  1179. case e1000_82545:
  1180. case e1000_82546:
  1181. case e1000_82545_rev_3:
  1182. case e1000_82546_rev_3:
  1183. default:
  1184. hw->autoneg = TRUE;
  1185. e1000_read_phy_reg(hw, PHY_CTRL, &phy_reg);
  1186. if (phy_reg & MII_CR_LOOPBACK) {
  1187. phy_reg &= ~MII_CR_LOOPBACK;
  1188. e1000_write_phy_reg(hw, PHY_CTRL, phy_reg);
  1189. e1000_phy_reset(hw);
  1190. }
  1191. break;
  1192. }
  1193. }
  1194. static void
  1195. e1000_create_lbtest_frame(struct sk_buff *skb, unsigned int frame_size)
  1196. {
  1197. memset(skb->data, 0xFF, frame_size);
  1198. frame_size &= ~1;
  1199. memset(&skb->data[frame_size / 2], 0xAA, frame_size / 2 - 1);
  1200. memset(&skb->data[frame_size / 2 + 10], 0xBE, 1);
  1201. memset(&skb->data[frame_size / 2 + 12], 0xAF, 1);
  1202. }
  1203. static int
  1204. e1000_check_lbtest_frame(struct sk_buff *skb, unsigned int frame_size)
  1205. {
  1206. frame_size &= ~1;
  1207. if (*(skb->data + 3) == 0xFF) {
  1208. if ((*(skb->data + frame_size / 2 + 10) == 0xBE) &&
  1209. (*(skb->data + frame_size / 2 + 12) == 0xAF)) {
  1210. return 0;
  1211. }
  1212. }
  1213. return 13;
  1214. }
  1215. static int
  1216. e1000_run_loopback_test(struct e1000_adapter *adapter)
  1217. {
  1218. struct e1000_tx_ring *txdr = &adapter->test_tx_ring;
  1219. struct e1000_rx_ring *rxdr = &adapter->test_rx_ring;
  1220. struct pci_dev *pdev = adapter->pdev;
  1221. int i, j, k, l, lc, good_cnt, ret_val=0;
  1222. unsigned long time;
  1223. E1000_WRITE_REG(&adapter->hw, RDT, rxdr->count - 1);
  1224. /* Calculate the loop count based on the largest descriptor ring
  1225. * The idea is to wrap the largest ring a number of times using 64
  1226. * send/receive pairs during each loop
  1227. */
  1228. if (rxdr->count <= txdr->count)
  1229. lc = ((txdr->count / 64) * 2) + 1;
  1230. else
  1231. lc = ((rxdr->count / 64) * 2) + 1;
  1232. k = l = 0;
  1233. for (j = 0; j <= lc; j++) { /* loop count loop */
  1234. for (i = 0; i < 64; i++) { /* send the packets */
  1235. e1000_create_lbtest_frame(txdr->buffer_info[i].skb,
  1236. 1024);
  1237. pci_dma_sync_single_for_device(pdev,
  1238. txdr->buffer_info[k].dma,
  1239. txdr->buffer_info[k].length,
  1240. PCI_DMA_TODEVICE);
  1241. if (unlikely(++k == txdr->count)) k = 0;
  1242. }
  1243. E1000_WRITE_REG(&adapter->hw, TDT, k);
  1244. msec_delay(200);
  1245. time = jiffies; /* set the start time for the receive */
  1246. good_cnt = 0;
  1247. do { /* receive the sent packets */
  1248. pci_dma_sync_single_for_cpu(pdev,
  1249. rxdr->buffer_info[l].dma,
  1250. rxdr->buffer_info[l].length,
  1251. PCI_DMA_FROMDEVICE);
  1252. ret_val = e1000_check_lbtest_frame(
  1253. rxdr->buffer_info[l].skb,
  1254. 1024);
  1255. if (!ret_val)
  1256. good_cnt++;
  1257. if (unlikely(++l == rxdr->count)) l = 0;
  1258. /* time + 20 msecs (200 msecs on 2.4) is more than
  1259. * enough time to complete the receives, if it's
  1260. * exceeded, break and error off
  1261. */
  1262. } while (good_cnt < 64 && jiffies < (time + 20));
  1263. if (good_cnt != 64) {
  1264. ret_val = 13; /* ret_val is the same as mis-compare */
  1265. break;
  1266. }
  1267. if (jiffies >= (time + 2)) {
  1268. ret_val = 14; /* error code for time out error */
  1269. break;
  1270. }
  1271. } /* end loop count loop */
  1272. return ret_val;
  1273. }
  1274. static int
  1275. e1000_loopback_test(struct e1000_adapter *adapter, uint64_t *data)
  1276. {
  1277. /* PHY loopback cannot be performed if SoL/IDER
  1278. * sessions are active */
  1279. if (e1000_check_phy_reset_block(&adapter->hw)) {
  1280. DPRINTK(DRV, ERR, "Cannot do PHY loopback test "
  1281. "when SoL/IDER is active.\n");
  1282. *data = 0;
  1283. goto out;
  1284. }
  1285. if ((*data = e1000_setup_desc_rings(adapter)))
  1286. goto out;
  1287. if ((*data = e1000_setup_loopback_test(adapter)))
  1288. goto err_loopback;
  1289. *data = e1000_run_loopback_test(adapter);
  1290. e1000_loopback_cleanup(adapter);
  1291. err_loopback:
  1292. e1000_free_desc_rings(adapter);
  1293. out:
  1294. return *data;
  1295. }
  1296. static int
  1297. e1000_link_test(struct e1000_adapter *adapter, uint64_t *data)
  1298. {
  1299. *data = 0;
  1300. if (adapter->hw.media_type == e1000_media_type_internal_serdes) {
  1301. int i = 0;
  1302. adapter->hw.serdes_link_down = TRUE;
  1303. /* On some blade server designs, link establishment
  1304. * could take as long as 2-3 minutes */
  1305. do {
  1306. e1000_check_for_link(&adapter->hw);
  1307. if (adapter->hw.serdes_link_down == FALSE)
  1308. return *data;
  1309. msec_delay(20);
  1310. } while (i++ < 3750);
  1311. *data = 1;
  1312. } else {
  1313. e1000_check_for_link(&adapter->hw);
  1314. if (adapter->hw.autoneg) /* if auto_neg is set wait for it */
  1315. msec_delay(4000);
  1316. if (!(E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU)) {
  1317. *data = 1;
  1318. }
  1319. }
  1320. return *data;
  1321. }
  1322. static int
  1323. e1000_diag_test_count(struct net_device *netdev)
  1324. {
  1325. return E1000_TEST_LEN;
  1326. }
  1327. static void
  1328. e1000_diag_test(struct net_device *netdev,
  1329. struct ethtool_test *eth_test, uint64_t *data)
  1330. {
  1331. struct e1000_adapter *adapter = netdev_priv(netdev);
  1332. boolean_t if_running = netif_running(netdev);
  1333. if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
  1334. /* Offline tests */
  1335. /* save speed, duplex, autoneg settings */
  1336. uint16_t autoneg_advertised = adapter->hw.autoneg_advertised;
  1337. uint8_t forced_speed_duplex = adapter->hw.forced_speed_duplex;
  1338. uint8_t autoneg = adapter->hw.autoneg;
  1339. /* Link test performed before hardware reset so autoneg doesn't
  1340. * interfere with test result */
  1341. if (e1000_link_test(adapter, &data[4]))
  1342. eth_test->flags |= ETH_TEST_FL_FAILED;
  1343. if (if_running)
  1344. e1000_down(adapter);
  1345. else
  1346. e1000_reset(adapter);
  1347. if (e1000_reg_test(adapter, &data[0]))
  1348. eth_test->flags |= ETH_TEST_FL_FAILED;
  1349. e1000_reset(adapter);
  1350. if (e1000_eeprom_test(adapter, &data[1]))
  1351. eth_test->flags |= ETH_TEST_FL_FAILED;
  1352. e1000_reset(adapter);
  1353. if (e1000_intr_test(adapter, &data[2]))
  1354. eth_test->flags |= ETH_TEST_FL_FAILED;
  1355. e1000_reset(adapter);
  1356. if (e1000_loopback_test(adapter, &data[3]))
  1357. eth_test->flags |= ETH_TEST_FL_FAILED;
  1358. /* restore speed, duplex, autoneg settings */
  1359. adapter->hw.autoneg_advertised = autoneg_advertised;
  1360. adapter->hw.forced_speed_duplex = forced_speed_duplex;
  1361. adapter->hw.autoneg = autoneg;
  1362. e1000_reset(adapter);
  1363. if (if_running)
  1364. e1000_up(adapter);
  1365. } else {
  1366. /* Online tests */
  1367. if (e1000_link_test(adapter, &data[4]))
  1368. eth_test->flags |= ETH_TEST_FL_FAILED;
  1369. /* Offline tests aren't run; pass by default */
  1370. data[0] = 0;
  1371. data[1] = 0;
  1372. data[2] = 0;
  1373. data[3] = 0;
  1374. }
  1375. msleep_interruptible(4 * 1000);
  1376. }
  1377. static void
  1378. e1000_get_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
  1379. {
  1380. struct e1000_adapter *adapter = netdev_priv(netdev);
  1381. struct e1000_hw *hw = &adapter->hw;
  1382. switch (adapter->hw.device_id) {
  1383. case E1000_DEV_ID_82542:
  1384. case E1000_DEV_ID_82543GC_FIBER:
  1385. case E1000_DEV_ID_82543GC_COPPER:
  1386. case E1000_DEV_ID_82544EI_FIBER:
  1387. case E1000_DEV_ID_82546EB_QUAD_COPPER:
  1388. case E1000_DEV_ID_82545EM_FIBER:
  1389. case E1000_DEV_ID_82545EM_COPPER:
  1390. wol->supported = 0;
  1391. wol->wolopts = 0;
  1392. return;
  1393. case E1000_DEV_ID_82546EB_FIBER:
  1394. case E1000_DEV_ID_82546GB_FIBER:
  1395. case E1000_DEV_ID_82571EB_FIBER:
  1396. /* Wake events only supported on port A for dual fiber */
  1397. if (E1000_READ_REG(hw, STATUS) & E1000_STATUS_FUNC_1) {
  1398. wol->supported = 0;
  1399. wol->wolopts = 0;
  1400. return;
  1401. }
  1402. /* Fall Through */
  1403. default:
  1404. wol->supported = WAKE_UCAST | WAKE_MCAST |
  1405. WAKE_BCAST | WAKE_MAGIC;
  1406. wol->wolopts = 0;
  1407. if (adapter->wol & E1000_WUFC_EX)
  1408. wol->wolopts |= WAKE_UCAST;
  1409. if (adapter->wol & E1000_WUFC_MC)
  1410. wol->wolopts |= WAKE_MCAST;
  1411. if (adapter->wol & E1000_WUFC_BC)
  1412. wol->wolopts |= WAKE_BCAST;
  1413. if (adapter->wol & E1000_WUFC_MAG)
  1414. wol->wolopts |= WAKE_MAGIC;
  1415. return;
  1416. }
  1417. }
  1418. static int
  1419. e1000_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
  1420. {
  1421. struct e1000_adapter *adapter = netdev_priv(netdev);
  1422. struct e1000_hw *hw = &adapter->hw;
  1423. switch (adapter->hw.device_id) {
  1424. case E1000_DEV_ID_82542:
  1425. case E1000_DEV_ID_82543GC_FIBER:
  1426. case E1000_DEV_ID_82543GC_COPPER:
  1427. case E1000_DEV_ID_82544EI_FIBER:
  1428. case E1000_DEV_ID_82546EB_QUAD_COPPER:
  1429. case E1000_DEV_ID_82545EM_FIBER:
  1430. case E1000_DEV_ID_82545EM_COPPER:
  1431. return wol->wolopts ? -EOPNOTSUPP : 0;
  1432. case E1000_DEV_ID_82546EB_FIBER:
  1433. case E1000_DEV_ID_82546GB_FIBER:
  1434. case E1000_DEV_ID_82571EB_FIBER:
  1435. /* Wake events only supported on port A for dual fiber */
  1436. if (E1000_READ_REG(hw, STATUS) & E1000_STATUS_FUNC_1)
  1437. return wol->wolopts ? -EOPNOTSUPP : 0;
  1438. /* Fall Through */
  1439. default:
  1440. if (wol->wolopts & (WAKE_PHY | WAKE_ARP | WAKE_MAGICSECURE))
  1441. return -EOPNOTSUPP;
  1442. adapter->wol = 0;
  1443. if (wol->wolopts & WAKE_UCAST)
  1444. adapter->wol |= E1000_WUFC_EX;
  1445. if (wol->wolopts & WAKE_MCAST)
  1446. adapter->wol |= E1000_WUFC_MC;
  1447. if (wol->wolopts & WAKE_BCAST)
  1448. adapter->wol |= E1000_WUFC_BC;
  1449. if (wol->wolopts & WAKE_MAGIC)
  1450. adapter->wol |= E1000_WUFC_MAG;
  1451. }
  1452. return 0;
  1453. }
  1454. /* toggle LED 4 times per second = 2 "blinks" per second */
  1455. #define E1000_ID_INTERVAL (HZ/4)
  1456. /* bit defines for adapter->led_status */
  1457. #define E1000_LED_ON 0
  1458. static void
  1459. e1000_led_blink_callback(unsigned long data)
  1460. {
  1461. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  1462. if (test_and_change_bit(E1000_LED_ON, &adapter->led_status))
  1463. e1000_led_off(&adapter->hw);
  1464. else
  1465. e1000_led_on(&adapter->hw);
  1466. mod_timer(&adapter->blink_timer, jiffies + E1000_ID_INTERVAL);
  1467. }
  1468. static int
  1469. e1000_phys_id(struct net_device *netdev, uint32_t data)
  1470. {
  1471. struct e1000_adapter *adapter = netdev_priv(netdev);
  1472. if (!data || data > (uint32_t)(MAX_SCHEDULE_TIMEOUT / HZ))
  1473. data = (uint32_t)(MAX_SCHEDULE_TIMEOUT / HZ);
  1474. if (adapter->hw.mac_type < e1000_82571) {
  1475. if (!adapter->blink_timer.function) {
  1476. init_timer(&adapter->blink_timer);
  1477. adapter->blink_timer.function = e1000_led_blink_callback;
  1478. adapter->blink_timer.data = (unsigned long) adapter;
  1479. }
  1480. e1000_setup_led(&adapter->hw);
  1481. mod_timer(&adapter->blink_timer, jiffies);
  1482. msleep_interruptible(data * 1000);
  1483. del_timer_sync(&adapter->blink_timer);
  1484. } else if (adapter->hw.mac_type < e1000_82573) {
  1485. E1000_WRITE_REG(&adapter->hw, LEDCTL,
  1486. (E1000_LEDCTL_LED2_BLINK_RATE |
  1487. E1000_LEDCTL_LED0_BLINK | E1000_LEDCTL_LED2_BLINK |
  1488. (E1000_LEDCTL_MODE_LED_ON << E1000_LEDCTL_LED2_MODE_SHIFT) |
  1489. (E1000_LEDCTL_MODE_LINK_ACTIVITY << E1000_LEDCTL_LED0_MODE_SHIFT) |
  1490. (E1000_LEDCTL_MODE_LED_OFF << E1000_LEDCTL_LED1_MODE_SHIFT)));
  1491. msleep_interruptible(data * 1000);
  1492. } else {
  1493. E1000_WRITE_REG(&adapter->hw, LEDCTL,
  1494. (E1000_LEDCTL_LED2_BLINK_RATE |
  1495. E1000_LEDCTL_LED1_BLINK | E1000_LEDCTL_LED2_BLINK |
  1496. (E1000_LEDCTL_MODE_LED_ON << E1000_LEDCTL_LED2_MODE_SHIFT) |
  1497. (E1000_LEDCTL_MODE_LINK_ACTIVITY << E1000_LEDCTL_LED1_MODE_SHIFT) |
  1498. (E1000_LEDCTL_MODE_LED_OFF << E1000_LEDCTL_LED0_MODE_SHIFT)));
  1499. msleep_interruptible(data * 1000);
  1500. }
  1501. e1000_led_off(&adapter->hw);
  1502. clear_bit(E1000_LED_ON, &adapter->led_status);
  1503. e1000_cleanup_led(&adapter->hw);
  1504. return 0;
  1505. }
  1506. static int
  1507. e1000_nway_reset(struct net_device *netdev)
  1508. {
  1509. struct e1000_adapter *adapter = netdev_priv(netdev);
  1510. if (netif_running(netdev)) {
  1511. e1000_down(adapter);
  1512. e1000_up(adapter);
  1513. }
  1514. return 0;
  1515. }
  1516. static int
  1517. e1000_get_stats_count(struct net_device *netdev)
  1518. {
  1519. return E1000_STATS_LEN;
  1520. }
  1521. static void
  1522. e1000_get_ethtool_stats(struct net_device *netdev,
  1523. struct ethtool_stats *stats, uint64_t *data)
  1524. {
  1525. struct e1000_adapter *adapter = netdev_priv(netdev);
  1526. int i;
  1527. e1000_update_stats(adapter);
  1528. for (i = 0; i < E1000_GLOBAL_STATS_LEN; i++) {
  1529. char *p = (char *)adapter+e1000_gstrings_stats[i].stat_offset;
  1530. data[i] = (e1000_gstrings_stats[i].sizeof_stat ==
  1531. sizeof(uint64_t)) ? *(uint64_t *)p : *(uint32_t *)p;
  1532. }
  1533. /* BUG_ON(i != E1000_STATS_LEN); */
  1534. }
  1535. static void
  1536. e1000_get_strings(struct net_device *netdev, uint32_t stringset, uint8_t *data)
  1537. {
  1538. uint8_t *p = data;
  1539. int i;
  1540. switch (stringset) {
  1541. case ETH_SS_TEST:
  1542. memcpy(data, *e1000_gstrings_test,
  1543. E1000_TEST_LEN*ETH_GSTRING_LEN);
  1544. break;
  1545. case ETH_SS_STATS:
  1546. for (i = 0; i < E1000_GLOBAL_STATS_LEN; i++) {
  1547. memcpy(p, e1000_gstrings_stats[i].stat_string,
  1548. ETH_GSTRING_LEN);
  1549. p += ETH_GSTRING_LEN;
  1550. }
  1551. /* BUG_ON(p - data != E1000_STATS_LEN * ETH_GSTRING_LEN); */
  1552. break;
  1553. }
  1554. }
  1555. static struct ethtool_ops e1000_ethtool_ops = {
  1556. .get_settings = e1000_get_settings,
  1557. .set_settings = e1000_set_settings,
  1558. .get_drvinfo = e1000_get_drvinfo,
  1559. .get_regs_len = e1000_get_regs_len,
  1560. .get_regs = e1000_get_regs,
  1561. .get_wol = e1000_get_wol,
  1562. .set_wol = e1000_set_wol,
  1563. .get_msglevel = e1000_get_msglevel,
  1564. .set_msglevel = e1000_set_msglevel,
  1565. .nway_reset = e1000_nway_reset,
  1566. .get_link = ethtool_op_get_link,
  1567. .get_eeprom_len = e1000_get_eeprom_len,
  1568. .get_eeprom = e1000_get_eeprom,
  1569. .set_eeprom = e1000_set_eeprom,
  1570. .get_ringparam = e1000_get_ringparam,
  1571. .set_ringparam = e1000_set_ringparam,
  1572. .get_pauseparam = e1000_get_pauseparam,
  1573. .set_pauseparam = e1000_set_pauseparam,
  1574. .get_rx_csum = e1000_get_rx_csum,
  1575. .set_rx_csum = e1000_set_rx_csum,
  1576. .get_tx_csum = e1000_get_tx_csum,
  1577. .set_tx_csum = e1000_set_tx_csum,
  1578. .get_sg = ethtool_op_get_sg,
  1579. .set_sg = ethtool_op_set_sg,
  1580. #ifdef NETIF_F_TSO
  1581. .get_tso = ethtool_op_get_tso,
  1582. .set_tso = e1000_set_tso,
  1583. #endif
  1584. .self_test_count = e1000_diag_test_count,
  1585. .self_test = e1000_diag_test,
  1586. .get_strings = e1000_get_strings,
  1587. .phys_id = e1000_phys_id,
  1588. .get_stats_count = e1000_get_stats_count,
  1589. .get_ethtool_stats = e1000_get_ethtool_stats,
  1590. .get_perm_addr = ethtool_op_get_perm_addr,
  1591. };
  1592. void e1000_set_ethtool_ops(struct net_device *netdev)
  1593. {
  1594. SET_ETHTOOL_OPS(netdev, &e1000_ethtool_ops);
  1595. }