bigsmp_32.c 6.4 KB

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  1. /*
  2. * APIC driver for "bigsmp" XAPIC machines with more than 8 virtual CPUs.
  3. * Drives the local APIC in "clustered mode".
  4. */
  5. #define APIC_DEFINITION 1
  6. #include <linux/threads.h>
  7. #include <linux/cpumask.h>
  8. #include <asm/mpspec.h>
  9. #include <asm/genapic.h>
  10. #include <asm/fixmap.h>
  11. #include <asm/apicdef.h>
  12. #include <linux/kernel.h>
  13. #include <linux/init.h>
  14. #include <linux/dmi.h>
  15. #include <linux/smp.h>
  16. static inline unsigned bigsmp_get_apic_id(unsigned long x)
  17. {
  18. return (x >> 24) & 0xFF;
  19. }
  20. #define xapic_phys_to_log_apicid(cpu) (per_cpu(x86_bios_cpu_apicid, cpu))
  21. static inline int bigsmp_apic_id_registered(void)
  22. {
  23. return 1;
  24. }
  25. static inline const cpumask_t *bigsmp_target_cpus(void)
  26. {
  27. #ifdef CONFIG_SMP
  28. return &cpu_online_map;
  29. #else
  30. return &cpumask_of_cpu(0);
  31. #endif
  32. }
  33. #define APIC_DFR_VALUE (APIC_DFR_FLAT)
  34. static inline unsigned long
  35. bigsmp_check_apicid_used(physid_mask_t bitmap, int apicid)
  36. {
  37. return 0;
  38. }
  39. static inline unsigned long bigsmp_check_apicid_present(int bit)
  40. {
  41. return 1;
  42. }
  43. static inline unsigned long calculate_ldr(int cpu)
  44. {
  45. unsigned long val, id;
  46. val = apic_read(APIC_LDR) & ~APIC_LDR_MASK;
  47. id = xapic_phys_to_log_apicid(cpu);
  48. val |= SET_APIC_LOGICAL_ID(id);
  49. return val;
  50. }
  51. /*
  52. * Set up the logical destination ID.
  53. *
  54. * Intel recommends to set DFR, LDR and TPR before enabling
  55. * an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel
  56. * document number 292116). So here it goes...
  57. */
  58. static inline void bigsmp_init_apic_ldr(void)
  59. {
  60. unsigned long val;
  61. int cpu = smp_processor_id();
  62. apic_write(APIC_DFR, APIC_DFR_VALUE);
  63. val = calculate_ldr(cpu);
  64. apic_write(APIC_LDR, val);
  65. }
  66. static inline void bigsmp_setup_apic_routing(void)
  67. {
  68. printk("Enabling APIC mode: %s. Using %d I/O APICs\n",
  69. "Physflat", nr_ioapics);
  70. }
  71. static inline int bigsmp_apicid_to_node(int logical_apicid)
  72. {
  73. return apicid_2_node[hard_smp_processor_id()];
  74. }
  75. static inline int bigsmp_cpu_present_to_apicid(int mps_cpu)
  76. {
  77. if (mps_cpu < nr_cpu_ids)
  78. return (int) per_cpu(x86_bios_cpu_apicid, mps_cpu);
  79. return BAD_APICID;
  80. }
  81. static inline physid_mask_t bigsmp_apicid_to_cpu_present(int phys_apicid)
  82. {
  83. return physid_mask_of_physid(phys_apicid);
  84. }
  85. extern u8 cpu_2_logical_apicid[];
  86. /* Mapping from cpu number to logical apicid */
  87. static inline int bigsmp_cpu_to_logical_apicid(int cpu)
  88. {
  89. if (cpu >= nr_cpu_ids)
  90. return BAD_APICID;
  91. return cpu_physical_id(cpu);
  92. }
  93. static inline physid_mask_t bigsmp_ioapic_phys_id_map(physid_mask_t phys_map)
  94. {
  95. /* For clustered we don't have a good way to do this yet - hack */
  96. return physids_promote(0xFFL);
  97. }
  98. static inline void bigsmp_setup_portio_remap(void)
  99. {
  100. }
  101. static inline int bigsmp_check_phys_apicid_present(int boot_cpu_physical_apicid)
  102. {
  103. return 1;
  104. }
  105. /* As we are using single CPU as destination, pick only one CPU here */
  106. static inline unsigned int bigsmp_cpu_mask_to_apicid(const cpumask_t *cpumask)
  107. {
  108. return bigsmp_cpu_to_logical_apicid(first_cpu(*cpumask));
  109. }
  110. static inline unsigned int
  111. bigsmp_cpu_mask_to_apicid_and(const struct cpumask *cpumask,
  112. const struct cpumask *andmask)
  113. {
  114. int cpu;
  115. /*
  116. * We're using fixed IRQ delivery, can only return one phys APIC ID.
  117. * May as well be the first.
  118. */
  119. for_each_cpu_and(cpu, cpumask, andmask) {
  120. if (cpumask_test_cpu(cpu, cpu_online_mask))
  121. break;
  122. }
  123. if (cpu < nr_cpu_ids)
  124. return bigsmp_cpu_to_logical_apicid(cpu);
  125. return BAD_APICID;
  126. }
  127. static inline int bigsmp_phys_pkg_id(int cpuid_apic, int index_msb)
  128. {
  129. return cpuid_apic >> index_msb;
  130. }
  131. void default_send_IPI_mask_sequence(const struct cpumask *mask, int vector);
  132. void default_send_IPI_mask_allbutself(const struct cpumask *mask, int vector);
  133. static inline void bigsmp_send_IPI_mask(const struct cpumask *mask, int vector)
  134. {
  135. default_send_IPI_mask_sequence(mask, vector);
  136. }
  137. static inline void bigsmp_send_IPI_allbutself(int vector)
  138. {
  139. default_send_IPI_mask_allbutself(cpu_online_mask, vector);
  140. }
  141. static inline void bigsmp_send_IPI_all(int vector)
  142. {
  143. bigsmp_send_IPI_mask(cpu_online_mask, vector);
  144. }
  145. static int dmi_bigsmp; /* can be set by dmi scanners */
  146. static int hp_ht_bigsmp(const struct dmi_system_id *d)
  147. {
  148. printk(KERN_NOTICE "%s detected: force use of apic=bigsmp\n", d->ident);
  149. dmi_bigsmp = 1;
  150. return 0;
  151. }
  152. static const struct dmi_system_id bigsmp_dmi_table[] = {
  153. { hp_ht_bigsmp, "HP ProLiant DL760 G2",
  154. { DMI_MATCH(DMI_BIOS_VENDOR, "HP"),
  155. DMI_MATCH(DMI_BIOS_VERSION, "P44-"),}
  156. },
  157. { hp_ht_bigsmp, "HP ProLiant DL740",
  158. { DMI_MATCH(DMI_BIOS_VENDOR, "HP"),
  159. DMI_MATCH(DMI_BIOS_VERSION, "P47-"),}
  160. },
  161. { }
  162. };
  163. static void bigsmp_vector_allocation_domain(int cpu, cpumask_t *retmask)
  164. {
  165. cpus_clear(*retmask);
  166. cpu_set(cpu, *retmask);
  167. }
  168. static int probe_bigsmp(void)
  169. {
  170. if (def_to_bigsmp)
  171. dmi_bigsmp = 1;
  172. else
  173. dmi_check_system(bigsmp_dmi_table);
  174. return dmi_bigsmp;
  175. }
  176. struct genapic apic_bigsmp = {
  177. .name = "bigsmp",
  178. .probe = probe_bigsmp,
  179. .acpi_madt_oem_check = NULL,
  180. .apic_id_registered = bigsmp_apic_id_registered,
  181. .irq_delivery_mode = dest_Fixed,
  182. /* phys delivery to target CPU: */
  183. .irq_dest_mode = 0,
  184. .target_cpus = bigsmp_target_cpus,
  185. .disable_esr = 1,
  186. .dest_logical = 0,
  187. .check_apicid_used = bigsmp_check_apicid_used,
  188. .check_apicid_present = bigsmp_check_apicid_present,
  189. .vector_allocation_domain = bigsmp_vector_allocation_domain,
  190. .init_apic_ldr = bigsmp_init_apic_ldr,
  191. .ioapic_phys_id_map = bigsmp_ioapic_phys_id_map,
  192. .setup_apic_routing = bigsmp_setup_apic_routing,
  193. .multi_timer_check = NULL,
  194. .apicid_to_node = bigsmp_apicid_to_node,
  195. .cpu_to_logical_apicid = bigsmp_cpu_to_logical_apicid,
  196. .cpu_present_to_apicid = bigsmp_cpu_present_to_apicid,
  197. .apicid_to_cpu_present = bigsmp_apicid_to_cpu_present,
  198. .setup_portio_remap = NULL,
  199. .check_phys_apicid_present = bigsmp_check_phys_apicid_present,
  200. .enable_apic_mode = NULL,
  201. .phys_pkg_id = bigsmp_phys_pkg_id,
  202. .mps_oem_check = NULL,
  203. .get_apic_id = bigsmp_get_apic_id,
  204. .set_apic_id = NULL,
  205. .apic_id_mask = 0xFF << 24,
  206. .cpu_mask_to_apicid = bigsmp_cpu_mask_to_apicid,
  207. .cpu_mask_to_apicid_and = bigsmp_cpu_mask_to_apicid_and,
  208. .send_IPI_mask = bigsmp_send_IPI_mask,
  209. .send_IPI_mask_allbutself = NULL,
  210. .send_IPI_allbutself = bigsmp_send_IPI_allbutself,
  211. .send_IPI_all = bigsmp_send_IPI_all,
  212. .send_IPI_self = NULL,
  213. .wakeup_cpu = NULL,
  214. .trampoline_phys_low = DEFAULT_TRAMPOLINE_PHYS_LOW,
  215. .trampoline_phys_high = DEFAULT_TRAMPOLINE_PHYS_HIGH,
  216. .wait_for_init_deassert = default_wait_for_init_deassert,
  217. .smp_callin_clear_local_apic = NULL,
  218. .store_NMI_vector = NULL,
  219. .inquire_remote_apic = default_inquire_remote_apic,
  220. };