atstk1002.c 8.1 KB

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  1. /*
  2. * ATSTK1002/ATSTK1006 daughterboard-specific init code
  3. *
  4. * Copyright (C) 2005-2007 Atmel Corporation
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. */
  10. #include <linux/clk.h>
  11. #include <linux/etherdevice.h>
  12. #include <linux/init.h>
  13. #include <linux/kernel.h>
  14. #include <linux/platform_device.h>
  15. #include <linux/string.h>
  16. #include <linux/types.h>
  17. #include <linux/spi/spi.h>
  18. #include <linux/spi/at73c213.h>
  19. #include <video/atmel_lcdc.h>
  20. #include <asm/io.h>
  21. #include <asm/setup.h>
  22. #include <asm/arch/at32ap700x.h>
  23. #include <asm/arch/board.h>
  24. #include <asm/arch/init.h>
  25. #include <asm/arch/portmux.h>
  26. #include "atstk1000.h"
  27. /* Oscillator frequencies. These are board specific */
  28. unsigned long at32_board_osc_rates[3] = {
  29. [0] = 32768, /* 32.768 kHz on RTC osc */
  30. [1] = 20000000, /* 20 MHz on osc0 */
  31. [2] = 12000000, /* 12 MHz on osc1 */
  32. };
  33. /*
  34. * The ATSTK1006 daughterboard is very similar to the ATSTK1002. Both
  35. * have the AT32AP7000 chip on board; the difference is that the
  36. * STK1006 has 128 MB SDRAM (the STK1002 uses the 8 MB SDRAM chip on
  37. * the STK1000 motherboard) and 256 MB NAND flash (the STK1002 has
  38. * none.)
  39. *
  40. * The RAM difference is handled by the boot loader, so the only
  41. * difference we end up handling here is the NAND flash.
  42. */
  43. #ifdef CONFIG_BOARD_ATSTK1006
  44. #include <linux/mtd/partitions.h>
  45. #include <asm/arch/smc.h>
  46. static struct smc_timing nand_timing __initdata = {
  47. .ncs_read_setup = 0,
  48. .nrd_setup = 10,
  49. .ncs_write_setup = 0,
  50. .nwe_setup = 10,
  51. .ncs_read_pulse = 30,
  52. .nrd_pulse = 15,
  53. .ncs_write_pulse = 30,
  54. .nwe_pulse = 15,
  55. .read_cycle = 30,
  56. .write_cycle = 30,
  57. .ncs_read_recover = 0,
  58. .nrd_recover = 15,
  59. .ncs_write_recover = 0,
  60. /* WE# high -> RE# low min 60 ns */
  61. .nwe_recover = 50,
  62. };
  63. static struct smc_config nand_config __initdata = {
  64. .bus_width = 1,
  65. .nrd_controlled = 1,
  66. .nwe_controlled = 1,
  67. .nwait_mode = 0,
  68. .byte_write = 0,
  69. .tdf_cycles = 2,
  70. .tdf_mode = 0,
  71. };
  72. static struct mtd_partition nand_partitions[] = {
  73. {
  74. .name = "main",
  75. .offset = 0x00000000,
  76. .size = MTDPART_SIZ_FULL,
  77. },
  78. };
  79. static struct mtd_partition *nand_part_info(int size, int *num_partitions)
  80. {
  81. *num_partitions = ARRAY_SIZE(nand_partitions);
  82. return nand_partitions;
  83. }
  84. struct atmel_nand_data atstk1006_nand_data __initdata = {
  85. .cle = 21,
  86. .ale = 22,
  87. .rdy_pin = GPIO_PIN_PB(30),
  88. .enable_pin = GPIO_PIN_PB(29),
  89. .partition_info = nand_part_info,
  90. };
  91. #endif
  92. struct eth_addr {
  93. u8 addr[6];
  94. };
  95. static struct eth_addr __initdata hw_addr[2];
  96. static struct eth_platform_data __initdata eth_data[2] = {
  97. {
  98. /*
  99. * The MDIO pullups on STK1000 are a bit too weak for
  100. * the autodetection to work properly, so we have to
  101. * mask out everything but the correct address.
  102. */
  103. .phy_mask = ~(1U << 16),
  104. },
  105. {
  106. .phy_mask = ~(1U << 17),
  107. },
  108. };
  109. #ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
  110. static struct at73c213_board_info at73c213_data = {
  111. .ssc_id = 0,
  112. .shortname = "AVR32 STK1000 external DAC",
  113. };
  114. #endif
  115. #ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM
  116. static struct spi_board_info spi0_board_info[] __initdata = {
  117. #ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
  118. {
  119. /* AT73C213 */
  120. .modalias = "at73c213",
  121. .max_speed_hz = 200000,
  122. .chip_select = 0,
  123. .mode = SPI_MODE_1,
  124. .platform_data = &at73c213_data,
  125. },
  126. #endif
  127. {
  128. /* QVGA display */
  129. .modalias = "ltv350qv",
  130. .max_speed_hz = 16000000,
  131. .chip_select = 1,
  132. .mode = SPI_MODE_3,
  133. },
  134. };
  135. #endif
  136. #ifdef CONFIG_BOARD_ATSTK100X_SPI1
  137. static struct spi_board_info spi1_board_info[] __initdata = { {
  138. /* patch in custom entries here */
  139. } };
  140. #endif
  141. /*
  142. * The next two functions should go away as the boot loader is
  143. * supposed to initialize the macb address registers with a valid
  144. * ethernet address. But we need to keep it around for a while until
  145. * we can be reasonably sure the boot loader does this.
  146. *
  147. * The phy_id is ignored as the driver will probe for it.
  148. */
  149. static int __init parse_tag_ethernet(struct tag *tag)
  150. {
  151. int i;
  152. i = tag->u.ethernet.mac_index;
  153. if (i < ARRAY_SIZE(hw_addr))
  154. memcpy(hw_addr[i].addr, tag->u.ethernet.hw_address,
  155. sizeof(hw_addr[i].addr));
  156. return 0;
  157. }
  158. __tagtable(ATAG_ETHERNET, parse_tag_ethernet);
  159. static void __init set_hw_addr(struct platform_device *pdev)
  160. {
  161. struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  162. const u8 *addr;
  163. void __iomem *regs;
  164. struct clk *pclk;
  165. if (!res)
  166. return;
  167. if (pdev->id >= ARRAY_SIZE(hw_addr))
  168. return;
  169. addr = hw_addr[pdev->id].addr;
  170. if (!is_valid_ether_addr(addr))
  171. return;
  172. /*
  173. * Since this is board-specific code, we'll cheat and use the
  174. * physical address directly as we happen to know that it's
  175. * the same as the virtual address.
  176. */
  177. regs = (void __iomem __force *)res->start;
  178. pclk = clk_get(&pdev->dev, "pclk");
  179. if (!pclk)
  180. return;
  181. clk_enable(pclk);
  182. __raw_writel((addr[3] << 24) | (addr[2] << 16)
  183. | (addr[1] << 8) | addr[0], regs + 0x98);
  184. __raw_writel((addr[5] << 8) | addr[4], regs + 0x9c);
  185. clk_disable(pclk);
  186. clk_put(pclk);
  187. }
  188. #ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
  189. static void __init atstk1002_setup_extdac(void)
  190. {
  191. struct clk *gclk;
  192. struct clk *pll;
  193. gclk = clk_get(NULL, "gclk0");
  194. if (IS_ERR(gclk))
  195. goto err_gclk;
  196. pll = clk_get(NULL, "pll0");
  197. if (IS_ERR(pll))
  198. goto err_pll;
  199. if (clk_set_parent(gclk, pll)) {
  200. pr_debug("STK1000: failed to set pll0 as parent for DAC clock\n");
  201. goto err_set_clk;
  202. }
  203. at32_select_periph(GPIO_PIN_PA(30), GPIO_PERIPH_A, 0);
  204. at73c213_data.dac_clk = gclk;
  205. err_set_clk:
  206. clk_put(pll);
  207. err_pll:
  208. clk_put(gclk);
  209. err_gclk:
  210. return;
  211. }
  212. #else
  213. static void __init atstk1002_setup_extdac(void)
  214. {
  215. }
  216. #endif /* CONFIG_BOARD_ATSTK1000_EXTDAC */
  217. void __init setup_board(void)
  218. {
  219. #ifdef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
  220. at32_map_usart(0, 1); /* USART 0/B: /dev/ttyS1, IRDA */
  221. #else
  222. at32_map_usart(1, 0); /* USART 1/A: /dev/ttyS0, DB9 */
  223. #endif
  224. /* USART 2/unused: expansion connector */
  225. at32_map_usart(3, 2); /* USART 3/C: /dev/ttyS2, DB9 */
  226. at32_setup_serial_console(0);
  227. }
  228. static int __init atstk1002_init(void)
  229. {
  230. /*
  231. * ATSTK1000 uses 32-bit SDRAM interface. Reserve the
  232. * SDRAM-specific pins so that nobody messes with them.
  233. */
  234. at32_reserve_pin(GPIO_PIN_PE(0)); /* DATA[16] */
  235. at32_reserve_pin(GPIO_PIN_PE(1)); /* DATA[17] */
  236. at32_reserve_pin(GPIO_PIN_PE(2)); /* DATA[18] */
  237. at32_reserve_pin(GPIO_PIN_PE(3)); /* DATA[19] */
  238. at32_reserve_pin(GPIO_PIN_PE(4)); /* DATA[20] */
  239. at32_reserve_pin(GPIO_PIN_PE(5)); /* DATA[21] */
  240. at32_reserve_pin(GPIO_PIN_PE(6)); /* DATA[22] */
  241. at32_reserve_pin(GPIO_PIN_PE(7)); /* DATA[23] */
  242. at32_reserve_pin(GPIO_PIN_PE(8)); /* DATA[24] */
  243. at32_reserve_pin(GPIO_PIN_PE(9)); /* DATA[25] */
  244. at32_reserve_pin(GPIO_PIN_PE(10)); /* DATA[26] */
  245. at32_reserve_pin(GPIO_PIN_PE(11)); /* DATA[27] */
  246. at32_reserve_pin(GPIO_PIN_PE(12)); /* DATA[28] */
  247. at32_reserve_pin(GPIO_PIN_PE(13)); /* DATA[29] */
  248. at32_reserve_pin(GPIO_PIN_PE(14)); /* DATA[30] */
  249. at32_reserve_pin(GPIO_PIN_PE(15)); /* DATA[31] */
  250. at32_reserve_pin(GPIO_PIN_PE(26)); /* SDCS */
  251. at32_add_system_devices();
  252. #ifdef CONFIG_BOARD_ATSTK1006
  253. smc_set_timing(&nand_config, &nand_timing);
  254. smc_set_configuration(3, &nand_config);
  255. at32_add_device_nand(0, &atstk1006_nand_data);
  256. #endif
  257. #ifdef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
  258. at32_add_device_usart(1);
  259. #else
  260. at32_add_device_usart(0);
  261. #endif
  262. at32_add_device_usart(2);
  263. #ifndef CONFIG_BOARD_ATSTK1002_SW6_CUSTOM
  264. set_hw_addr(at32_add_device_eth(0, &eth_data[0]));
  265. #endif
  266. #ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM
  267. at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info));
  268. #endif
  269. #ifdef CONFIG_BOARD_ATSTK100X_SPI1
  270. at32_add_device_spi(1, spi1_board_info, ARRAY_SIZE(spi1_board_info));
  271. #endif
  272. #ifndef CONFIG_BOARD_ATSTK1002_SW2_CUSTOM
  273. at32_add_device_mci(0, NULL);
  274. #endif
  275. #ifdef CONFIG_BOARD_ATSTK1002_SW5_CUSTOM
  276. set_hw_addr(at32_add_device_eth(1, &eth_data[1]));
  277. #else
  278. at32_add_device_lcdc(0, &atstk1000_lcdc_data,
  279. fbmem_start, fbmem_size, 0);
  280. #endif
  281. at32_add_device_usba(0, NULL);
  282. #ifndef CONFIG_BOARD_ATSTK100X_SW3_CUSTOM
  283. at32_add_device_ssc(0, ATMEL_SSC_TX);
  284. #endif
  285. atstk1000_setup_j2_leds();
  286. atstk1002_setup_extdac();
  287. return 0;
  288. }
  289. postcore_initcall(atstk1002_init);