fimc-lite.c 43 KB

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  1. /*
  2. * Samsung EXYNOS FIMC-LITE (camera host interface) driver
  3. *
  4. * Copyright (C) 2012 Samsung Electronics Co., Ltd.
  5. * Sylwester Nawrocki <s.nawrocki@samsung.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. */
  11. #define pr_fmt(fmt) "%s:%d " fmt, __func__, __LINE__
  12. #include <linux/bug.h>
  13. #include <linux/device.h>
  14. #include <linux/errno.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/kernel.h>
  17. #include <linux/list.h>
  18. #include <linux/module.h>
  19. #include <linux/of.h>
  20. #include <linux/types.h>
  21. #include <linux/platform_device.h>
  22. #include <linux/pm_runtime.h>
  23. #include <linux/slab.h>
  24. #include <linux/videodev2.h>
  25. #include <media/v4l2-device.h>
  26. #include <media/v4l2-ioctl.h>
  27. #include <media/v4l2-mem2mem.h>
  28. #include <media/videobuf2-core.h>
  29. #include <media/videobuf2-dma-contig.h>
  30. #include <media/s5p_fimc.h>
  31. #include "media-dev.h"
  32. #include "fimc-lite.h"
  33. #include "fimc-lite-reg.h"
  34. static int debug;
  35. module_param(debug, int, 0644);
  36. static const struct fimc_fmt fimc_lite_formats[] = {
  37. {
  38. .name = "YUV 4:2:2 packed, YCbYCr",
  39. .fourcc = V4L2_PIX_FMT_YUYV,
  40. .depth = { 16 },
  41. .color = FIMC_FMT_YCBYCR422,
  42. .memplanes = 1,
  43. .mbus_code = V4L2_MBUS_FMT_YUYV8_2X8,
  44. .flags = FMT_FLAGS_YUV,
  45. }, {
  46. .name = "YUV 4:2:2 packed, CbYCrY",
  47. .fourcc = V4L2_PIX_FMT_UYVY,
  48. .depth = { 16 },
  49. .color = FIMC_FMT_CBYCRY422,
  50. .memplanes = 1,
  51. .mbus_code = V4L2_MBUS_FMT_UYVY8_2X8,
  52. .flags = FMT_FLAGS_YUV,
  53. }, {
  54. .name = "YUV 4:2:2 packed, CrYCbY",
  55. .fourcc = V4L2_PIX_FMT_VYUY,
  56. .depth = { 16 },
  57. .color = FIMC_FMT_CRYCBY422,
  58. .memplanes = 1,
  59. .mbus_code = V4L2_MBUS_FMT_VYUY8_2X8,
  60. .flags = FMT_FLAGS_YUV,
  61. }, {
  62. .name = "YUV 4:2:2 packed, YCrYCb",
  63. .fourcc = V4L2_PIX_FMT_YVYU,
  64. .depth = { 16 },
  65. .color = FIMC_FMT_YCRYCB422,
  66. .memplanes = 1,
  67. .mbus_code = V4L2_MBUS_FMT_YVYU8_2X8,
  68. .flags = FMT_FLAGS_YUV,
  69. }, {
  70. .name = "RAW8 (GRBG)",
  71. .fourcc = V4L2_PIX_FMT_SGRBG8,
  72. .depth = { 8 },
  73. .color = FIMC_FMT_RAW8,
  74. .memplanes = 1,
  75. .mbus_code = V4L2_MBUS_FMT_SGRBG8_1X8,
  76. .flags = FMT_FLAGS_RAW_BAYER,
  77. }, {
  78. .name = "RAW10 (GRBG)",
  79. .fourcc = V4L2_PIX_FMT_SGRBG10,
  80. .depth = { 10 },
  81. .color = FIMC_FMT_RAW10,
  82. .memplanes = 1,
  83. .mbus_code = V4L2_MBUS_FMT_SGRBG10_1X10,
  84. .flags = FMT_FLAGS_RAW_BAYER,
  85. }, {
  86. .name = "RAW12 (GRBG)",
  87. .fourcc = V4L2_PIX_FMT_SGRBG12,
  88. .depth = { 12 },
  89. .color = FIMC_FMT_RAW12,
  90. .memplanes = 1,
  91. .mbus_code = V4L2_MBUS_FMT_SGRBG12_1X12,
  92. .flags = FMT_FLAGS_RAW_BAYER,
  93. },
  94. };
  95. /**
  96. * fimc_lite_find_format - lookup fimc color format by fourcc or media bus code
  97. * @pixelformat: fourcc to match, ignored if null
  98. * @mbus_code: media bus code to match, ignored if null
  99. * @mask: the color format flags to match
  100. * @index: index to the fimc_lite_formats array, ignored if negative
  101. */
  102. static const struct fimc_fmt *fimc_lite_find_format(const u32 *pixelformat,
  103. const u32 *mbus_code, unsigned int mask, int index)
  104. {
  105. const struct fimc_fmt *fmt, *def_fmt = NULL;
  106. unsigned int i;
  107. int id = 0;
  108. if (index >= (int)ARRAY_SIZE(fimc_lite_formats))
  109. return NULL;
  110. for (i = 0; i < ARRAY_SIZE(fimc_lite_formats); ++i) {
  111. fmt = &fimc_lite_formats[i];
  112. if (mask && !(fmt->flags & mask))
  113. continue;
  114. if (pixelformat && fmt->fourcc == *pixelformat)
  115. return fmt;
  116. if (mbus_code && fmt->mbus_code == *mbus_code)
  117. return fmt;
  118. if (index == id)
  119. def_fmt = fmt;
  120. id++;
  121. }
  122. return def_fmt;
  123. }
  124. static int fimc_lite_hw_init(struct fimc_lite *fimc, bool isp_output)
  125. {
  126. struct fimc_pipeline *pipeline = &fimc->pipeline;
  127. struct v4l2_subdev *sensor;
  128. struct fimc_sensor_info *si;
  129. unsigned long flags;
  130. sensor = isp_output ? fimc->sensor : pipeline->subdevs[IDX_SENSOR];
  131. if (sensor == NULL)
  132. return -ENXIO;
  133. if (fimc->inp_frame.fmt == NULL || fimc->out_frame.fmt == NULL)
  134. return -EINVAL;
  135. /* Get sensor configuration data from the sensor subdev */
  136. si = v4l2_get_subdev_hostdata(sensor);
  137. spin_lock_irqsave(&fimc->slock, flags);
  138. flite_hw_set_camera_bus(fimc, &si->pdata);
  139. flite_hw_set_source_format(fimc, &fimc->inp_frame);
  140. flite_hw_set_window_offset(fimc, &fimc->inp_frame);
  141. flite_hw_set_output_dma(fimc, &fimc->out_frame, !isp_output);
  142. flite_hw_set_interrupt_mask(fimc);
  143. flite_hw_set_test_pattern(fimc, fimc->test_pattern->val);
  144. if (debug > 0)
  145. flite_hw_dump_regs(fimc, __func__);
  146. spin_unlock_irqrestore(&fimc->slock, flags);
  147. return 0;
  148. }
  149. /*
  150. * Reinitialize the driver so it is ready to start the streaming again.
  151. * Set fimc->state to indicate stream off and the hardware shut down state.
  152. * If not suspending (@suspend is false), return any buffers to videobuf2.
  153. * Otherwise put any owned buffers onto the pending buffers queue, so they
  154. * can be re-spun when the device is being resumed. Also perform FIMC
  155. * software reset and disable streaming on the whole pipeline if required.
  156. */
  157. static int fimc_lite_reinit(struct fimc_lite *fimc, bool suspend)
  158. {
  159. struct flite_buffer *buf;
  160. unsigned long flags;
  161. bool streaming;
  162. spin_lock_irqsave(&fimc->slock, flags);
  163. streaming = fimc->state & (1 << ST_SENSOR_STREAM);
  164. fimc->state &= ~(1 << ST_FLITE_RUN | 1 << ST_FLITE_OFF |
  165. 1 << ST_FLITE_STREAM | 1 << ST_SENSOR_STREAM);
  166. if (suspend)
  167. fimc->state |= (1 << ST_FLITE_SUSPENDED);
  168. else
  169. fimc->state &= ~(1 << ST_FLITE_PENDING |
  170. 1 << ST_FLITE_SUSPENDED);
  171. /* Release unused buffers */
  172. while (!suspend && !list_empty(&fimc->pending_buf_q)) {
  173. buf = fimc_lite_pending_queue_pop(fimc);
  174. vb2_buffer_done(&buf->vb, VB2_BUF_STATE_ERROR);
  175. }
  176. /* If suspending put unused buffers onto pending queue */
  177. while (!list_empty(&fimc->active_buf_q)) {
  178. buf = fimc_lite_active_queue_pop(fimc);
  179. if (suspend)
  180. fimc_lite_pending_queue_add(fimc, buf);
  181. else
  182. vb2_buffer_done(&buf->vb, VB2_BUF_STATE_ERROR);
  183. }
  184. spin_unlock_irqrestore(&fimc->slock, flags);
  185. flite_hw_reset(fimc);
  186. if (!streaming)
  187. return 0;
  188. return fimc_pipeline_call(fimc, set_stream, &fimc->pipeline, 0);
  189. }
  190. static int fimc_lite_stop_capture(struct fimc_lite *fimc, bool suspend)
  191. {
  192. unsigned long flags;
  193. if (!fimc_lite_active(fimc))
  194. return 0;
  195. spin_lock_irqsave(&fimc->slock, flags);
  196. set_bit(ST_FLITE_OFF, &fimc->state);
  197. flite_hw_capture_stop(fimc);
  198. spin_unlock_irqrestore(&fimc->slock, flags);
  199. wait_event_timeout(fimc->irq_queue,
  200. !test_bit(ST_FLITE_OFF, &fimc->state),
  201. (2*HZ/10)); /* 200 ms */
  202. return fimc_lite_reinit(fimc, suspend);
  203. }
  204. /* Must be called with fimc.slock spinlock held. */
  205. static void fimc_lite_config_update(struct fimc_lite *fimc)
  206. {
  207. flite_hw_set_window_offset(fimc, &fimc->inp_frame);
  208. flite_hw_set_dma_window(fimc, &fimc->out_frame);
  209. flite_hw_set_test_pattern(fimc, fimc->test_pattern->val);
  210. clear_bit(ST_FLITE_CONFIG, &fimc->state);
  211. }
  212. static irqreturn_t flite_irq_handler(int irq, void *priv)
  213. {
  214. struct fimc_lite *fimc = priv;
  215. struct flite_buffer *vbuf;
  216. unsigned long flags;
  217. struct timeval *tv;
  218. struct timespec ts;
  219. u32 intsrc;
  220. spin_lock_irqsave(&fimc->slock, flags);
  221. intsrc = flite_hw_get_interrupt_source(fimc);
  222. flite_hw_clear_pending_irq(fimc);
  223. if (test_and_clear_bit(ST_FLITE_OFF, &fimc->state)) {
  224. wake_up(&fimc->irq_queue);
  225. goto done;
  226. }
  227. if (intsrc & FLITE_REG_CISTATUS_IRQ_SRC_OVERFLOW) {
  228. clear_bit(ST_FLITE_RUN, &fimc->state);
  229. fimc->events.data_overflow++;
  230. }
  231. if (intsrc & FLITE_REG_CISTATUS_IRQ_SRC_LASTCAPEND) {
  232. flite_hw_clear_last_capture_end(fimc);
  233. clear_bit(ST_FLITE_STREAM, &fimc->state);
  234. wake_up(&fimc->irq_queue);
  235. }
  236. if (atomic_read(&fimc->out_path) != FIMC_IO_DMA)
  237. goto done;
  238. if ((intsrc & FLITE_REG_CISTATUS_IRQ_SRC_FRMSTART) &&
  239. test_bit(ST_FLITE_RUN, &fimc->state) &&
  240. !list_empty(&fimc->active_buf_q) &&
  241. !list_empty(&fimc->pending_buf_q)) {
  242. vbuf = fimc_lite_active_queue_pop(fimc);
  243. ktime_get_ts(&ts);
  244. tv = &vbuf->vb.v4l2_buf.timestamp;
  245. tv->tv_sec = ts.tv_sec;
  246. tv->tv_usec = ts.tv_nsec / NSEC_PER_USEC;
  247. vbuf->vb.v4l2_buf.sequence = fimc->frame_count++;
  248. vb2_buffer_done(&vbuf->vb, VB2_BUF_STATE_DONE);
  249. vbuf = fimc_lite_pending_queue_pop(fimc);
  250. flite_hw_set_output_addr(fimc, vbuf->paddr);
  251. fimc_lite_active_queue_add(fimc, vbuf);
  252. }
  253. if (test_bit(ST_FLITE_CONFIG, &fimc->state))
  254. fimc_lite_config_update(fimc);
  255. if (list_empty(&fimc->pending_buf_q)) {
  256. flite_hw_capture_stop(fimc);
  257. clear_bit(ST_FLITE_STREAM, &fimc->state);
  258. }
  259. done:
  260. set_bit(ST_FLITE_RUN, &fimc->state);
  261. spin_unlock_irqrestore(&fimc->slock, flags);
  262. return IRQ_HANDLED;
  263. }
  264. static int start_streaming(struct vb2_queue *q, unsigned int count)
  265. {
  266. struct fimc_lite *fimc = q->drv_priv;
  267. int ret;
  268. fimc->frame_count = 0;
  269. ret = fimc_lite_hw_init(fimc, false);
  270. if (ret) {
  271. fimc_lite_reinit(fimc, false);
  272. return ret;
  273. }
  274. set_bit(ST_FLITE_PENDING, &fimc->state);
  275. if (!list_empty(&fimc->active_buf_q) &&
  276. !test_and_set_bit(ST_FLITE_STREAM, &fimc->state)) {
  277. flite_hw_capture_start(fimc);
  278. if (!test_and_set_bit(ST_SENSOR_STREAM, &fimc->state))
  279. fimc_pipeline_call(fimc, set_stream,
  280. &fimc->pipeline, 1);
  281. }
  282. if (debug > 0)
  283. flite_hw_dump_regs(fimc, __func__);
  284. return 0;
  285. }
  286. static int stop_streaming(struct vb2_queue *q)
  287. {
  288. struct fimc_lite *fimc = q->drv_priv;
  289. if (!fimc_lite_active(fimc))
  290. return -EINVAL;
  291. return fimc_lite_stop_capture(fimc, false);
  292. }
  293. static int queue_setup(struct vb2_queue *vq, const struct v4l2_format *pfmt,
  294. unsigned int *num_buffers, unsigned int *num_planes,
  295. unsigned int sizes[], void *allocators[])
  296. {
  297. const struct v4l2_pix_format_mplane *pixm = NULL;
  298. struct fimc_lite *fimc = vq->drv_priv;
  299. struct flite_frame *frame = &fimc->out_frame;
  300. const struct fimc_fmt *fmt = frame->fmt;
  301. unsigned long wh;
  302. int i;
  303. if (pfmt) {
  304. pixm = &pfmt->fmt.pix_mp;
  305. fmt = fimc_lite_find_format(&pixm->pixelformat, NULL, 0, -1);
  306. wh = pixm->width * pixm->height;
  307. } else {
  308. wh = frame->f_width * frame->f_height;
  309. }
  310. if (fmt == NULL)
  311. return -EINVAL;
  312. *num_planes = fmt->memplanes;
  313. for (i = 0; i < fmt->memplanes; i++) {
  314. unsigned int size = (wh * fmt->depth[i]) / 8;
  315. if (pixm)
  316. sizes[i] = max(size, pixm->plane_fmt[i].sizeimage);
  317. else
  318. sizes[i] = size;
  319. allocators[i] = fimc->alloc_ctx;
  320. }
  321. return 0;
  322. }
  323. static int buffer_prepare(struct vb2_buffer *vb)
  324. {
  325. struct vb2_queue *vq = vb->vb2_queue;
  326. struct fimc_lite *fimc = vq->drv_priv;
  327. int i;
  328. if (fimc->out_frame.fmt == NULL)
  329. return -EINVAL;
  330. for (i = 0; i < fimc->out_frame.fmt->memplanes; i++) {
  331. unsigned long size = fimc->payload[i];
  332. if (vb2_plane_size(vb, i) < size) {
  333. v4l2_err(&fimc->vfd,
  334. "User buffer too small (%ld < %ld)\n",
  335. vb2_plane_size(vb, i), size);
  336. return -EINVAL;
  337. }
  338. vb2_set_plane_payload(vb, i, size);
  339. }
  340. return 0;
  341. }
  342. static void buffer_queue(struct vb2_buffer *vb)
  343. {
  344. struct flite_buffer *buf
  345. = container_of(vb, struct flite_buffer, vb);
  346. struct fimc_lite *fimc = vb2_get_drv_priv(vb->vb2_queue);
  347. unsigned long flags;
  348. spin_lock_irqsave(&fimc->slock, flags);
  349. buf->paddr = vb2_dma_contig_plane_dma_addr(vb, 0);
  350. if (!test_bit(ST_FLITE_SUSPENDED, &fimc->state) &&
  351. !test_bit(ST_FLITE_STREAM, &fimc->state) &&
  352. list_empty(&fimc->active_buf_q)) {
  353. flite_hw_set_output_addr(fimc, buf->paddr);
  354. fimc_lite_active_queue_add(fimc, buf);
  355. } else {
  356. fimc_lite_pending_queue_add(fimc, buf);
  357. }
  358. if (vb2_is_streaming(&fimc->vb_queue) &&
  359. !list_empty(&fimc->pending_buf_q) &&
  360. !test_and_set_bit(ST_FLITE_STREAM, &fimc->state)) {
  361. flite_hw_capture_start(fimc);
  362. spin_unlock_irqrestore(&fimc->slock, flags);
  363. if (!test_and_set_bit(ST_SENSOR_STREAM, &fimc->state))
  364. fimc_pipeline_call(fimc, set_stream,
  365. &fimc->pipeline, 1);
  366. return;
  367. }
  368. spin_unlock_irqrestore(&fimc->slock, flags);
  369. }
  370. static const struct vb2_ops fimc_lite_qops = {
  371. .queue_setup = queue_setup,
  372. .buf_prepare = buffer_prepare,
  373. .buf_queue = buffer_queue,
  374. .wait_prepare = vb2_ops_wait_prepare,
  375. .wait_finish = vb2_ops_wait_finish,
  376. .start_streaming = start_streaming,
  377. .stop_streaming = stop_streaming,
  378. };
  379. static void fimc_lite_clear_event_counters(struct fimc_lite *fimc)
  380. {
  381. unsigned long flags;
  382. spin_lock_irqsave(&fimc->slock, flags);
  383. memset(&fimc->events, 0, sizeof(fimc->events));
  384. spin_unlock_irqrestore(&fimc->slock, flags);
  385. }
  386. static int fimc_lite_open(struct file *file)
  387. {
  388. struct fimc_lite *fimc = video_drvdata(file);
  389. struct media_entity *me = &fimc->vfd.entity;
  390. int ret;
  391. mutex_lock(&me->parent->graph_mutex);
  392. mutex_lock(&fimc->lock);
  393. if (atomic_read(&fimc->out_path) != FIMC_IO_DMA) {
  394. ret = -EBUSY;
  395. goto unlock;
  396. }
  397. set_bit(ST_FLITE_IN_USE, &fimc->state);
  398. ret = pm_runtime_get_sync(&fimc->pdev->dev);
  399. if (ret < 0)
  400. goto unlock;
  401. ret = v4l2_fh_open(file);
  402. if (ret < 0)
  403. goto err_pm;
  404. if (!v4l2_fh_is_singular_file(file) ||
  405. atomic_read(&fimc->out_path) != FIMC_IO_DMA)
  406. goto unlock;
  407. ret = fimc_pipeline_call(fimc, open, &fimc->pipeline,
  408. me, true);
  409. if (!ret) {
  410. fimc_lite_clear_event_counters(fimc);
  411. fimc->ref_count++;
  412. goto unlock;
  413. }
  414. v4l2_fh_release(file);
  415. err_pm:
  416. pm_runtime_put_sync(&fimc->pdev->dev);
  417. clear_bit(ST_FLITE_IN_USE, &fimc->state);
  418. unlock:
  419. mutex_unlock(&fimc->lock);
  420. mutex_unlock(&me->parent->graph_mutex);
  421. return ret;
  422. }
  423. static int fimc_lite_release(struct file *file)
  424. {
  425. struct fimc_lite *fimc = video_drvdata(file);
  426. mutex_lock(&fimc->lock);
  427. if (v4l2_fh_is_singular_file(file) &&
  428. atomic_read(&fimc->out_path) == FIMC_IO_DMA) {
  429. if (fimc->streaming) {
  430. media_entity_pipeline_stop(&fimc->vfd.entity);
  431. fimc->streaming = false;
  432. }
  433. clear_bit(ST_FLITE_IN_USE, &fimc->state);
  434. fimc_lite_stop_capture(fimc, false);
  435. fimc_pipeline_call(fimc, close, &fimc->pipeline);
  436. fimc->ref_count--;
  437. }
  438. vb2_fop_release(file);
  439. pm_runtime_put(&fimc->pdev->dev);
  440. clear_bit(ST_FLITE_SUSPENDED, &fimc->state);
  441. mutex_unlock(&fimc->lock);
  442. return 0;
  443. }
  444. static const struct v4l2_file_operations fimc_lite_fops = {
  445. .owner = THIS_MODULE,
  446. .open = fimc_lite_open,
  447. .release = fimc_lite_release,
  448. .poll = vb2_fop_poll,
  449. .unlocked_ioctl = video_ioctl2,
  450. .mmap = vb2_fop_mmap,
  451. };
  452. /*
  453. * Format and crop negotiation helpers
  454. */
  455. static const struct fimc_fmt *fimc_lite_try_format(struct fimc_lite *fimc,
  456. u32 *width, u32 *height,
  457. u32 *code, u32 *fourcc, int pad)
  458. {
  459. struct flite_drvdata *dd = fimc->dd;
  460. const struct fimc_fmt *fmt;
  461. unsigned int flags = 0;
  462. if (pad == FLITE_SD_PAD_SINK) {
  463. v4l_bound_align_image(width, 8, dd->max_width,
  464. ffs(dd->out_width_align) - 1,
  465. height, 0, dd->max_height, 0, 0);
  466. } else {
  467. v4l_bound_align_image(width, 8, fimc->inp_frame.rect.width,
  468. ffs(dd->out_width_align) - 1,
  469. height, 0, fimc->inp_frame.rect.height,
  470. 0, 0);
  471. flags = fimc->inp_frame.fmt->flags;
  472. }
  473. fmt = fimc_lite_find_format(fourcc, code, flags, 0);
  474. if (WARN_ON(!fmt))
  475. return NULL;
  476. if (code)
  477. *code = fmt->mbus_code;
  478. if (fourcc)
  479. *fourcc = fmt->fourcc;
  480. v4l2_dbg(1, debug, &fimc->subdev, "code: 0x%x, %dx%d\n",
  481. code ? *code : 0, *width, *height);
  482. return fmt;
  483. }
  484. static void fimc_lite_try_crop(struct fimc_lite *fimc, struct v4l2_rect *r)
  485. {
  486. struct flite_frame *frame = &fimc->inp_frame;
  487. v4l_bound_align_image(&r->width, 0, frame->f_width, 0,
  488. &r->height, 0, frame->f_height, 0, 0);
  489. /* Adjust left/top if cropping rectangle got out of bounds */
  490. r->left = clamp_t(u32, r->left, 0, frame->f_width - r->width);
  491. r->left = round_down(r->left, fimc->dd->win_hor_offs_align);
  492. r->top = clamp_t(u32, r->top, 0, frame->f_height - r->height);
  493. v4l2_dbg(1, debug, &fimc->subdev, "(%d,%d)/%dx%d, sink fmt: %dx%d\n",
  494. r->left, r->top, r->width, r->height,
  495. frame->f_width, frame->f_height);
  496. }
  497. static void fimc_lite_try_compose(struct fimc_lite *fimc, struct v4l2_rect *r)
  498. {
  499. struct flite_frame *frame = &fimc->out_frame;
  500. struct v4l2_rect *crop_rect = &fimc->inp_frame.rect;
  501. /* Scaling is not supported so we enforce compose rectangle size
  502. same as size of the sink crop rectangle. */
  503. r->width = crop_rect->width;
  504. r->height = crop_rect->height;
  505. /* Adjust left/top if the composing rectangle got out of bounds */
  506. r->left = clamp_t(u32, r->left, 0, frame->f_width - r->width);
  507. r->left = round_down(r->left, fimc->dd->out_hor_offs_align);
  508. r->top = clamp_t(u32, r->top, 0, fimc->out_frame.f_height - r->height);
  509. v4l2_dbg(1, debug, &fimc->subdev, "(%d,%d)/%dx%d, source fmt: %dx%d\n",
  510. r->left, r->top, r->width, r->height,
  511. frame->f_width, frame->f_height);
  512. }
  513. /*
  514. * Video node ioctl operations
  515. */
  516. static int fimc_vidioc_querycap_capture(struct file *file, void *priv,
  517. struct v4l2_capability *cap)
  518. {
  519. strlcpy(cap->driver, FIMC_LITE_DRV_NAME, sizeof(cap->driver));
  520. cap->bus_info[0] = 0;
  521. cap->card[0] = 0;
  522. cap->capabilities = V4L2_CAP_STREAMING;
  523. return 0;
  524. }
  525. static int fimc_lite_enum_fmt_mplane(struct file *file, void *priv,
  526. struct v4l2_fmtdesc *f)
  527. {
  528. const struct fimc_fmt *fmt;
  529. if (f->index >= ARRAY_SIZE(fimc_lite_formats))
  530. return -EINVAL;
  531. fmt = &fimc_lite_formats[f->index];
  532. strlcpy(f->description, fmt->name, sizeof(f->description));
  533. f->pixelformat = fmt->fourcc;
  534. return 0;
  535. }
  536. static int fimc_lite_g_fmt_mplane(struct file *file, void *fh,
  537. struct v4l2_format *f)
  538. {
  539. struct fimc_lite *fimc = video_drvdata(file);
  540. struct v4l2_pix_format_mplane *pixm = &f->fmt.pix_mp;
  541. struct v4l2_plane_pix_format *plane_fmt = &pixm->plane_fmt[0];
  542. struct flite_frame *frame = &fimc->out_frame;
  543. const struct fimc_fmt *fmt = frame->fmt;
  544. plane_fmt->bytesperline = (frame->f_width * fmt->depth[0]) / 8;
  545. plane_fmt->sizeimage = plane_fmt->bytesperline * frame->f_height;
  546. pixm->num_planes = fmt->memplanes;
  547. pixm->pixelformat = fmt->fourcc;
  548. pixm->width = frame->f_width;
  549. pixm->height = frame->f_height;
  550. pixm->field = V4L2_FIELD_NONE;
  551. pixm->colorspace = V4L2_COLORSPACE_JPEG;
  552. return 0;
  553. }
  554. static int fimc_lite_try_fmt(struct fimc_lite *fimc,
  555. struct v4l2_pix_format_mplane *pixm,
  556. const struct fimc_fmt **ffmt)
  557. {
  558. u32 bpl = pixm->plane_fmt[0].bytesperline;
  559. struct flite_drvdata *dd = fimc->dd;
  560. const struct fimc_fmt *inp_fmt = fimc->inp_frame.fmt;
  561. const struct fimc_fmt *fmt;
  562. if (WARN_ON(inp_fmt == NULL))
  563. return -EINVAL;
  564. /*
  565. * We allow some flexibility only for YUV formats. In case of raw
  566. * raw Bayer the FIMC-LITE's output format must match its camera
  567. * interface input format.
  568. */
  569. if (inp_fmt->flags & FMT_FLAGS_YUV)
  570. fmt = fimc_lite_find_format(&pixm->pixelformat, NULL,
  571. inp_fmt->flags, 0);
  572. else
  573. fmt = inp_fmt;
  574. if (WARN_ON(fmt == NULL))
  575. return -EINVAL;
  576. if (ffmt)
  577. *ffmt = fmt;
  578. v4l_bound_align_image(&pixm->width, 8, dd->max_width,
  579. ffs(dd->out_width_align) - 1,
  580. &pixm->height, 0, dd->max_height, 0, 0);
  581. if ((bpl == 0 || ((bpl * 8) / fmt->depth[0]) < pixm->width))
  582. pixm->plane_fmt[0].bytesperline = (pixm->width *
  583. fmt->depth[0]) / 8;
  584. if (pixm->plane_fmt[0].sizeimage == 0)
  585. pixm->plane_fmt[0].sizeimage = (pixm->width * pixm->height *
  586. fmt->depth[0]) / 8;
  587. pixm->num_planes = fmt->memplanes;
  588. pixm->pixelformat = fmt->fourcc;
  589. pixm->colorspace = V4L2_COLORSPACE_JPEG;
  590. pixm->field = V4L2_FIELD_NONE;
  591. return 0;
  592. }
  593. static int fimc_lite_try_fmt_mplane(struct file *file, void *fh,
  594. struct v4l2_format *f)
  595. {
  596. struct fimc_lite *fimc = video_drvdata(file);
  597. return fimc_lite_try_fmt(fimc, &f->fmt.pix_mp, NULL);
  598. }
  599. static int fimc_lite_s_fmt_mplane(struct file *file, void *priv,
  600. struct v4l2_format *f)
  601. {
  602. struct v4l2_pix_format_mplane *pixm = &f->fmt.pix_mp;
  603. struct fimc_lite *fimc = video_drvdata(file);
  604. struct flite_frame *frame = &fimc->out_frame;
  605. const struct fimc_fmt *fmt = NULL;
  606. int ret;
  607. if (vb2_is_busy(&fimc->vb_queue))
  608. return -EBUSY;
  609. ret = fimc_lite_try_fmt(fimc, &f->fmt.pix_mp, &fmt);
  610. if (ret < 0)
  611. return ret;
  612. frame->fmt = fmt;
  613. fimc->payload[0] = max((pixm->width * pixm->height * fmt->depth[0]) / 8,
  614. pixm->plane_fmt[0].sizeimage);
  615. frame->f_width = pixm->width;
  616. frame->f_height = pixm->height;
  617. return 0;
  618. }
  619. static int fimc_pipeline_validate(struct fimc_lite *fimc)
  620. {
  621. struct v4l2_subdev *sd = &fimc->subdev;
  622. struct v4l2_subdev_format sink_fmt, src_fmt;
  623. struct media_pad *pad;
  624. int ret;
  625. while (1) {
  626. /* Retrieve format at the sink pad */
  627. pad = &sd->entity.pads[0];
  628. if (!(pad->flags & MEDIA_PAD_FL_SINK))
  629. break;
  630. /* Don't call FIMC subdev operation to avoid nested locking */
  631. if (sd == &fimc->subdev) {
  632. struct flite_frame *ff = &fimc->out_frame;
  633. sink_fmt.format.width = ff->f_width;
  634. sink_fmt.format.height = ff->f_height;
  635. sink_fmt.format.code = fimc->inp_frame.fmt->mbus_code;
  636. } else {
  637. sink_fmt.pad = pad->index;
  638. sink_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
  639. ret = v4l2_subdev_call(sd, pad, get_fmt, NULL,
  640. &sink_fmt);
  641. if (ret < 0 && ret != -ENOIOCTLCMD)
  642. return -EPIPE;
  643. }
  644. /* Retrieve format at the source pad */
  645. pad = media_entity_remote_source(pad);
  646. if (pad == NULL ||
  647. media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
  648. break;
  649. sd = media_entity_to_v4l2_subdev(pad->entity);
  650. src_fmt.pad = pad->index;
  651. src_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
  652. ret = v4l2_subdev_call(sd, pad, get_fmt, NULL, &src_fmt);
  653. if (ret < 0 && ret != -ENOIOCTLCMD)
  654. return -EPIPE;
  655. if (src_fmt.format.width != sink_fmt.format.width ||
  656. src_fmt.format.height != sink_fmt.format.height ||
  657. src_fmt.format.code != sink_fmt.format.code)
  658. return -EPIPE;
  659. }
  660. return 0;
  661. }
  662. static int fimc_lite_streamon(struct file *file, void *priv,
  663. enum v4l2_buf_type type)
  664. {
  665. struct fimc_lite *fimc = video_drvdata(file);
  666. struct media_entity *entity = &fimc->vfd.entity;
  667. struct fimc_pipeline *p = &fimc->pipeline;
  668. int ret;
  669. if (fimc_lite_active(fimc))
  670. return -EBUSY;
  671. ret = media_entity_pipeline_start(entity, p->m_pipeline);
  672. if (ret < 0)
  673. return ret;
  674. ret = fimc_pipeline_validate(fimc);
  675. if (ret < 0)
  676. goto err_p_stop;
  677. ret = vb2_ioctl_streamon(file, priv, type);
  678. if (!ret) {
  679. fimc->streaming = true;
  680. return ret;
  681. }
  682. err_p_stop:
  683. media_entity_pipeline_stop(entity);
  684. return 0;
  685. }
  686. static int fimc_lite_streamoff(struct file *file, void *priv,
  687. enum v4l2_buf_type type)
  688. {
  689. struct fimc_lite *fimc = video_drvdata(file);
  690. int ret;
  691. ret = vb2_ioctl_streamoff(file, priv, type);
  692. if (ret < 0)
  693. return ret;
  694. media_entity_pipeline_stop(&fimc->vfd.entity);
  695. fimc->streaming = false;
  696. return 0;
  697. }
  698. static int fimc_lite_reqbufs(struct file *file, void *priv,
  699. struct v4l2_requestbuffers *reqbufs)
  700. {
  701. struct fimc_lite *fimc = video_drvdata(file);
  702. int ret;
  703. reqbufs->count = max_t(u32, FLITE_REQ_BUFS_MIN, reqbufs->count);
  704. ret = vb2_ioctl_reqbufs(file, priv, reqbufs);
  705. if (!ret)
  706. fimc->reqbufs_count = reqbufs->count;
  707. return ret;
  708. }
  709. /* Return 1 if rectangle a is enclosed in rectangle b, or 0 otherwise. */
  710. static int enclosed_rectangle(struct v4l2_rect *a, struct v4l2_rect *b)
  711. {
  712. if (a->left < b->left || a->top < b->top)
  713. return 0;
  714. if (a->left + a->width > b->left + b->width)
  715. return 0;
  716. if (a->top + a->height > b->top + b->height)
  717. return 0;
  718. return 1;
  719. }
  720. static int fimc_lite_g_selection(struct file *file, void *fh,
  721. struct v4l2_selection *sel)
  722. {
  723. struct fimc_lite *fimc = video_drvdata(file);
  724. struct flite_frame *f = &fimc->out_frame;
  725. if (sel->type != V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE)
  726. return -EINVAL;
  727. switch (sel->target) {
  728. case V4L2_SEL_TGT_COMPOSE_BOUNDS:
  729. case V4L2_SEL_TGT_COMPOSE_DEFAULT:
  730. sel->r.left = 0;
  731. sel->r.top = 0;
  732. sel->r.width = f->f_width;
  733. sel->r.height = f->f_height;
  734. return 0;
  735. case V4L2_SEL_TGT_COMPOSE:
  736. sel->r = f->rect;
  737. return 0;
  738. }
  739. return -EINVAL;
  740. }
  741. static int fimc_lite_s_selection(struct file *file, void *fh,
  742. struct v4l2_selection *sel)
  743. {
  744. struct fimc_lite *fimc = video_drvdata(file);
  745. struct flite_frame *f = &fimc->out_frame;
  746. struct v4l2_rect rect = sel->r;
  747. unsigned long flags;
  748. if (sel->type != V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE ||
  749. sel->target != V4L2_SEL_TGT_COMPOSE)
  750. return -EINVAL;
  751. fimc_lite_try_compose(fimc, &rect);
  752. if ((sel->flags & V4L2_SEL_FLAG_LE) &&
  753. !enclosed_rectangle(&rect, &sel->r))
  754. return -ERANGE;
  755. if ((sel->flags & V4L2_SEL_FLAG_GE) &&
  756. !enclosed_rectangle(&sel->r, &rect))
  757. return -ERANGE;
  758. sel->r = rect;
  759. spin_lock_irqsave(&fimc->slock, flags);
  760. f->rect = rect;
  761. set_bit(ST_FLITE_CONFIG, &fimc->state);
  762. spin_unlock_irqrestore(&fimc->slock, flags);
  763. return 0;
  764. }
  765. static const struct v4l2_ioctl_ops fimc_lite_ioctl_ops = {
  766. .vidioc_querycap = fimc_vidioc_querycap_capture,
  767. .vidioc_enum_fmt_vid_cap_mplane = fimc_lite_enum_fmt_mplane,
  768. .vidioc_try_fmt_vid_cap_mplane = fimc_lite_try_fmt_mplane,
  769. .vidioc_s_fmt_vid_cap_mplane = fimc_lite_s_fmt_mplane,
  770. .vidioc_g_fmt_vid_cap_mplane = fimc_lite_g_fmt_mplane,
  771. .vidioc_g_selection = fimc_lite_g_selection,
  772. .vidioc_s_selection = fimc_lite_s_selection,
  773. .vidioc_reqbufs = fimc_lite_reqbufs,
  774. .vidioc_querybuf = vb2_ioctl_querybuf,
  775. .vidioc_prepare_buf = vb2_ioctl_prepare_buf,
  776. .vidioc_create_bufs = vb2_ioctl_create_bufs,
  777. .vidioc_qbuf = vb2_ioctl_qbuf,
  778. .vidioc_dqbuf = vb2_ioctl_dqbuf,
  779. .vidioc_streamon = fimc_lite_streamon,
  780. .vidioc_streamoff = fimc_lite_streamoff,
  781. };
  782. /* Called with the media graph mutex held */
  783. static struct v4l2_subdev *__find_remote_sensor(struct media_entity *me)
  784. {
  785. struct media_pad *pad = &me->pads[0];
  786. struct v4l2_subdev *sd;
  787. while (pad->flags & MEDIA_PAD_FL_SINK) {
  788. /* source pad */
  789. pad = media_entity_remote_source(pad);
  790. if (pad == NULL ||
  791. media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
  792. break;
  793. sd = media_entity_to_v4l2_subdev(pad->entity);
  794. if (sd->grp_id == GRP_ID_FIMC_IS_SENSOR)
  795. return sd;
  796. /* sink pad */
  797. pad = &sd->entity.pads[0];
  798. }
  799. return NULL;
  800. }
  801. /* Capture subdev media entity operations */
  802. static int fimc_lite_link_setup(struct media_entity *entity,
  803. const struct media_pad *local,
  804. const struct media_pad *remote, u32 flags)
  805. {
  806. struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity);
  807. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  808. unsigned int remote_ent_type = media_entity_type(remote->entity);
  809. int ret = 0;
  810. if (WARN_ON(fimc == NULL))
  811. return 0;
  812. v4l2_dbg(1, debug, sd, "%s: %s --> %s, flags: 0x%x. source_id: 0x%x\n",
  813. __func__, remote->entity->name, local->entity->name,
  814. flags, fimc->source_subdev_grp_id);
  815. mutex_lock(&fimc->lock);
  816. switch (local->index) {
  817. case FLITE_SD_PAD_SINK:
  818. if (remote_ent_type != MEDIA_ENT_T_V4L2_SUBDEV) {
  819. ret = -EINVAL;
  820. break;
  821. }
  822. if (flags & MEDIA_LNK_FL_ENABLED) {
  823. if (fimc->source_subdev_grp_id == 0)
  824. fimc->source_subdev_grp_id = sd->grp_id;
  825. else
  826. ret = -EBUSY;
  827. } else {
  828. fimc->source_subdev_grp_id = 0;
  829. fimc->sensor = NULL;
  830. }
  831. break;
  832. case FLITE_SD_PAD_SOURCE_DMA:
  833. if (!(flags & MEDIA_LNK_FL_ENABLED))
  834. atomic_set(&fimc->out_path, FIMC_IO_NONE);
  835. else if (remote_ent_type == MEDIA_ENT_T_DEVNODE)
  836. atomic_set(&fimc->out_path, FIMC_IO_DMA);
  837. else
  838. ret = -EINVAL;
  839. break;
  840. case FLITE_SD_PAD_SOURCE_ISP:
  841. if (!(flags & MEDIA_LNK_FL_ENABLED))
  842. atomic_set(&fimc->out_path, FIMC_IO_NONE);
  843. else if (remote_ent_type == MEDIA_ENT_T_V4L2_SUBDEV)
  844. atomic_set(&fimc->out_path, FIMC_IO_ISP);
  845. else
  846. ret = -EINVAL;
  847. break;
  848. default:
  849. v4l2_err(sd, "Invalid pad index\n");
  850. ret = -EINVAL;
  851. }
  852. mb();
  853. mutex_unlock(&fimc->lock);
  854. return ret;
  855. }
  856. static const struct media_entity_operations fimc_lite_subdev_media_ops = {
  857. .link_setup = fimc_lite_link_setup,
  858. };
  859. static int fimc_lite_subdev_enum_mbus_code(struct v4l2_subdev *sd,
  860. struct v4l2_subdev_fh *fh,
  861. struct v4l2_subdev_mbus_code_enum *code)
  862. {
  863. const struct fimc_fmt *fmt;
  864. fmt = fimc_lite_find_format(NULL, NULL, 0, code->index);
  865. if (!fmt)
  866. return -EINVAL;
  867. code->code = fmt->mbus_code;
  868. return 0;
  869. }
  870. static int fimc_lite_subdev_get_fmt(struct v4l2_subdev *sd,
  871. struct v4l2_subdev_fh *fh,
  872. struct v4l2_subdev_format *fmt)
  873. {
  874. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  875. struct v4l2_mbus_framefmt *mf = &fmt->format;
  876. struct flite_frame *f = &fimc->inp_frame;
  877. if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
  878. mf = v4l2_subdev_get_try_format(fh, fmt->pad);
  879. fmt->format = *mf;
  880. return 0;
  881. }
  882. mf->colorspace = V4L2_COLORSPACE_JPEG;
  883. mutex_lock(&fimc->lock);
  884. mf->code = f->fmt->mbus_code;
  885. if (fmt->pad == FLITE_SD_PAD_SINK) {
  886. /* full camera input frame size */
  887. mf->width = f->f_width;
  888. mf->height = f->f_height;
  889. } else {
  890. /* crop size */
  891. mf->width = f->rect.width;
  892. mf->height = f->rect.height;
  893. }
  894. mutex_unlock(&fimc->lock);
  895. return 0;
  896. }
  897. static int fimc_lite_subdev_set_fmt(struct v4l2_subdev *sd,
  898. struct v4l2_subdev_fh *fh,
  899. struct v4l2_subdev_format *fmt)
  900. {
  901. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  902. struct v4l2_mbus_framefmt *mf = &fmt->format;
  903. struct flite_frame *sink = &fimc->inp_frame;
  904. struct flite_frame *source = &fimc->out_frame;
  905. const struct fimc_fmt *ffmt;
  906. v4l2_dbg(1, debug, sd, "pad%d: code: 0x%x, %dx%d\n",
  907. fmt->pad, mf->code, mf->width, mf->height);
  908. mf->colorspace = V4L2_COLORSPACE_JPEG;
  909. mutex_lock(&fimc->lock);
  910. if ((atomic_read(&fimc->out_path) == FIMC_IO_ISP &&
  911. sd->entity.stream_count > 0) ||
  912. (atomic_read(&fimc->out_path) == FIMC_IO_DMA &&
  913. vb2_is_busy(&fimc->vb_queue))) {
  914. mutex_unlock(&fimc->lock);
  915. return -EBUSY;
  916. }
  917. ffmt = fimc_lite_try_format(fimc, &mf->width, &mf->height,
  918. &mf->code, NULL, fmt->pad);
  919. if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
  920. mf = v4l2_subdev_get_try_format(fh, fmt->pad);
  921. *mf = fmt->format;
  922. mutex_unlock(&fimc->lock);
  923. return 0;
  924. }
  925. if (fmt->pad == FLITE_SD_PAD_SINK) {
  926. sink->f_width = mf->width;
  927. sink->f_height = mf->height;
  928. sink->fmt = ffmt;
  929. /* Set sink crop rectangle */
  930. sink->rect.width = mf->width;
  931. sink->rect.height = mf->height;
  932. sink->rect.left = 0;
  933. sink->rect.top = 0;
  934. /* Reset source format and crop rectangle */
  935. source->rect = sink->rect;
  936. source->f_width = mf->width;
  937. source->f_height = mf->height;
  938. } else {
  939. /* Allow changing format only on sink pad */
  940. mf->code = sink->fmt->mbus_code;
  941. mf->width = sink->rect.width;
  942. mf->height = sink->rect.height;
  943. }
  944. mutex_unlock(&fimc->lock);
  945. return 0;
  946. }
  947. static int fimc_lite_subdev_get_selection(struct v4l2_subdev *sd,
  948. struct v4l2_subdev_fh *fh,
  949. struct v4l2_subdev_selection *sel)
  950. {
  951. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  952. struct flite_frame *f = &fimc->inp_frame;
  953. if ((sel->target != V4L2_SEL_TGT_CROP &&
  954. sel->target != V4L2_SEL_TGT_CROP_BOUNDS) ||
  955. sel->pad != FLITE_SD_PAD_SINK)
  956. return -EINVAL;
  957. if (sel->which == V4L2_SUBDEV_FORMAT_TRY) {
  958. sel->r = *v4l2_subdev_get_try_crop(fh, sel->pad);
  959. return 0;
  960. }
  961. mutex_lock(&fimc->lock);
  962. if (sel->target == V4L2_SEL_TGT_CROP) {
  963. sel->r = f->rect;
  964. } else {
  965. sel->r.left = 0;
  966. sel->r.top = 0;
  967. sel->r.width = f->f_width;
  968. sel->r.height = f->f_height;
  969. }
  970. mutex_unlock(&fimc->lock);
  971. v4l2_dbg(1, debug, sd, "%s: (%d,%d) %dx%d, f_w: %d, f_h: %d\n",
  972. __func__, f->rect.left, f->rect.top, f->rect.width,
  973. f->rect.height, f->f_width, f->f_height);
  974. return 0;
  975. }
  976. static int fimc_lite_subdev_set_selection(struct v4l2_subdev *sd,
  977. struct v4l2_subdev_fh *fh,
  978. struct v4l2_subdev_selection *sel)
  979. {
  980. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  981. struct flite_frame *f = &fimc->inp_frame;
  982. int ret = 0;
  983. if (sel->target != V4L2_SEL_TGT_CROP || sel->pad != FLITE_SD_PAD_SINK)
  984. return -EINVAL;
  985. mutex_lock(&fimc->lock);
  986. fimc_lite_try_crop(fimc, &sel->r);
  987. if (sel->which == V4L2_SUBDEV_FORMAT_TRY) {
  988. *v4l2_subdev_get_try_crop(fh, sel->pad) = sel->r;
  989. } else {
  990. unsigned long flags;
  991. spin_lock_irqsave(&fimc->slock, flags);
  992. f->rect = sel->r;
  993. /* Same crop rectangle on the source pad */
  994. fimc->out_frame.rect = sel->r;
  995. set_bit(ST_FLITE_CONFIG, &fimc->state);
  996. spin_unlock_irqrestore(&fimc->slock, flags);
  997. }
  998. mutex_unlock(&fimc->lock);
  999. v4l2_dbg(1, debug, sd, "%s: (%d,%d) %dx%d, f_w: %d, f_h: %d\n",
  1000. __func__, f->rect.left, f->rect.top, f->rect.width,
  1001. f->rect.height, f->f_width, f->f_height);
  1002. return ret;
  1003. }
  1004. static int fimc_lite_subdev_s_stream(struct v4l2_subdev *sd, int on)
  1005. {
  1006. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  1007. unsigned long flags;
  1008. int ret;
  1009. /*
  1010. * Find sensor subdev linked to FIMC-LITE directly or through
  1011. * MIPI-CSIS. This is required for configuration where FIMC-LITE
  1012. * is used as a subdev only and feeds data internally to FIMC-IS.
  1013. * The pipeline links are protected through entity.stream_count
  1014. * so there is no need to take the media graph mutex here.
  1015. */
  1016. fimc->sensor = __find_remote_sensor(&sd->entity);
  1017. if (atomic_read(&fimc->out_path) != FIMC_IO_ISP)
  1018. return -ENOIOCTLCMD;
  1019. mutex_lock(&fimc->lock);
  1020. if (on) {
  1021. flite_hw_reset(fimc);
  1022. ret = fimc_lite_hw_init(fimc, true);
  1023. if (!ret) {
  1024. spin_lock_irqsave(&fimc->slock, flags);
  1025. flite_hw_capture_start(fimc);
  1026. spin_unlock_irqrestore(&fimc->slock, flags);
  1027. }
  1028. } else {
  1029. set_bit(ST_FLITE_OFF, &fimc->state);
  1030. spin_lock_irqsave(&fimc->slock, flags);
  1031. flite_hw_capture_stop(fimc);
  1032. spin_unlock_irqrestore(&fimc->slock, flags);
  1033. ret = wait_event_timeout(fimc->irq_queue,
  1034. !test_bit(ST_FLITE_OFF, &fimc->state),
  1035. msecs_to_jiffies(200));
  1036. if (ret == 0)
  1037. v4l2_err(sd, "s_stream(0) timeout\n");
  1038. clear_bit(ST_FLITE_RUN, &fimc->state);
  1039. }
  1040. mutex_unlock(&fimc->lock);
  1041. return ret;
  1042. }
  1043. static int fimc_lite_log_status(struct v4l2_subdev *sd)
  1044. {
  1045. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  1046. flite_hw_dump_regs(fimc, __func__);
  1047. return 0;
  1048. }
  1049. static int fimc_lite_subdev_registered(struct v4l2_subdev *sd)
  1050. {
  1051. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  1052. struct vb2_queue *q = &fimc->vb_queue;
  1053. struct video_device *vfd = &fimc->vfd;
  1054. int ret;
  1055. memset(vfd, 0, sizeof(*vfd));
  1056. fimc->inp_frame.fmt = &fimc_lite_formats[0];
  1057. fimc->out_frame.fmt = &fimc_lite_formats[0];
  1058. atomic_set(&fimc->out_path, FIMC_IO_DMA);
  1059. snprintf(vfd->name, sizeof(vfd->name), "fimc-lite.%d.capture",
  1060. fimc->index);
  1061. vfd->fops = &fimc_lite_fops;
  1062. vfd->ioctl_ops = &fimc_lite_ioctl_ops;
  1063. vfd->v4l2_dev = sd->v4l2_dev;
  1064. vfd->minor = -1;
  1065. vfd->release = video_device_release_empty;
  1066. vfd->queue = q;
  1067. fimc->reqbufs_count = 0;
  1068. INIT_LIST_HEAD(&fimc->pending_buf_q);
  1069. INIT_LIST_HEAD(&fimc->active_buf_q);
  1070. memset(q, 0, sizeof(*q));
  1071. q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE;
  1072. q->io_modes = VB2_MMAP | VB2_USERPTR;
  1073. q->ops = &fimc_lite_qops;
  1074. q->mem_ops = &vb2_dma_contig_memops;
  1075. q->buf_struct_size = sizeof(struct flite_buffer);
  1076. q->drv_priv = fimc;
  1077. q->timestamp_type = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
  1078. q->lock = &fimc->lock;
  1079. ret = vb2_queue_init(q);
  1080. if (ret < 0)
  1081. return ret;
  1082. fimc->vd_pad.flags = MEDIA_PAD_FL_SINK;
  1083. ret = media_entity_init(&vfd->entity, 1, &fimc->vd_pad, 0);
  1084. if (ret < 0)
  1085. return ret;
  1086. video_set_drvdata(vfd, fimc);
  1087. fimc->pipeline_ops = v4l2_get_subdev_hostdata(sd);
  1088. ret = video_register_device(vfd, VFL_TYPE_GRABBER, -1);
  1089. if (ret < 0) {
  1090. media_entity_cleanup(&vfd->entity);
  1091. fimc->pipeline_ops = NULL;
  1092. return ret;
  1093. }
  1094. v4l2_info(sd->v4l2_dev, "Registered %s as /dev/%s\n",
  1095. vfd->name, video_device_node_name(vfd));
  1096. return 0;
  1097. }
  1098. static void fimc_lite_subdev_unregistered(struct v4l2_subdev *sd)
  1099. {
  1100. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  1101. if (fimc == NULL)
  1102. return;
  1103. if (video_is_registered(&fimc->vfd)) {
  1104. video_unregister_device(&fimc->vfd);
  1105. media_entity_cleanup(&fimc->vfd.entity);
  1106. fimc->pipeline_ops = NULL;
  1107. }
  1108. }
  1109. static const struct v4l2_subdev_internal_ops fimc_lite_subdev_internal_ops = {
  1110. .registered = fimc_lite_subdev_registered,
  1111. .unregistered = fimc_lite_subdev_unregistered,
  1112. };
  1113. static const struct v4l2_subdev_pad_ops fimc_lite_subdev_pad_ops = {
  1114. .enum_mbus_code = fimc_lite_subdev_enum_mbus_code,
  1115. .get_selection = fimc_lite_subdev_get_selection,
  1116. .set_selection = fimc_lite_subdev_set_selection,
  1117. .get_fmt = fimc_lite_subdev_get_fmt,
  1118. .set_fmt = fimc_lite_subdev_set_fmt,
  1119. };
  1120. static const struct v4l2_subdev_video_ops fimc_lite_subdev_video_ops = {
  1121. .s_stream = fimc_lite_subdev_s_stream,
  1122. };
  1123. static const struct v4l2_subdev_core_ops fimc_lite_core_ops = {
  1124. .log_status = fimc_lite_log_status,
  1125. };
  1126. static struct v4l2_subdev_ops fimc_lite_subdev_ops = {
  1127. .core = &fimc_lite_core_ops,
  1128. .video = &fimc_lite_subdev_video_ops,
  1129. .pad = &fimc_lite_subdev_pad_ops,
  1130. };
  1131. static int fimc_lite_s_ctrl(struct v4l2_ctrl *ctrl)
  1132. {
  1133. struct fimc_lite *fimc = container_of(ctrl->handler, struct fimc_lite,
  1134. ctrl_handler);
  1135. set_bit(ST_FLITE_CONFIG, &fimc->state);
  1136. return 0;
  1137. }
  1138. static const struct v4l2_ctrl_ops fimc_lite_ctrl_ops = {
  1139. .s_ctrl = fimc_lite_s_ctrl,
  1140. };
  1141. static const struct v4l2_ctrl_config fimc_lite_ctrl = {
  1142. .ops = &fimc_lite_ctrl_ops,
  1143. .id = V4L2_CTRL_CLASS_USER | 0x1001,
  1144. .type = V4L2_CTRL_TYPE_BOOLEAN,
  1145. .name = "Test Pattern 640x480",
  1146. .step = 1,
  1147. };
  1148. static int fimc_lite_create_capture_subdev(struct fimc_lite *fimc)
  1149. {
  1150. struct v4l2_ctrl_handler *handler = &fimc->ctrl_handler;
  1151. struct v4l2_subdev *sd = &fimc->subdev;
  1152. int ret;
  1153. v4l2_subdev_init(sd, &fimc_lite_subdev_ops);
  1154. sd->flags = V4L2_SUBDEV_FL_HAS_DEVNODE;
  1155. snprintf(sd->name, sizeof(sd->name), "FIMC-LITE.%d", fimc->index);
  1156. fimc->subdev_pads[FLITE_SD_PAD_SINK].flags = MEDIA_PAD_FL_SINK;
  1157. fimc->subdev_pads[FLITE_SD_PAD_SOURCE_DMA].flags = MEDIA_PAD_FL_SOURCE;
  1158. fimc->subdev_pads[FLITE_SD_PAD_SOURCE_ISP].flags = MEDIA_PAD_FL_SOURCE;
  1159. ret = media_entity_init(&sd->entity, FLITE_SD_PADS_NUM,
  1160. fimc->subdev_pads, 0);
  1161. if (ret)
  1162. return ret;
  1163. v4l2_ctrl_handler_init(handler, 1);
  1164. fimc->test_pattern = v4l2_ctrl_new_custom(handler, &fimc_lite_ctrl,
  1165. NULL);
  1166. if (handler->error) {
  1167. media_entity_cleanup(&sd->entity);
  1168. return handler->error;
  1169. }
  1170. sd->ctrl_handler = handler;
  1171. sd->internal_ops = &fimc_lite_subdev_internal_ops;
  1172. sd->entity.ops = &fimc_lite_subdev_media_ops;
  1173. v4l2_set_subdevdata(sd, fimc);
  1174. return 0;
  1175. }
  1176. static void fimc_lite_unregister_capture_subdev(struct fimc_lite *fimc)
  1177. {
  1178. struct v4l2_subdev *sd = &fimc->subdev;
  1179. v4l2_device_unregister_subdev(sd);
  1180. media_entity_cleanup(&sd->entity);
  1181. v4l2_ctrl_handler_free(&fimc->ctrl_handler);
  1182. v4l2_set_subdevdata(sd, NULL);
  1183. }
  1184. static void fimc_lite_clk_put(struct fimc_lite *fimc)
  1185. {
  1186. if (IS_ERR_OR_NULL(fimc->clock))
  1187. return;
  1188. clk_unprepare(fimc->clock);
  1189. clk_put(fimc->clock);
  1190. fimc->clock = NULL;
  1191. }
  1192. static int fimc_lite_clk_get(struct fimc_lite *fimc)
  1193. {
  1194. int ret;
  1195. fimc->clock = clk_get(&fimc->pdev->dev, FLITE_CLK_NAME);
  1196. if (IS_ERR(fimc->clock))
  1197. return PTR_ERR(fimc->clock);
  1198. ret = clk_prepare(fimc->clock);
  1199. if (ret < 0) {
  1200. clk_put(fimc->clock);
  1201. fimc->clock = NULL;
  1202. }
  1203. return ret;
  1204. }
  1205. static const struct of_device_id flite_of_match[];
  1206. static int fimc_lite_probe(struct platform_device *pdev)
  1207. {
  1208. struct flite_drvdata *drv_data = NULL;
  1209. struct device *dev = &pdev->dev;
  1210. const struct of_device_id *of_id;
  1211. struct fimc_lite *fimc;
  1212. struct resource *res;
  1213. int ret;
  1214. fimc = devm_kzalloc(dev, sizeof(*fimc), GFP_KERNEL);
  1215. if (!fimc)
  1216. return -ENOMEM;
  1217. if (dev->of_node) {
  1218. of_id = of_match_node(flite_of_match, dev->of_node);
  1219. if (of_id)
  1220. drv_data = (struct flite_drvdata *)of_id->data;
  1221. fimc->index = of_alias_get_id(dev->of_node, "fimc-lite");
  1222. } else {
  1223. drv_data = fimc_lite_get_drvdata(pdev);
  1224. fimc->index = pdev->id;
  1225. }
  1226. if (!drv_data || fimc->index < 0 || fimc->index >= FIMC_LITE_MAX_DEVS)
  1227. return -EINVAL;
  1228. fimc->dd = drv_data;
  1229. fimc->pdev = pdev;
  1230. init_waitqueue_head(&fimc->irq_queue);
  1231. spin_lock_init(&fimc->slock);
  1232. mutex_init(&fimc->lock);
  1233. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  1234. fimc->regs = devm_ioremap_resource(dev, res);
  1235. if (IS_ERR(fimc->regs))
  1236. return PTR_ERR(fimc->regs);
  1237. res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
  1238. if (res == NULL) {
  1239. dev_err(dev, "Failed to get IRQ resource\n");
  1240. return -ENXIO;
  1241. }
  1242. ret = fimc_lite_clk_get(fimc);
  1243. if (ret)
  1244. return ret;
  1245. ret = devm_request_irq(dev, res->start, flite_irq_handler,
  1246. 0, dev_name(dev), fimc);
  1247. if (ret) {
  1248. dev_err(dev, "Failed to install irq (%d)\n", ret);
  1249. goto err_clk;
  1250. }
  1251. /* The video node will be created within the subdev's registered() op */
  1252. ret = fimc_lite_create_capture_subdev(fimc);
  1253. if (ret)
  1254. goto err_clk;
  1255. platform_set_drvdata(pdev, fimc);
  1256. pm_runtime_enable(dev);
  1257. ret = pm_runtime_get_sync(dev);
  1258. if (ret < 0)
  1259. goto err_sd;
  1260. fimc->alloc_ctx = vb2_dma_contig_init_ctx(dev);
  1261. if (IS_ERR(fimc->alloc_ctx)) {
  1262. ret = PTR_ERR(fimc->alloc_ctx);
  1263. goto err_pm;
  1264. }
  1265. pm_runtime_put(dev);
  1266. dev_dbg(dev, "FIMC-LITE.%d registered successfully\n",
  1267. fimc->index);
  1268. return 0;
  1269. err_pm:
  1270. pm_runtime_put(dev);
  1271. err_sd:
  1272. fimc_lite_unregister_capture_subdev(fimc);
  1273. err_clk:
  1274. fimc_lite_clk_put(fimc);
  1275. return ret;
  1276. }
  1277. static int fimc_lite_runtime_resume(struct device *dev)
  1278. {
  1279. struct fimc_lite *fimc = dev_get_drvdata(dev);
  1280. clk_enable(fimc->clock);
  1281. return 0;
  1282. }
  1283. static int fimc_lite_runtime_suspend(struct device *dev)
  1284. {
  1285. struct fimc_lite *fimc = dev_get_drvdata(dev);
  1286. clk_disable(fimc->clock);
  1287. return 0;
  1288. }
  1289. #ifdef CONFIG_PM_SLEEP
  1290. static int fimc_lite_resume(struct device *dev)
  1291. {
  1292. struct fimc_lite *fimc = dev_get_drvdata(dev);
  1293. struct flite_buffer *buf;
  1294. unsigned long flags;
  1295. int i;
  1296. spin_lock_irqsave(&fimc->slock, flags);
  1297. if (!test_and_clear_bit(ST_LPM, &fimc->state) ||
  1298. !test_bit(ST_FLITE_IN_USE, &fimc->state)) {
  1299. spin_unlock_irqrestore(&fimc->slock, flags);
  1300. return 0;
  1301. }
  1302. flite_hw_reset(fimc);
  1303. spin_unlock_irqrestore(&fimc->slock, flags);
  1304. if (!test_and_clear_bit(ST_FLITE_SUSPENDED, &fimc->state))
  1305. return 0;
  1306. INIT_LIST_HEAD(&fimc->active_buf_q);
  1307. fimc_pipeline_call(fimc, open, &fimc->pipeline,
  1308. &fimc->vfd.entity, false);
  1309. fimc_lite_hw_init(fimc, atomic_read(&fimc->out_path) == FIMC_IO_ISP);
  1310. clear_bit(ST_FLITE_SUSPENDED, &fimc->state);
  1311. for (i = 0; i < fimc->reqbufs_count; i++) {
  1312. if (list_empty(&fimc->pending_buf_q))
  1313. break;
  1314. buf = fimc_lite_pending_queue_pop(fimc);
  1315. buffer_queue(&buf->vb);
  1316. }
  1317. return 0;
  1318. }
  1319. static int fimc_lite_suspend(struct device *dev)
  1320. {
  1321. struct fimc_lite *fimc = dev_get_drvdata(dev);
  1322. bool suspend = test_bit(ST_FLITE_IN_USE, &fimc->state);
  1323. int ret;
  1324. if (test_and_set_bit(ST_LPM, &fimc->state))
  1325. return 0;
  1326. ret = fimc_lite_stop_capture(fimc, suspend);
  1327. if (ret < 0 || !fimc_lite_active(fimc))
  1328. return ret;
  1329. return fimc_pipeline_call(fimc, close, &fimc->pipeline);
  1330. }
  1331. #endif /* CONFIG_PM_SLEEP */
  1332. static int fimc_lite_remove(struct platform_device *pdev)
  1333. {
  1334. struct fimc_lite *fimc = platform_get_drvdata(pdev);
  1335. struct device *dev = &pdev->dev;
  1336. pm_runtime_disable(dev);
  1337. pm_runtime_set_suspended(dev);
  1338. fimc_lite_unregister_capture_subdev(fimc);
  1339. vb2_dma_contig_cleanup_ctx(fimc->alloc_ctx);
  1340. fimc_lite_clk_put(fimc);
  1341. dev_info(dev, "Driver unloaded\n");
  1342. return 0;
  1343. }
  1344. static const struct dev_pm_ops fimc_lite_pm_ops = {
  1345. SET_SYSTEM_SLEEP_PM_OPS(fimc_lite_suspend, fimc_lite_resume)
  1346. SET_RUNTIME_PM_OPS(fimc_lite_runtime_suspend, fimc_lite_runtime_resume,
  1347. NULL)
  1348. };
  1349. /* EXYNOS4212, EXYNOS4412 */
  1350. static struct flite_drvdata fimc_lite_drvdata_exynos4 = {
  1351. .max_width = 8192,
  1352. .max_height = 8192,
  1353. .out_width_align = 8,
  1354. .win_hor_offs_align = 2,
  1355. .out_hor_offs_align = 8,
  1356. };
  1357. static struct platform_device_id fimc_lite_driver_ids[] = {
  1358. {
  1359. .name = "exynos-fimc-lite",
  1360. .driver_data = (unsigned long)&fimc_lite_drvdata_exynos4,
  1361. },
  1362. { /* sentinel */ },
  1363. };
  1364. MODULE_DEVICE_TABLE(platform, fimc_lite_driver_ids);
  1365. static const struct of_device_id flite_of_match[] = {
  1366. {
  1367. .compatible = "samsung,exynos4212-fimc-lite",
  1368. .data = &fimc_lite_drvdata_exynos4,
  1369. },
  1370. { /* sentinel */ },
  1371. };
  1372. MODULE_DEVICE_TABLE(of, flite_of_match);
  1373. static struct platform_driver fimc_lite_driver = {
  1374. .probe = fimc_lite_probe,
  1375. .remove = fimc_lite_remove,
  1376. .id_table = fimc_lite_driver_ids,
  1377. .driver = {
  1378. .of_match_table = flite_of_match,
  1379. .name = FIMC_LITE_DRV_NAME,
  1380. .owner = THIS_MODULE,
  1381. .pm = &fimc_lite_pm_ops,
  1382. }
  1383. };
  1384. module_platform_driver(fimc_lite_driver);
  1385. MODULE_LICENSE("GPL");
  1386. MODULE_ALIAS("platform:" FIMC_LITE_DRV_NAME);