en_netdev.c 62 KB

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  1. /*
  2. * Copyright (c) 2007 Mellanox Technologies. All rights reserved.
  3. *
  4. * This software is available to you under a choice of one of two
  5. * licenses. You may choose to be licensed under the terms of the GNU
  6. * General Public License (GPL) Version 2, available from the file
  7. * COPYING in the main directory of this source tree, or the
  8. * OpenIB.org BSD license below:
  9. *
  10. * Redistribution and use in source and binary forms, with or
  11. * without modification, are permitted provided that the following
  12. * conditions are met:
  13. *
  14. * - Redistributions of source code must retain the above
  15. * copyright notice, this list of conditions and the following
  16. * disclaimer.
  17. *
  18. * - Redistributions in binary form must reproduce the above
  19. * copyright notice, this list of conditions and the following
  20. * disclaimer in the documentation and/or other materials
  21. * provided with the distribution.
  22. *
  23. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30. * SOFTWARE.
  31. *
  32. */
  33. #include <linux/etherdevice.h>
  34. #include <linux/tcp.h>
  35. #include <linux/if_vlan.h>
  36. #include <linux/delay.h>
  37. #include <linux/slab.h>
  38. #include <linux/hash.h>
  39. #include <net/ip.h>
  40. #include <net/ll_poll.h>
  41. #include <linux/mlx4/driver.h>
  42. #include <linux/mlx4/device.h>
  43. #include <linux/mlx4/cmd.h>
  44. #include <linux/mlx4/cq.h>
  45. #include "mlx4_en.h"
  46. #include "en_port.h"
  47. int mlx4_en_setup_tc(struct net_device *dev, u8 up)
  48. {
  49. struct mlx4_en_priv *priv = netdev_priv(dev);
  50. int i;
  51. unsigned int offset = 0;
  52. if (up && up != MLX4_EN_NUM_UP)
  53. return -EINVAL;
  54. netdev_set_num_tc(dev, up);
  55. /* Partition Tx queues evenly amongst UP's */
  56. for (i = 0; i < up; i++) {
  57. netdev_set_tc_queue(dev, i, priv->num_tx_rings_p_up, offset);
  58. offset += priv->num_tx_rings_p_up;
  59. }
  60. return 0;
  61. }
  62. #ifdef CONFIG_NET_LL_RX_POLL
  63. /* must be called with local_bh_disable()d */
  64. static int mlx4_en_low_latency_recv(struct napi_struct *napi)
  65. {
  66. struct mlx4_en_cq *cq = container_of(napi, struct mlx4_en_cq, napi);
  67. struct net_device *dev = cq->dev;
  68. struct mlx4_en_priv *priv = netdev_priv(dev);
  69. struct mlx4_en_rx_ring *rx_ring = &priv->rx_ring[cq->ring];
  70. int done;
  71. if (!priv->port_up)
  72. return LL_FLUSH_FAILED;
  73. if (!mlx4_en_cq_lock_poll(cq))
  74. return LL_FLUSH_BUSY;
  75. done = mlx4_en_process_rx_cq(dev, cq, 4);
  76. mlx4_en_cq_unlock_poll(cq);
  77. return done;
  78. }
  79. #endif /* CONFIG_NET_LL_RX_POLL */
  80. #ifdef CONFIG_RFS_ACCEL
  81. struct mlx4_en_filter {
  82. struct list_head next;
  83. struct work_struct work;
  84. __be32 src_ip;
  85. __be32 dst_ip;
  86. __be16 src_port;
  87. __be16 dst_port;
  88. int rxq_index;
  89. struct mlx4_en_priv *priv;
  90. u32 flow_id; /* RFS infrastructure id */
  91. int id; /* mlx4_en driver id */
  92. u64 reg_id; /* Flow steering API id */
  93. u8 activated; /* Used to prevent expiry before filter
  94. * is attached
  95. */
  96. struct hlist_node filter_chain;
  97. };
  98. static void mlx4_en_filter_rfs_expire(struct mlx4_en_priv *priv);
  99. static void mlx4_en_filter_work(struct work_struct *work)
  100. {
  101. struct mlx4_en_filter *filter = container_of(work,
  102. struct mlx4_en_filter,
  103. work);
  104. struct mlx4_en_priv *priv = filter->priv;
  105. struct mlx4_spec_list spec_tcp = {
  106. .id = MLX4_NET_TRANS_RULE_ID_TCP,
  107. {
  108. .tcp_udp = {
  109. .dst_port = filter->dst_port,
  110. .dst_port_msk = (__force __be16)-1,
  111. .src_port = filter->src_port,
  112. .src_port_msk = (__force __be16)-1,
  113. },
  114. },
  115. };
  116. struct mlx4_spec_list spec_ip = {
  117. .id = MLX4_NET_TRANS_RULE_ID_IPV4,
  118. {
  119. .ipv4 = {
  120. .dst_ip = filter->dst_ip,
  121. .dst_ip_msk = (__force __be32)-1,
  122. .src_ip = filter->src_ip,
  123. .src_ip_msk = (__force __be32)-1,
  124. },
  125. },
  126. };
  127. struct mlx4_spec_list spec_eth = {
  128. .id = MLX4_NET_TRANS_RULE_ID_ETH,
  129. };
  130. struct mlx4_net_trans_rule rule = {
  131. .list = LIST_HEAD_INIT(rule.list),
  132. .queue_mode = MLX4_NET_TRANS_Q_LIFO,
  133. .exclusive = 1,
  134. .allow_loopback = 1,
  135. .promisc_mode = MLX4_FS_REGULAR,
  136. .port = priv->port,
  137. .priority = MLX4_DOMAIN_RFS,
  138. };
  139. int rc;
  140. __be64 mac_mask = cpu_to_be64(MLX4_MAC_MASK << 16);
  141. list_add_tail(&spec_eth.list, &rule.list);
  142. list_add_tail(&spec_ip.list, &rule.list);
  143. list_add_tail(&spec_tcp.list, &rule.list);
  144. rule.qpn = priv->rss_map.qps[filter->rxq_index].qpn;
  145. memcpy(spec_eth.eth.dst_mac, priv->dev->dev_addr, ETH_ALEN);
  146. memcpy(spec_eth.eth.dst_mac_msk, &mac_mask, ETH_ALEN);
  147. filter->activated = 0;
  148. if (filter->reg_id) {
  149. rc = mlx4_flow_detach(priv->mdev->dev, filter->reg_id);
  150. if (rc && rc != -ENOENT)
  151. en_err(priv, "Error detaching flow. rc = %d\n", rc);
  152. }
  153. rc = mlx4_flow_attach(priv->mdev->dev, &rule, &filter->reg_id);
  154. if (rc)
  155. en_err(priv, "Error attaching flow. err = %d\n", rc);
  156. mlx4_en_filter_rfs_expire(priv);
  157. filter->activated = 1;
  158. }
  159. static inline struct hlist_head *
  160. filter_hash_bucket(struct mlx4_en_priv *priv, __be32 src_ip, __be32 dst_ip,
  161. __be16 src_port, __be16 dst_port)
  162. {
  163. unsigned long l;
  164. int bucket_idx;
  165. l = (__force unsigned long)src_port |
  166. ((__force unsigned long)dst_port << 2);
  167. l ^= (__force unsigned long)(src_ip ^ dst_ip);
  168. bucket_idx = hash_long(l, MLX4_EN_FILTER_HASH_SHIFT);
  169. return &priv->filter_hash[bucket_idx];
  170. }
  171. static struct mlx4_en_filter *
  172. mlx4_en_filter_alloc(struct mlx4_en_priv *priv, int rxq_index, __be32 src_ip,
  173. __be32 dst_ip, __be16 src_port, __be16 dst_port,
  174. u32 flow_id)
  175. {
  176. struct mlx4_en_filter *filter = NULL;
  177. filter = kzalloc(sizeof(struct mlx4_en_filter), GFP_ATOMIC);
  178. if (!filter)
  179. return NULL;
  180. filter->priv = priv;
  181. filter->rxq_index = rxq_index;
  182. INIT_WORK(&filter->work, mlx4_en_filter_work);
  183. filter->src_ip = src_ip;
  184. filter->dst_ip = dst_ip;
  185. filter->src_port = src_port;
  186. filter->dst_port = dst_port;
  187. filter->flow_id = flow_id;
  188. filter->id = priv->last_filter_id++ % RPS_NO_FILTER;
  189. list_add_tail(&filter->next, &priv->filters);
  190. hlist_add_head(&filter->filter_chain,
  191. filter_hash_bucket(priv, src_ip, dst_ip, src_port,
  192. dst_port));
  193. return filter;
  194. }
  195. static void mlx4_en_filter_free(struct mlx4_en_filter *filter)
  196. {
  197. struct mlx4_en_priv *priv = filter->priv;
  198. int rc;
  199. list_del(&filter->next);
  200. rc = mlx4_flow_detach(priv->mdev->dev, filter->reg_id);
  201. if (rc && rc != -ENOENT)
  202. en_err(priv, "Error detaching flow. rc = %d\n", rc);
  203. kfree(filter);
  204. }
  205. static inline struct mlx4_en_filter *
  206. mlx4_en_filter_find(struct mlx4_en_priv *priv, __be32 src_ip, __be32 dst_ip,
  207. __be16 src_port, __be16 dst_port)
  208. {
  209. struct mlx4_en_filter *filter;
  210. struct mlx4_en_filter *ret = NULL;
  211. hlist_for_each_entry(filter,
  212. filter_hash_bucket(priv, src_ip, dst_ip,
  213. src_port, dst_port),
  214. filter_chain) {
  215. if (filter->src_ip == src_ip &&
  216. filter->dst_ip == dst_ip &&
  217. filter->src_port == src_port &&
  218. filter->dst_port == dst_port) {
  219. ret = filter;
  220. break;
  221. }
  222. }
  223. return ret;
  224. }
  225. static int
  226. mlx4_en_filter_rfs(struct net_device *net_dev, const struct sk_buff *skb,
  227. u16 rxq_index, u32 flow_id)
  228. {
  229. struct mlx4_en_priv *priv = netdev_priv(net_dev);
  230. struct mlx4_en_filter *filter;
  231. const struct iphdr *ip;
  232. const __be16 *ports;
  233. __be32 src_ip;
  234. __be32 dst_ip;
  235. __be16 src_port;
  236. __be16 dst_port;
  237. int nhoff = skb_network_offset(skb);
  238. int ret = 0;
  239. if (skb->protocol != htons(ETH_P_IP))
  240. return -EPROTONOSUPPORT;
  241. ip = (const struct iphdr *)(skb->data + nhoff);
  242. if (ip_is_fragment(ip))
  243. return -EPROTONOSUPPORT;
  244. ports = (const __be16 *)(skb->data + nhoff + 4 * ip->ihl);
  245. src_ip = ip->saddr;
  246. dst_ip = ip->daddr;
  247. src_port = ports[0];
  248. dst_port = ports[1];
  249. if (ip->protocol != IPPROTO_TCP)
  250. return -EPROTONOSUPPORT;
  251. spin_lock_bh(&priv->filters_lock);
  252. filter = mlx4_en_filter_find(priv, src_ip, dst_ip, src_port, dst_port);
  253. if (filter) {
  254. if (filter->rxq_index == rxq_index)
  255. goto out;
  256. filter->rxq_index = rxq_index;
  257. } else {
  258. filter = mlx4_en_filter_alloc(priv, rxq_index,
  259. src_ip, dst_ip,
  260. src_port, dst_port, flow_id);
  261. if (!filter) {
  262. ret = -ENOMEM;
  263. goto err;
  264. }
  265. }
  266. queue_work(priv->mdev->workqueue, &filter->work);
  267. out:
  268. ret = filter->id;
  269. err:
  270. spin_unlock_bh(&priv->filters_lock);
  271. return ret;
  272. }
  273. void mlx4_en_cleanup_filters(struct mlx4_en_priv *priv,
  274. struct mlx4_en_rx_ring *rx_ring)
  275. {
  276. struct mlx4_en_filter *filter, *tmp;
  277. LIST_HEAD(del_list);
  278. spin_lock_bh(&priv->filters_lock);
  279. list_for_each_entry_safe(filter, tmp, &priv->filters, next) {
  280. list_move(&filter->next, &del_list);
  281. hlist_del(&filter->filter_chain);
  282. }
  283. spin_unlock_bh(&priv->filters_lock);
  284. list_for_each_entry_safe(filter, tmp, &del_list, next) {
  285. cancel_work_sync(&filter->work);
  286. mlx4_en_filter_free(filter);
  287. }
  288. }
  289. static void mlx4_en_filter_rfs_expire(struct mlx4_en_priv *priv)
  290. {
  291. struct mlx4_en_filter *filter = NULL, *tmp, *last_filter = NULL;
  292. LIST_HEAD(del_list);
  293. int i = 0;
  294. spin_lock_bh(&priv->filters_lock);
  295. list_for_each_entry_safe(filter, tmp, &priv->filters, next) {
  296. if (i > MLX4_EN_FILTER_EXPIRY_QUOTA)
  297. break;
  298. if (filter->activated &&
  299. !work_pending(&filter->work) &&
  300. rps_may_expire_flow(priv->dev,
  301. filter->rxq_index, filter->flow_id,
  302. filter->id)) {
  303. list_move(&filter->next, &del_list);
  304. hlist_del(&filter->filter_chain);
  305. } else
  306. last_filter = filter;
  307. i++;
  308. }
  309. if (last_filter && (&last_filter->next != priv->filters.next))
  310. list_move(&priv->filters, &last_filter->next);
  311. spin_unlock_bh(&priv->filters_lock);
  312. list_for_each_entry_safe(filter, tmp, &del_list, next)
  313. mlx4_en_filter_free(filter);
  314. }
  315. #endif
  316. static int mlx4_en_vlan_rx_add_vid(struct net_device *dev,
  317. __be16 proto, u16 vid)
  318. {
  319. struct mlx4_en_priv *priv = netdev_priv(dev);
  320. struct mlx4_en_dev *mdev = priv->mdev;
  321. int err;
  322. int idx;
  323. en_dbg(HW, priv, "adding VLAN:%d\n", vid);
  324. set_bit(vid, priv->active_vlans);
  325. /* Add VID to port VLAN filter */
  326. mutex_lock(&mdev->state_lock);
  327. if (mdev->device_up && priv->port_up) {
  328. err = mlx4_SET_VLAN_FLTR(mdev->dev, priv);
  329. if (err)
  330. en_err(priv, "Failed configuring VLAN filter\n");
  331. }
  332. if (mlx4_register_vlan(mdev->dev, priv->port, vid, &idx))
  333. en_err(priv, "failed adding vlan %d\n", vid);
  334. mutex_unlock(&mdev->state_lock);
  335. return 0;
  336. }
  337. static int mlx4_en_vlan_rx_kill_vid(struct net_device *dev,
  338. __be16 proto, u16 vid)
  339. {
  340. struct mlx4_en_priv *priv = netdev_priv(dev);
  341. struct mlx4_en_dev *mdev = priv->mdev;
  342. int err;
  343. int idx;
  344. en_dbg(HW, priv, "Killing VID:%d\n", vid);
  345. clear_bit(vid, priv->active_vlans);
  346. /* Remove VID from port VLAN filter */
  347. mutex_lock(&mdev->state_lock);
  348. if (!mlx4_find_cached_vlan(mdev->dev, priv->port, vid, &idx))
  349. mlx4_unregister_vlan(mdev->dev, priv->port, idx);
  350. else
  351. en_err(priv, "could not find vid %d in cache\n", vid);
  352. if (mdev->device_up && priv->port_up) {
  353. err = mlx4_SET_VLAN_FLTR(mdev->dev, priv);
  354. if (err)
  355. en_err(priv, "Failed configuring VLAN filter\n");
  356. }
  357. mutex_unlock(&mdev->state_lock);
  358. return 0;
  359. }
  360. static void mlx4_en_u64_to_mac(unsigned char dst_mac[ETH_ALEN + 2], u64 src_mac)
  361. {
  362. int i;
  363. for (i = ETH_ALEN - 1; i >= 0; --i) {
  364. dst_mac[i] = src_mac & 0xff;
  365. src_mac >>= 8;
  366. }
  367. memset(&dst_mac[ETH_ALEN], 0, 2);
  368. }
  369. static int mlx4_en_uc_steer_add(struct mlx4_en_priv *priv,
  370. unsigned char *mac, int *qpn, u64 *reg_id)
  371. {
  372. struct mlx4_en_dev *mdev = priv->mdev;
  373. struct mlx4_dev *dev = mdev->dev;
  374. int err;
  375. switch (dev->caps.steering_mode) {
  376. case MLX4_STEERING_MODE_B0: {
  377. struct mlx4_qp qp;
  378. u8 gid[16] = {0};
  379. qp.qpn = *qpn;
  380. memcpy(&gid[10], mac, ETH_ALEN);
  381. gid[5] = priv->port;
  382. err = mlx4_unicast_attach(dev, &qp, gid, 0, MLX4_PROT_ETH);
  383. break;
  384. }
  385. case MLX4_STEERING_MODE_DEVICE_MANAGED: {
  386. struct mlx4_spec_list spec_eth = { {NULL} };
  387. __be64 mac_mask = cpu_to_be64(MLX4_MAC_MASK << 16);
  388. struct mlx4_net_trans_rule rule = {
  389. .queue_mode = MLX4_NET_TRANS_Q_FIFO,
  390. .exclusive = 0,
  391. .allow_loopback = 1,
  392. .promisc_mode = MLX4_FS_REGULAR,
  393. .priority = MLX4_DOMAIN_NIC,
  394. };
  395. rule.port = priv->port;
  396. rule.qpn = *qpn;
  397. INIT_LIST_HEAD(&rule.list);
  398. spec_eth.id = MLX4_NET_TRANS_RULE_ID_ETH;
  399. memcpy(spec_eth.eth.dst_mac, mac, ETH_ALEN);
  400. memcpy(spec_eth.eth.dst_mac_msk, &mac_mask, ETH_ALEN);
  401. list_add_tail(&spec_eth.list, &rule.list);
  402. err = mlx4_flow_attach(dev, &rule, reg_id);
  403. break;
  404. }
  405. default:
  406. return -EINVAL;
  407. }
  408. if (err)
  409. en_warn(priv, "Failed Attaching Unicast\n");
  410. return err;
  411. }
  412. static void mlx4_en_uc_steer_release(struct mlx4_en_priv *priv,
  413. unsigned char *mac, int qpn, u64 reg_id)
  414. {
  415. struct mlx4_en_dev *mdev = priv->mdev;
  416. struct mlx4_dev *dev = mdev->dev;
  417. switch (dev->caps.steering_mode) {
  418. case MLX4_STEERING_MODE_B0: {
  419. struct mlx4_qp qp;
  420. u8 gid[16] = {0};
  421. qp.qpn = qpn;
  422. memcpy(&gid[10], mac, ETH_ALEN);
  423. gid[5] = priv->port;
  424. mlx4_unicast_detach(dev, &qp, gid, MLX4_PROT_ETH);
  425. break;
  426. }
  427. case MLX4_STEERING_MODE_DEVICE_MANAGED: {
  428. mlx4_flow_detach(dev, reg_id);
  429. break;
  430. }
  431. default:
  432. en_err(priv, "Invalid steering mode.\n");
  433. }
  434. }
  435. static int mlx4_en_get_qp(struct mlx4_en_priv *priv)
  436. {
  437. struct mlx4_en_dev *mdev = priv->mdev;
  438. struct mlx4_dev *dev = mdev->dev;
  439. struct mlx4_mac_entry *entry;
  440. int index = 0;
  441. int err = 0;
  442. u64 reg_id;
  443. int *qpn = &priv->base_qpn;
  444. u64 mac = mlx4_en_mac_to_u64(priv->dev->dev_addr);
  445. en_dbg(DRV, priv, "Registering MAC: %pM for adding\n",
  446. priv->dev->dev_addr);
  447. index = mlx4_register_mac(dev, priv->port, mac);
  448. if (index < 0) {
  449. err = index;
  450. en_err(priv, "Failed adding MAC: %pM\n",
  451. priv->dev->dev_addr);
  452. return err;
  453. }
  454. if (dev->caps.steering_mode == MLX4_STEERING_MODE_A0) {
  455. int base_qpn = mlx4_get_base_qpn(dev, priv->port);
  456. *qpn = base_qpn + index;
  457. return 0;
  458. }
  459. err = mlx4_qp_reserve_range(dev, 1, 1, qpn);
  460. en_dbg(DRV, priv, "Reserved qp %d\n", *qpn);
  461. if (err) {
  462. en_err(priv, "Failed to reserve qp for mac registration\n");
  463. goto qp_err;
  464. }
  465. err = mlx4_en_uc_steer_add(priv, priv->dev->dev_addr, qpn, &reg_id);
  466. if (err)
  467. goto steer_err;
  468. entry = kmalloc(sizeof(*entry), GFP_KERNEL);
  469. if (!entry) {
  470. err = -ENOMEM;
  471. goto alloc_err;
  472. }
  473. memcpy(entry->mac, priv->dev->dev_addr, sizeof(entry->mac));
  474. entry->reg_id = reg_id;
  475. hlist_add_head_rcu(&entry->hlist,
  476. &priv->mac_hash[entry->mac[MLX4_EN_MAC_HASH_IDX]]);
  477. return 0;
  478. alloc_err:
  479. mlx4_en_uc_steer_release(priv, priv->dev->dev_addr, *qpn, reg_id);
  480. steer_err:
  481. mlx4_qp_release_range(dev, *qpn, 1);
  482. qp_err:
  483. mlx4_unregister_mac(dev, priv->port, mac);
  484. return err;
  485. }
  486. static void mlx4_en_put_qp(struct mlx4_en_priv *priv)
  487. {
  488. struct mlx4_en_dev *mdev = priv->mdev;
  489. struct mlx4_dev *dev = mdev->dev;
  490. int qpn = priv->base_qpn;
  491. u64 mac;
  492. if (dev->caps.steering_mode == MLX4_STEERING_MODE_A0) {
  493. mac = mlx4_en_mac_to_u64(priv->dev->dev_addr);
  494. en_dbg(DRV, priv, "Registering MAC: %pM for deleting\n",
  495. priv->dev->dev_addr);
  496. mlx4_unregister_mac(dev, priv->port, mac);
  497. } else {
  498. struct mlx4_mac_entry *entry;
  499. struct hlist_node *tmp;
  500. struct hlist_head *bucket;
  501. unsigned int i;
  502. for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i) {
  503. bucket = &priv->mac_hash[i];
  504. hlist_for_each_entry_safe(entry, tmp, bucket, hlist) {
  505. mac = mlx4_en_mac_to_u64(entry->mac);
  506. en_dbg(DRV, priv, "Registering MAC: %pM for deleting\n",
  507. entry->mac);
  508. mlx4_en_uc_steer_release(priv, entry->mac,
  509. qpn, entry->reg_id);
  510. mlx4_unregister_mac(dev, priv->port, mac);
  511. hlist_del_rcu(&entry->hlist);
  512. kfree_rcu(entry, rcu);
  513. }
  514. }
  515. en_dbg(DRV, priv, "Releasing qp: port %d, qpn %d\n",
  516. priv->port, qpn);
  517. mlx4_qp_release_range(dev, qpn, 1);
  518. priv->flags &= ~MLX4_EN_FLAG_FORCE_PROMISC;
  519. }
  520. }
  521. static int mlx4_en_replace_mac(struct mlx4_en_priv *priv, int qpn,
  522. unsigned char *new_mac, unsigned char *prev_mac)
  523. {
  524. struct mlx4_en_dev *mdev = priv->mdev;
  525. struct mlx4_dev *dev = mdev->dev;
  526. int err = 0;
  527. u64 new_mac_u64 = mlx4_en_mac_to_u64(new_mac);
  528. if (dev->caps.steering_mode != MLX4_STEERING_MODE_A0) {
  529. struct hlist_head *bucket;
  530. unsigned int mac_hash;
  531. struct mlx4_mac_entry *entry;
  532. struct hlist_node *tmp;
  533. u64 prev_mac_u64 = mlx4_en_mac_to_u64(prev_mac);
  534. bucket = &priv->mac_hash[prev_mac[MLX4_EN_MAC_HASH_IDX]];
  535. hlist_for_each_entry_safe(entry, tmp, bucket, hlist) {
  536. if (ether_addr_equal_64bits(entry->mac, prev_mac)) {
  537. mlx4_en_uc_steer_release(priv, entry->mac,
  538. qpn, entry->reg_id);
  539. mlx4_unregister_mac(dev, priv->port,
  540. prev_mac_u64);
  541. hlist_del_rcu(&entry->hlist);
  542. synchronize_rcu();
  543. memcpy(entry->mac, new_mac, ETH_ALEN);
  544. entry->reg_id = 0;
  545. mac_hash = new_mac[MLX4_EN_MAC_HASH_IDX];
  546. hlist_add_head_rcu(&entry->hlist,
  547. &priv->mac_hash[mac_hash]);
  548. mlx4_register_mac(dev, priv->port, new_mac_u64);
  549. err = mlx4_en_uc_steer_add(priv, new_mac,
  550. &qpn,
  551. &entry->reg_id);
  552. return err;
  553. }
  554. }
  555. return -EINVAL;
  556. }
  557. return __mlx4_replace_mac(dev, priv->port, qpn, new_mac_u64);
  558. }
  559. u64 mlx4_en_mac_to_u64(u8 *addr)
  560. {
  561. u64 mac = 0;
  562. int i;
  563. for (i = 0; i < ETH_ALEN; i++) {
  564. mac <<= 8;
  565. mac |= addr[i];
  566. }
  567. return mac;
  568. }
  569. static int mlx4_en_do_set_mac(struct mlx4_en_priv *priv)
  570. {
  571. int err = 0;
  572. if (priv->port_up) {
  573. /* Remove old MAC and insert the new one */
  574. err = mlx4_en_replace_mac(priv, priv->base_qpn,
  575. priv->dev->dev_addr, priv->prev_mac);
  576. if (err)
  577. en_err(priv, "Failed changing HW MAC address\n");
  578. memcpy(priv->prev_mac, priv->dev->dev_addr,
  579. sizeof(priv->prev_mac));
  580. } else
  581. en_dbg(HW, priv, "Port is down while registering mac, exiting...\n");
  582. return err;
  583. }
  584. static int mlx4_en_set_mac(struct net_device *dev, void *addr)
  585. {
  586. struct mlx4_en_priv *priv = netdev_priv(dev);
  587. struct mlx4_en_dev *mdev = priv->mdev;
  588. struct sockaddr *saddr = addr;
  589. int err;
  590. if (!is_valid_ether_addr(saddr->sa_data))
  591. return -EADDRNOTAVAIL;
  592. memcpy(dev->dev_addr, saddr->sa_data, ETH_ALEN);
  593. mutex_lock(&mdev->state_lock);
  594. err = mlx4_en_do_set_mac(priv);
  595. mutex_unlock(&mdev->state_lock);
  596. return err;
  597. }
  598. static void mlx4_en_clear_list(struct net_device *dev)
  599. {
  600. struct mlx4_en_priv *priv = netdev_priv(dev);
  601. struct mlx4_en_mc_list *tmp, *mc_to_del;
  602. list_for_each_entry_safe(mc_to_del, tmp, &priv->mc_list, list) {
  603. list_del(&mc_to_del->list);
  604. kfree(mc_to_del);
  605. }
  606. }
  607. static void mlx4_en_cache_mclist(struct net_device *dev)
  608. {
  609. struct mlx4_en_priv *priv = netdev_priv(dev);
  610. struct netdev_hw_addr *ha;
  611. struct mlx4_en_mc_list *tmp;
  612. mlx4_en_clear_list(dev);
  613. netdev_for_each_mc_addr(ha, dev) {
  614. tmp = kzalloc(sizeof(struct mlx4_en_mc_list), GFP_ATOMIC);
  615. if (!tmp) {
  616. mlx4_en_clear_list(dev);
  617. return;
  618. }
  619. memcpy(tmp->addr, ha->addr, ETH_ALEN);
  620. list_add_tail(&tmp->list, &priv->mc_list);
  621. }
  622. }
  623. static void update_mclist_flags(struct mlx4_en_priv *priv,
  624. struct list_head *dst,
  625. struct list_head *src)
  626. {
  627. struct mlx4_en_mc_list *dst_tmp, *src_tmp, *new_mc;
  628. bool found;
  629. /* Find all the entries that should be removed from dst,
  630. * These are the entries that are not found in src
  631. */
  632. list_for_each_entry(dst_tmp, dst, list) {
  633. found = false;
  634. list_for_each_entry(src_tmp, src, list) {
  635. if (!memcmp(dst_tmp->addr, src_tmp->addr, ETH_ALEN)) {
  636. found = true;
  637. break;
  638. }
  639. }
  640. if (!found)
  641. dst_tmp->action = MCLIST_REM;
  642. }
  643. /* Add entries that exist in src but not in dst
  644. * mark them as need to add
  645. */
  646. list_for_each_entry(src_tmp, src, list) {
  647. found = false;
  648. list_for_each_entry(dst_tmp, dst, list) {
  649. if (!memcmp(dst_tmp->addr, src_tmp->addr, ETH_ALEN)) {
  650. dst_tmp->action = MCLIST_NONE;
  651. found = true;
  652. break;
  653. }
  654. }
  655. if (!found) {
  656. new_mc = kmemdup(src_tmp,
  657. sizeof(struct mlx4_en_mc_list),
  658. GFP_KERNEL);
  659. if (!new_mc)
  660. return;
  661. new_mc->action = MCLIST_ADD;
  662. list_add_tail(&new_mc->list, dst);
  663. }
  664. }
  665. }
  666. static void mlx4_en_set_rx_mode(struct net_device *dev)
  667. {
  668. struct mlx4_en_priv *priv = netdev_priv(dev);
  669. if (!priv->port_up)
  670. return;
  671. queue_work(priv->mdev->workqueue, &priv->rx_mode_task);
  672. }
  673. static void mlx4_en_set_promisc_mode(struct mlx4_en_priv *priv,
  674. struct mlx4_en_dev *mdev)
  675. {
  676. int err = 0;
  677. if (!(priv->flags & MLX4_EN_FLAG_PROMISC)) {
  678. if (netif_msg_rx_status(priv))
  679. en_warn(priv, "Entering promiscuous mode\n");
  680. priv->flags |= MLX4_EN_FLAG_PROMISC;
  681. /* Enable promiscouos mode */
  682. switch (mdev->dev->caps.steering_mode) {
  683. case MLX4_STEERING_MODE_DEVICE_MANAGED:
  684. err = mlx4_flow_steer_promisc_add(mdev->dev,
  685. priv->port,
  686. priv->base_qpn,
  687. MLX4_FS_ALL_DEFAULT);
  688. if (err)
  689. en_err(priv, "Failed enabling promiscuous mode\n");
  690. priv->flags |= MLX4_EN_FLAG_MC_PROMISC;
  691. break;
  692. case MLX4_STEERING_MODE_B0:
  693. err = mlx4_unicast_promisc_add(mdev->dev,
  694. priv->base_qpn,
  695. priv->port);
  696. if (err)
  697. en_err(priv, "Failed enabling unicast promiscuous mode\n");
  698. /* Add the default qp number as multicast
  699. * promisc
  700. */
  701. if (!(priv->flags & MLX4_EN_FLAG_MC_PROMISC)) {
  702. err = mlx4_multicast_promisc_add(mdev->dev,
  703. priv->base_qpn,
  704. priv->port);
  705. if (err)
  706. en_err(priv, "Failed enabling multicast promiscuous mode\n");
  707. priv->flags |= MLX4_EN_FLAG_MC_PROMISC;
  708. }
  709. break;
  710. case MLX4_STEERING_MODE_A0:
  711. err = mlx4_SET_PORT_qpn_calc(mdev->dev,
  712. priv->port,
  713. priv->base_qpn,
  714. 1);
  715. if (err)
  716. en_err(priv, "Failed enabling promiscuous mode\n");
  717. break;
  718. }
  719. /* Disable port multicast filter (unconditionally) */
  720. err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
  721. 0, MLX4_MCAST_DISABLE);
  722. if (err)
  723. en_err(priv, "Failed disabling multicast filter\n");
  724. /* Disable port VLAN filter */
  725. err = mlx4_SET_VLAN_FLTR(mdev->dev, priv);
  726. if (err)
  727. en_err(priv, "Failed disabling VLAN filter\n");
  728. }
  729. }
  730. static void mlx4_en_clear_promisc_mode(struct mlx4_en_priv *priv,
  731. struct mlx4_en_dev *mdev)
  732. {
  733. int err = 0;
  734. if (netif_msg_rx_status(priv))
  735. en_warn(priv, "Leaving promiscuous mode\n");
  736. priv->flags &= ~MLX4_EN_FLAG_PROMISC;
  737. /* Disable promiscouos mode */
  738. switch (mdev->dev->caps.steering_mode) {
  739. case MLX4_STEERING_MODE_DEVICE_MANAGED:
  740. err = mlx4_flow_steer_promisc_remove(mdev->dev,
  741. priv->port,
  742. MLX4_FS_ALL_DEFAULT);
  743. if (err)
  744. en_err(priv, "Failed disabling promiscuous mode\n");
  745. priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
  746. break;
  747. case MLX4_STEERING_MODE_B0:
  748. err = mlx4_unicast_promisc_remove(mdev->dev,
  749. priv->base_qpn,
  750. priv->port);
  751. if (err)
  752. en_err(priv, "Failed disabling unicast promiscuous mode\n");
  753. /* Disable Multicast promisc */
  754. if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) {
  755. err = mlx4_multicast_promisc_remove(mdev->dev,
  756. priv->base_qpn,
  757. priv->port);
  758. if (err)
  759. en_err(priv, "Failed disabling multicast promiscuous mode\n");
  760. priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
  761. }
  762. break;
  763. case MLX4_STEERING_MODE_A0:
  764. err = mlx4_SET_PORT_qpn_calc(mdev->dev,
  765. priv->port,
  766. priv->base_qpn, 0);
  767. if (err)
  768. en_err(priv, "Failed disabling promiscuous mode\n");
  769. break;
  770. }
  771. /* Enable port VLAN filter */
  772. err = mlx4_SET_VLAN_FLTR(mdev->dev, priv);
  773. if (err)
  774. en_err(priv, "Failed enabling VLAN filter\n");
  775. }
  776. static void mlx4_en_do_multicast(struct mlx4_en_priv *priv,
  777. struct net_device *dev,
  778. struct mlx4_en_dev *mdev)
  779. {
  780. struct mlx4_en_mc_list *mclist, *tmp;
  781. u64 mcast_addr = 0;
  782. u8 mc_list[16] = {0};
  783. int err = 0;
  784. /* Enable/disable the multicast filter according to IFF_ALLMULTI */
  785. if (dev->flags & IFF_ALLMULTI) {
  786. err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
  787. 0, MLX4_MCAST_DISABLE);
  788. if (err)
  789. en_err(priv, "Failed disabling multicast filter\n");
  790. /* Add the default qp number as multicast promisc */
  791. if (!(priv->flags & MLX4_EN_FLAG_MC_PROMISC)) {
  792. switch (mdev->dev->caps.steering_mode) {
  793. case MLX4_STEERING_MODE_DEVICE_MANAGED:
  794. err = mlx4_flow_steer_promisc_add(mdev->dev,
  795. priv->port,
  796. priv->base_qpn,
  797. MLX4_FS_MC_DEFAULT);
  798. break;
  799. case MLX4_STEERING_MODE_B0:
  800. err = mlx4_multicast_promisc_add(mdev->dev,
  801. priv->base_qpn,
  802. priv->port);
  803. break;
  804. case MLX4_STEERING_MODE_A0:
  805. break;
  806. }
  807. if (err)
  808. en_err(priv, "Failed entering multicast promisc mode\n");
  809. priv->flags |= MLX4_EN_FLAG_MC_PROMISC;
  810. }
  811. } else {
  812. /* Disable Multicast promisc */
  813. if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) {
  814. switch (mdev->dev->caps.steering_mode) {
  815. case MLX4_STEERING_MODE_DEVICE_MANAGED:
  816. err = mlx4_flow_steer_promisc_remove(mdev->dev,
  817. priv->port,
  818. MLX4_FS_MC_DEFAULT);
  819. break;
  820. case MLX4_STEERING_MODE_B0:
  821. err = mlx4_multicast_promisc_remove(mdev->dev,
  822. priv->base_qpn,
  823. priv->port);
  824. break;
  825. case MLX4_STEERING_MODE_A0:
  826. break;
  827. }
  828. if (err)
  829. en_err(priv, "Failed disabling multicast promiscuous mode\n");
  830. priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
  831. }
  832. err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
  833. 0, MLX4_MCAST_DISABLE);
  834. if (err)
  835. en_err(priv, "Failed disabling multicast filter\n");
  836. /* Flush mcast filter and init it with broadcast address */
  837. mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, ETH_BCAST,
  838. 1, MLX4_MCAST_CONFIG);
  839. /* Update multicast list - we cache all addresses so they won't
  840. * change while HW is updated holding the command semaphor */
  841. netif_addr_lock_bh(dev);
  842. mlx4_en_cache_mclist(dev);
  843. netif_addr_unlock_bh(dev);
  844. list_for_each_entry(mclist, &priv->mc_list, list) {
  845. mcast_addr = mlx4_en_mac_to_u64(mclist->addr);
  846. mlx4_SET_MCAST_FLTR(mdev->dev, priv->port,
  847. mcast_addr, 0, MLX4_MCAST_CONFIG);
  848. }
  849. err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
  850. 0, MLX4_MCAST_ENABLE);
  851. if (err)
  852. en_err(priv, "Failed enabling multicast filter\n");
  853. update_mclist_flags(priv, &priv->curr_list, &priv->mc_list);
  854. list_for_each_entry_safe(mclist, tmp, &priv->curr_list, list) {
  855. if (mclist->action == MCLIST_REM) {
  856. /* detach this address and delete from list */
  857. memcpy(&mc_list[10], mclist->addr, ETH_ALEN);
  858. mc_list[5] = priv->port;
  859. err = mlx4_multicast_detach(mdev->dev,
  860. &priv->rss_map.indir_qp,
  861. mc_list,
  862. MLX4_PROT_ETH,
  863. mclist->reg_id);
  864. if (err)
  865. en_err(priv, "Fail to detach multicast address\n");
  866. /* remove from list */
  867. list_del(&mclist->list);
  868. kfree(mclist);
  869. } else if (mclist->action == MCLIST_ADD) {
  870. /* attach the address */
  871. memcpy(&mc_list[10], mclist->addr, ETH_ALEN);
  872. /* needed for B0 steering support */
  873. mc_list[5] = priv->port;
  874. err = mlx4_multicast_attach(mdev->dev,
  875. &priv->rss_map.indir_qp,
  876. mc_list,
  877. priv->port, 0,
  878. MLX4_PROT_ETH,
  879. &mclist->reg_id);
  880. if (err)
  881. en_err(priv, "Fail to attach multicast address\n");
  882. }
  883. }
  884. }
  885. }
  886. static void mlx4_en_do_uc_filter(struct mlx4_en_priv *priv,
  887. struct net_device *dev,
  888. struct mlx4_en_dev *mdev)
  889. {
  890. struct netdev_hw_addr *ha;
  891. struct mlx4_mac_entry *entry;
  892. struct hlist_node *tmp;
  893. bool found;
  894. u64 mac;
  895. int err = 0;
  896. struct hlist_head *bucket;
  897. unsigned int i;
  898. int removed = 0;
  899. u32 prev_flags;
  900. /* Note that we do not need to protect our mac_hash traversal with rcu,
  901. * since all modification code is protected by mdev->state_lock
  902. */
  903. /* find what to remove */
  904. for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i) {
  905. bucket = &priv->mac_hash[i];
  906. hlist_for_each_entry_safe(entry, tmp, bucket, hlist) {
  907. found = false;
  908. netdev_for_each_uc_addr(ha, dev) {
  909. if (ether_addr_equal_64bits(entry->mac,
  910. ha->addr)) {
  911. found = true;
  912. break;
  913. }
  914. }
  915. /* MAC address of the port is not in uc list */
  916. if (ether_addr_equal_64bits(entry->mac, dev->dev_addr))
  917. found = true;
  918. if (!found) {
  919. mac = mlx4_en_mac_to_u64(entry->mac);
  920. mlx4_en_uc_steer_release(priv, entry->mac,
  921. priv->base_qpn,
  922. entry->reg_id);
  923. mlx4_unregister_mac(mdev->dev, priv->port, mac);
  924. hlist_del_rcu(&entry->hlist);
  925. kfree_rcu(entry, rcu);
  926. en_dbg(DRV, priv, "Removed MAC %pM on port:%d\n",
  927. entry->mac, priv->port);
  928. ++removed;
  929. }
  930. }
  931. }
  932. /* if we didn't remove anything, there is no use in trying to add
  933. * again once we are in a forced promisc mode state
  934. */
  935. if ((priv->flags & MLX4_EN_FLAG_FORCE_PROMISC) && 0 == removed)
  936. return;
  937. prev_flags = priv->flags;
  938. priv->flags &= ~MLX4_EN_FLAG_FORCE_PROMISC;
  939. /* find what to add */
  940. netdev_for_each_uc_addr(ha, dev) {
  941. found = false;
  942. bucket = &priv->mac_hash[ha->addr[MLX4_EN_MAC_HASH_IDX]];
  943. hlist_for_each_entry(entry, bucket, hlist) {
  944. if (ether_addr_equal_64bits(entry->mac, ha->addr)) {
  945. found = true;
  946. break;
  947. }
  948. }
  949. if (!found) {
  950. entry = kmalloc(sizeof(*entry), GFP_KERNEL);
  951. if (!entry) {
  952. en_err(priv, "Failed adding MAC %pM on port:%d (out of memory)\n",
  953. ha->addr, priv->port);
  954. priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC;
  955. break;
  956. }
  957. mac = mlx4_en_mac_to_u64(ha->addr);
  958. memcpy(entry->mac, ha->addr, ETH_ALEN);
  959. err = mlx4_register_mac(mdev->dev, priv->port, mac);
  960. if (err < 0) {
  961. en_err(priv, "Failed registering MAC %pM on port %d: %d\n",
  962. ha->addr, priv->port, err);
  963. kfree(entry);
  964. priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC;
  965. break;
  966. }
  967. err = mlx4_en_uc_steer_add(priv, ha->addr,
  968. &priv->base_qpn,
  969. &entry->reg_id);
  970. if (err) {
  971. en_err(priv, "Failed adding MAC %pM on port %d: %d\n",
  972. ha->addr, priv->port, err);
  973. mlx4_unregister_mac(mdev->dev, priv->port, mac);
  974. kfree(entry);
  975. priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC;
  976. break;
  977. } else {
  978. unsigned int mac_hash;
  979. en_dbg(DRV, priv, "Added MAC %pM on port:%d\n",
  980. ha->addr, priv->port);
  981. mac_hash = ha->addr[MLX4_EN_MAC_HASH_IDX];
  982. bucket = &priv->mac_hash[mac_hash];
  983. hlist_add_head_rcu(&entry->hlist, bucket);
  984. }
  985. }
  986. }
  987. if (priv->flags & MLX4_EN_FLAG_FORCE_PROMISC) {
  988. en_warn(priv, "Forcing promiscuous mode on port:%d\n",
  989. priv->port);
  990. } else if (prev_flags & MLX4_EN_FLAG_FORCE_PROMISC) {
  991. en_warn(priv, "Stop forcing promiscuous mode on port:%d\n",
  992. priv->port);
  993. }
  994. }
  995. static void mlx4_en_do_set_rx_mode(struct work_struct *work)
  996. {
  997. struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
  998. rx_mode_task);
  999. struct mlx4_en_dev *mdev = priv->mdev;
  1000. struct net_device *dev = priv->dev;
  1001. mutex_lock(&mdev->state_lock);
  1002. if (!mdev->device_up) {
  1003. en_dbg(HW, priv, "Card is not up, ignoring rx mode change.\n");
  1004. goto out;
  1005. }
  1006. if (!priv->port_up) {
  1007. en_dbg(HW, priv, "Port is down, ignoring rx mode change.\n");
  1008. goto out;
  1009. }
  1010. if (!netif_carrier_ok(dev)) {
  1011. if (!mlx4_en_QUERY_PORT(mdev, priv->port)) {
  1012. if (priv->port_state.link_state) {
  1013. priv->last_link_state = MLX4_DEV_EVENT_PORT_UP;
  1014. netif_carrier_on(dev);
  1015. en_dbg(LINK, priv, "Link Up\n");
  1016. }
  1017. }
  1018. }
  1019. if (dev->priv_flags & IFF_UNICAST_FLT)
  1020. mlx4_en_do_uc_filter(priv, dev, mdev);
  1021. /* Promsicuous mode: disable all filters */
  1022. if ((dev->flags & IFF_PROMISC) ||
  1023. (priv->flags & MLX4_EN_FLAG_FORCE_PROMISC)) {
  1024. mlx4_en_set_promisc_mode(priv, mdev);
  1025. goto out;
  1026. }
  1027. /* Not in promiscuous mode */
  1028. if (priv->flags & MLX4_EN_FLAG_PROMISC)
  1029. mlx4_en_clear_promisc_mode(priv, mdev);
  1030. mlx4_en_do_multicast(priv, dev, mdev);
  1031. out:
  1032. mutex_unlock(&mdev->state_lock);
  1033. }
  1034. #ifdef CONFIG_NET_POLL_CONTROLLER
  1035. static void mlx4_en_netpoll(struct net_device *dev)
  1036. {
  1037. struct mlx4_en_priv *priv = netdev_priv(dev);
  1038. struct mlx4_en_cq *cq;
  1039. unsigned long flags;
  1040. int i;
  1041. for (i = 0; i < priv->rx_ring_num; i++) {
  1042. cq = &priv->rx_cq[i];
  1043. spin_lock_irqsave(&cq->lock, flags);
  1044. napi_synchronize(&cq->napi);
  1045. mlx4_en_process_rx_cq(dev, cq, 0);
  1046. spin_unlock_irqrestore(&cq->lock, flags);
  1047. }
  1048. }
  1049. #endif
  1050. static void mlx4_en_tx_timeout(struct net_device *dev)
  1051. {
  1052. struct mlx4_en_priv *priv = netdev_priv(dev);
  1053. struct mlx4_en_dev *mdev = priv->mdev;
  1054. if (netif_msg_timer(priv))
  1055. en_warn(priv, "Tx timeout called on port:%d\n", priv->port);
  1056. priv->port_stats.tx_timeout++;
  1057. en_dbg(DRV, priv, "Scheduling watchdog\n");
  1058. queue_work(mdev->workqueue, &priv->watchdog_task);
  1059. }
  1060. static struct net_device_stats *mlx4_en_get_stats(struct net_device *dev)
  1061. {
  1062. struct mlx4_en_priv *priv = netdev_priv(dev);
  1063. spin_lock_bh(&priv->stats_lock);
  1064. memcpy(&priv->ret_stats, &priv->stats, sizeof(priv->stats));
  1065. spin_unlock_bh(&priv->stats_lock);
  1066. return &priv->ret_stats;
  1067. }
  1068. static void mlx4_en_set_default_moderation(struct mlx4_en_priv *priv)
  1069. {
  1070. struct mlx4_en_cq *cq;
  1071. int i;
  1072. /* If we haven't received a specific coalescing setting
  1073. * (module param), we set the moderation parameters as follows:
  1074. * - moder_cnt is set to the number of mtu sized packets to
  1075. * satisfy our coalescing target.
  1076. * - moder_time is set to a fixed value.
  1077. */
  1078. priv->rx_frames = MLX4_EN_RX_COAL_TARGET;
  1079. priv->rx_usecs = MLX4_EN_RX_COAL_TIME;
  1080. priv->tx_frames = MLX4_EN_TX_COAL_PKTS;
  1081. priv->tx_usecs = MLX4_EN_TX_COAL_TIME;
  1082. en_dbg(INTR, priv, "Default coalesing params for mtu:%d - rx_frames:%d rx_usecs:%d\n",
  1083. priv->dev->mtu, priv->rx_frames, priv->rx_usecs);
  1084. /* Setup cq moderation params */
  1085. for (i = 0; i < priv->rx_ring_num; i++) {
  1086. cq = &priv->rx_cq[i];
  1087. cq->moder_cnt = priv->rx_frames;
  1088. cq->moder_time = priv->rx_usecs;
  1089. priv->last_moder_time[i] = MLX4_EN_AUTO_CONF;
  1090. priv->last_moder_packets[i] = 0;
  1091. priv->last_moder_bytes[i] = 0;
  1092. }
  1093. for (i = 0; i < priv->tx_ring_num; i++) {
  1094. cq = &priv->tx_cq[i];
  1095. cq->moder_cnt = priv->tx_frames;
  1096. cq->moder_time = priv->tx_usecs;
  1097. }
  1098. /* Reset auto-moderation params */
  1099. priv->pkt_rate_low = MLX4_EN_RX_RATE_LOW;
  1100. priv->rx_usecs_low = MLX4_EN_RX_COAL_TIME_LOW;
  1101. priv->pkt_rate_high = MLX4_EN_RX_RATE_HIGH;
  1102. priv->rx_usecs_high = MLX4_EN_RX_COAL_TIME_HIGH;
  1103. priv->sample_interval = MLX4_EN_SAMPLE_INTERVAL;
  1104. priv->adaptive_rx_coal = 1;
  1105. priv->last_moder_jiffies = 0;
  1106. priv->last_moder_tx_packets = 0;
  1107. }
  1108. static void mlx4_en_auto_moderation(struct mlx4_en_priv *priv)
  1109. {
  1110. unsigned long period = (unsigned long) (jiffies - priv->last_moder_jiffies);
  1111. struct mlx4_en_cq *cq;
  1112. unsigned long packets;
  1113. unsigned long rate;
  1114. unsigned long avg_pkt_size;
  1115. unsigned long rx_packets;
  1116. unsigned long rx_bytes;
  1117. unsigned long rx_pkt_diff;
  1118. int moder_time;
  1119. int ring, err;
  1120. if (!priv->adaptive_rx_coal || period < priv->sample_interval * HZ)
  1121. return;
  1122. for (ring = 0; ring < priv->rx_ring_num; ring++) {
  1123. spin_lock_bh(&priv->stats_lock);
  1124. rx_packets = priv->rx_ring[ring].packets;
  1125. rx_bytes = priv->rx_ring[ring].bytes;
  1126. spin_unlock_bh(&priv->stats_lock);
  1127. rx_pkt_diff = ((unsigned long) (rx_packets -
  1128. priv->last_moder_packets[ring]));
  1129. packets = rx_pkt_diff;
  1130. rate = packets * HZ / period;
  1131. avg_pkt_size = packets ? ((unsigned long) (rx_bytes -
  1132. priv->last_moder_bytes[ring])) / packets : 0;
  1133. /* Apply auto-moderation only when packet rate
  1134. * exceeds a rate that it matters */
  1135. if (rate > (MLX4_EN_RX_RATE_THRESH / priv->rx_ring_num) &&
  1136. avg_pkt_size > MLX4_EN_AVG_PKT_SMALL) {
  1137. if (rate < priv->pkt_rate_low)
  1138. moder_time = priv->rx_usecs_low;
  1139. else if (rate > priv->pkt_rate_high)
  1140. moder_time = priv->rx_usecs_high;
  1141. else
  1142. moder_time = (rate - priv->pkt_rate_low) *
  1143. (priv->rx_usecs_high - priv->rx_usecs_low) /
  1144. (priv->pkt_rate_high - priv->pkt_rate_low) +
  1145. priv->rx_usecs_low;
  1146. } else {
  1147. moder_time = priv->rx_usecs_low;
  1148. }
  1149. if (moder_time != priv->last_moder_time[ring]) {
  1150. priv->last_moder_time[ring] = moder_time;
  1151. cq = &priv->rx_cq[ring];
  1152. cq->moder_time = moder_time;
  1153. cq->moder_cnt = priv->rx_frames;
  1154. err = mlx4_en_set_cq_moder(priv, cq);
  1155. if (err)
  1156. en_err(priv, "Failed modifying moderation for cq:%d\n",
  1157. ring);
  1158. }
  1159. priv->last_moder_packets[ring] = rx_packets;
  1160. priv->last_moder_bytes[ring] = rx_bytes;
  1161. }
  1162. priv->last_moder_jiffies = jiffies;
  1163. }
  1164. static void mlx4_en_do_get_stats(struct work_struct *work)
  1165. {
  1166. struct delayed_work *delay = to_delayed_work(work);
  1167. struct mlx4_en_priv *priv = container_of(delay, struct mlx4_en_priv,
  1168. stats_task);
  1169. struct mlx4_en_dev *mdev = priv->mdev;
  1170. int err;
  1171. mutex_lock(&mdev->state_lock);
  1172. if (mdev->device_up) {
  1173. err = mlx4_en_DUMP_ETH_STATS(mdev, priv->port, 0);
  1174. if (err)
  1175. en_dbg(HW, priv, "Could not update stats\n");
  1176. if (priv->port_up)
  1177. mlx4_en_auto_moderation(priv);
  1178. queue_delayed_work(mdev->workqueue, &priv->stats_task, STATS_DELAY);
  1179. }
  1180. if (mdev->mac_removed[MLX4_MAX_PORTS + 1 - priv->port]) {
  1181. mlx4_en_do_set_mac(priv);
  1182. mdev->mac_removed[MLX4_MAX_PORTS + 1 - priv->port] = 0;
  1183. }
  1184. mutex_unlock(&mdev->state_lock);
  1185. }
  1186. /* mlx4_en_service_task - Run service task for tasks that needed to be done
  1187. * periodically
  1188. */
  1189. static void mlx4_en_service_task(struct work_struct *work)
  1190. {
  1191. struct delayed_work *delay = to_delayed_work(work);
  1192. struct mlx4_en_priv *priv = container_of(delay, struct mlx4_en_priv,
  1193. service_task);
  1194. struct mlx4_en_dev *mdev = priv->mdev;
  1195. mutex_lock(&mdev->state_lock);
  1196. if (mdev->device_up) {
  1197. if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS)
  1198. mlx4_en_ptp_overflow_check(mdev);
  1199. queue_delayed_work(mdev->workqueue, &priv->service_task,
  1200. SERVICE_TASK_DELAY);
  1201. }
  1202. mutex_unlock(&mdev->state_lock);
  1203. }
  1204. static void mlx4_en_linkstate(struct work_struct *work)
  1205. {
  1206. struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
  1207. linkstate_task);
  1208. struct mlx4_en_dev *mdev = priv->mdev;
  1209. int linkstate = priv->link_state;
  1210. mutex_lock(&mdev->state_lock);
  1211. /* If observable port state changed set carrier state and
  1212. * report to system log */
  1213. if (priv->last_link_state != linkstate) {
  1214. if (linkstate == MLX4_DEV_EVENT_PORT_DOWN) {
  1215. en_info(priv, "Link Down\n");
  1216. netif_carrier_off(priv->dev);
  1217. } else {
  1218. en_info(priv, "Link Up\n");
  1219. netif_carrier_on(priv->dev);
  1220. }
  1221. }
  1222. priv->last_link_state = linkstate;
  1223. mutex_unlock(&mdev->state_lock);
  1224. }
  1225. int mlx4_en_start_port(struct net_device *dev)
  1226. {
  1227. struct mlx4_en_priv *priv = netdev_priv(dev);
  1228. struct mlx4_en_dev *mdev = priv->mdev;
  1229. struct mlx4_en_cq *cq;
  1230. struct mlx4_en_tx_ring *tx_ring;
  1231. int rx_index = 0;
  1232. int tx_index = 0;
  1233. int err = 0;
  1234. int i;
  1235. int j;
  1236. u8 mc_list[16] = {0};
  1237. if (priv->port_up) {
  1238. en_dbg(DRV, priv, "start port called while port already up\n");
  1239. return 0;
  1240. }
  1241. INIT_LIST_HEAD(&priv->mc_list);
  1242. INIT_LIST_HEAD(&priv->curr_list);
  1243. INIT_LIST_HEAD(&priv->ethtool_list);
  1244. memset(&priv->ethtool_rules[0], 0,
  1245. sizeof(struct ethtool_flow_id) * MAX_NUM_OF_FS_RULES);
  1246. /* Calculate Rx buf size */
  1247. dev->mtu = min(dev->mtu, priv->max_mtu);
  1248. mlx4_en_calc_rx_buf(dev);
  1249. en_dbg(DRV, priv, "Rx buf size:%d\n", priv->rx_skb_size);
  1250. /* Configure rx cq's and rings */
  1251. err = mlx4_en_activate_rx_rings(priv);
  1252. if (err) {
  1253. en_err(priv, "Failed to activate RX rings\n");
  1254. return err;
  1255. }
  1256. for (i = 0; i < priv->rx_ring_num; i++) {
  1257. cq = &priv->rx_cq[i];
  1258. mlx4_en_cq_init_lock(cq);
  1259. err = mlx4_en_activate_cq(priv, cq, i);
  1260. if (err) {
  1261. en_err(priv, "Failed activating Rx CQ\n");
  1262. goto cq_err;
  1263. }
  1264. for (j = 0; j < cq->size; j++)
  1265. cq->buf[j].owner_sr_opcode = MLX4_CQE_OWNER_MASK;
  1266. err = mlx4_en_set_cq_moder(priv, cq);
  1267. if (err) {
  1268. en_err(priv, "Failed setting cq moderation parameters");
  1269. mlx4_en_deactivate_cq(priv, cq);
  1270. goto cq_err;
  1271. }
  1272. mlx4_en_arm_cq(priv, cq);
  1273. priv->rx_ring[i].cqn = cq->mcq.cqn;
  1274. ++rx_index;
  1275. }
  1276. /* Set qp number */
  1277. en_dbg(DRV, priv, "Getting qp number for port %d\n", priv->port);
  1278. err = mlx4_en_get_qp(priv);
  1279. if (err) {
  1280. en_err(priv, "Failed getting eth qp\n");
  1281. goto cq_err;
  1282. }
  1283. mdev->mac_removed[priv->port] = 0;
  1284. err = mlx4_en_config_rss_steer(priv);
  1285. if (err) {
  1286. en_err(priv, "Failed configuring rss steering\n");
  1287. goto mac_err;
  1288. }
  1289. err = mlx4_en_create_drop_qp(priv);
  1290. if (err)
  1291. goto rss_err;
  1292. /* Configure tx cq's and rings */
  1293. for (i = 0; i < priv->tx_ring_num; i++) {
  1294. /* Configure cq */
  1295. cq = &priv->tx_cq[i];
  1296. err = mlx4_en_activate_cq(priv, cq, i);
  1297. if (err) {
  1298. en_err(priv, "Failed allocating Tx CQ\n");
  1299. goto tx_err;
  1300. }
  1301. err = mlx4_en_set_cq_moder(priv, cq);
  1302. if (err) {
  1303. en_err(priv, "Failed setting cq moderation parameters");
  1304. mlx4_en_deactivate_cq(priv, cq);
  1305. goto tx_err;
  1306. }
  1307. en_dbg(DRV, priv, "Resetting index of collapsed CQ:%d to -1\n", i);
  1308. cq->buf->wqe_index = cpu_to_be16(0xffff);
  1309. /* Configure ring */
  1310. tx_ring = &priv->tx_ring[i];
  1311. err = mlx4_en_activate_tx_ring(priv, tx_ring, cq->mcq.cqn,
  1312. i / priv->num_tx_rings_p_up);
  1313. if (err) {
  1314. en_err(priv, "Failed allocating Tx ring\n");
  1315. mlx4_en_deactivate_cq(priv, cq);
  1316. goto tx_err;
  1317. }
  1318. tx_ring->tx_queue = netdev_get_tx_queue(dev, i);
  1319. /* Arm CQ for TX completions */
  1320. mlx4_en_arm_cq(priv, cq);
  1321. /* Set initial ownership of all Tx TXBBs to SW (1) */
  1322. for (j = 0; j < tx_ring->buf_size; j += STAMP_STRIDE)
  1323. *((u32 *) (tx_ring->buf + j)) = 0xffffffff;
  1324. ++tx_index;
  1325. }
  1326. /* Configure port */
  1327. err = mlx4_SET_PORT_general(mdev->dev, priv->port,
  1328. priv->rx_skb_size + ETH_FCS_LEN,
  1329. priv->prof->tx_pause,
  1330. priv->prof->tx_ppp,
  1331. priv->prof->rx_pause,
  1332. priv->prof->rx_ppp);
  1333. if (err) {
  1334. en_err(priv, "Failed setting port general configurations for port %d, with error %d\n",
  1335. priv->port, err);
  1336. goto tx_err;
  1337. }
  1338. /* Set default qp number */
  1339. err = mlx4_SET_PORT_qpn_calc(mdev->dev, priv->port, priv->base_qpn, 0);
  1340. if (err) {
  1341. en_err(priv, "Failed setting default qp numbers\n");
  1342. goto tx_err;
  1343. }
  1344. /* Init port */
  1345. en_dbg(HW, priv, "Initializing port\n");
  1346. err = mlx4_INIT_PORT(mdev->dev, priv->port);
  1347. if (err) {
  1348. en_err(priv, "Failed Initializing port\n");
  1349. goto tx_err;
  1350. }
  1351. /* Attach rx QP to bradcast address */
  1352. memset(&mc_list[10], 0xff, ETH_ALEN);
  1353. mc_list[5] = priv->port; /* needed for B0 steering support */
  1354. if (mlx4_multicast_attach(mdev->dev, &priv->rss_map.indir_qp, mc_list,
  1355. priv->port, 0, MLX4_PROT_ETH,
  1356. &priv->broadcast_id))
  1357. mlx4_warn(mdev, "Failed Attaching Broadcast\n");
  1358. /* Must redo promiscuous mode setup. */
  1359. priv->flags &= ~(MLX4_EN_FLAG_PROMISC | MLX4_EN_FLAG_MC_PROMISC);
  1360. /* Schedule multicast task to populate multicast list */
  1361. queue_work(mdev->workqueue, &priv->rx_mode_task);
  1362. mlx4_set_stats_bitmap(mdev->dev, &priv->stats_bitmap);
  1363. priv->port_up = true;
  1364. netif_tx_start_all_queues(dev);
  1365. netif_device_attach(dev);
  1366. return 0;
  1367. tx_err:
  1368. while (tx_index--) {
  1369. mlx4_en_deactivate_tx_ring(priv, &priv->tx_ring[tx_index]);
  1370. mlx4_en_deactivate_cq(priv, &priv->tx_cq[tx_index]);
  1371. }
  1372. mlx4_en_destroy_drop_qp(priv);
  1373. rss_err:
  1374. mlx4_en_release_rss_steer(priv);
  1375. mac_err:
  1376. mlx4_en_put_qp(priv);
  1377. cq_err:
  1378. while (rx_index--)
  1379. mlx4_en_deactivate_cq(priv, &priv->rx_cq[rx_index]);
  1380. for (i = 0; i < priv->rx_ring_num; i++)
  1381. mlx4_en_deactivate_rx_ring(priv, &priv->rx_ring[i]);
  1382. return err; /* need to close devices */
  1383. }
  1384. void mlx4_en_stop_port(struct net_device *dev, int detach)
  1385. {
  1386. struct mlx4_en_priv *priv = netdev_priv(dev);
  1387. struct mlx4_en_dev *mdev = priv->mdev;
  1388. struct mlx4_en_mc_list *mclist, *tmp;
  1389. struct ethtool_flow_id *flow, *tmp_flow;
  1390. int i;
  1391. u8 mc_list[16] = {0};
  1392. if (!priv->port_up) {
  1393. en_dbg(DRV, priv, "stop port called while port already down\n");
  1394. return;
  1395. }
  1396. /* Synchronize with tx routine */
  1397. netif_tx_lock_bh(dev);
  1398. if (detach)
  1399. netif_device_detach(dev);
  1400. netif_tx_stop_all_queues(dev);
  1401. netif_tx_unlock_bh(dev);
  1402. netif_tx_disable(dev);
  1403. /* Set port as not active */
  1404. priv->port_up = false;
  1405. /* Promsicuous mode */
  1406. if (mdev->dev->caps.steering_mode ==
  1407. MLX4_STEERING_MODE_DEVICE_MANAGED) {
  1408. priv->flags &= ~(MLX4_EN_FLAG_PROMISC |
  1409. MLX4_EN_FLAG_MC_PROMISC);
  1410. mlx4_flow_steer_promisc_remove(mdev->dev,
  1411. priv->port,
  1412. MLX4_FS_ALL_DEFAULT);
  1413. mlx4_flow_steer_promisc_remove(mdev->dev,
  1414. priv->port,
  1415. MLX4_FS_MC_DEFAULT);
  1416. } else if (priv->flags & MLX4_EN_FLAG_PROMISC) {
  1417. priv->flags &= ~MLX4_EN_FLAG_PROMISC;
  1418. /* Disable promiscouos mode */
  1419. mlx4_unicast_promisc_remove(mdev->dev, priv->base_qpn,
  1420. priv->port);
  1421. /* Disable Multicast promisc */
  1422. if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) {
  1423. mlx4_multicast_promisc_remove(mdev->dev, priv->base_qpn,
  1424. priv->port);
  1425. priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
  1426. }
  1427. }
  1428. /* Detach All multicasts */
  1429. memset(&mc_list[10], 0xff, ETH_ALEN);
  1430. mc_list[5] = priv->port; /* needed for B0 steering support */
  1431. mlx4_multicast_detach(mdev->dev, &priv->rss_map.indir_qp, mc_list,
  1432. MLX4_PROT_ETH, priv->broadcast_id);
  1433. list_for_each_entry(mclist, &priv->curr_list, list) {
  1434. memcpy(&mc_list[10], mclist->addr, ETH_ALEN);
  1435. mc_list[5] = priv->port;
  1436. mlx4_multicast_detach(mdev->dev, &priv->rss_map.indir_qp,
  1437. mc_list, MLX4_PROT_ETH, mclist->reg_id);
  1438. }
  1439. mlx4_en_clear_list(dev);
  1440. list_for_each_entry_safe(mclist, tmp, &priv->curr_list, list) {
  1441. list_del(&mclist->list);
  1442. kfree(mclist);
  1443. }
  1444. /* Flush multicast filter */
  1445. mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0, 1, MLX4_MCAST_CONFIG);
  1446. /* Remove flow steering rules for the port*/
  1447. if (mdev->dev->caps.steering_mode ==
  1448. MLX4_STEERING_MODE_DEVICE_MANAGED) {
  1449. ASSERT_RTNL();
  1450. list_for_each_entry_safe(flow, tmp_flow,
  1451. &priv->ethtool_list, list) {
  1452. mlx4_flow_detach(mdev->dev, flow->id);
  1453. list_del(&flow->list);
  1454. }
  1455. }
  1456. mlx4_en_destroy_drop_qp(priv);
  1457. /* Free TX Rings */
  1458. for (i = 0; i < priv->tx_ring_num; i++) {
  1459. mlx4_en_deactivate_tx_ring(priv, &priv->tx_ring[i]);
  1460. mlx4_en_deactivate_cq(priv, &priv->tx_cq[i]);
  1461. }
  1462. msleep(10);
  1463. for (i = 0; i < priv->tx_ring_num; i++)
  1464. mlx4_en_free_tx_buf(dev, &priv->tx_ring[i]);
  1465. /* Free RSS qps */
  1466. mlx4_en_release_rss_steer(priv);
  1467. /* Unregister Mac address for the port */
  1468. mlx4_en_put_qp(priv);
  1469. if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAGS2_REASSIGN_MAC_EN))
  1470. mdev->mac_removed[priv->port] = 1;
  1471. /* Free RX Rings */
  1472. for (i = 0; i < priv->rx_ring_num; i++) {
  1473. struct mlx4_en_cq *cq = &priv->rx_cq[i];
  1474. local_bh_disable();
  1475. while (!mlx4_en_cq_lock_napi(cq)) {
  1476. pr_info("CQ %d locked\n", i);
  1477. mdelay(1);
  1478. }
  1479. local_bh_enable();
  1480. mlx4_en_deactivate_rx_ring(priv, &priv->rx_ring[i]);
  1481. while (test_bit(NAPI_STATE_SCHED, &cq->napi.state))
  1482. msleep(1);
  1483. mlx4_en_deactivate_cq(priv, cq);
  1484. }
  1485. /* close port*/
  1486. mlx4_CLOSE_PORT(mdev->dev, priv->port);
  1487. }
  1488. static void mlx4_en_restart(struct work_struct *work)
  1489. {
  1490. struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
  1491. watchdog_task);
  1492. struct mlx4_en_dev *mdev = priv->mdev;
  1493. struct net_device *dev = priv->dev;
  1494. en_dbg(DRV, priv, "Watchdog task called for port %d\n", priv->port);
  1495. mutex_lock(&mdev->state_lock);
  1496. if (priv->port_up) {
  1497. mlx4_en_stop_port(dev, 1);
  1498. if (mlx4_en_start_port(dev))
  1499. en_err(priv, "Failed restarting port %d\n", priv->port);
  1500. }
  1501. mutex_unlock(&mdev->state_lock);
  1502. }
  1503. static void mlx4_en_clear_stats(struct net_device *dev)
  1504. {
  1505. struct mlx4_en_priv *priv = netdev_priv(dev);
  1506. struct mlx4_en_dev *mdev = priv->mdev;
  1507. int i;
  1508. if (mlx4_en_DUMP_ETH_STATS(mdev, priv->port, 1))
  1509. en_dbg(HW, priv, "Failed dumping statistics\n");
  1510. memset(&priv->stats, 0, sizeof(priv->stats));
  1511. memset(&priv->pstats, 0, sizeof(priv->pstats));
  1512. memset(&priv->pkstats, 0, sizeof(priv->pkstats));
  1513. memset(&priv->port_stats, 0, sizeof(priv->port_stats));
  1514. for (i = 0; i < priv->tx_ring_num; i++) {
  1515. priv->tx_ring[i].bytes = 0;
  1516. priv->tx_ring[i].packets = 0;
  1517. priv->tx_ring[i].tx_csum = 0;
  1518. }
  1519. for (i = 0; i < priv->rx_ring_num; i++) {
  1520. priv->rx_ring[i].bytes = 0;
  1521. priv->rx_ring[i].packets = 0;
  1522. priv->rx_ring[i].csum_ok = 0;
  1523. priv->rx_ring[i].csum_none = 0;
  1524. }
  1525. }
  1526. static int mlx4_en_open(struct net_device *dev)
  1527. {
  1528. struct mlx4_en_priv *priv = netdev_priv(dev);
  1529. struct mlx4_en_dev *mdev = priv->mdev;
  1530. int err = 0;
  1531. mutex_lock(&mdev->state_lock);
  1532. if (!mdev->device_up) {
  1533. en_err(priv, "Cannot open - device down/disabled\n");
  1534. err = -EBUSY;
  1535. goto out;
  1536. }
  1537. /* Reset HW statistics and SW counters */
  1538. mlx4_en_clear_stats(dev);
  1539. err = mlx4_en_start_port(dev);
  1540. if (err)
  1541. en_err(priv, "Failed starting port:%d\n", priv->port);
  1542. out:
  1543. mutex_unlock(&mdev->state_lock);
  1544. return err;
  1545. }
  1546. static int mlx4_en_close(struct net_device *dev)
  1547. {
  1548. struct mlx4_en_priv *priv = netdev_priv(dev);
  1549. struct mlx4_en_dev *mdev = priv->mdev;
  1550. en_dbg(IFDOWN, priv, "Close port called\n");
  1551. mutex_lock(&mdev->state_lock);
  1552. mlx4_en_stop_port(dev, 0);
  1553. netif_carrier_off(dev);
  1554. mutex_unlock(&mdev->state_lock);
  1555. return 0;
  1556. }
  1557. void mlx4_en_free_resources(struct mlx4_en_priv *priv)
  1558. {
  1559. int i;
  1560. #ifdef CONFIG_RFS_ACCEL
  1561. free_irq_cpu_rmap(priv->dev->rx_cpu_rmap);
  1562. priv->dev->rx_cpu_rmap = NULL;
  1563. #endif
  1564. for (i = 0; i < priv->tx_ring_num; i++) {
  1565. if (priv->tx_ring[i].tx_info)
  1566. mlx4_en_destroy_tx_ring(priv, &priv->tx_ring[i]);
  1567. if (priv->tx_cq[i].buf)
  1568. mlx4_en_destroy_cq(priv, &priv->tx_cq[i]);
  1569. }
  1570. for (i = 0; i < priv->rx_ring_num; i++) {
  1571. if (priv->rx_ring[i].rx_info)
  1572. mlx4_en_destroy_rx_ring(priv, &priv->rx_ring[i],
  1573. priv->prof->rx_ring_size, priv->stride);
  1574. if (priv->rx_cq[i].buf)
  1575. mlx4_en_destroy_cq(priv, &priv->rx_cq[i]);
  1576. }
  1577. if (priv->base_tx_qpn) {
  1578. mlx4_qp_release_range(priv->mdev->dev, priv->base_tx_qpn, priv->tx_ring_num);
  1579. priv->base_tx_qpn = 0;
  1580. }
  1581. }
  1582. int mlx4_en_alloc_resources(struct mlx4_en_priv *priv)
  1583. {
  1584. struct mlx4_en_port_profile *prof = priv->prof;
  1585. int i;
  1586. int err;
  1587. err = mlx4_qp_reserve_range(priv->mdev->dev, priv->tx_ring_num, 256, &priv->base_tx_qpn);
  1588. if (err) {
  1589. en_err(priv, "failed reserving range for TX rings\n");
  1590. return err;
  1591. }
  1592. /* Create tx Rings */
  1593. for (i = 0; i < priv->tx_ring_num; i++) {
  1594. if (mlx4_en_create_cq(priv, &priv->tx_cq[i],
  1595. prof->tx_ring_size, i, TX))
  1596. goto err;
  1597. if (mlx4_en_create_tx_ring(priv, &priv->tx_ring[i], priv->base_tx_qpn + i,
  1598. prof->tx_ring_size, TXBB_SIZE))
  1599. goto err;
  1600. }
  1601. /* Create rx Rings */
  1602. for (i = 0; i < priv->rx_ring_num; i++) {
  1603. if (mlx4_en_create_cq(priv, &priv->rx_cq[i],
  1604. prof->rx_ring_size, i, RX))
  1605. goto err;
  1606. if (mlx4_en_create_rx_ring(priv, &priv->rx_ring[i],
  1607. prof->rx_ring_size, priv->stride))
  1608. goto err;
  1609. }
  1610. #ifdef CONFIG_RFS_ACCEL
  1611. if (priv->mdev->dev->caps.comp_pool) {
  1612. priv->dev->rx_cpu_rmap = alloc_irq_cpu_rmap(priv->mdev->dev->caps.comp_pool);
  1613. if (!priv->dev->rx_cpu_rmap)
  1614. goto err;
  1615. }
  1616. #endif
  1617. return 0;
  1618. err:
  1619. en_err(priv, "Failed to allocate NIC resources\n");
  1620. return -ENOMEM;
  1621. }
  1622. void mlx4_en_destroy_netdev(struct net_device *dev)
  1623. {
  1624. struct mlx4_en_priv *priv = netdev_priv(dev);
  1625. struct mlx4_en_dev *mdev = priv->mdev;
  1626. en_dbg(DRV, priv, "Destroying netdev on port:%d\n", priv->port);
  1627. /* Unregister device - this will close the port if it was up */
  1628. if (priv->registered)
  1629. unregister_netdev(dev);
  1630. if (priv->allocated)
  1631. mlx4_free_hwq_res(mdev->dev, &priv->res, MLX4_EN_PAGE_SIZE);
  1632. cancel_delayed_work(&priv->stats_task);
  1633. cancel_delayed_work(&priv->service_task);
  1634. /* flush any pending task for this netdev */
  1635. flush_workqueue(mdev->workqueue);
  1636. /* Detach the netdev so tasks would not attempt to access it */
  1637. mutex_lock(&mdev->state_lock);
  1638. mdev->pndev[priv->port] = NULL;
  1639. mutex_unlock(&mdev->state_lock);
  1640. mlx4_en_free_resources(priv);
  1641. kfree(priv->tx_ring);
  1642. kfree(priv->tx_cq);
  1643. free_netdev(dev);
  1644. }
  1645. static int mlx4_en_change_mtu(struct net_device *dev, int new_mtu)
  1646. {
  1647. struct mlx4_en_priv *priv = netdev_priv(dev);
  1648. struct mlx4_en_dev *mdev = priv->mdev;
  1649. int err = 0;
  1650. en_dbg(DRV, priv, "Change MTU called - current:%d new:%d\n",
  1651. dev->mtu, new_mtu);
  1652. if ((new_mtu < MLX4_EN_MIN_MTU) || (new_mtu > priv->max_mtu)) {
  1653. en_err(priv, "Bad MTU size:%d.\n", new_mtu);
  1654. return -EPERM;
  1655. }
  1656. dev->mtu = new_mtu;
  1657. if (netif_running(dev)) {
  1658. mutex_lock(&mdev->state_lock);
  1659. if (!mdev->device_up) {
  1660. /* NIC is probably restarting - let watchdog task reset
  1661. * the port */
  1662. en_dbg(DRV, priv, "Change MTU called with card down!?\n");
  1663. } else {
  1664. mlx4_en_stop_port(dev, 1);
  1665. err = mlx4_en_start_port(dev);
  1666. if (err) {
  1667. en_err(priv, "Failed restarting port:%d\n",
  1668. priv->port);
  1669. queue_work(mdev->workqueue, &priv->watchdog_task);
  1670. }
  1671. }
  1672. mutex_unlock(&mdev->state_lock);
  1673. }
  1674. return 0;
  1675. }
  1676. static int mlx4_en_hwtstamp_ioctl(struct net_device *dev, struct ifreq *ifr)
  1677. {
  1678. struct mlx4_en_priv *priv = netdev_priv(dev);
  1679. struct mlx4_en_dev *mdev = priv->mdev;
  1680. struct hwtstamp_config config;
  1681. if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))
  1682. return -EFAULT;
  1683. /* reserved for future extensions */
  1684. if (config.flags)
  1685. return -EINVAL;
  1686. /* device doesn't support time stamping */
  1687. if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS))
  1688. return -EINVAL;
  1689. /* TX HW timestamp */
  1690. switch (config.tx_type) {
  1691. case HWTSTAMP_TX_OFF:
  1692. case HWTSTAMP_TX_ON:
  1693. break;
  1694. default:
  1695. return -ERANGE;
  1696. }
  1697. /* RX HW timestamp */
  1698. switch (config.rx_filter) {
  1699. case HWTSTAMP_FILTER_NONE:
  1700. break;
  1701. case HWTSTAMP_FILTER_ALL:
  1702. case HWTSTAMP_FILTER_SOME:
  1703. case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
  1704. case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
  1705. case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
  1706. case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
  1707. case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
  1708. case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
  1709. case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
  1710. case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
  1711. case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
  1712. case HWTSTAMP_FILTER_PTP_V2_EVENT:
  1713. case HWTSTAMP_FILTER_PTP_V2_SYNC:
  1714. case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
  1715. config.rx_filter = HWTSTAMP_FILTER_ALL;
  1716. break;
  1717. default:
  1718. return -ERANGE;
  1719. }
  1720. if (mlx4_en_timestamp_config(dev, config.tx_type, config.rx_filter)) {
  1721. config.tx_type = HWTSTAMP_TX_OFF;
  1722. config.rx_filter = HWTSTAMP_FILTER_NONE;
  1723. }
  1724. return copy_to_user(ifr->ifr_data, &config,
  1725. sizeof(config)) ? -EFAULT : 0;
  1726. }
  1727. static int mlx4_en_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
  1728. {
  1729. switch (cmd) {
  1730. case SIOCSHWTSTAMP:
  1731. return mlx4_en_hwtstamp_ioctl(dev, ifr);
  1732. default:
  1733. return -EOPNOTSUPP;
  1734. }
  1735. }
  1736. static int mlx4_en_set_features(struct net_device *netdev,
  1737. netdev_features_t features)
  1738. {
  1739. struct mlx4_en_priv *priv = netdev_priv(netdev);
  1740. if (features & NETIF_F_LOOPBACK)
  1741. priv->ctrl_flags |= cpu_to_be32(MLX4_WQE_CTRL_FORCE_LOOPBACK);
  1742. else
  1743. priv->ctrl_flags &=
  1744. cpu_to_be32(~MLX4_WQE_CTRL_FORCE_LOOPBACK);
  1745. mlx4_en_update_loopback_state(netdev, features);
  1746. return 0;
  1747. }
  1748. static int mlx4_en_set_vf_mac(struct net_device *dev, int queue, u8 *mac)
  1749. {
  1750. struct mlx4_en_priv *en_priv = netdev_priv(dev);
  1751. struct mlx4_en_dev *mdev = en_priv->mdev;
  1752. u64 mac_u64 = mlx4_en_mac_to_u64(mac);
  1753. if (!is_valid_ether_addr(mac))
  1754. return -EINVAL;
  1755. return mlx4_set_vf_mac(mdev->dev, en_priv->port, queue, mac_u64);
  1756. }
  1757. static int mlx4_en_set_vf_vlan(struct net_device *dev, int vf, u16 vlan, u8 qos)
  1758. {
  1759. struct mlx4_en_priv *en_priv = netdev_priv(dev);
  1760. struct mlx4_en_dev *mdev = en_priv->mdev;
  1761. return mlx4_set_vf_vlan(mdev->dev, en_priv->port, vf, vlan, qos);
  1762. }
  1763. static int mlx4_en_set_vf_spoofchk(struct net_device *dev, int vf, bool setting)
  1764. {
  1765. struct mlx4_en_priv *en_priv = netdev_priv(dev);
  1766. struct mlx4_en_dev *mdev = en_priv->mdev;
  1767. return mlx4_set_vf_spoofchk(mdev->dev, en_priv->port, vf, setting);
  1768. }
  1769. static int mlx4_en_get_vf_config(struct net_device *dev, int vf, struct ifla_vf_info *ivf)
  1770. {
  1771. struct mlx4_en_priv *en_priv = netdev_priv(dev);
  1772. struct mlx4_en_dev *mdev = en_priv->mdev;
  1773. return mlx4_get_vf_config(mdev->dev, en_priv->port, vf, ivf);
  1774. }
  1775. static int mlx4_en_set_vf_link_state(struct net_device *dev, int vf, int link_state)
  1776. {
  1777. struct mlx4_en_priv *en_priv = netdev_priv(dev);
  1778. struct mlx4_en_dev *mdev = en_priv->mdev;
  1779. return mlx4_set_vf_link_state(mdev->dev, en_priv->port, vf, link_state);
  1780. }
  1781. static const struct net_device_ops mlx4_netdev_ops = {
  1782. .ndo_open = mlx4_en_open,
  1783. .ndo_stop = mlx4_en_close,
  1784. .ndo_start_xmit = mlx4_en_xmit,
  1785. .ndo_select_queue = mlx4_en_select_queue,
  1786. .ndo_get_stats = mlx4_en_get_stats,
  1787. .ndo_set_rx_mode = mlx4_en_set_rx_mode,
  1788. .ndo_set_mac_address = mlx4_en_set_mac,
  1789. .ndo_validate_addr = eth_validate_addr,
  1790. .ndo_change_mtu = mlx4_en_change_mtu,
  1791. .ndo_do_ioctl = mlx4_en_ioctl,
  1792. .ndo_tx_timeout = mlx4_en_tx_timeout,
  1793. .ndo_vlan_rx_add_vid = mlx4_en_vlan_rx_add_vid,
  1794. .ndo_vlan_rx_kill_vid = mlx4_en_vlan_rx_kill_vid,
  1795. #ifdef CONFIG_NET_POLL_CONTROLLER
  1796. .ndo_poll_controller = mlx4_en_netpoll,
  1797. #endif
  1798. .ndo_set_features = mlx4_en_set_features,
  1799. .ndo_setup_tc = mlx4_en_setup_tc,
  1800. #ifdef CONFIG_RFS_ACCEL
  1801. .ndo_rx_flow_steer = mlx4_en_filter_rfs,
  1802. #endif
  1803. #ifdef CONFIG_NET_LL_RX_POLL
  1804. .ndo_ll_poll = mlx4_en_low_latency_recv,
  1805. #endif
  1806. };
  1807. static const struct net_device_ops mlx4_netdev_ops_master = {
  1808. .ndo_open = mlx4_en_open,
  1809. .ndo_stop = mlx4_en_close,
  1810. .ndo_start_xmit = mlx4_en_xmit,
  1811. .ndo_select_queue = mlx4_en_select_queue,
  1812. .ndo_get_stats = mlx4_en_get_stats,
  1813. .ndo_set_rx_mode = mlx4_en_set_rx_mode,
  1814. .ndo_set_mac_address = mlx4_en_set_mac,
  1815. .ndo_validate_addr = eth_validate_addr,
  1816. .ndo_change_mtu = mlx4_en_change_mtu,
  1817. .ndo_tx_timeout = mlx4_en_tx_timeout,
  1818. .ndo_vlan_rx_add_vid = mlx4_en_vlan_rx_add_vid,
  1819. .ndo_vlan_rx_kill_vid = mlx4_en_vlan_rx_kill_vid,
  1820. .ndo_set_vf_mac = mlx4_en_set_vf_mac,
  1821. .ndo_set_vf_vlan = mlx4_en_set_vf_vlan,
  1822. .ndo_set_vf_spoofchk = mlx4_en_set_vf_spoofchk,
  1823. .ndo_set_vf_link_state = mlx4_en_set_vf_link_state,
  1824. .ndo_get_vf_config = mlx4_en_get_vf_config,
  1825. #ifdef CONFIG_NET_POLL_CONTROLLER
  1826. .ndo_poll_controller = mlx4_en_netpoll,
  1827. #endif
  1828. .ndo_set_features = mlx4_en_set_features,
  1829. .ndo_setup_tc = mlx4_en_setup_tc,
  1830. #ifdef CONFIG_RFS_ACCEL
  1831. .ndo_rx_flow_steer = mlx4_en_filter_rfs,
  1832. #endif
  1833. };
  1834. int mlx4_en_init_netdev(struct mlx4_en_dev *mdev, int port,
  1835. struct mlx4_en_port_profile *prof)
  1836. {
  1837. struct net_device *dev;
  1838. struct mlx4_en_priv *priv;
  1839. int i;
  1840. int err;
  1841. u64 mac_u64;
  1842. dev = alloc_etherdev_mqs(sizeof(struct mlx4_en_priv),
  1843. MAX_TX_RINGS, MAX_RX_RINGS);
  1844. if (dev == NULL)
  1845. return -ENOMEM;
  1846. netif_set_real_num_tx_queues(dev, prof->tx_ring_num);
  1847. netif_set_real_num_rx_queues(dev, prof->rx_ring_num);
  1848. SET_NETDEV_DEV(dev, &mdev->dev->pdev->dev);
  1849. dev->dev_id = port - 1;
  1850. /*
  1851. * Initialize driver private data
  1852. */
  1853. priv = netdev_priv(dev);
  1854. memset(priv, 0, sizeof(struct mlx4_en_priv));
  1855. priv->dev = dev;
  1856. priv->mdev = mdev;
  1857. priv->ddev = &mdev->pdev->dev;
  1858. priv->prof = prof;
  1859. priv->port = port;
  1860. priv->port_up = false;
  1861. priv->flags = prof->flags;
  1862. priv->ctrl_flags = cpu_to_be32(MLX4_WQE_CTRL_CQ_UPDATE |
  1863. MLX4_WQE_CTRL_SOLICITED);
  1864. priv->num_tx_rings_p_up = mdev->profile.num_tx_rings_p_up;
  1865. priv->tx_ring_num = prof->tx_ring_num;
  1866. priv->tx_ring = kzalloc(sizeof(struct mlx4_en_tx_ring) * MAX_TX_RINGS,
  1867. GFP_KERNEL);
  1868. if (!priv->tx_ring) {
  1869. err = -ENOMEM;
  1870. goto out;
  1871. }
  1872. priv->tx_cq = kzalloc(sizeof(struct mlx4_en_cq) * MAX_TX_RINGS,
  1873. GFP_KERNEL);
  1874. if (!priv->tx_cq) {
  1875. err = -ENOMEM;
  1876. goto out;
  1877. }
  1878. priv->rx_ring_num = prof->rx_ring_num;
  1879. priv->cqe_factor = (mdev->dev->caps.cqe_size == 64) ? 1 : 0;
  1880. priv->mac_index = -1;
  1881. priv->msg_enable = MLX4_EN_MSG_LEVEL;
  1882. spin_lock_init(&priv->stats_lock);
  1883. INIT_WORK(&priv->rx_mode_task, mlx4_en_do_set_rx_mode);
  1884. INIT_WORK(&priv->watchdog_task, mlx4_en_restart);
  1885. INIT_WORK(&priv->linkstate_task, mlx4_en_linkstate);
  1886. INIT_DELAYED_WORK(&priv->stats_task, mlx4_en_do_get_stats);
  1887. INIT_DELAYED_WORK(&priv->service_task, mlx4_en_service_task);
  1888. #ifdef CONFIG_MLX4_EN_DCB
  1889. if (!mlx4_is_slave(priv->mdev->dev)) {
  1890. if (mdev->dev->caps.flags & MLX4_DEV_CAP_FLAG_SET_ETH_SCHED) {
  1891. dev->dcbnl_ops = &mlx4_en_dcbnl_ops;
  1892. } else {
  1893. en_info(priv, "enabling only PFC DCB ops\n");
  1894. dev->dcbnl_ops = &mlx4_en_dcbnl_pfc_ops;
  1895. }
  1896. }
  1897. #endif
  1898. for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i)
  1899. INIT_HLIST_HEAD(&priv->mac_hash[i]);
  1900. /* Query for default mac and max mtu */
  1901. priv->max_mtu = mdev->dev->caps.eth_mtu_cap[priv->port];
  1902. /* Set default MAC */
  1903. dev->addr_len = ETH_ALEN;
  1904. mlx4_en_u64_to_mac(dev->dev_addr, mdev->dev->caps.def_mac[priv->port]);
  1905. if (!is_valid_ether_addr(dev->dev_addr)) {
  1906. if (mlx4_is_slave(priv->mdev->dev)) {
  1907. eth_hw_addr_random(dev);
  1908. en_warn(priv, "Assigned random MAC address %pM\n", dev->dev_addr);
  1909. mac_u64 = mlx4_en_mac_to_u64(dev->dev_addr);
  1910. mdev->dev->caps.def_mac[priv->port] = mac_u64;
  1911. } else {
  1912. en_err(priv, "Port: %d, invalid mac burned: %pM, quiting\n",
  1913. priv->port, dev->dev_addr);
  1914. err = -EINVAL;
  1915. goto out;
  1916. }
  1917. }
  1918. memcpy(priv->prev_mac, dev->dev_addr, sizeof(priv->prev_mac));
  1919. priv->stride = roundup_pow_of_two(sizeof(struct mlx4_en_rx_desc) +
  1920. DS_SIZE * MLX4_EN_MAX_RX_FRAGS);
  1921. err = mlx4_en_alloc_resources(priv);
  1922. if (err)
  1923. goto out;
  1924. #ifdef CONFIG_RFS_ACCEL
  1925. INIT_LIST_HEAD(&priv->filters);
  1926. spin_lock_init(&priv->filters_lock);
  1927. #endif
  1928. /* Initialize time stamping config */
  1929. priv->hwtstamp_config.flags = 0;
  1930. priv->hwtstamp_config.tx_type = HWTSTAMP_TX_OFF;
  1931. priv->hwtstamp_config.rx_filter = HWTSTAMP_FILTER_NONE;
  1932. /* Allocate page for receive rings */
  1933. err = mlx4_alloc_hwq_res(mdev->dev, &priv->res,
  1934. MLX4_EN_PAGE_SIZE, MLX4_EN_PAGE_SIZE);
  1935. if (err) {
  1936. en_err(priv, "Failed to allocate page for rx qps\n");
  1937. goto out;
  1938. }
  1939. priv->allocated = 1;
  1940. /*
  1941. * Initialize netdev entry points
  1942. */
  1943. if (mlx4_is_master(priv->mdev->dev))
  1944. dev->netdev_ops = &mlx4_netdev_ops_master;
  1945. else
  1946. dev->netdev_ops = &mlx4_netdev_ops;
  1947. dev->watchdog_timeo = MLX4_EN_WATCHDOG_TIMEOUT;
  1948. netif_set_real_num_tx_queues(dev, priv->tx_ring_num);
  1949. netif_set_real_num_rx_queues(dev, priv->rx_ring_num);
  1950. SET_ETHTOOL_OPS(dev, &mlx4_en_ethtool_ops);
  1951. /*
  1952. * Set driver features
  1953. */
  1954. dev->hw_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
  1955. if (mdev->LSO_support)
  1956. dev->hw_features |= NETIF_F_TSO | NETIF_F_TSO6;
  1957. dev->vlan_features = dev->hw_features;
  1958. dev->hw_features |= NETIF_F_RXCSUM | NETIF_F_RXHASH;
  1959. dev->features = dev->hw_features | NETIF_F_HIGHDMA |
  1960. NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX |
  1961. NETIF_F_HW_VLAN_CTAG_FILTER;
  1962. dev->hw_features |= NETIF_F_LOOPBACK;
  1963. if (mdev->dev->caps.steering_mode ==
  1964. MLX4_STEERING_MODE_DEVICE_MANAGED)
  1965. dev->hw_features |= NETIF_F_NTUPLE;
  1966. if (mdev->dev->caps.steering_mode != MLX4_STEERING_MODE_A0)
  1967. dev->priv_flags |= IFF_UNICAST_FLT;
  1968. mdev->pndev[port] = dev;
  1969. netif_carrier_off(dev);
  1970. err = register_netdev(dev);
  1971. if (err) {
  1972. en_err(priv, "Netdev registration failed for port %d\n", port);
  1973. goto out;
  1974. }
  1975. priv->registered = 1;
  1976. en_warn(priv, "Using %d TX rings\n", prof->tx_ring_num);
  1977. en_warn(priv, "Using %d RX rings\n", prof->rx_ring_num);
  1978. mlx4_en_update_loopback_state(priv->dev, priv->dev->features);
  1979. /* Configure port */
  1980. mlx4_en_calc_rx_buf(dev);
  1981. err = mlx4_SET_PORT_general(mdev->dev, priv->port,
  1982. priv->rx_skb_size + ETH_FCS_LEN,
  1983. prof->tx_pause, prof->tx_ppp,
  1984. prof->rx_pause, prof->rx_ppp);
  1985. if (err) {
  1986. en_err(priv, "Failed setting port general configurations "
  1987. "for port %d, with error %d\n", priv->port, err);
  1988. goto out;
  1989. }
  1990. /* Init port */
  1991. en_warn(priv, "Initializing port\n");
  1992. err = mlx4_INIT_PORT(mdev->dev, priv->port);
  1993. if (err) {
  1994. en_err(priv, "Failed Initializing port\n");
  1995. goto out;
  1996. }
  1997. mlx4_en_set_default_moderation(priv);
  1998. queue_delayed_work(mdev->workqueue, &priv->stats_task, STATS_DELAY);
  1999. if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS)
  2000. queue_delayed_work(mdev->workqueue, &priv->service_task,
  2001. SERVICE_TASK_DELAY);
  2002. return 0;
  2003. out:
  2004. mlx4_en_destroy_netdev(dev);
  2005. return err;
  2006. }