setup-common.c 15 KB

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  1. /*
  2. * Common boot and setup code for both 32-bit and 64-bit.
  3. * Extracted from arch/powerpc/kernel/setup_64.c.
  4. *
  5. * Copyright (C) 2001 PPC64 Team, IBM Corp
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License
  9. * as published by the Free Software Foundation; either version
  10. * 2 of the License, or (at your option) any later version.
  11. */
  12. #undef DEBUG
  13. #include <linux/module.h>
  14. #include <linux/string.h>
  15. #include <linux/sched.h>
  16. #include <linux/init.h>
  17. #include <linux/kernel.h>
  18. #include <linux/reboot.h>
  19. #include <linux/delay.h>
  20. #include <linux/initrd.h>
  21. #include <linux/platform_device.h>
  22. #include <linux/seq_file.h>
  23. #include <linux/ioport.h>
  24. #include <linux/console.h>
  25. #include <linux/utsname.h>
  26. #include <linux/screen_info.h>
  27. #include <linux/root_dev.h>
  28. #include <linux/notifier.h>
  29. #include <linux/cpu.h>
  30. #include <linux/unistd.h>
  31. #include <linux/serial.h>
  32. #include <linux/serial_8250.h>
  33. #include <linux/debugfs.h>
  34. #include <linux/percpu.h>
  35. #include <linux/lmb.h>
  36. #include <asm/io.h>
  37. #include <asm/prom.h>
  38. #include <asm/processor.h>
  39. #include <asm/vdso_datapage.h>
  40. #include <asm/pgtable.h>
  41. #include <asm/smp.h>
  42. #include <asm/elf.h>
  43. #include <asm/machdep.h>
  44. #include <asm/time.h>
  45. #include <asm/cputable.h>
  46. #include <asm/sections.h>
  47. #include <asm/firmware.h>
  48. #include <asm/btext.h>
  49. #include <asm/nvram.h>
  50. #include <asm/setup.h>
  51. #include <asm/system.h>
  52. #include <asm/rtas.h>
  53. #include <asm/iommu.h>
  54. #include <asm/serial.h>
  55. #include <asm/cache.h>
  56. #include <asm/page.h>
  57. #include <asm/mmu.h>
  58. #include <asm/xmon.h>
  59. #include <asm/cputhreads.h>
  60. #include "setup.h"
  61. #ifdef DEBUG
  62. #include <asm/udbg.h>
  63. #define DBG(fmt...) udbg_printf(fmt)
  64. #else
  65. #define DBG(fmt...)
  66. #endif
  67. /* The main machine-dep calls structure
  68. */
  69. struct machdep_calls ppc_md;
  70. EXPORT_SYMBOL(ppc_md);
  71. struct machdep_calls *machine_id;
  72. EXPORT_SYMBOL(machine_id);
  73. unsigned long klimit = (unsigned long) _end;
  74. char cmd_line[COMMAND_LINE_SIZE];
  75. /*
  76. * This still seems to be needed... -- paulus
  77. */
  78. struct screen_info screen_info = {
  79. .orig_x = 0,
  80. .orig_y = 25,
  81. .orig_video_cols = 80,
  82. .orig_video_lines = 25,
  83. .orig_video_isVGA = 1,
  84. .orig_video_points = 16
  85. };
  86. #ifdef __DO_IRQ_CANON
  87. /* XXX should go elsewhere eventually */
  88. int ppc_do_canonicalize_irqs;
  89. EXPORT_SYMBOL(ppc_do_canonicalize_irqs);
  90. #endif
  91. /* also used by kexec */
  92. void machine_shutdown(void)
  93. {
  94. if (ppc_md.machine_shutdown)
  95. ppc_md.machine_shutdown();
  96. }
  97. void machine_restart(char *cmd)
  98. {
  99. machine_shutdown();
  100. if (ppc_md.restart)
  101. ppc_md.restart(cmd);
  102. #ifdef CONFIG_SMP
  103. smp_send_stop();
  104. #endif
  105. printk(KERN_EMERG "System Halted, OK to turn off power\n");
  106. local_irq_disable();
  107. while (1) ;
  108. }
  109. void machine_power_off(void)
  110. {
  111. machine_shutdown();
  112. if (ppc_md.power_off)
  113. ppc_md.power_off();
  114. #ifdef CONFIG_SMP
  115. smp_send_stop();
  116. #endif
  117. printk(KERN_EMERG "System Halted, OK to turn off power\n");
  118. local_irq_disable();
  119. while (1) ;
  120. }
  121. /* Used by the G5 thermal driver */
  122. EXPORT_SYMBOL_GPL(machine_power_off);
  123. void (*pm_power_off)(void) = machine_power_off;
  124. EXPORT_SYMBOL_GPL(pm_power_off);
  125. void machine_halt(void)
  126. {
  127. machine_shutdown();
  128. if (ppc_md.halt)
  129. ppc_md.halt();
  130. #ifdef CONFIG_SMP
  131. smp_send_stop();
  132. #endif
  133. printk(KERN_EMERG "System Halted, OK to turn off power\n");
  134. local_irq_disable();
  135. while (1) ;
  136. }
  137. #ifdef CONFIG_TAU
  138. extern u32 cpu_temp(unsigned long cpu);
  139. extern u32 cpu_temp_both(unsigned long cpu);
  140. #endif /* CONFIG_TAU */
  141. #ifdef CONFIG_SMP
  142. DEFINE_PER_CPU(unsigned int, pvr);
  143. #endif
  144. static int show_cpuinfo(struct seq_file *m, void *v)
  145. {
  146. unsigned long cpu_id = (unsigned long)v - 1;
  147. unsigned int pvr;
  148. unsigned short maj;
  149. unsigned short min;
  150. if (cpu_id == NR_CPUS) {
  151. struct device_node *root;
  152. const char *model = NULL;
  153. #if defined(CONFIG_SMP) && defined(CONFIG_PPC32)
  154. unsigned long bogosum = 0;
  155. int i;
  156. for_each_online_cpu(i)
  157. bogosum += loops_per_jiffy;
  158. seq_printf(m, "total bogomips\t: %lu.%02lu\n",
  159. bogosum/(500000/HZ), bogosum/(5000/HZ) % 100);
  160. #endif /* CONFIG_SMP && CONFIG_PPC32 */
  161. seq_printf(m, "timebase\t: %lu\n", ppc_tb_freq);
  162. if (ppc_md.name)
  163. seq_printf(m, "platform\t: %s\n", ppc_md.name);
  164. root = of_find_node_by_path("/");
  165. if (root)
  166. model = of_get_property(root, "model", NULL);
  167. if (model)
  168. seq_printf(m, "model\t\t: %s\n", model);
  169. of_node_put(root);
  170. if (ppc_md.show_cpuinfo != NULL)
  171. ppc_md.show_cpuinfo(m);
  172. return 0;
  173. }
  174. /* We only show online cpus: disable preempt (overzealous, I
  175. * knew) to prevent cpu going down. */
  176. preempt_disable();
  177. if (!cpu_online(cpu_id)) {
  178. preempt_enable();
  179. return 0;
  180. }
  181. #ifdef CONFIG_SMP
  182. pvr = per_cpu(pvr, cpu_id);
  183. #else
  184. pvr = mfspr(SPRN_PVR);
  185. #endif
  186. maj = (pvr >> 8) & 0xFF;
  187. min = pvr & 0xFF;
  188. seq_printf(m, "processor\t: %lu\n", cpu_id);
  189. seq_printf(m, "cpu\t\t: ");
  190. if (cur_cpu_spec->pvr_mask)
  191. seq_printf(m, "%s", cur_cpu_spec->cpu_name);
  192. else
  193. seq_printf(m, "unknown (%08x)", pvr);
  194. #ifdef CONFIG_ALTIVEC
  195. if (cpu_has_feature(CPU_FTR_ALTIVEC))
  196. seq_printf(m, ", altivec supported");
  197. #endif /* CONFIG_ALTIVEC */
  198. seq_printf(m, "\n");
  199. #ifdef CONFIG_TAU
  200. if (cur_cpu_spec->cpu_features & CPU_FTR_TAU) {
  201. #ifdef CONFIG_TAU_AVERAGE
  202. /* more straightforward, but potentially misleading */
  203. seq_printf(m, "temperature \t: %u C (uncalibrated)\n",
  204. cpu_temp(cpu_id));
  205. #else
  206. /* show the actual temp sensor range */
  207. u32 temp;
  208. temp = cpu_temp_both(cpu_id);
  209. seq_printf(m, "temperature \t: %u-%u C (uncalibrated)\n",
  210. temp & 0xff, temp >> 16);
  211. #endif
  212. }
  213. #endif /* CONFIG_TAU */
  214. /*
  215. * Assume here that all clock rates are the same in a
  216. * smp system. -- Cort
  217. */
  218. if (ppc_proc_freq)
  219. seq_printf(m, "clock\t\t: %lu.%06luMHz\n",
  220. ppc_proc_freq / 1000000, ppc_proc_freq % 1000000);
  221. if (ppc_md.show_percpuinfo != NULL)
  222. ppc_md.show_percpuinfo(m, cpu_id);
  223. /* If we are a Freescale core do a simple check so
  224. * we dont have to keep adding cases in the future */
  225. if (PVR_VER(pvr) & 0x8000) {
  226. maj = PVR_MAJ(pvr);
  227. min = PVR_MIN(pvr);
  228. } else {
  229. switch (PVR_VER(pvr)) {
  230. case 0x0020: /* 403 family */
  231. maj = PVR_MAJ(pvr) + 1;
  232. min = PVR_MIN(pvr);
  233. break;
  234. case 0x1008: /* 740P/750P ?? */
  235. maj = ((pvr >> 8) & 0xFF) - 1;
  236. min = pvr & 0xFF;
  237. break;
  238. default:
  239. maj = (pvr >> 8) & 0xFF;
  240. min = pvr & 0xFF;
  241. break;
  242. }
  243. }
  244. seq_printf(m, "revision\t: %hd.%hd (pvr %04x %04x)\n",
  245. maj, min, PVR_VER(pvr), PVR_REV(pvr));
  246. #ifdef CONFIG_PPC32
  247. seq_printf(m, "bogomips\t: %lu.%02lu\n",
  248. loops_per_jiffy / (500000/HZ),
  249. (loops_per_jiffy / (5000/HZ)) % 100);
  250. #endif
  251. #ifdef CONFIG_SMP
  252. seq_printf(m, "\n");
  253. #endif
  254. preempt_enable();
  255. return 0;
  256. }
  257. static void *c_start(struct seq_file *m, loff_t *pos)
  258. {
  259. unsigned long i = *pos;
  260. return i <= NR_CPUS ? (void *)(i + 1) : NULL;
  261. }
  262. static void *c_next(struct seq_file *m, void *v, loff_t *pos)
  263. {
  264. ++*pos;
  265. return c_start(m, pos);
  266. }
  267. static void c_stop(struct seq_file *m, void *v)
  268. {
  269. }
  270. struct seq_operations cpuinfo_op = {
  271. .start =c_start,
  272. .next = c_next,
  273. .stop = c_stop,
  274. .show = show_cpuinfo,
  275. };
  276. void __init check_for_initrd(void)
  277. {
  278. #ifdef CONFIG_BLK_DEV_INITRD
  279. DBG(" -> check_for_initrd() initrd_start=0x%lx initrd_end=0x%lx\n",
  280. initrd_start, initrd_end);
  281. /* If we were passed an initrd, set the ROOT_DEV properly if the values
  282. * look sensible. If not, clear initrd reference.
  283. */
  284. if (is_kernel_addr(initrd_start) && is_kernel_addr(initrd_end) &&
  285. initrd_end > initrd_start)
  286. ROOT_DEV = Root_RAM0;
  287. else
  288. initrd_start = initrd_end = 0;
  289. if (initrd_start)
  290. printk("Found initrd at 0x%lx:0x%lx\n", initrd_start, initrd_end);
  291. DBG(" <- check_for_initrd()\n");
  292. #endif /* CONFIG_BLK_DEV_INITRD */
  293. }
  294. #ifdef CONFIG_SMP
  295. int threads_per_core, threads_shift;
  296. cpumask_t threads_core_mask;
  297. static void __init cpu_init_thread_core_maps(int tpc)
  298. {
  299. int i;
  300. threads_per_core = tpc;
  301. threads_core_mask = CPU_MASK_NONE;
  302. /* This implementation only supports power of 2 number of threads
  303. * for simplicity and performance
  304. */
  305. threads_shift = ilog2(tpc);
  306. BUG_ON(tpc != (1 << threads_shift));
  307. for (i = 0; i < tpc; i++)
  308. cpu_set(i, threads_core_mask);
  309. printk(KERN_INFO "CPU maps initialized for %d thread%s per core\n",
  310. tpc, tpc > 1 ? "s" : "");
  311. printk(KERN_DEBUG " (thread shift is %d)\n", threads_shift);
  312. }
  313. /**
  314. * setup_cpu_maps - initialize the following cpu maps:
  315. * cpu_possible_map
  316. * cpu_present_map
  317. *
  318. * Having the possible map set up early allows us to restrict allocations
  319. * of things like irqstacks to num_possible_cpus() rather than NR_CPUS.
  320. *
  321. * We do not initialize the online map here; cpus set their own bits in
  322. * cpu_online_map as they come up.
  323. *
  324. * This function is valid only for Open Firmware systems. finish_device_tree
  325. * must be called before using this.
  326. *
  327. * While we're here, we may as well set the "physical" cpu ids in the paca.
  328. *
  329. * NOTE: This must match the parsing done in early_init_dt_scan_cpus.
  330. */
  331. void __init smp_setup_cpu_maps(void)
  332. {
  333. struct device_node *dn = NULL;
  334. int cpu = 0;
  335. int nthreads = 1;
  336. DBG("smp_setup_cpu_maps()\n");
  337. while ((dn = of_find_node_by_type(dn, "cpu")) && cpu < NR_CPUS) {
  338. const int *intserv;
  339. int j, len;
  340. DBG(" * %s...\n", dn->full_name);
  341. intserv = of_get_property(dn, "ibm,ppc-interrupt-server#s",
  342. &len);
  343. if (intserv) {
  344. nthreads = len / sizeof(int);
  345. DBG(" ibm,ppc-interrupt-server#s -> %d threads\n",
  346. nthreads);
  347. } else {
  348. DBG(" no ibm,ppc-interrupt-server#s -> 1 thread\n");
  349. intserv = of_get_property(dn, "reg", NULL);
  350. if (!intserv)
  351. intserv = &cpu; /* assume logical == phys */
  352. }
  353. for (j = 0; j < nthreads && cpu < NR_CPUS; j++) {
  354. DBG(" thread %d -> cpu %d (hard id %d)\n",
  355. j, cpu, intserv[j]);
  356. cpu_set(cpu, cpu_present_map);
  357. set_hard_smp_processor_id(cpu, intserv[j]);
  358. cpu_set(cpu, cpu_possible_map);
  359. cpu++;
  360. }
  361. }
  362. /* If no SMT supported, nthreads is forced to 1 */
  363. if (!cpu_has_feature(CPU_FTR_SMT)) {
  364. DBG(" SMT disabled ! nthreads forced to 1\n");
  365. nthreads = 1;
  366. }
  367. #ifdef CONFIG_PPC64
  368. /*
  369. * On pSeries LPAR, we need to know how many cpus
  370. * could possibly be added to this partition.
  371. */
  372. if (machine_is(pseries) && firmware_has_feature(FW_FEATURE_LPAR) &&
  373. (dn = of_find_node_by_path("/rtas"))) {
  374. int num_addr_cell, num_size_cell, maxcpus;
  375. const unsigned int *ireg;
  376. num_addr_cell = of_n_addr_cells(dn);
  377. num_size_cell = of_n_size_cells(dn);
  378. ireg = of_get_property(dn, "ibm,lrdr-capacity", NULL);
  379. if (!ireg)
  380. goto out;
  381. maxcpus = ireg[num_addr_cell + num_size_cell];
  382. /* Double maxcpus for processors which have SMT capability */
  383. if (cpu_has_feature(CPU_FTR_SMT))
  384. maxcpus *= nthreads;
  385. if (maxcpus > NR_CPUS) {
  386. printk(KERN_WARNING
  387. "Partition configured for %d cpus, "
  388. "operating system maximum is %d.\n",
  389. maxcpus, NR_CPUS);
  390. maxcpus = NR_CPUS;
  391. } else
  392. printk(KERN_INFO "Partition configured for %d cpus.\n",
  393. maxcpus);
  394. for (cpu = 0; cpu < maxcpus; cpu++)
  395. cpu_set(cpu, cpu_possible_map);
  396. out:
  397. of_node_put(dn);
  398. }
  399. vdso_data->processorCount = num_present_cpus();
  400. #endif /* CONFIG_PPC64 */
  401. /* Initialize CPU <=> thread mapping/
  402. *
  403. * WARNING: We assume that the number of threads is the same for
  404. * every CPU in the system. If that is not the case, then some code
  405. * here will have to be reworked
  406. */
  407. cpu_init_thread_core_maps(nthreads);
  408. }
  409. #endif /* CONFIG_SMP */
  410. #ifdef CONFIG_PCSPKR_PLATFORM
  411. static __init int add_pcspkr(void)
  412. {
  413. struct device_node *np;
  414. struct platform_device *pd;
  415. int ret;
  416. np = of_find_compatible_node(NULL, NULL, "pnpPNP,100");
  417. of_node_put(np);
  418. if (!np)
  419. return -ENODEV;
  420. pd = platform_device_alloc("pcspkr", -1);
  421. if (!pd)
  422. return -ENOMEM;
  423. ret = platform_device_add(pd);
  424. if (ret)
  425. platform_device_put(pd);
  426. return ret;
  427. }
  428. device_initcall(add_pcspkr);
  429. #endif /* CONFIG_PCSPKR_PLATFORM */
  430. void probe_machine(void)
  431. {
  432. extern struct machdep_calls __machine_desc_start;
  433. extern struct machdep_calls __machine_desc_end;
  434. /*
  435. * Iterate all ppc_md structures until we find the proper
  436. * one for the current machine type
  437. */
  438. DBG("Probing machine type ...\n");
  439. for (machine_id = &__machine_desc_start;
  440. machine_id < &__machine_desc_end;
  441. machine_id++) {
  442. DBG(" %s ...", machine_id->name);
  443. memcpy(&ppc_md, machine_id, sizeof(struct machdep_calls));
  444. if (ppc_md.probe()) {
  445. DBG(" match !\n");
  446. break;
  447. }
  448. DBG("\n");
  449. }
  450. /* What can we do if we didn't find ? */
  451. if (machine_id >= &__machine_desc_end) {
  452. DBG("No suitable machine found !\n");
  453. for (;;);
  454. }
  455. printk(KERN_INFO "Using %s machine description\n", ppc_md.name);
  456. }
  457. /* Match a class of boards, not a specific device configuration. */
  458. int check_legacy_ioport(unsigned long base_port)
  459. {
  460. struct device_node *parent, *np = NULL;
  461. int ret = -ENODEV;
  462. switch(base_port) {
  463. case I8042_DATA_REG:
  464. if (!(np = of_find_compatible_node(NULL, NULL, "pnpPNP,303")))
  465. np = of_find_compatible_node(NULL, NULL, "pnpPNP,f03");
  466. if (np) {
  467. parent = of_get_parent(np);
  468. of_node_put(np);
  469. np = parent;
  470. break;
  471. }
  472. np = of_find_node_by_type(NULL, "8042");
  473. /* Pegasos has no device_type on its 8042 node, look for the
  474. * name instead */
  475. if (!np)
  476. np = of_find_node_by_name(NULL, "8042");
  477. break;
  478. case FDC_BASE: /* FDC1 */
  479. np = of_find_node_by_type(NULL, "fdc");
  480. break;
  481. #ifdef CONFIG_PPC_PREP
  482. case _PIDXR:
  483. case _PNPWRP:
  484. case PNPBIOS_BASE:
  485. /* implement me */
  486. #endif
  487. default:
  488. /* ipmi is supposed to fail here */
  489. break;
  490. }
  491. if (!np)
  492. return ret;
  493. parent = of_get_parent(np);
  494. if (parent) {
  495. if (strcmp(parent->type, "isa") == 0)
  496. ret = 0;
  497. of_node_put(parent);
  498. }
  499. of_node_put(np);
  500. return ret;
  501. }
  502. EXPORT_SYMBOL(check_legacy_ioport);
  503. static int ppc_panic_event(struct notifier_block *this,
  504. unsigned long event, void *ptr)
  505. {
  506. ppc_md.panic(ptr); /* May not return */
  507. return NOTIFY_DONE;
  508. }
  509. static struct notifier_block ppc_panic_block = {
  510. .notifier_call = ppc_panic_event,
  511. .priority = INT_MIN /* may not return; must be done last */
  512. };
  513. void __init setup_panic(void)
  514. {
  515. atomic_notifier_chain_register(&panic_notifier_list, &ppc_panic_block);
  516. }
  517. #ifdef CONFIG_CHECK_CACHE_COHERENCY
  518. /*
  519. * For platforms that have configurable cache-coherency. This function
  520. * checks that the cache coherency setting of the kernel matches the setting
  521. * left by the firmware, as indicated in the device tree. Since a mismatch
  522. * will eventually result in DMA failures, we print * and error and call
  523. * BUG() in that case.
  524. */
  525. #ifdef CONFIG_NOT_COHERENT_CACHE
  526. #define KERNEL_COHERENCY 0
  527. #else
  528. #define KERNEL_COHERENCY 1
  529. #endif
  530. static int __init check_cache_coherency(void)
  531. {
  532. struct device_node *np;
  533. const void *prop;
  534. int devtree_coherency;
  535. np = of_find_node_by_path("/");
  536. prop = of_get_property(np, "coherency-off", NULL);
  537. of_node_put(np);
  538. devtree_coherency = prop ? 0 : 1;
  539. if (devtree_coherency != KERNEL_COHERENCY) {
  540. printk(KERN_ERR
  541. "kernel coherency:%s != device tree_coherency:%s\n",
  542. KERNEL_COHERENCY ? "on" : "off",
  543. devtree_coherency ? "on" : "off");
  544. BUG();
  545. }
  546. return 0;
  547. }
  548. late_initcall(check_cache_coherency);
  549. #endif /* CONFIG_CHECK_CACHE_COHERENCY */
  550. #ifdef CONFIG_DEBUG_FS
  551. struct dentry *powerpc_debugfs_root;
  552. static int powerpc_debugfs_init(void)
  553. {
  554. powerpc_debugfs_root = debugfs_create_dir("powerpc", NULL);
  555. return powerpc_debugfs_root == NULL;
  556. }
  557. arch_initcall(powerpc_debugfs_init);
  558. #endif