devices.c 6.0 KB

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  1. /*
  2. * Copyright 2006-2007 Freescale Semiconductor, Inc. All Rights Reserved.
  3. * Copyright 2008 Sascha Hauer, kernel@pengutronix.de
  4. *
  5. * This program is free software; you can redistribute it and/or
  6. * modify it under the terms of the GNU General Public License
  7. * as published by the Free Software Foundation; either version 2
  8. * of the License, or (at your option) any later version.
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software
  16. * Foundation, Inc., 51 Franklin Street, Fifth Floor,
  17. * Boston, MA 02110-1301, USA.
  18. */
  19. #include <linux/dma-mapping.h>
  20. #include <linux/module.h>
  21. #include <linux/platform_device.h>
  22. #include <linux/serial.h>
  23. #include <linux/gpio.h>
  24. #include <mach/hardware.h>
  25. #include <mach/irqs.h>
  26. #include <mach/common.h>
  27. #include <mach/mx3_camera.h>
  28. #include "devices.h"
  29. /* i.MX31 Image Processing Unit */
  30. /* The resource order is important! */
  31. static struct resource mx3_ipu_rsrc[] = {
  32. {
  33. .start = MX3x_IPU_CTRL_BASE_ADDR,
  34. .end = MX3x_IPU_CTRL_BASE_ADDR + 0x5F,
  35. .flags = IORESOURCE_MEM,
  36. }, {
  37. .start = MX3x_IPU_CTRL_BASE_ADDR + 0x88,
  38. .end = MX3x_IPU_CTRL_BASE_ADDR + 0xB3,
  39. .flags = IORESOURCE_MEM,
  40. }, {
  41. .start = MX3x_INT_IPU_SYN,
  42. .end = MX3x_INT_IPU_SYN,
  43. .flags = IORESOURCE_IRQ,
  44. }, {
  45. .start = MX3x_INT_IPU_ERR,
  46. .end = MX3x_INT_IPU_ERR,
  47. .flags = IORESOURCE_IRQ,
  48. },
  49. };
  50. struct platform_device mx3_ipu = {
  51. .name = "ipu-core",
  52. .id = -1,
  53. .num_resources = ARRAY_SIZE(mx3_ipu_rsrc),
  54. .resource = mx3_ipu_rsrc,
  55. };
  56. static struct resource fb_resources[] = {
  57. {
  58. .start = MX3x_IPU_CTRL_BASE_ADDR + 0xB4,
  59. .end = MX3x_IPU_CTRL_BASE_ADDR + 0x1BF,
  60. .flags = IORESOURCE_MEM,
  61. },
  62. };
  63. struct platform_device mx3_fb = {
  64. .name = "mx3_sdc_fb",
  65. .id = -1,
  66. .num_resources = ARRAY_SIZE(fb_resources),
  67. .resource = fb_resources,
  68. .dev = {
  69. .coherent_dma_mask = DMA_BIT_MASK(32),
  70. },
  71. };
  72. static struct resource camera_resources[] = {
  73. {
  74. .start = MX3x_IPU_CTRL_BASE_ADDR + 0x60,
  75. .end = MX3x_IPU_CTRL_BASE_ADDR + 0x87,
  76. .flags = IORESOURCE_MEM,
  77. },
  78. };
  79. struct platform_device mx3_camera = {
  80. .name = "mx3-camera",
  81. .id = 0,
  82. .num_resources = ARRAY_SIZE(camera_resources),
  83. .resource = camera_resources,
  84. .dev = {
  85. .coherent_dma_mask = DMA_BIT_MASK(32),
  86. },
  87. };
  88. static struct resource otg_resources[] = {
  89. {
  90. .start = MX31_USB_OTG_BASE_ADDR,
  91. .end = MX31_USB_OTG_BASE_ADDR + 0x1ff,
  92. .flags = IORESOURCE_MEM,
  93. }, {
  94. .start = MX31_INT_USB_OTG,
  95. .end = MX31_INT_USB_OTG,
  96. .flags = IORESOURCE_IRQ,
  97. },
  98. };
  99. static u64 otg_dmamask = DMA_BIT_MASK(32);
  100. /* OTG host */
  101. struct platform_device mxc_otg_host = {
  102. .name = "mxc-ehci",
  103. .id = 0,
  104. .dev = {
  105. .coherent_dma_mask = 0xffffffff,
  106. .dma_mask = &otg_dmamask,
  107. },
  108. .resource = otg_resources,
  109. .num_resources = ARRAY_SIZE(otg_resources),
  110. };
  111. /* USB host 1 */
  112. static u64 usbh1_dmamask = ~(u32)0;
  113. static struct resource mxc_usbh1_resources[] = {
  114. {
  115. .start = MX31_USB_HS1_BASE_ADDR,
  116. .end = MX31_USB_HS1_BASE_ADDR + 0x1ff,
  117. .flags = IORESOURCE_MEM,
  118. }, {
  119. .start = MX31_INT_USB_HS1,
  120. .end = MX31_INT_USB_HS1,
  121. .flags = IORESOURCE_IRQ,
  122. },
  123. };
  124. struct platform_device mxc_usbh1 = {
  125. .name = "mxc-ehci",
  126. .id = 1,
  127. .dev = {
  128. .coherent_dma_mask = 0xffffffff,
  129. .dma_mask = &usbh1_dmamask,
  130. },
  131. .resource = mxc_usbh1_resources,
  132. .num_resources = ARRAY_SIZE(mxc_usbh1_resources),
  133. };
  134. #ifdef CONFIG_ARCH_MX31
  135. /* USB host 2 */
  136. static u64 usbh2_dmamask = ~(u32)0;
  137. static struct resource mxc_usbh2_resources[] = {
  138. {
  139. .start = MX31_USB_HS2_BASE_ADDR,
  140. .end = MX31_USB_HS2_BASE_ADDR + 0x1ff,
  141. .flags = IORESOURCE_MEM,
  142. }, {
  143. .start = MX31_INT_USB_HS2,
  144. .end = MX31_INT_USB_HS2,
  145. .flags = IORESOURCE_IRQ,
  146. },
  147. };
  148. struct platform_device mxc_usbh2 = {
  149. .name = "mxc-ehci",
  150. .id = 2,
  151. .dev = {
  152. .coherent_dma_mask = 0xffffffff,
  153. .dma_mask = &usbh2_dmamask,
  154. },
  155. .resource = mxc_usbh2_resources,
  156. .num_resources = ARRAY_SIZE(mxc_usbh2_resources),
  157. };
  158. #endif
  159. static struct resource imx_wdt_resources[] = {
  160. {
  161. .flags = IORESOURCE_MEM,
  162. },
  163. };
  164. struct platform_device imx_wdt_device0 = {
  165. .name = "imx2-wdt",
  166. .id = 0,
  167. .num_resources = ARRAY_SIZE(imx_wdt_resources),
  168. .resource = imx_wdt_resources,
  169. };
  170. static struct resource imx_rtc_resources[] = {
  171. {
  172. .start = MX31_RTC_BASE_ADDR,
  173. .end = MX31_RTC_BASE_ADDR + 0x3fff,
  174. .flags = IORESOURCE_MEM,
  175. },
  176. {
  177. .start = MX31_INT_RTC,
  178. .flags = IORESOURCE_IRQ,
  179. },
  180. };
  181. struct platform_device imx_rtc_device0 = {
  182. .name = "mxc_rtc",
  183. .id = -1,
  184. .num_resources = ARRAY_SIZE(imx_rtc_resources),
  185. .resource = imx_rtc_resources,
  186. };
  187. static struct resource imx_kpp_resources[] = {
  188. {
  189. .start = MX3x_KPP_BASE_ADDR,
  190. .end = MX3x_KPP_BASE_ADDR + 0xf,
  191. .flags = IORESOURCE_MEM
  192. }, {
  193. .start = MX3x_INT_KPP,
  194. .end = MX3x_INT_KPP,
  195. .flags = IORESOURCE_IRQ,
  196. },
  197. };
  198. struct platform_device imx_kpp_device = {
  199. .name = "imx-keypad",
  200. .id = -1,
  201. .num_resources = ARRAY_SIZE(imx_kpp_resources),
  202. .resource = imx_kpp_resources,
  203. };
  204. static int __init mx3_devices_init(void)
  205. {
  206. #if defined(CONFIG_ARCH_MX31)
  207. if (cpu_is_mx31()) {
  208. imx_wdt_resources[0].start = MX31_WDOG_BASE_ADDR;
  209. imx_wdt_resources[0].end = MX31_WDOG_BASE_ADDR + 0x3fff;
  210. }
  211. #endif
  212. #if defined(CONFIG_ARCH_MX35)
  213. if (cpu_is_mx35()) {
  214. otg_resources[0].start = MX35_USB_OTG_BASE_ADDR;
  215. otg_resources[0].end = MX35_USB_OTG_BASE_ADDR + 0x1ff;
  216. otg_resources[1].start = MX35_INT_USB_OTG;
  217. otg_resources[1].end = MX35_INT_USB_OTG;
  218. mxc_usbh1_resources[0].start = MX35_USB_HS_BASE_ADDR;
  219. mxc_usbh1_resources[0].end = MX35_USB_HS_BASE_ADDR + 0x1ff;
  220. mxc_usbh1_resources[1].start = MX35_INT_USB_HS;
  221. mxc_usbh1_resources[1].end = MX35_INT_USB_HS;
  222. imx_wdt_resources[0].start = MX35_WDOG_BASE_ADDR;
  223. imx_wdt_resources[0].end = MX35_WDOG_BASE_ADDR + 0x3fff;
  224. }
  225. #endif
  226. return 0;
  227. }
  228. subsys_initcall(mx3_devices_init);