board-cm-t35.c 18 KB

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  1. /*
  2. * board-cm-t35.c (CompuLab CM-T35 module)
  3. *
  4. * Copyright (C) 2009 CompuLab, Ltd.
  5. * Author: Mike Rapoport <mike@compulab.co.il>
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License
  9. * version 2 as published by the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope that it will be useful, but
  12. * WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  14. * General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  19. * 02110-1301 USA
  20. *
  21. */
  22. #include <linux/kernel.h>
  23. #include <linux/init.h>
  24. #include <linux/platform_device.h>
  25. #include <linux/input.h>
  26. #include <linux/input/matrix_keypad.h>
  27. #include <linux/delay.h>
  28. #include <linux/gpio.h>
  29. #include <linux/i2c/at24.h>
  30. #include <linux/i2c/twl.h>
  31. #include <linux/regulator/machine.h>
  32. #include <linux/mmc/host.h>
  33. #include <linux/spi/spi.h>
  34. #include <linux/spi/tdo24m.h>
  35. #include <asm/mach-types.h>
  36. #include <asm/mach/arch.h>
  37. #include <asm/mach/map.h>
  38. #include <plat/board.h>
  39. #include <plat/common.h>
  40. #include <plat/nand.h>
  41. #include <plat/gpmc.h>
  42. #include <plat/usb.h>
  43. #include <plat/display.h>
  44. #include <plat/panel-generic-dpi.h>
  45. #include <plat/mcspi.h>
  46. #include <mach/hardware.h>
  47. #include "mux.h"
  48. #include "sdram-micron-mt46h32m32lf-6.h"
  49. #include "hsmmc.h"
  50. #include "common-board-devices.h"
  51. #define CM_T35_GPIO_PENDOWN 57
  52. #define CM_T35_SMSC911X_CS 5
  53. #define CM_T35_SMSC911X_GPIO 163
  54. #define SB_T35_SMSC911X_CS 4
  55. #define SB_T35_SMSC911X_GPIO 65
  56. #define NAND_BLOCK_SIZE SZ_128K
  57. #if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
  58. #include <linux/smsc911x.h>
  59. #include <plat/gpmc-smsc911x.h>
  60. static struct omap_smsc911x_platform_data cm_t35_smsc911x_cfg = {
  61. .id = 0,
  62. .cs = CM_T35_SMSC911X_CS,
  63. .gpio_irq = CM_T35_SMSC911X_GPIO,
  64. .gpio_reset = -EINVAL,
  65. .flags = SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS,
  66. };
  67. static struct omap_smsc911x_platform_data sb_t35_smsc911x_cfg = {
  68. .id = 1,
  69. .cs = SB_T35_SMSC911X_CS,
  70. .gpio_irq = SB_T35_SMSC911X_GPIO,
  71. .gpio_reset = -EINVAL,
  72. .flags = SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS,
  73. };
  74. static void __init cm_t35_init_ethernet(void)
  75. {
  76. gpmc_smsc911x_init(&cm_t35_smsc911x_cfg);
  77. gpmc_smsc911x_init(&sb_t35_smsc911x_cfg);
  78. }
  79. #else
  80. static inline void __init cm_t35_init_ethernet(void) { return; }
  81. #endif
  82. #if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
  83. #include <linux/leds.h>
  84. static struct gpio_led cm_t35_leds[] = {
  85. [0] = {
  86. .gpio = 186,
  87. .name = "cm-t35:green",
  88. .default_trigger = "heartbeat",
  89. .active_low = 0,
  90. },
  91. };
  92. static struct gpio_led_platform_data cm_t35_led_pdata = {
  93. .num_leds = ARRAY_SIZE(cm_t35_leds),
  94. .leds = cm_t35_leds,
  95. };
  96. static struct platform_device cm_t35_led_device = {
  97. .name = "leds-gpio",
  98. .id = -1,
  99. .dev = {
  100. .platform_data = &cm_t35_led_pdata,
  101. },
  102. };
  103. static void __init cm_t35_init_led(void)
  104. {
  105. platform_device_register(&cm_t35_led_device);
  106. }
  107. #else
  108. static inline void cm_t35_init_led(void) {}
  109. #endif
  110. #if defined(CONFIG_MTD_NAND_OMAP2) || defined(CONFIG_MTD_NAND_OMAP2_MODULE)
  111. #include <linux/mtd/mtd.h>
  112. #include <linux/mtd/nand.h>
  113. #include <linux/mtd/partitions.h>
  114. static struct mtd_partition cm_t35_nand_partitions[] = {
  115. {
  116. .name = "xloader",
  117. .offset = 0, /* Offset = 0x00000 */
  118. .size = 4 * NAND_BLOCK_SIZE,
  119. .mask_flags = MTD_WRITEABLE
  120. },
  121. {
  122. .name = "uboot",
  123. .offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */
  124. .size = 15 * NAND_BLOCK_SIZE,
  125. },
  126. {
  127. .name = "uboot environment",
  128. .offset = MTDPART_OFS_APPEND, /* Offset = 0x260000 */
  129. .size = 2 * NAND_BLOCK_SIZE,
  130. },
  131. {
  132. .name = "linux",
  133. .offset = MTDPART_OFS_APPEND, /* Offset = 0x280000 */
  134. .size = 32 * NAND_BLOCK_SIZE,
  135. },
  136. {
  137. .name = "rootfs",
  138. .offset = MTDPART_OFS_APPEND, /* Offset = 0x680000 */
  139. .size = MTDPART_SIZ_FULL,
  140. },
  141. };
  142. static struct omap_nand_platform_data cm_t35_nand_data = {
  143. .parts = cm_t35_nand_partitions,
  144. .nr_parts = ARRAY_SIZE(cm_t35_nand_partitions),
  145. .dma_channel = -1, /* disable DMA in OMAP NAND driver */
  146. .cs = 0,
  147. };
  148. static void __init cm_t35_init_nand(void)
  149. {
  150. if (gpmc_nand_init(&cm_t35_nand_data) < 0)
  151. pr_err("CM-T35: Unable to register NAND device\n");
  152. }
  153. #else
  154. static inline void cm_t35_init_nand(void) {}
  155. #endif
  156. #define CM_T35_LCD_EN_GPIO 157
  157. #define CM_T35_LCD_BL_GPIO 58
  158. #define CM_T35_DVI_EN_GPIO 54
  159. static int lcd_bl_gpio;
  160. static int lcd_en_gpio;
  161. static int dvi_en_gpio;
  162. static int lcd_enabled;
  163. static int dvi_enabled;
  164. static int cm_t35_panel_enable_lcd(struct omap_dss_device *dssdev)
  165. {
  166. if (dvi_enabled) {
  167. printk(KERN_ERR "cannot enable LCD, DVI is enabled\n");
  168. return -EINVAL;
  169. }
  170. gpio_set_value(lcd_en_gpio, 1);
  171. gpio_set_value(lcd_bl_gpio, 1);
  172. lcd_enabled = 1;
  173. return 0;
  174. }
  175. static void cm_t35_panel_disable_lcd(struct omap_dss_device *dssdev)
  176. {
  177. lcd_enabled = 0;
  178. gpio_set_value(lcd_bl_gpio, 0);
  179. gpio_set_value(lcd_en_gpio, 0);
  180. }
  181. static int cm_t35_panel_enable_dvi(struct omap_dss_device *dssdev)
  182. {
  183. if (lcd_enabled) {
  184. printk(KERN_ERR "cannot enable DVI, LCD is enabled\n");
  185. return -EINVAL;
  186. }
  187. gpio_set_value(dvi_en_gpio, 0);
  188. dvi_enabled = 1;
  189. return 0;
  190. }
  191. static void cm_t35_panel_disable_dvi(struct omap_dss_device *dssdev)
  192. {
  193. gpio_set_value(dvi_en_gpio, 1);
  194. dvi_enabled = 0;
  195. }
  196. static int cm_t35_panel_enable_tv(struct omap_dss_device *dssdev)
  197. {
  198. return 0;
  199. }
  200. static void cm_t35_panel_disable_tv(struct omap_dss_device *dssdev)
  201. {
  202. }
  203. static struct panel_generic_dpi_data lcd_panel = {
  204. .name = "toppoly_tdo35s",
  205. .platform_enable = cm_t35_panel_enable_lcd,
  206. .platform_disable = cm_t35_panel_disable_lcd,
  207. };
  208. static struct omap_dss_device cm_t35_lcd_device = {
  209. .name = "lcd",
  210. .type = OMAP_DISPLAY_TYPE_DPI,
  211. .driver_name = "generic_dpi_panel",
  212. .data = &lcd_panel,
  213. .phy.dpi.data_lines = 18,
  214. };
  215. static struct panel_generic_dpi_data dvi_panel = {
  216. .name = "generic",
  217. .platform_enable = cm_t35_panel_enable_dvi,
  218. .platform_disable = cm_t35_panel_disable_dvi,
  219. };
  220. static struct omap_dss_device cm_t35_dvi_device = {
  221. .name = "dvi",
  222. .type = OMAP_DISPLAY_TYPE_DPI,
  223. .driver_name = "generic_dpi_panel",
  224. .data = &dvi_panel,
  225. .phy.dpi.data_lines = 24,
  226. };
  227. static struct omap_dss_device cm_t35_tv_device = {
  228. .name = "tv",
  229. .driver_name = "venc",
  230. .type = OMAP_DISPLAY_TYPE_VENC,
  231. .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO,
  232. .platform_enable = cm_t35_panel_enable_tv,
  233. .platform_disable = cm_t35_panel_disable_tv,
  234. };
  235. static struct omap_dss_device *cm_t35_dss_devices[] = {
  236. &cm_t35_lcd_device,
  237. &cm_t35_dvi_device,
  238. &cm_t35_tv_device,
  239. };
  240. static struct omap_dss_board_info cm_t35_dss_data = {
  241. .num_devices = ARRAY_SIZE(cm_t35_dss_devices),
  242. .devices = cm_t35_dss_devices,
  243. .default_device = &cm_t35_dvi_device,
  244. };
  245. static struct omap2_mcspi_device_config tdo24m_mcspi_config = {
  246. .turbo_mode = 0,
  247. .single_channel = 1, /* 0: slave, 1: master */
  248. };
  249. static struct tdo24m_platform_data tdo24m_config = {
  250. .model = TDO35S,
  251. };
  252. static struct spi_board_info cm_t35_lcd_spi_board_info[] __initdata = {
  253. {
  254. .modalias = "tdo24m",
  255. .bus_num = 4,
  256. .chip_select = 0,
  257. .max_speed_hz = 1000000,
  258. .controller_data = &tdo24m_mcspi_config,
  259. .platform_data = &tdo24m_config,
  260. },
  261. };
  262. static void __init cm_t35_init_display(void)
  263. {
  264. int err;
  265. lcd_en_gpio = CM_T35_LCD_EN_GPIO;
  266. lcd_bl_gpio = CM_T35_LCD_BL_GPIO;
  267. dvi_en_gpio = CM_T35_DVI_EN_GPIO;
  268. spi_register_board_info(cm_t35_lcd_spi_board_info,
  269. ARRAY_SIZE(cm_t35_lcd_spi_board_info));
  270. err = gpio_request(lcd_en_gpio, "LCD RST");
  271. if (err) {
  272. pr_err("CM-T35: failed to get LCD reset GPIO\n");
  273. goto out;
  274. }
  275. err = gpio_request(lcd_bl_gpio, "LCD BL");
  276. if (err) {
  277. pr_err("CM-T35: failed to get LCD backlight control GPIO\n");
  278. goto err_lcd_bl;
  279. }
  280. err = gpio_request(dvi_en_gpio, "DVI EN");
  281. if (err) {
  282. pr_err("CM-T35: failed to get DVI reset GPIO\n");
  283. goto err_dvi_en;
  284. }
  285. gpio_export(lcd_en_gpio, 0);
  286. gpio_export(lcd_bl_gpio, 0);
  287. gpio_export(dvi_en_gpio, 0);
  288. gpio_direction_output(lcd_en_gpio, 0);
  289. gpio_direction_output(lcd_bl_gpio, 0);
  290. gpio_direction_output(dvi_en_gpio, 1);
  291. msleep(50);
  292. gpio_set_value(lcd_en_gpio, 1);
  293. err = omap_display_init(&cm_t35_dss_data);
  294. if (err) {
  295. pr_err("CM-T35: failed to register DSS device\n");
  296. goto err_dev_reg;
  297. }
  298. return;
  299. err_dev_reg:
  300. gpio_free(dvi_en_gpio);
  301. err_dvi_en:
  302. gpio_free(lcd_bl_gpio);
  303. err_lcd_bl:
  304. gpio_free(lcd_en_gpio);
  305. out:
  306. return;
  307. }
  308. static struct regulator_consumer_supply cm_t35_vmmc1_supply = {
  309. .supply = "vmmc",
  310. };
  311. static struct regulator_consumer_supply cm_t35_vsim_supply = {
  312. .supply = "vmmc_aux",
  313. };
  314. static struct regulator_consumer_supply cm_t35_vdac_supply =
  315. REGULATOR_SUPPLY("vdda_dac", "omapdss_venc");
  316. static struct regulator_consumer_supply cm_t35_vdvi_supply =
  317. REGULATOR_SUPPLY("vdvi", "omapdss");
  318. /* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */
  319. static struct regulator_init_data cm_t35_vmmc1 = {
  320. .constraints = {
  321. .min_uV = 1850000,
  322. .max_uV = 3150000,
  323. .valid_modes_mask = REGULATOR_MODE_NORMAL
  324. | REGULATOR_MODE_STANDBY,
  325. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
  326. | REGULATOR_CHANGE_MODE
  327. | REGULATOR_CHANGE_STATUS,
  328. },
  329. .num_consumer_supplies = 1,
  330. .consumer_supplies = &cm_t35_vmmc1_supply,
  331. };
  332. /* VSIM for MMC1 pins DAT4..DAT7 (2 mA, plus card == max 50 mA) */
  333. static struct regulator_init_data cm_t35_vsim = {
  334. .constraints = {
  335. .min_uV = 1800000,
  336. .max_uV = 3000000,
  337. .valid_modes_mask = REGULATOR_MODE_NORMAL
  338. | REGULATOR_MODE_STANDBY,
  339. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
  340. | REGULATOR_CHANGE_MODE
  341. | REGULATOR_CHANGE_STATUS,
  342. },
  343. .num_consumer_supplies = 1,
  344. .consumer_supplies = &cm_t35_vsim_supply,
  345. };
  346. /* VDAC for DSS driving S-Video (8 mA unloaded, max 65 mA) */
  347. static struct regulator_init_data cm_t35_vdac = {
  348. .constraints = {
  349. .min_uV = 1800000,
  350. .max_uV = 1800000,
  351. .valid_modes_mask = REGULATOR_MODE_NORMAL
  352. | REGULATOR_MODE_STANDBY,
  353. .valid_ops_mask = REGULATOR_CHANGE_MODE
  354. | REGULATOR_CHANGE_STATUS,
  355. },
  356. .num_consumer_supplies = 1,
  357. .consumer_supplies = &cm_t35_vdac_supply,
  358. };
  359. /* VPLL2 for digital video outputs */
  360. static struct regulator_init_data cm_t35_vpll2 = {
  361. .constraints = {
  362. .name = "VDVI",
  363. .min_uV = 1800000,
  364. .max_uV = 1800000,
  365. .valid_modes_mask = REGULATOR_MODE_NORMAL
  366. | REGULATOR_MODE_STANDBY,
  367. .valid_ops_mask = REGULATOR_CHANGE_MODE
  368. | REGULATOR_CHANGE_STATUS,
  369. },
  370. .num_consumer_supplies = 1,
  371. .consumer_supplies = &cm_t35_vdvi_supply,
  372. };
  373. static struct twl4030_usb_data cm_t35_usb_data = {
  374. .usb_mode = T2_USB_MODE_ULPI,
  375. };
  376. static uint32_t cm_t35_keymap[] = {
  377. KEY(0, 0, KEY_A), KEY(0, 1, KEY_B), KEY(0, 2, KEY_LEFT),
  378. KEY(1, 0, KEY_UP), KEY(1, 1, KEY_ENTER), KEY(1, 2, KEY_DOWN),
  379. KEY(2, 0, KEY_RIGHT), KEY(2, 1, KEY_C), KEY(2, 2, KEY_D),
  380. };
  381. static struct matrix_keymap_data cm_t35_keymap_data = {
  382. .keymap = cm_t35_keymap,
  383. .keymap_size = ARRAY_SIZE(cm_t35_keymap),
  384. };
  385. static struct twl4030_keypad_data cm_t35_kp_data = {
  386. .keymap_data = &cm_t35_keymap_data,
  387. .rows = 3,
  388. .cols = 3,
  389. .rep = 1,
  390. };
  391. static struct omap2_hsmmc_info mmc[] = {
  392. {
  393. .mmc = 1,
  394. .caps = MMC_CAP_4_BIT_DATA,
  395. .gpio_cd = -EINVAL,
  396. .gpio_wp = -EINVAL,
  397. },
  398. {
  399. .mmc = 2,
  400. .caps = MMC_CAP_4_BIT_DATA,
  401. .transceiver = 1,
  402. .gpio_cd = -EINVAL,
  403. .gpio_wp = -EINVAL,
  404. .ocr_mask = 0x00100000, /* 3.3V */
  405. },
  406. {} /* Terminator */
  407. };
  408. static struct usbhs_omap_board_data usbhs_bdata __initdata = {
  409. .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
  410. .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
  411. .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
  412. .phy_reset = true,
  413. .reset_gpio_port[0] = OMAP_MAX_GPIO_LINES + 6,
  414. .reset_gpio_port[1] = OMAP_MAX_GPIO_LINES + 7,
  415. .reset_gpio_port[2] = -EINVAL
  416. };
  417. static int cm_t35_twl_gpio_setup(struct device *dev, unsigned gpio,
  418. unsigned ngpio)
  419. {
  420. int wlan_rst = gpio + 2;
  421. if ((gpio_request(wlan_rst, "WLAN RST") == 0) &&
  422. (gpio_direction_output(wlan_rst, 1) == 0)) {
  423. gpio_export(wlan_rst, 0);
  424. udelay(10);
  425. gpio_set_value(wlan_rst, 0);
  426. udelay(10);
  427. gpio_set_value(wlan_rst, 1);
  428. } else {
  429. pr_err("CM-T35: could not obtain gpio for WiFi reset\n");
  430. }
  431. /* gpio + 0 is "mmc0_cd" (input/IRQ) */
  432. mmc[0].gpio_cd = gpio + 0;
  433. omap2_hsmmc_init(mmc);
  434. /* link regulators to MMC adapters */
  435. cm_t35_vmmc1_supply.dev = mmc[0].dev;
  436. cm_t35_vsim_supply.dev = mmc[0].dev;
  437. return 0;
  438. }
  439. static struct twl4030_gpio_platform_data cm_t35_gpio_data = {
  440. .gpio_base = OMAP_MAX_GPIO_LINES,
  441. .irq_base = TWL4030_GPIO_IRQ_BASE,
  442. .irq_end = TWL4030_GPIO_IRQ_END,
  443. .setup = cm_t35_twl_gpio_setup,
  444. };
  445. static struct twl4030_platform_data cm_t35_twldata = {
  446. .irq_base = TWL4030_IRQ_BASE,
  447. .irq_end = TWL4030_IRQ_END,
  448. /* platform_data for children goes here */
  449. .keypad = &cm_t35_kp_data,
  450. .usb = &cm_t35_usb_data,
  451. .gpio = &cm_t35_gpio_data,
  452. .vmmc1 = &cm_t35_vmmc1,
  453. .vsim = &cm_t35_vsim,
  454. .vdac = &cm_t35_vdac,
  455. .vpll2 = &cm_t35_vpll2,
  456. };
  457. static void __init cm_t35_init_i2c(void)
  458. {
  459. omap3_pmic_init("tps65930", &cm_t35_twldata);
  460. }
  461. static void __init cm_t35_init_early(void)
  462. {
  463. omap2_init_common_infrastructure();
  464. omap2_init_common_devices(mt46h32m32lf6_sdrc_params,
  465. mt46h32m32lf6_sdrc_params);
  466. }
  467. #ifdef CONFIG_OMAP_MUX
  468. static struct omap_board_mux board_mux[] __initdata = {
  469. /* nCS and IRQ for CM-T35 ethernet */
  470. OMAP3_MUX(GPMC_NCS5, OMAP_MUX_MODE0),
  471. OMAP3_MUX(UART3_CTS_RCTX, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP),
  472. /* nCS and IRQ for SB-T35 ethernet */
  473. OMAP3_MUX(GPMC_NCS4, OMAP_MUX_MODE0),
  474. OMAP3_MUX(GPMC_WAIT3, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP),
  475. /* PENDOWN GPIO */
  476. OMAP3_MUX(GPMC_NCS6, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
  477. /* mUSB */
  478. OMAP3_MUX(HSUSB0_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  479. OMAP3_MUX(HSUSB0_STP, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  480. OMAP3_MUX(HSUSB0_DIR, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  481. OMAP3_MUX(HSUSB0_NXT, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  482. OMAP3_MUX(HSUSB0_DATA0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  483. OMAP3_MUX(HSUSB0_DATA1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  484. OMAP3_MUX(HSUSB0_DATA2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  485. OMAP3_MUX(HSUSB0_DATA3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  486. OMAP3_MUX(HSUSB0_DATA4, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  487. OMAP3_MUX(HSUSB0_DATA5, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  488. OMAP3_MUX(HSUSB0_DATA6, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  489. OMAP3_MUX(HSUSB0_DATA7, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  490. /* MMC 2 */
  491. OMAP3_MUX(SDMMC2_DAT4, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
  492. OMAP3_MUX(SDMMC2_DAT5, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
  493. OMAP3_MUX(SDMMC2_DAT6, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
  494. OMAP3_MUX(SDMMC2_DAT7, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
  495. /* McSPI 1 */
  496. OMAP3_MUX(MCSPI1_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  497. OMAP3_MUX(MCSPI1_SIMO, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  498. OMAP3_MUX(MCSPI1_SOMI, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  499. OMAP3_MUX(MCSPI1_CS0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN),
  500. /* McSPI 4 */
  501. OMAP3_MUX(MCBSP1_CLKR, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
  502. OMAP3_MUX(MCBSP1_DX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
  503. OMAP3_MUX(MCBSP1_DR, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
  504. OMAP3_MUX(MCBSP1_FSX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT_PULLUP),
  505. /* McBSP 2 */
  506. OMAP3_MUX(MCBSP2_FSX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  507. OMAP3_MUX(MCBSP2_CLKX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  508. OMAP3_MUX(MCBSP2_DR, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  509. OMAP3_MUX(MCBSP2_DX, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  510. /* serial ports */
  511. OMAP3_MUX(MCBSP3_CLKX, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
  512. OMAP3_MUX(MCBSP3_FSX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
  513. OMAP3_MUX(UART1_TX, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  514. OMAP3_MUX(UART1_RX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  515. /* DSS */
  516. OMAP3_MUX(DSS_PCLK, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  517. OMAP3_MUX(DSS_HSYNC, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  518. OMAP3_MUX(DSS_VSYNC, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  519. OMAP3_MUX(DSS_ACBIAS, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  520. OMAP3_MUX(DSS_DATA0, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  521. OMAP3_MUX(DSS_DATA1, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  522. OMAP3_MUX(DSS_DATA2, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  523. OMAP3_MUX(DSS_DATA3, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  524. OMAP3_MUX(DSS_DATA4, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  525. OMAP3_MUX(DSS_DATA5, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  526. OMAP3_MUX(DSS_DATA6, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  527. OMAP3_MUX(DSS_DATA7, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  528. OMAP3_MUX(DSS_DATA8, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  529. OMAP3_MUX(DSS_DATA9, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  530. OMAP3_MUX(DSS_DATA10, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  531. OMAP3_MUX(DSS_DATA11, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  532. OMAP3_MUX(DSS_DATA12, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  533. OMAP3_MUX(DSS_DATA13, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  534. OMAP3_MUX(DSS_DATA14, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  535. OMAP3_MUX(DSS_DATA15, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  536. OMAP3_MUX(DSS_DATA16, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  537. OMAP3_MUX(DSS_DATA17, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  538. OMAP3_MUX(DSS_DATA18, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  539. OMAP3_MUX(DSS_DATA19, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  540. OMAP3_MUX(DSS_DATA20, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  541. OMAP3_MUX(DSS_DATA21, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  542. OMAP3_MUX(DSS_DATA22, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  543. OMAP3_MUX(DSS_DATA23, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  544. /* display controls */
  545. OMAP3_MUX(MCBSP1_FSR, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
  546. OMAP3_MUX(GPMC_NCS7, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
  547. OMAP3_MUX(GPMC_NCS3, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
  548. /* TPS IRQ */
  549. OMAP3_MUX(SYS_NIRQ, OMAP_MUX_MODE0 | OMAP_WAKEUP_EN | \
  550. OMAP_PIN_INPUT_PULLUP),
  551. { .reg_offset = OMAP_MUX_TERMINATOR },
  552. };
  553. #endif
  554. static struct omap_board_config_kernel cm_t35_config[] __initdata = {
  555. };
  556. static void __init cm_t35_init(void)
  557. {
  558. omap_board_config = cm_t35_config;
  559. omap_board_config_size = ARRAY_SIZE(cm_t35_config);
  560. omap3_mux_init(board_mux, OMAP_PACKAGE_CUS);
  561. omap_serial_init();
  562. cm_t35_init_i2c();
  563. cm_t35_init_nand();
  564. omap_ads7846_init(1, CM_T35_GPIO_PENDOWN, 0, NULL);
  565. cm_t35_init_ethernet();
  566. cm_t35_init_led();
  567. cm_t35_init_display();
  568. usb_musb_init(NULL);
  569. usbhs_init(&usbhs_bdata);
  570. }
  571. MACHINE_START(CM_T35, "Compulab CM-T35")
  572. .boot_params = 0x80000100,
  573. .reserve = omap_reserve,
  574. .map_io = omap3_map_io,
  575. .init_early = cm_t35_init_early,
  576. .init_irq = omap_init_irq,
  577. .init_machine = cm_t35_init,
  578. .timer = &omap_timer,
  579. MACHINE_END