mainstone.c 9.3 KB

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  1. /*
  2. * linux/arch/arm/mach-pxa/mainstone.c
  3. *
  4. * Support for the Intel HCDDBBVA0 Development Platform.
  5. * (go figure how they came up with such name...)
  6. *
  7. * Author: Nicolas Pitre
  8. * Created: Nov 05, 2002
  9. * Copyright: MontaVista Software Inc.
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License version 2 as
  13. * published by the Free Software Foundation.
  14. */
  15. #include <linux/init.h>
  16. #include <linux/device.h>
  17. #include <linux/sysdev.h>
  18. #include <linux/interrupt.h>
  19. #include <linux/sched.h>
  20. #include <linux/bitops.h>
  21. #include <linux/fb.h>
  22. #include <asm/types.h>
  23. #include <asm/setup.h>
  24. #include <asm/memory.h>
  25. #include <asm/mach-types.h>
  26. #include <asm/hardware.h>
  27. #include <asm/irq.h>
  28. #include <asm/mach/arch.h>
  29. #include <asm/mach/map.h>
  30. #include <asm/mach/irq.h>
  31. #include <asm/arch/pxa-regs.h>
  32. #include <asm/arch/mainstone.h>
  33. #include <asm/arch/audio.h>
  34. #include <asm/arch/pxafb.h>
  35. #include <asm/arch/mmc.h>
  36. #include <asm/arch/irda.h>
  37. #include "generic.h"
  38. static unsigned long mainstone_irq_enabled;
  39. static void mainstone_mask_irq(unsigned int irq)
  40. {
  41. int mainstone_irq = (irq - MAINSTONE_IRQ(0));
  42. MST_INTMSKENA = (mainstone_irq_enabled &= ~(1 << mainstone_irq));
  43. }
  44. static void mainstone_unmask_irq(unsigned int irq)
  45. {
  46. int mainstone_irq = (irq - MAINSTONE_IRQ(0));
  47. /* the irq can be acknowledged only if deasserted, so it's done here */
  48. MST_INTSETCLR &= ~(1 << mainstone_irq);
  49. MST_INTMSKENA = (mainstone_irq_enabled |= (1 << mainstone_irq));
  50. }
  51. static struct irqchip mainstone_irq_chip = {
  52. .ack = mainstone_mask_irq,
  53. .mask = mainstone_mask_irq,
  54. .unmask = mainstone_unmask_irq,
  55. };
  56. static void mainstone_irq_handler(unsigned int irq, struct irqdesc *desc,
  57. struct pt_regs *regs)
  58. {
  59. unsigned long pending = MST_INTSETCLR & mainstone_irq_enabled;
  60. do {
  61. GEDR(0) = GPIO_bit(0); /* clear useless edge notification */
  62. if (likely(pending)) {
  63. irq = MAINSTONE_IRQ(0) + __ffs(pending);
  64. desc = irq_desc + irq;
  65. desc_handle_irq(irq, desc, regs);
  66. }
  67. pending = MST_INTSETCLR & mainstone_irq_enabled;
  68. } while (pending);
  69. }
  70. static void __init mainstone_init_irq(void)
  71. {
  72. int irq;
  73. pxa_init_irq();
  74. /* setup extra Mainstone irqs */
  75. for(irq = MAINSTONE_IRQ(0); irq <= MAINSTONE_IRQ(15); irq++) {
  76. set_irq_chip(irq, &mainstone_irq_chip);
  77. set_irq_handler(irq, do_level_IRQ);
  78. set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
  79. }
  80. set_irq_flags(MAINSTONE_IRQ(8), 0);
  81. set_irq_flags(MAINSTONE_IRQ(12), 0);
  82. MST_INTMSKENA = 0;
  83. MST_INTSETCLR = 0;
  84. set_irq_chained_handler(IRQ_GPIO(0), mainstone_irq_handler);
  85. set_irq_type(IRQ_GPIO(0), IRQT_FALLING);
  86. }
  87. #ifdef CONFIG_PM
  88. static int mainstone_irq_resume(struct sys_device *dev)
  89. {
  90. MST_INTMSKENA = mainstone_irq_enabled;
  91. return 0;
  92. }
  93. static struct sysdev_class mainstone_irq_sysclass = {
  94. set_kset_name("cpld_irq"),
  95. .resume = mainstone_irq_resume,
  96. };
  97. static struct sys_device mainstone_irq_device = {
  98. .cls = &mainstone_irq_sysclass,
  99. };
  100. static int __init mainstone_irq_device_init(void)
  101. {
  102. int ret = sysdev_class_register(&mainstone_irq_sysclass);
  103. if (ret == 0)
  104. ret = sysdev_register(&mainstone_irq_device);
  105. return ret;
  106. }
  107. device_initcall(mainstone_irq_device_init);
  108. #endif
  109. static struct resource smc91x_resources[] = {
  110. [0] = {
  111. .start = (MST_ETH_PHYS + 0x300),
  112. .end = (MST_ETH_PHYS + 0xfffff),
  113. .flags = IORESOURCE_MEM,
  114. },
  115. [1] = {
  116. .start = MAINSTONE_IRQ(3),
  117. .end = MAINSTONE_IRQ(3),
  118. .flags = IORESOURCE_IRQ,
  119. }
  120. };
  121. static struct platform_device smc91x_device = {
  122. .name = "smc91x",
  123. .id = 0,
  124. .num_resources = ARRAY_SIZE(smc91x_resources),
  125. .resource = smc91x_resources,
  126. };
  127. static int mst_audio_startup(snd_pcm_substream_t *substream, void *priv)
  128. {
  129. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  130. MST_MSCWR2 &= ~MST_MSCWR2_AC97_SPKROFF;
  131. return 0;
  132. }
  133. static void mst_audio_shutdown(snd_pcm_substream_t *substream, void *priv)
  134. {
  135. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  136. MST_MSCWR2 |= MST_MSCWR2_AC97_SPKROFF;
  137. }
  138. static long mst_audio_suspend_mask;
  139. static void mst_audio_suspend(void *priv)
  140. {
  141. mst_audio_suspend_mask = MST_MSCWR2;
  142. MST_MSCWR2 |= MST_MSCWR2_AC97_SPKROFF;
  143. }
  144. static void mst_audio_resume(void *priv)
  145. {
  146. MST_MSCWR2 &= mst_audio_suspend_mask | ~MST_MSCWR2_AC97_SPKROFF;
  147. }
  148. static pxa2xx_audio_ops_t mst_audio_ops = {
  149. .startup = mst_audio_startup,
  150. .shutdown = mst_audio_shutdown,
  151. .suspend = mst_audio_suspend,
  152. .resume = mst_audio_resume,
  153. };
  154. static struct platform_device mst_audio_device = {
  155. .name = "pxa2xx-ac97",
  156. .id = -1,
  157. .dev = { .platform_data = &mst_audio_ops },
  158. };
  159. static void mainstone_backlight_power(int on)
  160. {
  161. if (on) {
  162. pxa_gpio_mode(GPIO16_PWM0_MD);
  163. pxa_set_cken(CKEN0_PWM0, 1);
  164. PWM_CTRL0 = 0;
  165. PWM_PWDUTY0 = 0x3ff;
  166. PWM_PERVAL0 = 0x3ff;
  167. } else {
  168. PWM_CTRL0 = 0;
  169. PWM_PWDUTY0 = 0x0;
  170. PWM_PERVAL0 = 0x3FF;
  171. pxa_set_cken(CKEN0_PWM0, 0);
  172. }
  173. }
  174. static struct pxafb_mach_info toshiba_ltm04c380k __initdata = {
  175. .pixclock = 50000,
  176. .xres = 640,
  177. .yres = 480,
  178. .bpp = 16,
  179. .hsync_len = 1,
  180. .left_margin = 0x9f,
  181. .right_margin = 1,
  182. .vsync_len = 44,
  183. .upper_margin = 0,
  184. .lower_margin = 0,
  185. .sync = FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT,
  186. .lccr0 = LCCR0_Act,
  187. .lccr3 = LCCR3_PCP,
  188. .pxafb_backlight_power = mainstone_backlight_power,
  189. };
  190. static struct pxafb_mach_info toshiba_ltm035a776c __initdata = {
  191. .pixclock = 110000,
  192. .xres = 240,
  193. .yres = 320,
  194. .bpp = 16,
  195. .hsync_len = 4,
  196. .left_margin = 8,
  197. .right_margin = 20,
  198. .vsync_len = 3,
  199. .upper_margin = 1,
  200. .lower_margin = 10,
  201. .sync = FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT,
  202. .lccr0 = LCCR0_Act,
  203. .lccr3 = LCCR3_PCP,
  204. .pxafb_backlight_power = mainstone_backlight_power,
  205. };
  206. static int mainstone_mci_init(struct device *dev, irqreturn_t (*mstone_detect_int)(int, void *, struct pt_regs *), void *data)
  207. {
  208. int err;
  209. /*
  210. * setup GPIO for PXA27x MMC controller
  211. */
  212. pxa_gpio_mode(GPIO32_MMCCLK_MD);
  213. pxa_gpio_mode(GPIO112_MMCCMD_MD);
  214. pxa_gpio_mode(GPIO92_MMCDAT0_MD);
  215. pxa_gpio_mode(GPIO109_MMCDAT1_MD);
  216. pxa_gpio_mode(GPIO110_MMCDAT2_MD);
  217. pxa_gpio_mode(GPIO111_MMCDAT3_MD);
  218. /* make sure SD/Memory Stick multiplexer's signals
  219. * are routed to MMC controller
  220. */
  221. MST_MSCWR1 &= ~MST_MSCWR1_MS_SEL;
  222. err = request_irq(MAINSTONE_MMC_IRQ, mstone_detect_int, SA_INTERRUPT,
  223. "MMC card detect", data);
  224. if (err) {
  225. printk(KERN_ERR "mainstone_mci_init: MMC/SD: can't request MMC card detect IRQ\n");
  226. return -1;
  227. }
  228. return 0;
  229. }
  230. static void mainstone_mci_setpower(struct device *dev, unsigned int vdd)
  231. {
  232. struct pxamci_platform_data* p_d = dev->platform_data;
  233. if (( 1 << vdd) & p_d->ocr_mask) {
  234. printk(KERN_DEBUG "%s: on\n", __FUNCTION__);
  235. MST_MSCWR1 |= MST_MSCWR1_MMC_ON;
  236. MST_MSCWR1 &= ~MST_MSCWR1_MS_SEL;
  237. } else {
  238. printk(KERN_DEBUG "%s: off\n", __FUNCTION__);
  239. MST_MSCWR1 &= ~MST_MSCWR1_MMC_ON;
  240. }
  241. }
  242. static void mainstone_mci_exit(struct device *dev, void *data)
  243. {
  244. free_irq(MAINSTONE_MMC_IRQ, data);
  245. }
  246. static struct pxamci_platform_data mainstone_mci_platform_data = {
  247. .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
  248. .init = mainstone_mci_init,
  249. .setpower = mainstone_mci_setpower,
  250. .exit = mainstone_mci_exit,
  251. };
  252. static void mainstone_irda_transceiver_mode(struct device *dev, int mode)
  253. {
  254. unsigned long flags;
  255. local_irq_save(flags);
  256. if (mode & IR_SIRMODE) {
  257. MST_MSCWR1 &= ~MST_MSCWR1_IRDA_FIR;
  258. } else if (mode & IR_FIRMODE) {
  259. MST_MSCWR1 |= MST_MSCWR1_IRDA_FIR;
  260. }
  261. if (mode & IR_OFF) {
  262. MST_MSCWR1 = (MST_MSCWR1 & ~MST_MSCWR1_IRDA_MASK) | MST_MSCWR1_IRDA_OFF;
  263. } else {
  264. MST_MSCWR1 = (MST_MSCWR1 & ~MST_MSCWR1_IRDA_MASK) | MST_MSCWR1_IRDA_FULL;
  265. }
  266. local_irq_restore(flags);
  267. }
  268. static struct pxaficp_platform_data mainstone_ficp_platform_data = {
  269. .transceiver_cap = IR_SIRMODE | IR_FIRMODE | IR_OFF,
  270. .transceiver_mode = mainstone_irda_transceiver_mode,
  271. };
  272. static void __init mainstone_init(void)
  273. {
  274. /*
  275. * On Mainstone, we route AC97_SYSCLK via GPIO45 to
  276. * the audio daughter card
  277. */
  278. pxa_gpio_mode(GPIO45_SYSCLK_AC97_MD);
  279. platform_device_register(&smc91x_device);
  280. platform_device_register(&mst_audio_device);
  281. /* reading Mainstone's "Virtual Configuration Register"
  282. might be handy to select LCD type here */
  283. if (0)
  284. set_pxa_fb_info(&toshiba_ltm04c380k);
  285. else
  286. set_pxa_fb_info(&toshiba_ltm035a776c);
  287. pxa_set_mci_info(&mainstone_mci_platform_data);
  288. pxa_set_ficp_info(&mainstone_ficp_platform_data);
  289. }
  290. static struct map_desc mainstone_io_desc[] __initdata = {
  291. { /* CPLD */
  292. .virtual = MST_FPGA_VIRT,
  293. .pfn = __phys_to_pfn(MST_FPGA_PHYS),
  294. .length = 0x00100000,
  295. .type = MT_DEVICE
  296. }
  297. };
  298. static void __init mainstone_map_io(void)
  299. {
  300. pxa_map_io();
  301. iotable_init(mainstone_io_desc, ARRAY_SIZE(mainstone_io_desc));
  302. /* initialize sleep mode regs (wake-up sources, etc) */
  303. PGSR0 = 0x00008800;
  304. PGSR1 = 0x00000002;
  305. PGSR2 = 0x0001FC00;
  306. PGSR3 = 0x00001F81;
  307. PWER = 0xC0000002;
  308. PRER = 0x00000002;
  309. PFER = 0x00000002;
  310. /* for use I SRAM as framebuffer. */
  311. PSLR |= 0xF04;
  312. PCFR = 0x66;
  313. /* For Keypad wakeup. */
  314. KPC &=~KPC_ASACT;
  315. KPC |=KPC_AS;
  316. PKWR = 0x000FD000;
  317. /* Need read PKWR back after set it. */
  318. PKWR;
  319. }
  320. MACHINE_START(MAINSTONE, "Intel HCDDBBVA0 Development Platform (aka Mainstone)")
  321. /* Maintainer: MontaVista Software Inc. */
  322. .phys_ram = 0xa0000000,
  323. .phys_io = 0x40000000,
  324. .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
  325. .map_io = mainstone_map_io,
  326. .init_irq = mainstone_init_irq,
  327. .timer = &pxa_timer,
  328. .init_machine = mainstone_init,
  329. MACHINE_END