rt2x00reg.h 5.4 KB

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  1. /*
  2. Copyright (C) 2004 - 2008 rt2x00 SourceForge Project
  3. <http://rt2x00.serialmonkey.com>
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the
  14. Free Software Foundation, Inc.,
  15. 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  16. */
  17. /*
  18. Module: rt2x00
  19. Abstract: rt2x00 generic register information.
  20. */
  21. #ifndef RT2X00REG_H
  22. #define RT2X00REG_H
  23. /*
  24. * Antenna values
  25. */
  26. enum antenna {
  27. ANTENNA_SW_DIVERSITY = 0,
  28. ANTENNA_A = 1,
  29. ANTENNA_B = 2,
  30. ANTENNA_HW_DIVERSITY = 3,
  31. };
  32. /*
  33. * Led mode values.
  34. */
  35. enum led_mode {
  36. LED_MODE_DEFAULT = 0,
  37. LED_MODE_TXRX_ACTIVITY = 1,
  38. LED_MODE_SIGNAL_STRENGTH = 2,
  39. LED_MODE_ASUS = 3,
  40. LED_MODE_ALPHA = 4,
  41. };
  42. /*
  43. * TSF sync values
  44. */
  45. enum tsf_sync {
  46. TSF_SYNC_NONE = 0,
  47. TSF_SYNC_INFRA = 1,
  48. TSF_SYNC_BEACON = 2,
  49. };
  50. /*
  51. * Device states
  52. */
  53. enum dev_state {
  54. STATE_DEEP_SLEEP = 0,
  55. STATE_SLEEP = 1,
  56. STATE_STANDBY = 2,
  57. STATE_AWAKE = 3,
  58. /*
  59. * Additional device states, these values are
  60. * not strict since they are not directly passed
  61. * into the device.
  62. */
  63. STATE_RADIO_ON,
  64. STATE_RADIO_OFF,
  65. STATE_RADIO_RX_ON,
  66. STATE_RADIO_RX_OFF,
  67. STATE_RADIO_RX_ON_LINK,
  68. STATE_RADIO_RX_OFF_LINK,
  69. STATE_RADIO_IRQ_ON,
  70. STATE_RADIO_IRQ_OFF,
  71. };
  72. /*
  73. * IFS backoff values
  74. */
  75. enum ifs {
  76. IFS_BACKOFF = 0,
  77. IFS_SIFS = 1,
  78. IFS_NEW_BACKOFF = 2,
  79. IFS_NONE = 3,
  80. };
  81. /*
  82. * Cipher types for hardware encryption
  83. */
  84. enum cipher {
  85. CIPHER_NONE = 0,
  86. CIPHER_WEP64 = 1,
  87. CIPHER_WEP128 = 2,
  88. CIPHER_TKIP = 3,
  89. CIPHER_AES = 4,
  90. /*
  91. * The following fields were added by rt61pci and rt73usb.
  92. */
  93. CIPHER_CKIP64 = 5,
  94. CIPHER_CKIP128 = 6,
  95. CIPHER_TKIP_NO_MIC = 7,
  96. };
  97. /*
  98. * Register handlers.
  99. * We store the position of a register field inside a field structure,
  100. * This will simplify the process of setting and reading a certain field
  101. * inside the register while making sure the process remains byte order safe.
  102. */
  103. struct rt2x00_field8 {
  104. u8 bit_offset;
  105. u8 bit_mask;
  106. };
  107. struct rt2x00_field16 {
  108. u16 bit_offset;
  109. u16 bit_mask;
  110. };
  111. struct rt2x00_field32 {
  112. u32 bit_offset;
  113. u32 bit_mask;
  114. };
  115. /*
  116. * Power of two check, this will check
  117. * if the mask that has been given contains and contiguous set of bits.
  118. * Note that we cannot use the is_power_of_2() function since this
  119. * check must be done at compile-time.
  120. */
  121. #define is_power_of_two(x) ( !((x) & ((x)-1)) )
  122. #define low_bit_mask(x) ( ((x)-1) & ~(x) )
  123. #define is_valid_mask(x) is_power_of_two(1 + (x) + low_bit_mask(x))
  124. /*
  125. * Macro's to find first set bit in a variable.
  126. * These macro's behaves the same as the __ffs() function with
  127. * the most important difference that this is done during
  128. * compile-time rather then run-time.
  129. */
  130. #define compile_ffs2(__x) \
  131. ( ((__x) & 0x1) ? 0 : 1 )
  132. #define compile_ffs4(__x) \
  133. ( ((__x) & 0x3) ? \
  134. compile_ffs2(__x) : (compile_ffs2((__x) >> 2) + 2) )
  135. #define compile_ffs8(__x) \
  136. ( ((__x) & 0xf) ? \
  137. compile_ffs4(__x) : (compile_ffs4((__x) >> 4) + 4) )
  138. #define compile_ffs16(__x) \
  139. ( ((__x) & 0xff) ? \
  140. compile_ffs8(__x) : (compile_ffs8((__x) >> 8) + 8) )
  141. #define compile_ffs32(__x) \
  142. ( ((__x) & 0xffff) ? \
  143. compile_ffs16(__x) : (compile_ffs16((__x) >> 16) + 16) )
  144. /*
  145. * This macro will check the requirements for the FIELD{8,16,32} macros
  146. * The mask should be a constant non-zero contiguous set of bits which
  147. * does not exceed the given typelimit.
  148. */
  149. #define FIELD_CHECK(__mask, __type) \
  150. BUILD_BUG_ON(!__builtin_constant_p(__mask) || \
  151. !(__mask) || \
  152. !is_valid_mask(__mask) || \
  153. (__mask) != (__type)(__mask)) \
  154. #define FIELD8(__mask) \
  155. ({ \
  156. FIELD_CHECK(__mask, u8); \
  157. (struct rt2x00_field8) { \
  158. compile_ffs8(__mask), (__mask) \
  159. }; \
  160. })
  161. #define FIELD16(__mask) \
  162. ({ \
  163. FIELD_CHECK(__mask, u16); \
  164. (struct rt2x00_field16) { \
  165. compile_ffs16(__mask), (__mask) \
  166. }; \
  167. })
  168. #define FIELD32(__mask) \
  169. ({ \
  170. FIELD_CHECK(__mask, u32); \
  171. (struct rt2x00_field32) { \
  172. compile_ffs32(__mask), (__mask) \
  173. }; \
  174. })
  175. static inline void rt2x00_set_field32(u32 *reg,
  176. const struct rt2x00_field32 field,
  177. const u32 value)
  178. {
  179. *reg &= ~(field.bit_mask);
  180. *reg |= (value << field.bit_offset) & field.bit_mask;
  181. }
  182. static inline u32 rt2x00_get_field32(const u32 reg,
  183. const struct rt2x00_field32 field)
  184. {
  185. return (reg & field.bit_mask) >> field.bit_offset;
  186. }
  187. static inline void rt2x00_set_field16(u16 *reg,
  188. const struct rt2x00_field16 field,
  189. const u16 value)
  190. {
  191. *reg &= ~(field.bit_mask);
  192. *reg |= (value << field.bit_offset) & field.bit_mask;
  193. }
  194. static inline u16 rt2x00_get_field16(const u16 reg,
  195. const struct rt2x00_field16 field)
  196. {
  197. return (reg & field.bit_mask) >> field.bit_offset;
  198. }
  199. static inline void rt2x00_set_field8(u8 *reg,
  200. const struct rt2x00_field8 field,
  201. const u8 value)
  202. {
  203. *reg &= ~(field.bit_mask);
  204. *reg |= (value << field.bit_offset) & field.bit_mask;
  205. }
  206. static inline u8 rt2x00_get_field8(const u8 reg,
  207. const struct rt2x00_field8 field)
  208. {
  209. return (reg & field.bit_mask) >> field.bit_offset;
  210. }
  211. #endif /* RT2X00REG_H */