rtc-cmos.c 24 KB

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  1. /*
  2. * RTC class driver for "CMOS RTC": PCs, ACPI, etc
  3. *
  4. * Copyright (C) 1996 Paul Gortmaker (drivers/char/rtc.c)
  5. * Copyright (C) 2006 David Brownell (convert to new framework)
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License
  9. * as published by the Free Software Foundation; either version
  10. * 2 of the License, or (at your option) any later version.
  11. */
  12. /*
  13. * The original "cmos clock" chip was an MC146818 chip, now obsolete.
  14. * That defined the register interface now provided by all PCs, some
  15. * non-PC systems, and incorporated into ACPI. Modern PC chipsets
  16. * integrate an MC146818 clone in their southbridge, and boards use
  17. * that instead of discrete clones like the DS12887 or M48T86. There
  18. * are also clones that connect using the LPC bus.
  19. *
  20. * That register API is also used directly by various other drivers
  21. * (notably for integrated NVRAM), infrastructure (x86 has code to
  22. * bypass the RTC framework, directly reading the RTC during boot
  23. * and updating minutes/seconds for systems using NTP synch) and
  24. * utilities (like userspace 'hwclock', if no /dev node exists).
  25. *
  26. * So **ALL** calls to CMOS_READ and CMOS_WRITE must be done with
  27. * interrupts disabled, holding the global rtc_lock, to exclude those
  28. * other drivers and utilities on correctly configured systems.
  29. */
  30. #include <linux/kernel.h>
  31. #include <linux/module.h>
  32. #include <linux/init.h>
  33. #include <linux/interrupt.h>
  34. #include <linux/spinlock.h>
  35. #include <linux/platform_device.h>
  36. #include <linux/mod_devicetable.h>
  37. #ifdef CONFIG_HPET_EMULATE_RTC
  38. #include <asm/hpet.h>
  39. #endif
  40. /* this is for "generic access to PC-style RTC" using CMOS_READ/CMOS_WRITE */
  41. #include <asm-generic/rtc.h>
  42. #ifndef CONFIG_HPET_EMULATE_RTC
  43. #define is_hpet_enabled() 0
  44. #define hpet_set_alarm_time(hrs, min, sec) do { } while (0)
  45. #define hpet_set_periodic_freq(arg) 0
  46. #define hpet_mask_rtc_irq_bit(arg) do { } while (0)
  47. #define hpet_set_rtc_irq_bit(arg) do { } while (0)
  48. #define hpet_rtc_timer_init() do { } while (0)
  49. #define hpet_register_irq_handler(h) 0
  50. #define hpet_unregister_irq_handler(h) do { } while (0)
  51. extern irqreturn_t hpet_rtc_interrupt(int irq, void *dev_id);
  52. #endif
  53. struct cmos_rtc {
  54. struct rtc_device *rtc;
  55. struct device *dev;
  56. int irq;
  57. struct resource *iomem;
  58. void (*wake_on)(struct device *);
  59. void (*wake_off)(struct device *);
  60. u8 enabled_wake;
  61. u8 suspend_ctrl;
  62. /* newer hardware extends the original register set */
  63. u8 day_alrm;
  64. u8 mon_alrm;
  65. u8 century;
  66. };
  67. /* both platform and pnp busses use negative numbers for invalid irqs */
  68. #define is_valid_irq(n) ((n) >= 0)
  69. static const char driver_name[] = "rtc_cmos";
  70. /* The RTC_INTR register may have e.g. RTC_PF set even if RTC_PIE is clear;
  71. * always mask it against the irq enable bits in RTC_CONTROL. Bit values
  72. * are the same: PF==PIE, AF=AIE, UF=UIE; so RTC_IRQMASK works with both.
  73. */
  74. #define RTC_IRQMASK (RTC_PF | RTC_AF | RTC_UF)
  75. static inline int is_intr(u8 rtc_intr)
  76. {
  77. if (!(rtc_intr & RTC_IRQF))
  78. return 0;
  79. return rtc_intr & RTC_IRQMASK;
  80. }
  81. /*----------------------------------------------------------------*/
  82. static int cmos_read_time(struct device *dev, struct rtc_time *t)
  83. {
  84. /* REVISIT: if the clock has a "century" register, use
  85. * that instead of the heuristic in get_rtc_time().
  86. * That'll make Y3K compatility (year > 2070) easy!
  87. */
  88. get_rtc_time(t);
  89. return 0;
  90. }
  91. static int cmos_set_time(struct device *dev, struct rtc_time *t)
  92. {
  93. /* REVISIT: set the "century" register if available
  94. *
  95. * NOTE: this ignores the issue whereby updating the seconds
  96. * takes effect exactly 500ms after we write the register.
  97. * (Also queueing and other delays before we get this far.)
  98. */
  99. return set_rtc_time(t);
  100. }
  101. static int cmos_read_alarm(struct device *dev, struct rtc_wkalrm *t)
  102. {
  103. struct cmos_rtc *cmos = dev_get_drvdata(dev);
  104. unsigned char rtc_control;
  105. if (!is_valid_irq(cmos->irq))
  106. return -EIO;
  107. /* Basic alarms only support hour, minute, and seconds fields.
  108. * Some also support day and month, for alarms up to a year in
  109. * the future.
  110. */
  111. t->time.tm_mday = -1;
  112. t->time.tm_mon = -1;
  113. spin_lock_irq(&rtc_lock);
  114. t->time.tm_sec = CMOS_READ(RTC_SECONDS_ALARM);
  115. t->time.tm_min = CMOS_READ(RTC_MINUTES_ALARM);
  116. t->time.tm_hour = CMOS_READ(RTC_HOURS_ALARM);
  117. if (cmos->day_alrm) {
  118. /* ignore upper bits on readback per ACPI spec */
  119. t->time.tm_mday = CMOS_READ(cmos->day_alrm) & 0x3f;
  120. if (!t->time.tm_mday)
  121. t->time.tm_mday = -1;
  122. if (cmos->mon_alrm) {
  123. t->time.tm_mon = CMOS_READ(cmos->mon_alrm);
  124. if (!t->time.tm_mon)
  125. t->time.tm_mon = -1;
  126. }
  127. }
  128. rtc_control = CMOS_READ(RTC_CONTROL);
  129. spin_unlock_irq(&rtc_lock);
  130. /* REVISIT this assumes PC style usage: always BCD */
  131. if (((unsigned)t->time.tm_sec) < 0x60)
  132. t->time.tm_sec = BCD2BIN(t->time.tm_sec);
  133. else
  134. t->time.tm_sec = -1;
  135. if (((unsigned)t->time.tm_min) < 0x60)
  136. t->time.tm_min = BCD2BIN(t->time.tm_min);
  137. else
  138. t->time.tm_min = -1;
  139. if (((unsigned)t->time.tm_hour) < 0x24)
  140. t->time.tm_hour = BCD2BIN(t->time.tm_hour);
  141. else
  142. t->time.tm_hour = -1;
  143. if (cmos->day_alrm) {
  144. if (((unsigned)t->time.tm_mday) <= 0x31)
  145. t->time.tm_mday = BCD2BIN(t->time.tm_mday);
  146. else
  147. t->time.tm_mday = -1;
  148. if (cmos->mon_alrm) {
  149. if (((unsigned)t->time.tm_mon) <= 0x12)
  150. t->time.tm_mon = BCD2BIN(t->time.tm_mon) - 1;
  151. else
  152. t->time.tm_mon = -1;
  153. }
  154. }
  155. t->time.tm_year = -1;
  156. t->enabled = !!(rtc_control & RTC_AIE);
  157. t->pending = 0;
  158. return 0;
  159. }
  160. static int cmos_set_alarm(struct device *dev, struct rtc_wkalrm *t)
  161. {
  162. struct cmos_rtc *cmos = dev_get_drvdata(dev);
  163. unsigned char mon, mday, hrs, min, sec;
  164. unsigned char rtc_control, rtc_intr;
  165. if (!is_valid_irq(cmos->irq))
  166. return -EIO;
  167. /* REVISIT this assumes PC style usage: always BCD */
  168. /* Writing 0xff means "don't care" or "match all". */
  169. mon = t->time.tm_mon;
  170. mon = (mon < 12) ? BIN2BCD(mon) : 0xff;
  171. mon++;
  172. mday = t->time.tm_mday;
  173. mday = (mday >= 1 && mday <= 31) ? BIN2BCD(mday) : 0xff;
  174. hrs = t->time.tm_hour;
  175. hrs = (hrs < 24) ? BIN2BCD(hrs) : 0xff;
  176. min = t->time.tm_min;
  177. min = (min < 60) ? BIN2BCD(min) : 0xff;
  178. sec = t->time.tm_sec;
  179. sec = (sec < 60) ? BIN2BCD(sec) : 0xff;
  180. hpet_set_alarm_time(t->time.tm_hour, t->time.tm_min, t->time.tm_sec);
  181. spin_lock_irq(&rtc_lock);
  182. /* next rtc irq must not be from previous alarm setting */
  183. rtc_control = CMOS_READ(RTC_CONTROL);
  184. rtc_control &= ~RTC_AIE;
  185. CMOS_WRITE(rtc_control, RTC_CONTROL);
  186. rtc_intr = CMOS_READ(RTC_INTR_FLAGS);
  187. rtc_intr &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
  188. if (is_intr(rtc_intr))
  189. rtc_update_irq(cmos->rtc, 1, rtc_intr);
  190. /* update alarm */
  191. CMOS_WRITE(hrs, RTC_HOURS_ALARM);
  192. CMOS_WRITE(min, RTC_MINUTES_ALARM);
  193. CMOS_WRITE(sec, RTC_SECONDS_ALARM);
  194. /* the system may support an "enhanced" alarm */
  195. if (cmos->day_alrm) {
  196. CMOS_WRITE(mday, cmos->day_alrm);
  197. if (cmos->mon_alrm)
  198. CMOS_WRITE(mon, cmos->mon_alrm);
  199. }
  200. if (t->enabled) {
  201. rtc_control |= RTC_AIE;
  202. CMOS_WRITE(rtc_control, RTC_CONTROL);
  203. rtc_intr = CMOS_READ(RTC_INTR_FLAGS);
  204. rtc_intr &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
  205. if (is_intr(rtc_intr))
  206. rtc_update_irq(cmos->rtc, 1, rtc_intr);
  207. }
  208. spin_unlock_irq(&rtc_lock);
  209. return 0;
  210. }
  211. static int cmos_irq_set_freq(struct device *dev, int freq)
  212. {
  213. struct cmos_rtc *cmos = dev_get_drvdata(dev);
  214. int f;
  215. unsigned long flags;
  216. if (!is_valid_irq(cmos->irq))
  217. return -ENXIO;
  218. /* 0 = no irqs; 1 = 2^15 Hz ... 15 = 2^0 Hz */
  219. f = ffs(freq);
  220. if (f-- > 16)
  221. return -EINVAL;
  222. f = 16 - f;
  223. spin_lock_irqsave(&rtc_lock, flags);
  224. if (!hpet_set_periodic_freq(freq))
  225. CMOS_WRITE(RTC_REF_CLCK_32KHZ | f, RTC_FREQ_SELECT);
  226. spin_unlock_irqrestore(&rtc_lock, flags);
  227. return 0;
  228. }
  229. static int cmos_irq_set_state(struct device *dev, int enabled)
  230. {
  231. struct cmos_rtc *cmos = dev_get_drvdata(dev);
  232. unsigned char rtc_control, rtc_intr;
  233. unsigned long flags;
  234. if (!is_valid_irq(cmos->irq))
  235. return -ENXIO;
  236. spin_lock_irqsave(&rtc_lock, flags);
  237. rtc_control = CMOS_READ(RTC_CONTROL);
  238. if (enabled)
  239. rtc_control |= RTC_PIE;
  240. else
  241. rtc_control &= ~RTC_PIE;
  242. CMOS_WRITE(rtc_control, RTC_CONTROL);
  243. rtc_intr = CMOS_READ(RTC_INTR_FLAGS);
  244. rtc_intr &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
  245. if (is_intr(rtc_intr))
  246. rtc_update_irq(cmos->rtc, 1, rtc_intr);
  247. spin_unlock_irqrestore(&rtc_lock, flags);
  248. return 0;
  249. }
  250. #if defined(CONFIG_RTC_INTF_DEV) || defined(CONFIG_RTC_INTF_DEV_MODULE)
  251. static int
  252. cmos_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
  253. {
  254. struct cmos_rtc *cmos = dev_get_drvdata(dev);
  255. unsigned char rtc_control, rtc_intr;
  256. unsigned long flags;
  257. switch (cmd) {
  258. case RTC_AIE_OFF:
  259. case RTC_AIE_ON:
  260. case RTC_UIE_OFF:
  261. case RTC_UIE_ON:
  262. case RTC_PIE_OFF:
  263. case RTC_PIE_ON:
  264. if (!is_valid_irq(cmos->irq))
  265. return -EINVAL;
  266. break;
  267. default:
  268. return -ENOIOCTLCMD;
  269. }
  270. spin_lock_irqsave(&rtc_lock, flags);
  271. rtc_control = CMOS_READ(RTC_CONTROL);
  272. switch (cmd) {
  273. case RTC_AIE_OFF: /* alarm off */
  274. rtc_control &= ~RTC_AIE;
  275. hpet_mask_rtc_irq_bit(RTC_AIE);
  276. break;
  277. case RTC_AIE_ON: /* alarm on */
  278. rtc_control |= RTC_AIE;
  279. hpet_set_rtc_irq_bit(RTC_AIE);
  280. break;
  281. case RTC_UIE_OFF: /* update off */
  282. rtc_control &= ~RTC_UIE;
  283. hpet_mask_rtc_irq_bit(RTC_UIE);
  284. break;
  285. case RTC_UIE_ON: /* update on */
  286. rtc_control |= RTC_UIE;
  287. hpet_set_rtc_irq_bit(RTC_UIE);
  288. break;
  289. case RTC_PIE_OFF: /* periodic off */
  290. rtc_control &= ~RTC_PIE;
  291. hpet_mask_rtc_irq_bit(RTC_PIE);
  292. break;
  293. case RTC_PIE_ON: /* periodic on */
  294. rtc_control |= RTC_PIE;
  295. hpet_set_rtc_irq_bit(RTC_PIE);
  296. break;
  297. }
  298. if (!is_hpet_enabled())
  299. CMOS_WRITE(rtc_control, RTC_CONTROL);
  300. rtc_intr = CMOS_READ(RTC_INTR_FLAGS);
  301. rtc_intr &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
  302. if (is_intr(rtc_intr))
  303. rtc_update_irq(cmos->rtc, 1, rtc_intr);
  304. spin_unlock_irqrestore(&rtc_lock, flags);
  305. return 0;
  306. }
  307. #else
  308. #define cmos_rtc_ioctl NULL
  309. #endif
  310. #if defined(CONFIG_RTC_INTF_PROC) || defined(CONFIG_RTC_INTF_PROC_MODULE)
  311. static int cmos_procfs(struct device *dev, struct seq_file *seq)
  312. {
  313. struct cmos_rtc *cmos = dev_get_drvdata(dev);
  314. unsigned char rtc_control, valid;
  315. spin_lock_irq(&rtc_lock);
  316. rtc_control = CMOS_READ(RTC_CONTROL);
  317. valid = CMOS_READ(RTC_VALID);
  318. spin_unlock_irq(&rtc_lock);
  319. /* NOTE: at least ICH6 reports battery status using a different
  320. * (non-RTC) bit; and SQWE is ignored on many current systems.
  321. */
  322. return seq_printf(seq,
  323. "periodic_IRQ\t: %s\n"
  324. "update_IRQ\t: %s\n"
  325. // "square_wave\t: %s\n"
  326. // "BCD\t\t: %s\n"
  327. "DST_enable\t: %s\n"
  328. "periodic_freq\t: %d\n"
  329. "batt_status\t: %s\n",
  330. (rtc_control & RTC_PIE) ? "yes" : "no",
  331. (rtc_control & RTC_UIE) ? "yes" : "no",
  332. // (rtc_control & RTC_SQWE) ? "yes" : "no",
  333. // (rtc_control & RTC_DM_BINARY) ? "no" : "yes",
  334. (rtc_control & RTC_DST_EN) ? "yes" : "no",
  335. cmos->rtc->irq_freq,
  336. (valid & RTC_VRT) ? "okay" : "dead");
  337. }
  338. #else
  339. #define cmos_procfs NULL
  340. #endif
  341. static const struct rtc_class_ops cmos_rtc_ops = {
  342. .ioctl = cmos_rtc_ioctl,
  343. .read_time = cmos_read_time,
  344. .set_time = cmos_set_time,
  345. .read_alarm = cmos_read_alarm,
  346. .set_alarm = cmos_set_alarm,
  347. .proc = cmos_procfs,
  348. .irq_set_freq = cmos_irq_set_freq,
  349. .irq_set_state = cmos_irq_set_state,
  350. };
  351. /*----------------------------------------------------------------*/
  352. /*
  353. * All these chips have at least 64 bytes of address space, shared by
  354. * RTC registers and NVRAM. Most of those bytes of NVRAM are used
  355. * by boot firmware. Modern chips have 128 or 256 bytes.
  356. */
  357. #define NVRAM_OFFSET (RTC_REG_D + 1)
  358. static ssize_t
  359. cmos_nvram_read(struct kobject *kobj, struct bin_attribute *attr,
  360. char *buf, loff_t off, size_t count)
  361. {
  362. int retval;
  363. if (unlikely(off >= attr->size))
  364. return 0;
  365. if ((off + count) > attr->size)
  366. count = attr->size - off;
  367. spin_lock_irq(&rtc_lock);
  368. for (retval = 0, off += NVRAM_OFFSET; count--; retval++, off++)
  369. *buf++ = CMOS_READ(off);
  370. spin_unlock_irq(&rtc_lock);
  371. return retval;
  372. }
  373. static ssize_t
  374. cmos_nvram_write(struct kobject *kobj, struct bin_attribute *attr,
  375. char *buf, loff_t off, size_t count)
  376. {
  377. struct cmos_rtc *cmos;
  378. int retval;
  379. cmos = dev_get_drvdata(container_of(kobj, struct device, kobj));
  380. if (unlikely(off >= attr->size))
  381. return -EFBIG;
  382. if ((off + count) > attr->size)
  383. count = attr->size - off;
  384. /* NOTE: on at least PCs and Ataris, the boot firmware uses a
  385. * checksum on part of the NVRAM data. That's currently ignored
  386. * here. If userspace is smart enough to know what fields of
  387. * NVRAM to update, updating checksums is also part of its job.
  388. */
  389. spin_lock_irq(&rtc_lock);
  390. for (retval = 0, off += NVRAM_OFFSET; count--; retval++, off++) {
  391. /* don't trash RTC registers */
  392. if (off == cmos->day_alrm
  393. || off == cmos->mon_alrm
  394. || off == cmos->century)
  395. buf++;
  396. else
  397. CMOS_WRITE(*buf++, off);
  398. }
  399. spin_unlock_irq(&rtc_lock);
  400. return retval;
  401. }
  402. static struct bin_attribute nvram = {
  403. .attr = {
  404. .name = "nvram",
  405. .mode = S_IRUGO | S_IWUSR,
  406. .owner = THIS_MODULE,
  407. },
  408. .read = cmos_nvram_read,
  409. .write = cmos_nvram_write,
  410. /* size gets set up later */
  411. };
  412. /*----------------------------------------------------------------*/
  413. static struct cmos_rtc cmos_rtc;
  414. static irqreturn_t cmos_interrupt(int irq, void *p)
  415. {
  416. u8 irqstat;
  417. u8 rtc_control;
  418. spin_lock(&rtc_lock);
  419. /*
  420. * In this case it is HPET RTC interrupt handler
  421. * calling us, with the interrupt information
  422. * passed as arg1, instead of irq.
  423. */
  424. if (is_hpet_enabled())
  425. irqstat = (unsigned long)irq & 0xF0;
  426. else {
  427. irqstat = CMOS_READ(RTC_INTR_FLAGS);
  428. rtc_control = CMOS_READ(RTC_CONTROL);
  429. irqstat &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
  430. }
  431. /* All Linux RTC alarms should be treated as if they were oneshot.
  432. * Similar code may be needed in system wakeup paths, in case the
  433. * alarm woke the system.
  434. */
  435. if (irqstat & RTC_AIE) {
  436. rtc_control = CMOS_READ(RTC_CONTROL);
  437. rtc_control &= ~RTC_AIE;
  438. CMOS_WRITE(rtc_control, RTC_CONTROL);
  439. CMOS_READ(RTC_INTR_FLAGS);
  440. }
  441. spin_unlock(&rtc_lock);
  442. if (is_intr(irqstat)) {
  443. rtc_update_irq(p, 1, irqstat);
  444. return IRQ_HANDLED;
  445. } else
  446. return IRQ_NONE;
  447. }
  448. #ifdef CONFIG_PNP
  449. #define INITSECTION
  450. #else
  451. #define INITSECTION __init
  452. #endif
  453. static int INITSECTION
  454. cmos_do_probe(struct device *dev, struct resource *ports, int rtc_irq)
  455. {
  456. struct cmos_rtc_board_info *info = dev->platform_data;
  457. int retval = 0;
  458. unsigned char rtc_control;
  459. unsigned address_space;
  460. /* there can be only one ... */
  461. if (cmos_rtc.dev)
  462. return -EBUSY;
  463. if (!ports)
  464. return -ENODEV;
  465. /* Claim I/O ports ASAP, minimizing conflict with legacy driver.
  466. *
  467. * REVISIT non-x86 systems may instead use memory space resources
  468. * (needing ioremap etc), not i/o space resources like this ...
  469. */
  470. ports = request_region(ports->start,
  471. ports->end + 1 - ports->start,
  472. driver_name);
  473. if (!ports) {
  474. dev_dbg(dev, "i/o registers already in use\n");
  475. return -EBUSY;
  476. }
  477. cmos_rtc.irq = rtc_irq;
  478. cmos_rtc.iomem = ports;
  479. /* Heuristic to deduce NVRAM size ... do what the legacy NVRAM
  480. * driver did, but don't reject unknown configs. Old hardware
  481. * won't address 128 bytes, and for now we ignore the way newer
  482. * chips can address 256 bytes (using two more i/o ports).
  483. */
  484. #if defined(CONFIG_ATARI)
  485. address_space = 64;
  486. #elif defined(__i386__) || defined(__x86_64__) || defined(__arm__)
  487. address_space = 128;
  488. #else
  489. #warning Assuming 128 bytes of RTC+NVRAM address space, not 64 bytes.
  490. address_space = 128;
  491. #endif
  492. /* For ACPI systems extension info comes from the FADT. On others,
  493. * board specific setup provides it as appropriate. Systems where
  494. * the alarm IRQ isn't automatically a wakeup IRQ (like ACPI, and
  495. * some almost-clones) can provide hooks to make that behave.
  496. *
  497. * Note that ACPI doesn't preclude putting these registers into
  498. * "extended" areas of the chip, including some that we won't yet
  499. * expect CMOS_READ and friends to handle.
  500. */
  501. if (info) {
  502. if (info->rtc_day_alarm && info->rtc_day_alarm < 128)
  503. cmos_rtc.day_alrm = info->rtc_day_alarm;
  504. if (info->rtc_mon_alarm && info->rtc_mon_alarm < 128)
  505. cmos_rtc.mon_alrm = info->rtc_mon_alarm;
  506. if (info->rtc_century && info->rtc_century < 128)
  507. cmos_rtc.century = info->rtc_century;
  508. if (info->wake_on && info->wake_off) {
  509. cmos_rtc.wake_on = info->wake_on;
  510. cmos_rtc.wake_off = info->wake_off;
  511. }
  512. }
  513. cmos_rtc.rtc = rtc_device_register(driver_name, dev,
  514. &cmos_rtc_ops, THIS_MODULE);
  515. if (IS_ERR(cmos_rtc.rtc)) {
  516. retval = PTR_ERR(cmos_rtc.rtc);
  517. goto cleanup0;
  518. }
  519. cmos_rtc.dev = dev;
  520. dev_set_drvdata(dev, &cmos_rtc);
  521. rename_region(ports, cmos_rtc.rtc->dev.bus_id);
  522. spin_lock_irq(&rtc_lock);
  523. /* force periodic irq to CMOS reset default of 1024Hz;
  524. *
  525. * REVISIT it's been reported that at least one x86_64 ALI mobo
  526. * doesn't use 32KHz here ... for portability we might need to
  527. * do something about other clock frequencies.
  528. */
  529. cmos_rtc.rtc->irq_freq = 1024;
  530. if (!hpet_set_periodic_freq(cmos_rtc.rtc->irq_freq))
  531. CMOS_WRITE(RTC_REF_CLCK_32KHZ | 0x06, RTC_FREQ_SELECT);
  532. /* disable irqs.
  533. *
  534. * NOTE after changing RTC_xIE bits we always read INTR_FLAGS;
  535. * allegedly some older rtcs need that to handle irqs properly
  536. */
  537. rtc_control = CMOS_READ(RTC_CONTROL);
  538. rtc_control &= ~(RTC_PIE | RTC_AIE | RTC_UIE);
  539. CMOS_WRITE(rtc_control, RTC_CONTROL);
  540. CMOS_READ(RTC_INTR_FLAGS);
  541. spin_unlock_irq(&rtc_lock);
  542. /* FIXME teach the alarm code how to handle binary mode;
  543. * <asm-generic/rtc.h> doesn't know 12-hour mode either.
  544. */
  545. if (!(rtc_control & RTC_24H) || (rtc_control & (RTC_DM_BINARY))) {
  546. dev_dbg(dev, "only 24-hr BCD mode supported\n");
  547. retval = -ENXIO;
  548. goto cleanup1;
  549. }
  550. if (is_valid_irq(rtc_irq)) {
  551. irq_handler_t rtc_cmos_int_handler;
  552. if (is_hpet_enabled()) {
  553. int err;
  554. rtc_cmos_int_handler = hpet_rtc_interrupt;
  555. err = hpet_register_irq_handler(cmos_interrupt);
  556. if (err != 0) {
  557. printk(KERN_WARNING "hpet_register_irq_handler "
  558. " failed in rtc_init().");
  559. goto cleanup1;
  560. }
  561. } else
  562. rtc_cmos_int_handler = cmos_interrupt;
  563. retval = request_irq(rtc_irq, rtc_cmos_int_handler,
  564. IRQF_DISABLED, cmos_rtc.rtc->dev.bus_id,
  565. cmos_rtc.rtc);
  566. if (retval < 0) {
  567. dev_dbg(dev, "IRQ %d is already in use\n", rtc_irq);
  568. goto cleanup1;
  569. }
  570. }
  571. hpet_rtc_timer_init();
  572. /* export at least the first block of NVRAM */
  573. nvram.size = address_space - NVRAM_OFFSET;
  574. retval = sysfs_create_bin_file(&dev->kobj, &nvram);
  575. if (retval < 0) {
  576. dev_dbg(dev, "can't create nvram file? %d\n", retval);
  577. goto cleanup2;
  578. }
  579. pr_info("%s: alarms up to one %s%s\n",
  580. cmos_rtc.rtc->dev.bus_id,
  581. is_valid_irq(rtc_irq)
  582. ? (cmos_rtc.mon_alrm
  583. ? "year"
  584. : (cmos_rtc.day_alrm
  585. ? "month" : "day"))
  586. : "no",
  587. cmos_rtc.century ? ", y3k" : ""
  588. );
  589. return 0;
  590. cleanup2:
  591. if (is_valid_irq(rtc_irq))
  592. free_irq(rtc_irq, cmos_rtc.rtc);
  593. cleanup1:
  594. cmos_rtc.dev = NULL;
  595. rtc_device_unregister(cmos_rtc.rtc);
  596. cleanup0:
  597. release_region(ports->start, ports->end + 1 - ports->start);
  598. return retval;
  599. }
  600. static void cmos_do_shutdown(void)
  601. {
  602. unsigned char rtc_control;
  603. spin_lock_irq(&rtc_lock);
  604. rtc_control = CMOS_READ(RTC_CONTROL);
  605. rtc_control &= ~(RTC_PIE|RTC_AIE|RTC_UIE);
  606. CMOS_WRITE(rtc_control, RTC_CONTROL);
  607. CMOS_READ(RTC_INTR_FLAGS);
  608. spin_unlock_irq(&rtc_lock);
  609. }
  610. static void __exit cmos_do_remove(struct device *dev)
  611. {
  612. struct cmos_rtc *cmos = dev_get_drvdata(dev);
  613. struct resource *ports;
  614. cmos_do_shutdown();
  615. sysfs_remove_bin_file(&dev->kobj, &nvram);
  616. if (is_valid_irq(cmos->irq)) {
  617. free_irq(cmos->irq, cmos->rtc);
  618. hpet_unregister_irq_handler(cmos_interrupt);
  619. }
  620. rtc_device_unregister(cmos->rtc);
  621. cmos->rtc = NULL;
  622. ports = cmos->iomem;
  623. release_region(ports->start, ports->end + 1 - ports->start);
  624. cmos->iomem = NULL;
  625. cmos->dev = NULL;
  626. dev_set_drvdata(dev, NULL);
  627. }
  628. #ifdef CONFIG_PM
  629. static int cmos_suspend(struct device *dev, pm_message_t mesg)
  630. {
  631. struct cmos_rtc *cmos = dev_get_drvdata(dev);
  632. int do_wake = device_may_wakeup(dev);
  633. unsigned char tmp;
  634. /* only the alarm might be a wakeup event source */
  635. spin_lock_irq(&rtc_lock);
  636. cmos->suspend_ctrl = tmp = CMOS_READ(RTC_CONTROL);
  637. if (tmp & (RTC_PIE|RTC_AIE|RTC_UIE)) {
  638. unsigned char irqstat;
  639. if (do_wake)
  640. tmp &= ~(RTC_PIE|RTC_UIE);
  641. else
  642. tmp &= ~(RTC_PIE|RTC_AIE|RTC_UIE);
  643. CMOS_WRITE(tmp, RTC_CONTROL);
  644. irqstat = CMOS_READ(RTC_INTR_FLAGS);
  645. irqstat &= (tmp & RTC_IRQMASK) | RTC_IRQF;
  646. if (is_intr(irqstat))
  647. rtc_update_irq(cmos->rtc, 1, irqstat);
  648. }
  649. spin_unlock_irq(&rtc_lock);
  650. if (tmp & RTC_AIE) {
  651. cmos->enabled_wake = 1;
  652. if (cmos->wake_on)
  653. cmos->wake_on(dev);
  654. else
  655. enable_irq_wake(cmos->irq);
  656. }
  657. pr_debug("%s: suspend%s, ctrl %02x\n",
  658. cmos_rtc.rtc->dev.bus_id,
  659. (tmp & RTC_AIE) ? ", alarm may wake" : "",
  660. tmp);
  661. return 0;
  662. }
  663. static int cmos_resume(struct device *dev)
  664. {
  665. struct cmos_rtc *cmos = dev_get_drvdata(dev);
  666. unsigned char tmp = cmos->suspend_ctrl;
  667. /* re-enable any irqs previously active */
  668. if (tmp & (RTC_PIE|RTC_AIE|RTC_UIE)) {
  669. if (cmos->enabled_wake) {
  670. if (cmos->wake_off)
  671. cmos->wake_off(dev);
  672. else
  673. disable_irq_wake(cmos->irq);
  674. cmos->enabled_wake = 0;
  675. }
  676. spin_lock_irq(&rtc_lock);
  677. CMOS_WRITE(tmp, RTC_CONTROL);
  678. tmp = CMOS_READ(RTC_INTR_FLAGS);
  679. tmp &= (cmos->suspend_ctrl & RTC_IRQMASK) | RTC_IRQF;
  680. if (is_intr(tmp))
  681. rtc_update_irq(cmos->rtc, 1, tmp);
  682. spin_unlock_irq(&rtc_lock);
  683. }
  684. pr_debug("%s: resume, ctrl %02x\n",
  685. cmos_rtc.rtc->dev.bus_id,
  686. cmos->suspend_ctrl);
  687. return 0;
  688. }
  689. #else
  690. #define cmos_suspend NULL
  691. #define cmos_resume NULL
  692. #endif
  693. /*----------------------------------------------------------------*/
  694. /* On non-x86 systems, a "CMOS" RTC lives most naturally on platform_bus.
  695. * ACPI systems always list these as PNPACPI devices, and pre-ACPI PCs
  696. * probably list them in similar PNPBIOS tables; so PNP is more common.
  697. *
  698. * We don't use legacy "poke at the hardware" probing. Ancient PCs that
  699. * predate even PNPBIOS should set up platform_bus devices.
  700. */
  701. #ifdef CONFIG_PNP
  702. #include <linux/pnp.h>
  703. static int __devinit
  704. cmos_pnp_probe(struct pnp_dev *pnp, const struct pnp_device_id *id)
  705. {
  706. /* REVISIT paranoia argues for a shutdown notifier, since PNP
  707. * drivers can't provide shutdown() methods to disable IRQs.
  708. * Or better yet, fix PNP to allow those methods...
  709. */
  710. if (pnp_port_start(pnp,0) == 0x70 && !pnp_irq_valid(pnp,0))
  711. /* Some machines contain a PNP entry for the RTC, but
  712. * don't define the IRQ. It should always be safe to
  713. * hardcode it in these cases
  714. */
  715. return cmos_do_probe(&pnp->dev, &pnp->res.port_resource[0], 8);
  716. else
  717. return cmos_do_probe(&pnp->dev,
  718. &pnp->res.port_resource[0],
  719. pnp->res.irq_resource[0].start);
  720. }
  721. static void __exit cmos_pnp_remove(struct pnp_dev *pnp)
  722. {
  723. cmos_do_remove(&pnp->dev);
  724. }
  725. #ifdef CONFIG_PM
  726. static int cmos_pnp_suspend(struct pnp_dev *pnp, pm_message_t mesg)
  727. {
  728. return cmos_suspend(&pnp->dev, mesg);
  729. }
  730. static int cmos_pnp_resume(struct pnp_dev *pnp)
  731. {
  732. return cmos_resume(&pnp->dev);
  733. }
  734. #else
  735. #define cmos_pnp_suspend NULL
  736. #define cmos_pnp_resume NULL
  737. #endif
  738. static const struct pnp_device_id rtc_ids[] = {
  739. { .id = "PNP0b00", },
  740. { .id = "PNP0b01", },
  741. { .id = "PNP0b02", },
  742. { },
  743. };
  744. MODULE_DEVICE_TABLE(pnp, rtc_ids);
  745. static struct pnp_driver cmos_pnp_driver = {
  746. .name = (char *) driver_name,
  747. .id_table = rtc_ids,
  748. .probe = cmos_pnp_probe,
  749. .remove = __exit_p(cmos_pnp_remove),
  750. /* flag ensures resume() gets called, and stops syslog spam */
  751. .flags = PNP_DRIVER_RES_DO_NOT_CHANGE,
  752. .suspend = cmos_pnp_suspend,
  753. .resume = cmos_pnp_resume,
  754. };
  755. static int __init cmos_init(void)
  756. {
  757. return pnp_register_driver(&cmos_pnp_driver);
  758. }
  759. module_init(cmos_init);
  760. static void __exit cmos_exit(void)
  761. {
  762. pnp_unregister_driver(&cmos_pnp_driver);
  763. }
  764. module_exit(cmos_exit);
  765. #else /* no PNP */
  766. /*----------------------------------------------------------------*/
  767. /* Platform setup should have set up an RTC device, when PNP is
  768. * unavailable ... this could happen even on (older) PCs.
  769. */
  770. static int __init cmos_platform_probe(struct platform_device *pdev)
  771. {
  772. return cmos_do_probe(&pdev->dev,
  773. platform_get_resource(pdev, IORESOURCE_IO, 0),
  774. platform_get_irq(pdev, 0));
  775. }
  776. static int __exit cmos_platform_remove(struct platform_device *pdev)
  777. {
  778. cmos_do_remove(&pdev->dev);
  779. return 0;
  780. }
  781. static void cmos_platform_shutdown(struct platform_device *pdev)
  782. {
  783. cmos_do_shutdown();
  784. }
  785. static struct platform_driver cmos_platform_driver = {
  786. .remove = __exit_p(cmos_platform_remove),
  787. .shutdown = cmos_platform_shutdown,
  788. .driver = {
  789. .name = (char *) driver_name,
  790. .suspend = cmos_suspend,
  791. .resume = cmos_resume,
  792. }
  793. };
  794. static int __init cmos_init(void)
  795. {
  796. return platform_driver_probe(&cmos_platform_driver,
  797. cmos_platform_probe);
  798. }
  799. module_init(cmos_init);
  800. static void __exit cmos_exit(void)
  801. {
  802. platform_driver_unregister(&cmos_platform_driver);
  803. }
  804. module_exit(cmos_exit);
  805. #endif /* !PNP */
  806. MODULE_AUTHOR("David Brownell");
  807. MODULE_DESCRIPTION("Driver for PC-style 'CMOS' RTCs");
  808. MODULE_LICENSE("GPL");