mx51_efika.c 7.0 KB

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  1. /*
  2. * based on code from the following
  3. * Copyright 2009-2010 Freescale Semiconductor, Inc. All Rights Reserved.
  4. * Copyright 2009-2010 Pegatron Corporation. All Rights Reserved.
  5. * Copyright 2009-2010 Genesi USA, Inc. All Rights Reserved.
  6. *
  7. * The code contained herein is licensed under the GNU General Public
  8. * License. You may obtain a copy of the GNU General Public License
  9. * Version 2 or later at the following locations:
  10. *
  11. * http://www.opensource.org/licenses/gpl-license.html
  12. * http://www.gnu.org/copyleft/gpl.html
  13. */
  14. #include <linux/init.h>
  15. #include <linux/platform_device.h>
  16. #include <linux/i2c.h>
  17. #include <linux/gpio.h>
  18. #include <linux/leds.h>
  19. #include <linux/input.h>
  20. #include <linux/delay.h>
  21. #include <linux/io.h>
  22. #include <linux/fsl_devices.h>
  23. #include <linux/spi/flash.h>
  24. #include <linux/spi/spi.h>
  25. #include <mach/common.h>
  26. #include <mach/hardware.h>
  27. #include <mach/iomux-mx51.h>
  28. #include <mach/i2c.h>
  29. #include <mach/mxc_ehci.h>
  30. #include <linux/usb/otg.h>
  31. #include <linux/usb/ulpi.h>
  32. #include <mach/ulpi.h>
  33. #include <asm/irq.h>
  34. #include <asm/setup.h>
  35. #include <asm/mach-types.h>
  36. #include <asm/mach/arch.h>
  37. #include <asm/mach/time.h>
  38. #include "devices-imx51.h"
  39. #include "devices.h"
  40. #include "efika.h"
  41. #define MX51_USB_CTRL_1_OFFSET 0x10
  42. #define MX51_USB_CTRL_UH1_EXT_CLK_EN (1 << 25)
  43. #define MX51_USB_PLL_DIV_19_2_MHZ 0x01
  44. #define EFIKAMX_USB_HUB_RESET IMX_GPIO_NR(1, 5)
  45. #define EFIKAMX_USBH1_STP IMX_GPIO_NR(1, 27)
  46. #define EFIKAMX_SPI_CS0 IMX_GPIO_NR(4, 24)
  47. #define EFIKAMX_SPI_CS1 IMX_GPIO_NR(4, 25)
  48. static iomux_v3_cfg_t mx51efika_pads[] = {
  49. /* UART1 */
  50. MX51_PAD_UART1_RXD__UART1_RXD,
  51. MX51_PAD_UART1_TXD__UART1_TXD,
  52. MX51_PAD_UART1_RTS__UART1_RTS,
  53. MX51_PAD_UART1_CTS__UART1_CTS,
  54. /* SD 1 */
  55. MX51_PAD_SD1_CMD__SD1_CMD,
  56. MX51_PAD_SD1_CLK__SD1_CLK,
  57. MX51_PAD_SD1_DATA0__SD1_DATA0,
  58. MX51_PAD_SD1_DATA1__SD1_DATA1,
  59. MX51_PAD_SD1_DATA2__SD1_DATA2,
  60. MX51_PAD_SD1_DATA3__SD1_DATA3,
  61. /* SD 2 */
  62. MX51_PAD_SD2_CMD__SD2_CMD,
  63. MX51_PAD_SD2_CLK__SD2_CLK,
  64. MX51_PAD_SD2_DATA0__SD2_DATA0,
  65. MX51_PAD_SD2_DATA1__SD2_DATA1,
  66. MX51_PAD_SD2_DATA2__SD2_DATA2,
  67. MX51_PAD_SD2_DATA3__SD2_DATA3,
  68. /* SD/MMC WP/CD */
  69. MX51_PAD_GPIO1_0__SD1_CD,
  70. MX51_PAD_GPIO1_1__SD1_WP,
  71. MX51_PAD_GPIO1_7__SD2_WP,
  72. MX51_PAD_GPIO1_8__SD2_CD,
  73. /* spi */
  74. MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI,
  75. MX51_PAD_CSPI1_MISO__ECSPI1_MISO,
  76. MX51_PAD_CSPI1_SS0__GPIO4_24,
  77. MX51_PAD_CSPI1_SS1__GPIO4_25,
  78. MX51_PAD_CSPI1_RDY__ECSPI1_RDY,
  79. MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK,
  80. /* USB HOST1 */
  81. MX51_PAD_USBH1_CLK__USBH1_CLK,
  82. MX51_PAD_USBH1_DIR__USBH1_DIR,
  83. MX51_PAD_USBH1_NXT__USBH1_NXT,
  84. MX51_PAD_USBH1_DATA0__USBH1_DATA0,
  85. MX51_PAD_USBH1_DATA1__USBH1_DATA1,
  86. MX51_PAD_USBH1_DATA2__USBH1_DATA2,
  87. MX51_PAD_USBH1_DATA3__USBH1_DATA3,
  88. MX51_PAD_USBH1_DATA4__USBH1_DATA4,
  89. MX51_PAD_USBH1_DATA5__USBH1_DATA5,
  90. MX51_PAD_USBH1_DATA6__USBH1_DATA6,
  91. MX51_PAD_USBH1_DATA7__USBH1_DATA7,
  92. /* USB HUB RESET */
  93. MX51_PAD_GPIO1_5__GPIO1_5,
  94. /* WLAN */
  95. MX51_PAD_EIM_A22__GPIO2_16,
  96. MX51_PAD_EIM_A16__GPIO2_10,
  97. /* USB PHY RESET */
  98. MX51_PAD_EIM_D27__GPIO2_9,
  99. };
  100. /* Serial ports */
  101. static const struct imxuart_platform_data uart_pdata = {
  102. .flags = IMXUART_HAVE_RTSCTS,
  103. };
  104. /* This function is board specific as the bit mask for the plldiv will also
  105. * be different for other Freescale SoCs, thus a common bitmask is not
  106. * possible and cannot get place in /plat-mxc/ehci.c.
  107. */
  108. static int initialize_otg_port(struct platform_device *pdev)
  109. {
  110. u32 v;
  111. void __iomem *usb_base;
  112. void __iomem *usbother_base;
  113. usb_base = ioremap(MX51_OTG_BASE_ADDR, SZ_4K);
  114. if (!usb_base)
  115. return -ENOMEM;
  116. usbother_base = (void __iomem *)(usb_base + MX5_USBOTHER_REGS_OFFSET);
  117. /* Set the PHY clock to 19.2MHz */
  118. v = __raw_readl(usbother_base + MXC_USB_PHY_CTR_FUNC2_OFFSET);
  119. v &= ~MX5_USB_UTMI_PHYCTRL1_PLLDIV_MASK;
  120. v |= MX51_USB_PLL_DIV_19_2_MHZ;
  121. __raw_writel(v, usbother_base + MXC_USB_PHY_CTR_FUNC2_OFFSET);
  122. iounmap(usb_base);
  123. mdelay(10);
  124. return mx51_initialize_usb_hw(pdev->id, MXC_EHCI_INTERNAL_PHY);
  125. }
  126. static struct mxc_usbh_platform_data dr_utmi_config = {
  127. .init = initialize_otg_port,
  128. .portsc = MXC_EHCI_UTMI_16BIT,
  129. };
  130. static int initialize_usbh1_port(struct platform_device *pdev)
  131. {
  132. iomux_v3_cfg_t usbh1stp = MX51_PAD_USBH1_STP__USBH1_STP;
  133. iomux_v3_cfg_t usbh1gpio = MX51_PAD_USBH1_STP__GPIO1_27;
  134. u32 v;
  135. void __iomem *usb_base;
  136. void __iomem *socregs_base;
  137. mxc_iomux_v3_setup_pad(usbh1gpio);
  138. gpio_request(EFIKAMX_USBH1_STP, "usbh1_stp");
  139. gpio_direction_output(EFIKAMX_USBH1_STP, 0);
  140. msleep(1);
  141. gpio_set_value(EFIKAMX_USBH1_STP, 1);
  142. msleep(1);
  143. usb_base = ioremap(MX51_OTG_BASE_ADDR, SZ_4K);
  144. socregs_base = (void __iomem *)(usb_base + MX5_USBOTHER_REGS_OFFSET);
  145. /* The clock for the USBH1 ULPI port will come externally */
  146. /* from the PHY. */
  147. v = __raw_readl(socregs_base + MX51_USB_CTRL_1_OFFSET);
  148. __raw_writel(v | MX51_USB_CTRL_UH1_EXT_CLK_EN,
  149. socregs_base + MX51_USB_CTRL_1_OFFSET);
  150. iounmap(usb_base);
  151. gpio_free(EFIKAMX_USBH1_STP);
  152. mxc_iomux_v3_setup_pad(usbh1stp);
  153. mdelay(10);
  154. return mx51_initialize_usb_hw(0, MXC_EHCI_ITC_NO_THRESHOLD);
  155. }
  156. static struct mxc_usbh_platform_data usbh1_config = {
  157. .init = initialize_usbh1_port,
  158. .portsc = MXC_EHCI_MODE_ULPI,
  159. };
  160. static void mx51_efika_hubreset(void)
  161. {
  162. gpio_request(EFIKAMX_USB_HUB_RESET, "usb_hub_rst");
  163. gpio_direction_output(EFIKAMX_USB_HUB_RESET, 1);
  164. msleep(1);
  165. gpio_set_value(EFIKAMX_USB_HUB_RESET, 0);
  166. msleep(1);
  167. gpio_set_value(EFIKAMX_USB_HUB_RESET, 1);
  168. }
  169. static void __init mx51_efika_usb(void)
  170. {
  171. mx51_efika_hubreset();
  172. /* pulling it low, means no USB at all... */
  173. gpio_request(EFIKA_USB_PHY_RESET, "usb_phy_reset");
  174. gpio_direction_output(EFIKA_USB_PHY_RESET, 0);
  175. msleep(1);
  176. gpio_set_value(EFIKA_USB_PHY_RESET, 1);
  177. usbh1_config.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
  178. ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT |
  179. ULPI_OTG_EXTVBUSIND);
  180. mxc_register_device(&mxc_usbdr_host_device, &dr_utmi_config);
  181. mxc_register_device(&mxc_usbh1_device, &usbh1_config);
  182. }
  183. static struct mtd_partition mx51_efika_spi_nor_partitions[] = {
  184. {
  185. .name = "u-boot",
  186. .offset = 0,
  187. .size = SZ_256K,
  188. },
  189. {
  190. .name = "config",
  191. .offset = MTDPART_OFS_APPEND,
  192. .size = SZ_64K,
  193. },
  194. };
  195. static struct flash_platform_data mx51_efika_spi_flash_data = {
  196. .name = "spi_flash",
  197. .parts = mx51_efika_spi_nor_partitions,
  198. .nr_parts = ARRAY_SIZE(mx51_efika_spi_nor_partitions),
  199. .type = "sst25vf032b",
  200. };
  201. static struct spi_board_info mx51_efika_spi_board_info[] __initdata = {
  202. {
  203. .modalias = "m25p80",
  204. .max_speed_hz = 25000000,
  205. .bus_num = 0,
  206. .chip_select = 1,
  207. .platform_data = &mx51_efika_spi_flash_data,
  208. .irq = -1,
  209. },
  210. };
  211. static int mx51_efika_spi_cs[] = {
  212. EFIKAMX_SPI_CS0,
  213. EFIKAMX_SPI_CS1,
  214. };
  215. static const struct spi_imx_master mx51_efika_spi_pdata __initconst = {
  216. .chipselect = mx51_efika_spi_cs,
  217. .num_chipselect = ARRAY_SIZE(mx51_efika_spi_cs),
  218. };
  219. void __init efika_board_common_init(void)
  220. {
  221. mxc_iomux_v3_setup_multiple_pads(mx51efika_pads,
  222. ARRAY_SIZE(mx51efika_pads));
  223. imx51_add_imx_uart(0, &uart_pdata);
  224. mx51_efika_usb();
  225. imx51_add_sdhci_esdhc_imx(0, NULL);
  226. spi_register_board_info(mx51_efika_spi_board_info,
  227. ARRAY_SIZE(mx51_efika_spi_board_info));
  228. imx51_add_ecspi(0, &mx51_efika_spi_pdata);
  229. }